US20010002120A1 - Electromagnetic energy detection - Google Patents
Electromagnetic energy detection Download PDFInfo
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- US20010002120A1 US20010002120A1 US09/756,808 US75680801A US2001002120A1 US 20010002120 A1 US20010002120 A1 US 20010002120A1 US 75680801 A US75680801 A US 75680801A US 2001002120 A1 US2001002120 A1 US 2001002120A1
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- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
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Abstract
The invention provides apparatus and methods for detecting electromagnetic energy using an array of detectors arranged in at least one row and multiple columns. A single crystal body has multiple doped regions disposed therein. Each one of the detectors produces charge in a corresponding one of the doped regions in the body in response to electromagnetic energy impinging upon that detector. A first charge transfer device includes an output port and multiple serially coupled charge storage cells including multiple first charge transfer regions disposed in the body parallel to the row, or rows, of detectors. Multiple second charge transfer devices include multiple second charge transfer regions disposed in the body transverse to the row, or rows, of detectors and the charge storage cells. Each one of the second charge transfer regions is adapted to transfer charge produced in a corresponding one of the doped regions to a corresponding one of the charge storage cells. Each one of the doped regions corresponding to one of the detectors has a doping profile adapted to produce an electric field in a direction from the doped region toward a corresponding one of the multiple second charge transfer regions. Such an arrangement allows dual polarization detection with little or no modification of the system configuration.
Description
- This invention relates generally to energy detection systems and more particularly to energy detection systems disposed on a single crystal substrate.
- As is known in the art, electromagnetic energy detection systems have a wide range of application, e.g. from cameras to missile seekers. In such systems, electromagnetic energy, e.g., visible light or infrared energy, is focused by an optical system onto one, or more, electromagnetic energy detectors. These detectors are often arranged in an array which is disposed at the focal plane of the optical system. The detector produces an indication of the detected energy by, for example, producing a corresponding electrical output signal. In one focal plane array, the detectors are semiconductor devices, such as HgCdTe or InSb, formed in different isolated regions of an upper surface of a single crystal semiconductor body. Thus, in response to light impinging upon the detector, charge is produced in the corresponding isolated region of the semiconductor body having the detector.
- In one system, a read-out electronics (“ROE”), formed as an integrated circuit in a second semiconductor substrate, typically silicon, is mounted to a back surface of the first-mentioned substrate. The charge produced in the first-mentioned substrate passes to different isolated regions of the second-mentioned substrate through electrical contacts disposed therebetween. The read-out electronics provides clock signals to regulate the propagation of charge in the second-mentioned substrate to output signal processing circuitry. In order to transfer the charge produced in the first-mentioned substrate to the second substrate, a wire or other metal contacts are connected to ohmic contact diffusion regions in the semiconductor bodies to provide electrical contact. The ohmic contact regions result in the generation of generation-recombination (GR) noise. While this technique may be acceptable for some wavelengths of energy, the GR noise produced may create, in some applications, an unacceptably low signal to noise ratio (SNR) for some combinations of wavelength and substrate.
- The use of a single silicon substrate for both the detectors and the read-out electronics has been suggested. However, with a silicon substrate, near infrared energy above about 8,000 Å passes readily through the substrate without generating sufficient charge for system SNR requirements. One technique has been presented in two articles, one entitled “Active-Pixel Image Sensor Integrated With Readout Circuits,” by Robert Nixon, Eric Fossum, and Sabrina Kemeny and the other entitled “CMOS Active-Pixel Image Sensor Containing Pinned Photodiodes,” by Eric R. Fossum both published in NASA Tech Briefs, October, 1996, from NASA's Jet Propulsion Laboratory in Pasadena, Calif. In the articles, the authors describe an attempt at an image sensor including readout circuits and pinned diode detectors, for visible and ultraviolet light, on one chip. According to the second-mentioned article, however, the operation of the device has not been demonstrated.
- In accordance with one feature of the invention, an electromagnetic energy detection system is provided having a plurality of detectors disposed in a single crystal body. Each one of the detectors is adapted to produce charge in a doped region disposed in the body in response to electromagnetic energy impinging upon such one of the detectors. A first charge transfer device (“CTD”) is provided having a plurality of first charge transfer regions disposed in the body and includes a plurality of serially coupled charge storage cells. A plurality of second charge transfer devices is provided for transferring the charge in a corresponding one of the doped regions to a corresponding one of the charge storage cells of the first charge transfer device.
- With such an arrangement, ohmic contacts between each one of the detectors and the charge storage cells of the first charge transfer device are eliminated thereby reducing GR noise and improving the SNR performance of the detection system.
- In accordance with another feature of the invention, an electromagnetic energy detection system is provided having a plurality of detectors disposed in a single crystal body. Each one of the detectors is adapted to produce charge in the body in response to electromagnetic energy impinging upon such one of the detectors. Read-out electronics is disposed on the body. The read-out electronics includes a first charge transfer device having a plurality of first charge transfer regions disposed in the body and includes a plurality of serially coupled charge storage cells. A last one of the cells is coupled to an output port. A charge coupling structure is disposed on the body to couple the charge produced by the detectors to the read-out electronics, The charge coupling structure includes a plurality of second charge transfer devices, including a plurality of second charge transfer regions, disposed in the body. Each one of the plurality of second charge transfer regions is adapted to transfer charge produced in a corresponding one of the detectors to a corresponding one of the plurality of charge storage cells. With such an arrangement, an effective electromagnetic energy detection system is provided wherein energy detectors, charge coupling structure and read-out electronics are formed on a single crystal substrate.
- In a preferred embodiment of the invention, a shield is provided to reduce incident electromagnetic energy from impinging upon portions of the read-out electronics and portions of the charge coupling structure.
- In accordance with still another feature of the invention, a detector is provided having a single crystal body with a doped region therein. Such detector is adapted to produce charge in the doped region in response to electromagnetic energy impinging upon such detector. A second region is disposed in the body and laterally displaced from the detector. The doped region has a doping profile selected to produce an electric field therein along a direction from the doped region toward the second region.
- With such a structure, charge produced in the body is efficiently transferred from the doped region to a region displaced therefrom for processing by electronic circuitry also disposed on the body.
- In a preferred embodiment, the body comprises silicon and the detector comprises a light detector.
- In accordance with still another feature of the invention, apparatus is provided for reducing noise, e.g., transients, in an output of a charge transfer device formed in a first region of a single crystal body. Such apparatus includes a transient suppression circuit. The circuit includes a pair of inputs; one of the inputs being coupled to the output of the charge transfer device and the other input being coupled to a second region of the body displaced from the first region. The circuit includes a differencing arrangement for subtracting signals at the pair of inputs to reduce noise components on at least one of such signals.
- With such an arrangement, noise generated in the body is present at the output of the charge transfer device, along with a desired signal, and is also present in the second region of the body. Therefore, substantially the same noise is present at both of the inputs of the transient suppression circuit. The differencing arrangement combines the two signals at the two inputs to thereby cancel, or reduce, the noise present at the output of the charge transfer device thereby yielding the desired signal with a reduced noise component.
- In accordance with another feature of the invention, an electromagnetic energy detection system is provided having a single crystal body. A detector is disposed in a first region the body. The detector produces charge in the body in response to electromagnetic energy impinging upon such detector. At least a portion of the produced charge passes through a second region of the body to an output port. A charge detector, disposed in the body, is coupled to the output port and produces a charge detector output signal indicative of detected charge. A sensor having an input port coupled to the body in a third region of the body produces a sensor output signal indicative of signals induced on the input port.
- In a preferred embodiment, a differencing device is provided. The charge detector, the sensor, and the differencing device are arranged to provide an output indicative of detected energy. A first transfer device is provided to couple the produced charge from the detector to the output port. The charge detector is adapted to receive charges from the output port and to provide a charge detector signal. The sensor has an input coupled to the body in the third region of the body and is adapted to provide a sensor output signal. The differencing device is adapted to receive the charge detector signal and the sensor output signal to provide a difference output signal indicative of a difference of the sensor output signal and the charge detector signal. With such an arrangement, common mode noise is reduced, improving the dynamic range of the signal processing channel receiving the detected energy.
- The invention provides numerous other advantages. For example, the invention provides a fully integrated system for real time image acquisition. Integrating multiphase clock generators, detectors, and read-out electronics on a single chip avoids a complex interface of wires and external electronics, allowing for simple and efficient system performance. Doping configurations and detector selection allow ±5V power supplies to operate the charge transfer devices, e.g. Buried Channel Charge Coupled Devices (BCCDs), and “pinned” diode detectors. By using buried channel charge coupled devices, extraneous wires are eliminated, reducing GR noise and improving SNR, and reducing stray inductance and capacitance and electromagnetic interference. The invention is easily adapted for multispectral (color) imaging to achieve multimegapixel color imaging, small package size, and low price, which is useful for applications such as scanning digital cameras. The invention is also suited for laser tomography.
- Other features and advantages of the invention, as well as the invention itself, will become more readily apparent when taken together with the following detailed description and the accompanying drawings, in which:
- FIG. 1 is a diagrammatical layout of an electromagnetic energy detection system;
- FIG. 2 is an enlarged view of a portion of the system of FIG. 1;
- FIG. 3 is a simplified cross-sectional view of an electromagnetic detector and charge coupling structure, such cross-section being taken along line3-3 in FIG. 2;
- FIG. 4 is a plot of voltage as a function of vertical distance in the detector of FIG. 3;
- FIG. 5A is cross-sectional view of an electromagnetic detector and charge coupling structure;
- FIGS. 5B and 5C are plots of voltage gradients in the electromagnetic detector and charge coupling structure of FIG. 5A;
- FIG. 6 is a cross-sectional view of charge transfer device read-out electronics, such cross-section being taken along the line6-6 in FIG. 2;
- FIG. 7A is a partially cross-sectional view and a partially schematic diagram of an output portion of the system of FIG. 1;
- FIG. 7B is a voltage diagram of an output signal of a buffer amplifier of FIG. 7A;
- FIG. 8 is an operational flow diagram of the system of FIG. 1;
- FIG. 9 is a diagrammatical side view of a filter arrangement for the system of FIG. 1;
- FIG. 10 is a side view of a gimbal scanning arrangement for the system of FIG. 1;
- FIG. 11 is a side view of an aperture scanning arrangement for the system of FIG. 1; and
- FIG. 12 is a schematic diagram of a Brewer detector arrangement.
- In FIG. 1, an electromagnetic
energy detection system 10 is shown. Thesystem 10 is formed on a single crystal semiconductor chip, orbody 12, here having a p-typeconductive silicon substrate 13. Thedetection system 10 is arranged in four similarly-structured quadrants 14 a-14 d. Each one of the quadrants 14 a-14 d includes an array of detectors 16 1-16 n, a charge transfer device read-out electronics (CTD ROE) 18 coupled to a read-outelectronics driver section 20, acharge coupling structure 22 coupled to a charge couplingstructure driver section 24, and a transientsignal suppression circuit 26, all arranged as shown. Thesystem 10 further includes acontrol circuit 27 disposed at one end of thebody 12 as shown. TheCTD ROE 18 and portions of thecharge coupling structure 22, as described below, are charge transfer devices, preferably buried channel charge coupled devices. Connections from thecontrol circuit 27 to thedriver sections driver sections electronics 18 and to thecharge coupling structures 22, respectively, are bus connections. Thebody 12 includes a plurality of interface pins 15. An n-type guardring 93 is implanted (e.g., doped with Phosphorous) in thesubstrate 13 surrounding thedetectors 16,charge coupling structures 22, charge transfer device read-outelectronics 18, andtransient suppression circuits 26, and is biased, e.g., to 5V. Theguardring 93 transfers spurious noise charges away from the detectors 16 1-16 n and the charge transfer device read-outelectronics 18 to help preserve the SNR of thesystem 10. - Referring now also to FIG. 2, an exemplary one of the quadrants14 a-14 d, here
quadrant 14 d is shown. Thequadrant 14 d includes alinear array 17 of the detectors 16 1-16 n. Each one of the detectors 16 1-16 n is here a pinned diode detector to be described in detail in connection with FIG. 3. Suffice it to say here, however, that each one of the detectors 16 1-16 n produces charge inbody 12 in response to electromagnetic energy impinging upon such one of the detectors 16 1-16 n. The charge transfer device read-out electronics 18 includes a plurality of serially coupled charge storage cells 28 1-28 n. Each one of charge storage cells 28 1-28 n corresponds to one of the detectors 16 1-16 n. Thecharge coupling structure 22 includes a plurality of charge transfer devices 30 1-30 n each one being between a corresponding one of the detectors 16 1-16 n and a corresponding one of the charge storage cells 28 1-28 n. - The charge transfer devices30 1-30 n are controlled by signals received from the charge coupling
structure driver section 24 for transferring the charge in a corresponding one of the of the detectors 16 1-16 n through thesubstrate 13 to a corresponding one of the charge storage cells 28 1-28 n of the charge transfer device read-outelectronics 18 as indicated by directional lines 31 1-31 n. - The charge transfer device read-
out electronics 18 is controlled by signals received from the read-outelectronics driver section 20 for transferring charge received from the charge transfer devices 30 1-30 n through thesubstrate 13 to anoutput port 32 as indicated bydirectional line 34. More particularly, the read-outcharge transfer device 18 includes theoutput port 32 which is fed by the last one of the serially coupled charge storage cells 28 1-28 n, i.e., by 28 n. Theoutput port 32 is coupled to the transientsignal suppression circuit 26. It is noted that the read-out electronics chargetransfer device 18 is disposed parallel to the rows of detectors 16 1-16 n. Each one of the charge transfer devices 30 1-30 n is disposed in thebody 12 transverse to thelinear array 17 of detectors 16 1-16 n and the charge storage cells 28 1-28 n. - Referring now to FIG. 3, an exemplary one of the detectors16 1-16 n, here 16 1, along with the corresponding
charge transfer device 30 n of thecharge coupling structure 22, and the correspondingcharge storage cell 28 1 of the read-out electronics chargetransfer device 18, are shown. Thedetector 16 1 is bordered on one end by asilicon dioxide insulator 42 and on the other end by thecharge storage cell 28 1 of the charge transfer device read-out electronics 18.Such detector 16 1 includes: a p-type anode 44 (e.g., doped with Boron), acathode 45 provided by anundoped portion 47 of the substrate 13 (i.e., not altered from the original doping of the substrate 13), an n-type modulating layer 48, and an n-type Buried Channel Charge Coupled Device (BCCD)layer 50, all arranged as shown. The modulatinglayer 48 and theBCCD layer 50 are used to transfer charge produced by thedetector 16 1 through thesubstrate 13 to the correspondingcharge storage cell 28 1 of the charge transfer device read-outelectronics 18 as indicated bydirectional arrow 31 1. Thecathode 45 is biased to the same potential as theanode 44, making thedetector 16 1 a “pinned” diode (i.e., theanode 44 andcathode 45 are pinned to the same potential). Thedetector 16 1 is low lag pinned diode with potentials of theanode 44 and thesubstrate 13 set to −5V. - To help collect produced charge, the
anode 44,cathode 45, modulatinglayer 48, andBCCD layer 50 are arranged to have a doping profile to produce a voltage distribution along a vertical axis x of thedetector 16 1. Referring also to FIG. 4, the voltage at asurface 54 of theanode 44 along axis x is biased to a voltage VB. The voltage level increases from top to bottom in FIG. 4. Theanode 44, modulatinglayer 48,BCCD layer 50, andsubstrate 13 have doping concentrations that produce voltage levels that, when moving away from thesurface 54 along axis x into thedetector 16 1, initially increase, reaching a maximum of Vm volts at a distance xm into thedetector 16 1, and then gradually return to VB, approximately reaching VB at distance xB into thedetector 16 1. The thicknesses and doping concentrations are configured to produce a maximum voltage at a desired level and at a desired distance into thedetector 16 1 in order to collect sufficient charge produced in thedetector 16 1 to achieve an acceptable SNR. Typically, theanode 44 and modulatinglayer 48 are implanted less than several microns, but are capable of influencing the voltage levels further into thedetector 16 1. - For example, the
anode 44 can implanted to a depth of about 0.2 μm with an average carrier concentration of 1020/cm2, and themodulating layer 48 implanted to an effective depth of 0.4 μm, and VB set to −5V. With appropriate doping concentrations, Vm can be varied as desired, with Xm being about 0.7 μm, and xB being about 4.5 μm. - To further help collect produced charge, the
anode 44,cathode 45, modulatinglayer 48, andBCCD layer 50 are arranged to produce a voltage distribution along a horizontal axis y of thedetector 16 1. The modulatinglayer 48 lies under a portion of theanode 44 close to thecharge transfer device 30 1. TheBCCD layer 50 lies under theentire modulating layer 48, plus an additional portion of theanode 44, but does not reach theinsulator 42. The detector is thus asymmetrical about acenterline 149 of thedetector 16 1. Due to this asymmetrical arrangement and the doping of the layers along axis y (i.e., when moving along axis y from y0 toward the charge transfer device 30 1), the voltage monotonically varies as a function of distance y, as will be described more fully in connection with FIGS. 5A-5C. - The voltage distributions produced by the layers produce electric fields in the
detector 16 1 help collect charges produced in thedetector 16 1. When electromagnetic energy, e.g., light or infrared energy as indicated byarrow 51, impinges upon thedetector 16 1, charges, e.g., charges 52 a-52 c, are produced in thedetector 16 1. The voltage distributions discussed above produce electromagnetic fields, e.g., as indicated by vectors {overscore (E)}1, {overscore (E)}2, and {overscore (E)}3, that urge the produced charges 52 a-52 c toward the potential minimum xm (see FIG. 4) and toward thecharge transfer device 30 1, as indicated by arrows 55 a-55 c. Thus, if energy with a wavelength, e.g., 8,100 Å, at which thesilicon substrate 13 is substantially transparent (i.e., few charges are produced in thesubstrate 13 near the surface 54) is impinged upon thedetector 16 1, then the voltage distributions improve the collection of produced charges from within thesubstrate 13 and urge them toward thecharge transfer device 30 1 as further illustrated in FIG. 5A-5C and described below. For example, Schottky-barrier-diode detectors, e.g., PtSi detectors, can be used to detect Yttrium-Aluminum-Garnet (YAG) laser radiation. Frequency response of PtSi detectors reaches into the megahertz region. - Referring to FIG. 3, an exemplary one of the charge transfer devices30 1-30 n, here 30 1, is shown. Such
charge transfer device 30 1 includes: twogates structure driver section 24 bylines oxide layer 68, a portion of theBCCD layer 50, and more of theundoped portion 47 of thesubstrate 13. Thegates oxide layer 68,such oxide layer 68 being formed on thesurface 54 of thesubstrate 13. Beneath theoxide layer 68 is another portion of theBCCD layer 50, which overlays theundoped portion 47 of thesubstrate 13. -
Charge transfer regions gates surface 54. Theoxide layer 68,BCCD layer 50, andsubstrate 13 are configured such that a “potential well” that collects charges will form in one of thecharge transfer regions gates gates lines gates charge transfer regions - The detectors16 1-16 n, charge transfer devices 30 1-30 n, and charge transfer device read-out
electronics 18, are configured to facilitate charge transfer from the detectors 16 1-16 n to the charge storage cells 28 1-28 n and to isolate the charge detectors 16 1-16 n from the charge storage cells 28 1-28 n. Thedetector 16 1 and thecharge transfer device 30 1 are disposed such that charges produced and collected in thedetector 16 1 will be attracted to the potential well incharge transfer region 70 formed due to an appropriate bias ongate 56. The number of gates in thecharge transfer device 16 1 and their widths W1 are selected, and thedetector 16 1, thecharge transfer device 30 1, and the charge transfer device read-outelectronics 18 are disposed, such that thecharge storage cell 28 1 is substantially isolated from the energy impinging on thedetector 16 1. Thecharge transfer device 30 1 and thecharge storage cell 28 1 are also disposed such that charges collected in the potential well inregion 74 can be transferred to a potential well in a charge transfer region 76 a1 in thecharge storage cell 28 1. - FIG. 5A shows a preferred arrangement for the
detector 16 1, thecharge transfer device 30 1, and thecharge storage cell 28 1 shown in FIG. 3. As shown in FIG. 5A, the modulatinglayer 48 of the detector has fourregions Region 48 a is less heavily doped n-type thanregion 48 b, which is less heavily doped n-type thanregion 48 c, which is less heavily doped n-type thanregion 48 d. The doping of theregions detector 16 1 toward the charge storage cell 28 1). Thecharge transfer device 30 n includes three gate regions 200 1, 200 2, and 200 3, each region having two gates 202 and 203. For example, gate region 200 1 has gates 202 1 and 203 1 coupled to the charge couplingstructure driver section 24 through a conductor 204 1 and gate region 200 2 has gates 202 2 and 203 2 coupled to the charge couplingstructure driver section 24 through a conductor 204 2.Doped regions regions Regions 206 are more heavily doped n-type than thesubstrate 13, but less heavily doped n-type thanregions 208.Regions regions detector 16 1 toward the charge storage cell 28 1). - The
BCCD layer 50 and the dopedregions TABLE 1 Average Concentrations Depth (x) Implant in Carriers/cm2 in μm 1 5 × 1011 1.0 2 2 × 1011 0.3 3 5 × 1011 0.3 4 2.5 × 1012 0.4 5 5.5 × 1012 0.4 - FIGS. 5B and 5C show how the potentials vary under the
detector 16 1, and the gate regions 200 1 and 200 2 at a depth x of about 0.5-0.7 μm (FIG. 4) under two bias conditions for the exemplary doping configuration of theregions regions regions detector 16 1 under the dopedregion 208 1. FIG. 5C shows that when the charge couplingstructure driver section 24 applies −5 volts to the conductor 204 1 and zero volts to conductor 204 2, the potential along axis y monotonically increases inregions regions regions charges 209 previously collected underregion 208 1 to transfer and be collected underregion 208 2. Agate 210 is coupled to the chargecoupling driver section 24 by aconductor 212, and regulates the transfer of charge collected underregion 208 3 to thecharge storage cell 28 1. The dopings are configured to produce potential gradients to guard against charges flowing in a direction from thecharge storage cell 28 1 toward thedetector 16 1. - FIG. 6 shows two exemplary ones of the charge storage cells28 1-28 n, here
cells charge storage cells electronics driver section 20 through line networks 80 1, 80 2, 82 1, and 82 2; a portion of theBCCD layer 50; and a portion of theundoped portion 47 of thesubstrate 13. As shown, thecharge storage cells out electronics 18 is a two-phase buried channel charge coupled device. - The gates78 a 1-f 1 and 78 a 2-f 2 are disposed above a portion of
oxide layer 68. Beneath theoxide layer 68 is a portion ofBCCD layer 50 that overlays a portion ofundoped portion 47 of thesubstrate 13. Voltage profiles in the charge storage cells 28 1-28 2 beneath gates 78 a 1, 78 d 1, 78 a 2, and 78 d 2 are similar to that shown in FIG. 4, except that the voltage at asurface 84 is higher than VB because thesurface 84 is not pinned to the same voltage as thesubstrate 13. Also, undergates regions gates regions BCCD layer 50. For example, the gate doped regions 88 b are formed using a combination ofimplants 1 and 2 (TABLE 1), and the gate doped regions 88 c are formed using a combination ofimplants charge storage cell 28 1 to charge storage cell 28 n) when appropriate bias potentials are applied to the gates 78 a 1-f 1 and 78 a 2-f 2. Thus, charge is collected in the potential wells in charge transfer regions 76 f 1 and 76 f 2 under one bias condition, and in charge transfer regions 76 c 1 and 76 c 2 in another bias condition. - The gates78 a 1-c 1 and 78 a 2-c 2 are coupled through line networks 80 1 and 82 1 to read-out electronics drivers 92 a 1 and 92 a 2 respectively, and the gates 78 d 1-f 1 and 78 d 2-f 2 are coupled through similar line networks 80 2 and 82 2, to read-out electronics drivers 92 b 1 and 92 b 2 respectively. The read-out electronics drivers 92 a 1-b1-92 a n-b n are CMOS inverter drivers, with sources of p-channel drivers bussed in common and sources of n-channel drivers bussed in common, and are disposed in the read-out
electronics driver section 20. The read-out electronics drivers 92 a 1-b 1 and 92 a 2-b 2 supply phase clocks (i.e., a square wave swinging between two bias voltages HDlow and HDhigh provided to the system 10) to the gates 78 a 1-f 1-78 a n-f n and, as diagrammatically shown in FIG. 6, are distributed over thebody 12 in the read-outelectronics driver section 20 to, among other things, help dissipate heat. - The gates78 a 1-f 1-78 a n-f n are dimensioned and disposed to facilitate charge transfer as indicated by
directional line 34. As with thegates charge storage cells charge storage cell 28 1 can be transferred to a potential well in charge transfer region 76 a 2 incharge storage cell 28 2. The dopings of thecharge storage cells 28 are configured to produce potential gradients to guard against charges flowing in a direction oppositedirectional line 34. - As shown in FIG. 7A, an
output portion 94 of each of the quadrants 14 a-14 d, herequadrant 14 d, includes atransient suppression circuit 26 having an input port 100 coupled to theoutput port 32 of abuffer stage 126 of the charge transfer device read-outelectronics 18, and having aninput port 102 coupled to aregion 106 of thesubstrate 13 in atransient coupling region 300. Anoutput port region 104 of thebuffer stage 126 is coupled to the lastcharge storage cell 28 n, andregion 106 is displaced from, but in close proximity to,region 104. - More particularly,
buffer stage 126 includes anoutput gate 130 and a reset transistor 137. Theoutput gate 130 overlays a portion of theoxide layer 68.Layer 68 overlays a portion of theBCCD layer 50 which overlays more of theundoped portion 47 of thesubstrate 13. Theoutput gate 130 is biased by a constant voltage Vd and is disposed proximate to thegate 78 f n of the lastcharge storage cell 28 n. Charges are transferred between the charge transfer region 76 f n in thecharge storage cell 28 n to acharge transfer region 128 under theoutput gate 130 as indicated bydirectional line 34. As further indicated bydirectional line 34, a heavily doped n-type diffusion region 132, disposed in theoutput port region 104 of thesubstrate 13, attracts the charges from thecharge transfer region 128. A line 134 (see also FIGS. 1 and 2) couples thediffusion region 132 to theoutput port 32 of the charge transfer device read-out electronics 18. The reset transistor 137 includes thediffusion region 132, areset gate 133 and adiffusion region 135. Thereset gate 133 is coupled to thecontrol circuit 27 and is disposed on thesurface 54 of thesubstrate 13 in close proximity to thediffusion region 132. Thediffusion layer 135 is heavily doped n-type and is disposed adjacent to thereset gate 133. Thediffusion layer 135 is biased by a DC voltage Vr that is at a higher level than the well potential in charge transfer region 76 f n. A pulsed voltage on thereset gate 133 causes the diffusion layer to be reset to the DC voltage Vr. - The
transient coupling region 300 includes areset transistor 140 similar to reset transistor 137, a pseudo charge storage cell 28 x, and agate 302. Thereset transistor 140 includes adiffusion region 120 disposed inregion 106 of thesubstrate 13, a reset gate 142 coupled to thecontrol circuit 27, and adiffusion region 144 biased to DC voltage Vr. Portions of transient signals travelling through thebody 12 due to, e.g., edges of clocking signals such as a frame sync signal or a pixel clock signal discussed below, are coupled through thediffusion region 120. Thediffusion region 120 is displaced from thediffusion region 132 far enough that thediffusion region 120 will not attract charges from thecharge transfer region 128, but is disposed near enough to thediffusion region 132 such that thediffusion region 120 receives substantially the same transient signals as thediffusion region 132 does. Thegate 302 is biased to voltage Vd and couples theregion 106 to the pseudo charge storage cell 28 x. The pseudo charge storage cell 28 x, shown in simplified fashion, is configured the same as charge storage cells 28 1-28 n except that it is isolated from othercharge storage cells 28 and from thecharge transfer devices 30. Thus, as shown, theBCCD layer 50 has anedge 304 disposed proximate to anedge 306 of the pseudo charge storage cell 28 x. - The
transient suppression circuit 26 includes a mainsignal buffer amplifier 146 coupled to the input port 100, a pseudosignal buffer amplifier 162 coupled to theinput port 102, and adifferencing amplifier 150 for subtracting signals at the pair ofinput ports 100 and 102 to reduce transient signal components of the signal on input port 100. The mainsignal buffer amplifier 146 is coupled to theoutput port 32 and includes a mainsignal output port 122. The pseudo signal buffer amplifier is connected to adiffusion region 120 of thebody 12 and provides a pseudosignal output port 124. - The main
signal buffer amplifier 146 processes charges received from theoutput port 32. Thediffusion region 132 of the reset transistor 137 serves as a floating diffusion charge detector. Detected charges are coupled through aline 134 to theoutput port 32 of the charge transfer device read-out electronics 18. Line 134 (FIGS. 1 and 2) couples charges from theoutput port 32 through the input port 100 to the mainsignal buffer amplifier 146, inducing a corresponding current signal at the mainsignal output port 122.Port 122 is coupled through aline 148 to thedifferencing amplifier 150. Alternatively,port 122 may be coupled, e.g., to one of the pins 15 (FIG. 1) on the periphery of thebody 12. - The pseudo
signal buffer amplifier 162 processes signals present in thebody 12. Charges due to transient signals are coupled from thediffusion region 120, which serves as a transient signal sensor, by a line 152 (FIGS. 1 and 2) through theinput port 102 to the pseudosignal buffer amplifier 162. The sensed transient signals online 152 induce a corresponding sensor output current signal at the pseudosignal output port 124.Port 124 is coupled through aline 164 to thedifferencing amplifier 150. As withport 122,port 124 may be coupled, e.g., to one of the pins 15 (see FIG. 1) on the periphery of thebody 12. - The
differencing amplifier 150 is configured to remove the signal on line 164 (i.e., the output of amplifier 162) from the signal on line 148 (i.e., the output of amplifier 146). The output of theamplifier 146 is a boxcar signal as shown in FIG. 7B, having a DC bias of about +1V, having a period matching the period of the charge transfer device read-outelectronics 18, and having heights ofsignal portions 165 representative of energy detected by the detectors 16 1-16 n (i.e., the output of theamplifier 146 is an analog signal digitally controlled). This signal also includes transients from thesystem 10 that are not representative of energy detected by the detectors 16 1-16 n. The output of theamplifier 162 is also a boxcar signal that is representative of the transients in thesystem 10 but not of the energy detected by the detectors 16 1-16 n. Thus, by matching and subtracting the signal online 164 from the signal online 148, thedifferencing amplifier 150 performs common mode rejection, yielding a signal on line 166 (see also FIGS. 1 and 2) representative of detected energy and little, if any, stray energy. “Matching” means that the signals onlines line 166 facilitates analog to digital conversion for, e.g., image processing. - The
control circuit 27 is shown in FIG. 8 to provide control signals to each of the read-outelectronics driver sections 20, and to each of the charge coupling structure driver sections 24 (it being noted that, for clarity, only the read-outelectronics driver section 20 and the charge couplingstructure driver section 24 forquadrant 14 d are shown) to control energy detection and readout from the detectors 16 1-16 n. Clock bias signals CLCBIAS, a ground potential GND, and bias potentials VDD, VSS, VDlow, VDhigh, HDlow and HDhigh are supplied to thesystem 10 through the pins 15 (FIG. 1). Due to the doping profiles and configurations discussed above, VDhigh and HDhigh are +5V and VDlow and HDlow are −5V. Apixel clock signal 168 and aframe sync signal 170 are supplied to thesystem 10 through thepins 15 to thecontrol circuit 27. Thecontrol circuit 27 processes the pixel clock and frame sync signals in on-chip multiphase clock generation circuitry to produce charge coupling structure clock signals (i.e., vertical clock signals) VC1-VC2 and charge transfer device read-out electronics clock signals (i.e., horizontal clock signals) HC1 and HC2. - The charge coupling
structure driver section 24 processes the vertical clock signals VC1-VC2 to produce vertical driver signals VDS1-VDS2. These clock signals are square waves swinging between two bias voltages, VDhigh and VDlow, and are coupled to the charge transfer devices 30 1-30 n (i.e., vertical CTDs) in parallel. - The read-out
electronics driver section 20 processes the horizontal clock signals HC1 and HC2 to produce horizontal driver signals HDS1 and HDS2 for the charge transfer device read-out electronics 18 (i.e., the horizontal CTD 18). The horizontal driver signals HDS1 and HDS2 are square waves swinging between two bias voltages, HDhigh and HDlow, and are coupled to the gates, e.g., to gates 78 a 1-c 1-78 a n-c n and 78 d 1-f 1-78 d n-f n, respectively (see FIG. 6), of the charge storage cells 28 1-28 n. - The
control circuit 27 also regulates the charge detector 137. A pulsed voltage reset signal RST is sent from thecontrol circuit 27 to thereset transistors 137 and 140 just before the read-out electronics begins serially transferring charges from the n charge storage cells 28 1-28 n. - The
control circuit 27 is disposed at one end of the body 12 (FIG. 1). This isolates thecontrol circuit 27 from the rest of thesystem 10 and enables the body to be configured such that thecontrol circuit 27 can be separated from the rest of thesystem 10. For example, thecontrol circuit 27 can be formed on a portion of thebody 12 that can be easily detached and replaced, with thecontrol circuit 27 coupled by bond wires to the rest of thesystem 10. Thus, if thecontrol circuit 27 fails, it can be easily removed and replaced with a new control circuit that is then bond wired to the rest of thesystem 10. - As shown in FIG. 9, a
filter subsystem 171 including awavelength filter 172, a polarization separator 174 (e.g., a birefringent wedge), ashield 175, and apolarizer 176, are arranged to pass copolarized radiation to one row ofdetectors 16 a and crosspolarized radiation to another other row ofdetectors 16 b. Thefilter 172 is disposed above thebody 12 to intercept radiation as indicated by rays R1, R2 and R3, which have wavelengths λ1, λ2 and λ3 respectively. Thefilter 172 inhibits radiation, e.g., ray R3, having a wavelength outside a desired range from passing through thefilter 172. Radiation, e.g., rays R1 and R2, having wavelengths within the desired range is allowed to pass through thefilter 172 to theseparator 174. - The
separator 174 separates incident radiation into orthogonal polarizations, sending copolarized radiation R1co of ray R1 toward the first row ofdetectors 16 a and crosspolarized radiation R1x of ray R1 toward the second row ofdetectors 16 b. To separate the orthogonal polarizations of radiation, theseparator 174 affects the phasing of the two polarizations differently. However, because the two rays R1 and R2 are incident from different areas, and therefore have different incident angles with respect to theseparator 174, some of the crosspolarized radiation R2x of ray R2 is directed by theseparator 174 toward the first row ofdetectors 16 a. - The
shield 175 allows radiation, whether copolarized or crosspolarized, to impinge upon the rows ofdetectors system 10. Radiation is permitted to pass throughopenings shield 175 to thepolarizer 176. Theopenings arrays 17. - The
polarizer 176 helps ensure that only copolarized radiation reaches the first row ofdetectors 16 a and only crosspolarized radiation reaches the second row ofdetectors 16 b, which are separated by aninsulator 178.Portions detectors 14 a. - As shown in FIG. 10, the
detection system 10 may be scanned using agimbal arrangement 180. Thegimbal arrangement 180 includes a motor/base 182, abottom member 184 and atop member 186 attached to the bottom ofsystem 10. Themotor 182 cyclically drives thetop member 186 to pivot with respect to thebottom member 184 about apin 188, causing a field of view of thedetectors 16 to be scanned as indicated byarc 190. Thus, the field of view of thedetectors 16 is directed at different portions of thearc 190 at different times during a cycle of themotor 182. - In operation, electromagnetic energy is impinged upon the
system 10 by directing thesystem 10, and filtering and separating the impinging energy, as desired using, e.g., the apparatus of FIGS. 9-10. For example, laser energy is directed at a target and thesystem 10 is directed to receive the laser energy reflected from the target. More particularly, thesystem 10 can detect YAG laser radiation if PtSi detectors are used for thedetectors 16. - By controlling the timing and amplitudes of the vertical driver signals VDS1-VDS2 and the horizontal driver signals HDS1-HDS2, the
control circuit 27 regulates the transfer of charge from the detectors 16 1-16 n in each of the quadrants 14 a-d to theoutput port 32. Beginning at the first rising edge of thepixel clock signal 168 after the frame sync signal 170 changes to its active state, thecontrol circuit 27 sequentially actuates gates 56 1-56 n in parallel and 60 1-60 n (see FIG. 3) in parallel. Potential wells are sequentially produced similar to those shown in FIGS. 5B and 5C to transfer charge produced in the detectors 16 1-16 n to charge transfer regions 74 1-74 n where the charges are then ready to be transferred to the charge storage cells 28 1-28 n of the charge transfer device read-out electronics 18. Gate 210 (FIG. 5A) is then activated while HDS1 and HDS2 are set to fixed levels, thus allowing charge to flow into the charge storage cells 28 1-28 n.Gate 210 is then deactivated. Thecontrol circuit 27 then actuates the gates 78 a 1-f 1-78 a n-f n to produce potential gradients, similar to those shown in FIGS. 5B and 5C, to serially move the charges to theoutput port 32. - It is noted that charges produced in the detectors16 1-16 n are inhibited from passing through any diffusion regions or ohmic contacts between the detectors 16 1-16 n and the end of the charge transfer device read-
out electronics 18. The charges produced in the detectors 16 1-16 n are transferred within (i.e., remain in) thesubstrate 13 until read out through thediffusion region 132 to theoutput port 32. This helps reduce noise and improve SNR, helping detection of near-infrared radiation that is substantially transparent to thesubstrate 13. - While the charges from the detectors16 1-16 n are integrated and transferred in parallel through the charge transfer devices 30 1-30 n to the charge storage cells 28 1-28 n of the charge transfer device read-out
electronics 18, earlier-produced charges are serially transferred to, and read out from, theoutput port 32. - As the charges are received by the
output port 32, signals are induced in the main signal circuit 116 and the pseudo signal circuit 118. These induced signals are amplified inbuffer amplifiers differencing amplifier 150 which rejects common modes of the outputs of thebuffer amplifiers pins 15 for processing external to thesystem 10. - Other embodiments are within the spirit and scope of the appended claims. For example, instead of using the gimbal arrangement of FIG. 10, as shown in FIG. 11 the
system 10 could be scanned using a movingwindow 192 having anaperture 194. Theaperture 194 permits energy within a field ofview 196 to reach the row ofdetectors 16 a. By moving thewindow 192, the field ofview 196 shifts, thereby exposing thedetectors 16 to energy from different areas. Alternatively, thewindow 192 could be configured to be stationary, with theaperture 194 moving within thewindow 192. Also, thesystem 10 can include appropriate internal clock generators to produce theframe sync signal 170 and thepixel clock signal 168. Thus, these signals do not need to be brought in from outside of thesystem 10 through thepins 15. - Furthermore, a Brewer detector can be coupled to the end of the charge transfer device read-out
electronics 18 to eliminate the diffusion region 132 (FIG. 7A). ABrewer detector arrangement 400 is shown schematically in FIG. 12. APMOS transistor 402 has itsdrain 404 coupled to thesubstrate 13 in theoutput port region 104. Thedrain 404 is further coupled to agate 406 of thetransistor 402 and biased to a fixed DC voltage Vbias1. A source 408 of thetransistor 402 is coupled throughline 410 to abuffer amplifier 412. Theline 410 is also coupled to a fixed DC voltage Vbias2 (e.g., +5V) through a current source Ibias. The presence of a buriedchannel charge packet 414 is detected as a difference in the voltage at thesource 408. Thebuffer amplifier 412 provides the main signal output port 122 (FIG. 7A). For more information about Brewer detectors, reference is made to “The Low Light Level Potential of a CCD Imaging Array” by R. J. Brewer, IEEE Transactions on Electron Devices, Vol. ED-27, No. 2, February, 1980.
Claims (28)
1. An electromagnetic energy detection system, comprising:
a single crystal body;
a plurality of detectors, each one thereof producing charge in the body in response to electromagnetic energy impinging upon such one of the plurality of detectors;
a first charge transfer device having a plurality of first charge transfer regions disposed in the body and including a plurality of serially coupled charge storage cells; and
a plurality of second charge transfer devices adapted to transfer charge produced in a corresponding one of the detectors to a corresponding one of the plurality of charge storage cells.
2. An electromagnetic energy detection system, comprising:
a single crystal body;
a plurality of detectors, each one thereof producing charge in the body in response to electromagnetic energy impinging upon such one of the plurality of detectors;
a first charge transfer device having a plurality of first charge transfer regions disposed in the body and including a plurality of serially coupled charge storage cells;
a plurality of second charge transfer devices including a plurality of second charge transfer regions disposed in the body, each one of the plurality of second charge transfer regions being adapted to transfer charge produced in a corresponding one of the detectors to a corresponding one of the plurality of charge storage cells; and
an output port coupled to a last one of the plurality of charge storage cells.
3. The system recited in wherein the first charge transfer device and the plurality of second charge transfer devices are buried channel charged coupled devices.
claim 2
4. The system recited in wherein the plurality of charge storage cells include first gates disposed above the first charge transfer regions, the system further comprising a plurality of first charge transfer device drivers distributed on the body and coupled to corresponding charge storage cells for supplying bias voltages to the first gates.
claim 3
5. The system recited in wherein a cell of the first charge transfer device comprises two sets of gates, each set coupled to a separate potential bias source and including three gates disposed above the first charge transfer regions, and wherein the first charge transfer regions beneath each of the three gates in each set have different doping configurations.
claim 3
6. The system recited in wherein the doping configurations beneath each of the three gates in each set vary monotonically in a direction of charge flow in the charge transfer device.
claim 5
7. The system recited in wherein the plurality of detectors are diodes having an upper doped region disposed in the body, the upper layer being biased to substantially the same potential as the body.
claim 2
8. The system recited in further comprising a guardring disposed and configured to inhibit electromagnetic energy from impinging upon portions of the first charge transfer device and portions of the plurality of second charge transfer devices.
claim 2
9. The system recited in further comprising clock circuitry coupled to the first and second charge transfer devices and adapted to provide first clock signals to the first charge transfer device and second clock signals to the plurality of second charge transfer devices.
claim 2
10. The system recited in further comprising a charge detector coupled to the first charge transfer device and adapted to receive charges from the first charge transfer device and to provide a charge detector output.
claim 2
11. The system recited in further comprising:
claim 10
a detector having an input coupled to the body in a region of the body substantially isolated from the plurality of detectors and adapted to provide a detector output; and
a differencing device adapted to receive the charge detector output and the detector output and to provide a differencing output indicative of a difference of the detector output and the charge detector output.
12. A detection system, comprising:
a single crystal body having a plurality of doped regions disposed therein;
an array of detectors arranged in at least one row and a plurality of columns, each one of the detectors producing charge in a corresponding one of the doped regions in the body in response to electromagnetic energy impinging upon such one of the detectors;
a first charge transfer device including a first plurality of charge transfer regions disposed in the body and a plurality of serially coupled charge storage cells disposed parallel to the at least one row of detectors; and
a plurality of second charge transfer devices including a second plurality of charge transfer regions disposed in the body, each one of the plurality of second charge transfer devices being disposed transverse to the at least one row of detectors and the first charge transfer device, each one of the second plurality of charge transfer regions being adapted to transfer charge produced in a corresponding one of the detectors to a corresponding one of the plurality of charge storage cells.
13. The system recited in including an optical system for scanning a field of view of the array of detectors.
claim 12
14. The system recited in further comprising a control system for transferring charge from each one of the doped regions corresponding to one of the detectors to a corresponding one of the charge storage cells through a corresponding one of the second charge transfer devices in parallel and for serially coupling the charge in each of the charge storage cells to an output of the of the first charge transfer device.
claim 12
15. A detection system, comprising:
a single crystal body having a plurality of doped regions disposed therein;
an array of detectors arranged in at least one row and a plurality of columns, each one of the detectors producing charge in a corresponding one of the doped regions in the body in response to electromagnetic energy impinging upon such one of the detectors;
a first charge transfer device including an output port and a plurality of serially coupled charge storage cells including a plurality of first charge transfer regions disposed in the body parallel to the at least one row of detectors;
a plurality of second charge transfer devices including a plurality of second charge transfer regions disposed in the body, each one of the plurality of second charge transfer devices being disposed transverse to the at least one row of detectors and the first charge transfer device, each one of the plurality of second charge transfer regions being adapted to transfer charge produced in a corresponding one of the doped regions to a corresponding one of the plurality of charge storage cells;
a controller coupled to the first charge transfer device and the plurality of second charge transfer devices, the controller adapted to regulate the transfer of charge from the doped regions corresponding to the detectors to the output port; and
wherein each one of the doped regions corresponding to one of the detectors has a doping profile adapted to produce an electric field in a direction from the doped region toward a corresponding one of the plurality of second charge transfer regions.
16. In combination:
a single crystal body;
a detector having a doped region disposed in the body, such detector being adapted to produce charge in the doped region in response to electromagnetic energy impinging upon such detector;
a second region disposed in the body and displaced from the detector; and
wherein the doped region has a doping profile selected to produce an electric field therein in a direction from the doped region toward the second region.
17. The combination recited in wherein the single crystal body comprises silicon.
claim 16
18. The combination recited in wherein the detector comprises a light detector.
claim 16
19. The combination recited in further comprising a buried channel charge coupled device disposed in the second region.
claim 16
20. An electromagnetic energy detection system comprising:
a single crystal body;
a detector, disposed in a first region of the body, for producing charge in the body in response to electromagnetic energy impinging upon such detector, and for providing at least a portion of the produced charge through a second region of the body to an output port;
a charge detector coupled to the output port and producing a charge detector output signal indicative of detected charges; and
a sensor having an input port coupled to the body in a third region of the body and producing a sensor output signal indicative of signals induced on the input port.
21. The system recited in further comprising a differencing device coupled to the charge detector and the sensor, the differencing device adapted to produce a differencing device output indicative of a comparison of the sensor output signal and the charge detector output signal.
claim 20
22. In a system including a charge transfer device formed in a first region of a single crystal body, an apparatus comprising:
a first input coupled to an output of the charge transfer device;
a second input coupled to a second region of the body displaced from the first region; and
a differencing arrangement coupled to the first and second inputs and adapted to subtract a second signal present at the second input from a first signal present at the first input.
23. A method comprising steps of:
impinging electromagnetic energy upon a plurality of detectors to produce charges in a first portions of a single crystal body;
transferring at least portions of the charges in the first portions of the body to a plurality of cells corresponding to the plurality of detectors, the plurality of cells being disposed in second portions of the body; and
transferring at least portions of the charges between the plurality of cells toward a first output port coupled to the plurality of cells.
24. The method recited in wherein the second portions of the body are substantially isolated from the electromagnetic energy impinged upon the first portions of the body.
claim 23
25. The method recited in further comprising:
claim 23
detecting the charges received by the first output port and providing a first signal indicative of the detected charges;
sensing signals present in a region of the body substantially isolated from the first portions of the body and providing a second signal indicative of the sensed signals; and
comparing the first signal with the second signal.
26. The method recited in wherein the step of transferring at least portions of the charges to the plurality of cells comprises selectively biasing portions of the body between the plurality of detectors and the plurality of cells.
claim 23
27. The method recited in wherein the step of transferring at least portions of the charges between the plurality of cells comprises selectively biasing portions of the body between the plurality of cells.
claim 23
28. The method recited in ,
claim 23
wherein the step of transferring at least portions of the charges between the plurality of cells comprises serially transferring between the cells charges that were produced in a first time period;
wherein the step of transferring at least portions of the charges produced in the first portions of the body to the plurality of cells comprises transferring in parallel charges that were produced in the first portions of the body in a second time period, after the first time period; and
wherein the two transferring steps occur substantially simultaneously.
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Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050152146A1 (en) * | 2002-05-08 | 2005-07-14 | Owen Mark D. | High efficiency solid-state light source and methods of use and manufacture |
US20050230600A1 (en) * | 2004-03-30 | 2005-10-20 | Olson Steven J | LED array having array-based LED detectors |
US20060216865A1 (en) * | 2004-03-18 | 2006-09-28 | Phoseon Technology, Inc. | Direct cooling of leds |
US20070030678A1 (en) * | 2003-10-31 | 2007-02-08 | Phoseon Technology, Inc. | Series wiring of highly reliable light sources |
US20070051964A1 (en) * | 2004-04-12 | 2007-03-08 | Owen Mark D | High density led array |
US20070109790A1 (en) * | 2003-10-31 | 2007-05-17 | Phoseon Technology, Inc. | Collection optics for led array with offset hemispherical or faceted surfaces |
US20070154823A1 (en) * | 2005-12-30 | 2007-07-05 | Phoseon Technology, Inc. | Multi-attribute light effects for use in curing and other applications involving photoreactions and processing |
US20070278504A1 (en) * | 2002-05-08 | 2007-12-06 | Roland Jasmin | Methods and systems relating to solid state light sources for use in industrial processes |
US20100052002A1 (en) * | 2004-03-18 | 2010-03-04 | Phoseon Technology, Inc. | Micro-reflectors on a substrate for high-density led array |
US8077305B2 (en) | 2004-04-19 | 2011-12-13 | Owen Mark D | Imaging semiconductor structures using solid state illumination |
WO2018019406A3 (en) * | 2016-07-25 | 2018-04-26 | Universität Duisburg-Essen | System for the simultaneous videographic or photographic acquisition of multiple images |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4217600A (en) * | 1970-10-22 | 1980-08-12 | Bell Telephone Laboratories, Incorporated | Charge transfer logic apparatus |
US4364072A (en) * | 1978-03-17 | 1982-12-14 | Zaidan Hojin Handotai Kenkyu Shinkokai | Static induction type semiconductor device with multiple doped layers for potential modification |
US4903097A (en) * | 1979-03-26 | 1990-02-20 | Hughes Aircraft Company | CCD read only memory |
US5734188A (en) * | 1987-09-19 | 1998-03-31 | Hitachi, Ltd. | Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same |
US5343421A (en) * | 1990-12-19 | 1994-08-30 | The Charles Stark Draper Laboratories, Inc. | Self-biased ferroelectric space charge capacitor memory |
US5465238A (en) * | 1991-12-30 | 1995-11-07 | Information Optics Corporation | Optical random access memory having multiple state data spots for extended storage capacity |
JPH06205767A (en) * | 1992-11-25 | 1994-07-26 | Xerox Corp | Radiation picture formation system |
JPH0878624A (en) * | 1994-08-31 | 1996-03-22 | Oki Electric Ind Co Ltd | Semiconductor device |
US5648674A (en) * | 1995-06-07 | 1997-07-15 | Xerox Corporation | Array circuitry with conductive lines, contact leads, and storage capacitor electrode all formed in layer that includes highly conductive metal |
US5770871A (en) * | 1996-06-20 | 1998-06-23 | Xerox Corporation | Sensor array with anticoupling layer between data lines and charge collection electrodes |
US5744807A (en) * | 1996-06-20 | 1998-04-28 | Xerox Corporation | Sensor array data line readout with reduced crosstalk |
US5804497A (en) * | 1996-08-07 | 1998-09-08 | Advanced Micro Devices, Inc. | Selectively doped channel region for increased IDsat and method for making same |
-
1998
- 1998-03-10 US US09/038,251 patent/US6239702B1/en not_active Expired - Lifetime
-
2001
- 2001-01-09 US US09/756,808 patent/US6323768B2/en not_active Expired - Lifetime
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US6323768B2 (en) | 2001-11-27 |
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