US20010018267A1 - Single-substrate-heat-processing apparatus and method for performing reformation and crystallization - Google Patents

Single-substrate-heat-processing apparatus and method for performing reformation and crystallization Download PDF

Info

Publication number
US20010018267A1
US20010018267A1 US09/795,437 US79543701A US2001018267A1 US 20010018267 A1 US20010018267 A1 US 20010018267A1 US 79543701 A US79543701 A US 79543701A US 2001018267 A1 US2001018267 A1 US 2001018267A1
Authority
US
United States
Prior art keywords
thin film
temperature
crystallizing
target substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US09/795,437
Inventor
Hiroshi Shinriki
Masahito Sugiura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP20450298A external-priority patent/JP3209965B2/en
Priority claimed from JP10274353A external-priority patent/JP3078528B2/en
Application filed by Individual filed Critical Individual
Priority to US09/795,437 priority Critical patent/US20010018267A1/en
Publication of US20010018267A1 publication Critical patent/US20010018267A1/en
Priority to US10/913,531 priority patent/US20050016687A1/en
Priority to US11/296,225 priority patent/US20060081186A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/405—Oxides of refractory metals or yttrium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
    • H01L21/02348—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to UV light
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers

Definitions

  • the present invention relates to a single-substrate-heat-processing apparatus and method for performing a reforming process for removing inorganic impurities contained in a thin film formed on a target substrate and for performing a crystallizing process for crystallizing the thin film, and particularly, to a heat processing apparatus and method applied to a metal oxide film deposited by MOCVD (Metal Organic Chemical Vapor Deposition) method.
  • MOCVD Metal Organic Chemical Vapor Deposition
  • a film forming process and a pattern etching process are repeatedly applied to a semiconductor wafer.
  • the specification for the film forming process becomes severer and severer in recent years in accordance with increases in the density and in the degree of integration of the semiconductor devices. For example, a further a decrease in thickness and a higher insulating properties are required even for a very thin insulating film such as an insulating film included in a capacitor or a gate insulating film.
  • a silicon oxide film or a silicon nitride film is widely used as such an insulating film.
  • a metal oxide film such as a tantalum oxide (Ta 2 O 5 ) film has come to be used in recent years as an insulating film exhibiting further improved insulating properties.
  • Such a metal oxide film can be formed by an MOCVD method, in which an organometallic compound is gasified for deposition of the metal.
  • the insulating properties of the metal oxide film can be further improved by applying a reforming process to the surface of the metal oxide film after deposition.
  • a reforming processing technique is disclosed in, for example, Jpn. Pat. Appln. KOKAI Publication No. 2-283022.
  • a CVD apparatus is used for forming a tantalum oxide film.
  • a raw material gas containing, for example, tantalum alkoxide (Ta(OC 2 H 5 ) 5 ) is used as a process gas together with O 2 gas.
  • the process pressure is set at about 0.2 to 0.3 Torr, and the process temperature is set at about 250 to 450° C. Under these conditions, the excited species generated by dissociation of the raw material gas perform reactions with the oxygen gas, with the result that an amorphous tantalum oxide film is deposited on a semiconductor wafer.
  • a reforming apparatus is used for performing the reforming process of the tantalum oxide film after the deposition.
  • the wafer having the tantalum oxide film formed thereon is put under an atmosphere of the atmospheric pressure containing ozone.
  • Ozone is irradiated with ultraviolet rays emitted from a mercury lamp so as to generate active oxygen atoms.
  • the organic impurities having C—C bonds, etc. and contained in the tantalum oxide film are decomposed by the active oxygen atoms so as to be removed from the tantalum oxide film.
  • the insulating properties of the tantalum oxide film are improved.
  • the reforming process is carried out at a temperature lower than the crystallizing temperature, e.g., at about 425° C., in order to allow the tantalum oxide film to maintain its amorphous state.
  • the wafer is transferred into a heat processing apparatus for crystallization.
  • the tantalum oxide film is heated within the heat processing apparatus in the presence of O 2 gas to a temperature higher than the crystallizing temperature, e.g., to about 700° C.
  • the tantalum oxide film is crystallized and the density thereof is increased in the molecule level, with the result that the insulating properties of the tantalum oxide film are further improved.
  • Jpn. Pat. Appln. KOKAI Publication No. 9-121035 teaches a tantalum oxide film of a two-layer structure.
  • an amorphous first layer is deposited first on a semiconductor wafer, followed by applying a reforming process to the first layer.
  • a second amorphous layer is deposited on the first layer, followed by applying a reforming process to the second layer.
  • the wafer is subjected to a heat process at a high temperature so as to crystallize both the first and second layers simultaneously.
  • the technique disclosed in this prior art makes it possible to remove effectively the organic impurities in the step of the individual reforming process because each of the first and second layers is sufficiently thin so as to further improve the insulating properties of the tantalum oxide film.
  • the number of the process steps and the number of transfer steps are increased in this prior art, leading to a decrease in the through-put.
  • the facility cost and the manufacturing cost are increased.
  • Jpn. Pat. Appln. KOKAI Publication No. 10-79377 (U.S. patent application Ser. No. 08/889,590) relating to an invention achieved by the present inventors discloses a cluster-tool-type film forming system in which a deposition apparatus, a reforming apparatus and a heat processing apparatus for crystallization are connected to each other via a common transfer chamber.
  • the cluster-tool-type film forming system permits solving the problem of the through-put, etc. to some extent. However, a further improvement is required.
  • An object of the present invention is to provide a single-substrate-heat-processing apparatus and method for performing a reforming process and a crystallizing process while increasing the through-put and reducing the facility cost and the manufacturing cost.
  • a single-substrate-heat-processing apparatus for performing a reforming process for removing organic impurities contained in a thin film formed on a target substrate and a crystallizing process for crystallizing the thin film, the thin film being formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, the apparatus comprising:
  • a work table arranged within the process chamber configured to place the target substrate thereon;
  • an exhaust mechanism configured to exhaust the process chamber
  • a supply mechanism configured to supply a process gas containing oxygen atoms into the process chamber
  • a heating mechanism configured to heat the thin film while the target substrate is placed on the work table
  • a control section configured to serve to control the heating mechanism such that the thin film is heated to a first temperature lower than the crystallizing temperature of the material over a first period and, then, the thin film is heated to a second temperature higher than the crystallizing temperature, followed by cooling the thin film to a temperature lower than the crystallizing temperature, the first period being longer than a second period during which the thin film has a temperature higher than the crystallizing temperature.
  • a film forming system for forming a crystallized thin film on a target substrate, the thin film being formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, the system comprising:
  • a transfer mechanism arranged within the common transfer chamber configured to transfer the target substrate
  • a single-substrate-processing CVD apparatus connected to the common transfer chamber via a gate valve, configured to deposit an amorphous thin film by CVD on the target substrate;
  • a single-substrate-heat-processing apparatus connected to the common transfer chamber configured to perform a reforming process for removing organic impurities contained in the thin film and a crystallizing process for crystallizing the thin film, the heat-processing apparatus including,
  • a work table arranged within the process chamber configured to place the target substrate thereon
  • an exhaust mechanism configured to exhaust the process chamber
  • a supply mechanism configured to supply a process gas containing oxygen atoms into the process chamber
  • a heating mechanism configured to heat the thin film while the target substrate is placed on the work table
  • a control section configured to serve to control the heating mechanism such that the thin film is heated to a first temperature lower than the crystallizing temperature of the material over a first period and, then, the thin film is heated to a second temperature higher than the crystallizing temperature, followed by cooling the thin film to a temperature lower than the crystallizing temperature, the first period being longer than a second period during which the thin film has a temperature higher than the crystallizing temperature.
  • a method of forming a thin film on a target substrate the thin film being formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, the method comprising:
  • a method of forming a thin film on a target substrate the thin film including a first layer and a second layer formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, the method comprising:
  • FIG. 1 schematically shows the constitution of the main part of a cluster-tool-type film forming system according to one embodiment of the present invention
  • FIGS. 2A to 2 D are cross-sectional views collectively showing a thin film forming method according to one embodiment of the present invention.
  • FIG. 3 is a graph showing changes in the process temperature in a heat processing apparatus
  • FIG. 4 is a graph showing the insulation breakdown characteristics of a tantalum oxide film
  • FIGS. 5A to 5 D are cross-sectional views collectively showing a thin film forming method according to another embodiment of the present invention.
  • FIGS. 6A and 6B are cross-sectional views collectively showing a thin film forming method according to still another embodiment of the present invention.
  • FIG. 7 schematically shows the constitution of the main part of the heat processing apparatus included in the film forming system shown in FIG. 1;
  • FIG. 8 is a plan view showing the shower head of the apparatus shown in FIG. 7;
  • FIG. 9 schematically shows the constitution of the main part of a heat processing apparatus according to another embodiment of the present invention.
  • FIG. 10 schematically shows the constitution of the main part of a cluster-tool-type film forming system according to another embodiment of the present invention.
  • FIG. 11 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention.
  • FIG. 12 is a graph comparing the prior art in which reformation is carried out by ultraviolet rays alone with the method of the present invention in which reformation is carried out by using both ultraviolet rays and an infrared light;
  • FIG. 13 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention.
  • FIG. 14 is a top view schematically showing the apparatus shown in FIG. 13;
  • FIG. 15 is a graph showing changes in the scanning speed of light
  • FIG. 16 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention.
  • FIG. 17 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention.
  • FIG. 18 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention.
  • FIG. 19 is a top view schematically showing the apparatus shown in FIG. 18.
  • FIG. 1 schematically shows the constitution of the main part of a cluster-tool-type film forming system 1 according to one embodiment of the present invention.
  • two CVD apparatuses 4 and 6 , a reforming apparatus 8 and a heat processing apparatus 10 are connected to a common transfer chamber 3 .
  • two cassette chambers 14 A and 14 B are also connected to the common transfer chamber 3 for improving the wafer transfer efficiency.
  • a wafer is transferred among these apparatuses 4 , 6 , 8 , 10 and the cassette chambers 14 A, 14 B through the common transfer chamber 3 .
  • an arm mechanism 16 consisting of a multi-joint arm that can be elongated, shrunk and swingable is arranged within the common transfer chamber 3 .
  • the common transfer chamber 3 is connected to the cassette chamber 14 A via a gate valve G 1 and to the cassette chamber 14 B via a gate valve G 2 .
  • the cassette chambers 14 A and 14 B are provided with gate doors G 3 and G 4 , respectively, that can be opened or closed to allow the inner spaces of the cassette chambers 14 A, 14 B to communicate with the outer working environment.
  • the common transfer chamber 3 is connected to the CVD apparatuses 4 , 6 , the reforming apparatus 8 , and the heat processing apparatus 10 via gate valves G 5 , G 6 , G 7 and G 8 , respectively.
  • Each of the common transfer chamber 3 and the cassette chambers 14 A and 14 B is of an airtight structure.
  • the cassette chambers 14 A and 14 B constitute the wafer load/unload of the entire film forming system.
  • a cassette C housing a plurality of semiconductor wafers is transferred into and taken out of each of the cassette chambers 14 A and 15 B through the gate doors G 3 and G 4 that are opened.
  • Each of the cassette chambers 14 A and 14 B is provided with a cassette stage (not shown) that can be moved in a vertical direction and swung. Further, these cassette chambers 14 A, 14 B can be vacuum-exhausted with the cassette C housed therein.
  • Each of the CVD apparatuses 4 and 6 is used for forming an amorphous metal oxide film on a target substrate, e.g., a semiconductor wafer, under a vacuum atmosphere containing an evaporated metal oxide film raw material and an oxidizing gas.
  • the reforming apparatus 8 is used for subjecting a metal oxide film to a reforming process by exposing the metal oxide film to active oxygen atoms under a vacuum atmosphere.
  • the heat processing apparatus 10 is used for subjecting a metal oxide film successively to a reforming process and to a crystallizing process by heating the metal oxide film to a temperature higher than the crystallizing temperature.
  • Each of the apparatuses 4 , 6 , 8 , 10 and the cassette chambers 14 A and 14 B is connected to a gas supply mechanism (not shown) for purging the inner spaces with an inert gas, e.g., N 2 gas, and to a vacuum exhaust mechanism (not shown) for vacuum-exhausting the inner spaces.
  • an inert gas e.g., N 2 gas
  • the N 2 gas supply to these apparatuses 4 , 6 , 8 , 10 and the cassette chambers 14 A, 14 B and the vacuum exhaust of these apparatuses 4 , 6 , 8 , 10 and the cassette chambers 14 A, 14 B can be controlled independently of each other.
  • the CVD apparatus and the reforming apparatus disclosed in Jpn. Pat. Appln. KOKAI Publication No. 10-79377 can be used as the CVD apparatuses 4 , 6 and as the reforming apparatus 8 .
  • an amorphous metal oxide film e.g., a tantalum oxide (Ta 2 O 5 ) film, is deposited on the surface of a wafer by CVD.
  • an organic compound of a liquid metal alkoxide e.g., Ta(OC 2 H 5 ) 5 , which is bubbled by, for example, a He gas, is supplied to the CVD apparatus.
  • the process gas is mixed with O 2 gas used as an oxidizing gas within the process chamber so as to carry out a CVD film forming reaction under the particular atmosphere.
  • Two CVD apparatuses of the same constitution are used in the present invention so as to improve the through-put. It is possible to use as an oxidizing gas O 3 , N 2 O, NO, a gasified alcohol, etc. in addition to O 2 .
  • the surface of the wafer placed on a work table having a heater arranged therein is exposed to active oxygen atoms so as to reform the metal oxide film formed on the wafer surface.
  • the active oxygen atoms are obtained by irradiating ozone (O 3 ) introduced from the outside with ultraviolet rays emitted from a lamp 18 on the ceiling of the apparatus.
  • the active oxygen atoms can also be obtained by using N 2 O gas in place of ozone.
  • the organic impurities having C—C bonds or hydrocarbons contained in the metal oxide film are decomposed by the active oxygen atoms so as to be removed from the metal oxide film.
  • the reforming process should be carried out at a temperature lower than the crystallizing temperature of the metal oxide film in order to remove the organic impurities completely from the metal oxide film.
  • the wafer is heated in the presence of active oxygen atoms from a temperature not higher than the crystallizing temperature to a temperature not lower than the crystallizing temperature of the metal oxide film.
  • a reforming process of the metal oxide film formed as the uppermost layer of the wafer and a crystallizing process of all the metal oxide films formed on the wafer are carried out successively.
  • the reforming process and the crystallizing process may be carried out substantially simultaneously by heating the wafer in the presence of active oxygen atoms.
  • FIG. 7 schematically shows the constitution of the main part of an apparatus 32 used as the heat processing apparatus 10 of the film forming system shown in FIG. 1.
  • the heat processing apparatus 32 comprises a process chamber 34 made of, for example, aluminum having the surface covered with anodized aluminum.
  • a bottom plate 38 is airtightly arranged in a bottom portion of the process chamber 34 using a seal member 36 such as an O-ring.
  • a work table 44 on which a semiconductor wafer is placed is arranged within the process chamber 34 .
  • the work table 44 comprises a base 45 and a cover 46 removably mounted onto the base 45 via a clamp 48 .
  • the cover 46 is made of a transparent quartz, and a plurality of pins 47 made of quartz are arranged on the cover 46 for supporting a wafer W.
  • An airtight space separated from the atmosphere within the process chamber 34 is formed between the base 45 and the cover 46 .
  • a plurality of heating lamps 50 consisting of, for example, halogen lamps are arranged within the airtight space of the work table 44 .
  • the wafer W is heated from the back side by the lamps 50 .
  • the power supply to the lamps 50 can be controlled individually by a controller 51 , making it possible to set the temperature of the wafer W and the metal oxide film formed on the wafer W at an optional desired value.
  • a reflective mirror 52 that is substantially elliptical or parabolic in cross section is arranged below the lamp 50 so as to permit the back surface of the wafer W to be efficiently irradiated with light radiated from the lamp 50 .
  • a plurality of exhaust ports 54 connected to a vacuum exhaust mechanism 55 are formed in the bottom plate 38 of the process chamber 34 .
  • the vacuum exhaust mechanism 55 makes it possible to exhaust the process chamber 34 and to set up a vacuum condition within the process chamber 34 .
  • a gate valve G 7 that is opened when the wafer W is transferred into and out of the process chamber 34 is formed in the side wall of the process chamber 54 .
  • a shower head 56 is arranged above the work table 44 to face the work table 56 .
  • the shower head 56 is connected to a gas source 59 of a process gas (O 2 or O 3 ) through a line 58 extending through the side wall of the process chamber 54 .
  • the shower head 56 has a lattice shape as shown in FIG. 8.
  • the shower head 56 includes a ring pipe 60 A connected to a line pipe 58 and an inside pipe 60 B connected inside the ring pipe 60 A and arranged to form a lattice.
  • a large number of gas spurting holes 61 are equidistantly formed on the lower side of the inside pipe 60 B.
  • An opening having a diameter larger than that of the wafer W is formed in the ceiling plate 42 of the process chamber 34 .
  • a window 64 made of a transparent quartz is airtightly arranged to close the opening via a seal member 62 such as an O-ring.
  • a large number of ultraviolet lamps 66 are arranged above the window 64 .
  • Ultraviolet rays having a wavelength of, for example, 254 nm are emitted from the ultraviolet lamp 66 to allow the process gas and the target surface of the wafer W to be irradiated with the ultraviolet rays through the window 64 .
  • active oxygen atoms are generated from the process gas.
  • FIG. 9 schematically shows the constitution of the main part of a heat processing apparatus 72 , which may be used as the heat processing apparatus 10 , according to another embodiment of the present invention.
  • the heat processing apparatus 72 comprises a process chamber 74 made of, for example, aluminum having the surface covered with anodized aluminum.
  • the shower head 56 , the window 64 and the ultraviolet lamp 66 as shown in FIG. 7 are not arranged in the heat processing apparatus 72 .
  • a nozzle 78 connected to a gas source 59 of a process gas (O 2 ) via a plasma cavity 76 is connected to the ceiling plate 42 of the process chamber 74 .
  • the process gas is converted into a plasma by application of the power of a microwave power source 80 .
  • active oxygen atoms are supplied from the nozzle 78 into the process chamber 72 .
  • a distributing plate 82 having a large number of apertures 84 is arranged to face the nozzle 78 , with the result that active oxygen atoms are uniformly distributed on the surface of the wafer.
  • a film forming method of the present invention is carried out as follows by using the film forming system 1 shown in FIG. 1. The following description covers the case where a thin metal oxide film of a double layer structure is formed as an insulating film.
  • a cassette C housing for example, 25 unprocessed wafers is placed on a cassette stage (not shown) within the first cassette chamber 14 A. Then, the gate door G 3 is closed to establish an inert gas atmosphere consisting of N 2 gas within the first cassette chamber 14 A. At the same time, the chamber 14 A is vacuum-exhausted.
  • the gate valve G 1 is opened to permit the cassette chamber 14 A to communicate with the common transfer chamber 3 evacuated in advance to set up an inert gas atmosphere. Then, the wafer W is transferred from the cassette chamber 14 A into the common transfer chamber 3 by the arm mechanism 16 .
  • the wafer W is transferred through the opened gate valve G 5 into the first CVD apparatus 4 evacuated in advance.
  • a metal oxide film e.g., tantalum oxide (Ta 2 O 5 ) film, is deposited as a first layer of an insulating thin film.
  • the wafer W is transferred from the first CVD apparatus 4 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16 .
  • the wafer W is transferred through the opened gate valve G 6 into the reforming apparatus 8 evacuated in advance.
  • a reforming process is carried out within the reforming apparatus 8 . Specifically, organic impurities such as hydrocarbons and C—C bonds, which are contained in the first tantalum oxide layer formed on the wafer surface, are removed by using the ultraviolet rays emitted from the ultraviolet irradiating means 18 and ozone.
  • the wafer W is transferred from the reforming apparatus 8 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16 . Then, the wafer W is transferred through the opened gate valve G 8 into the second CVD apparatus 6 evacuated in advance. Within the second CVD apparatus 6 , a second tantalum layer is deposited under the same conditions as in the film formation within the first CVD chamber 4 .
  • the wafer W is transferred from the second CVD apparatus 6 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16 . Then, the wafer W is transferred through the opened gate valve G 7 into the heat processing apparatus 10 evacuated in advance.
  • the wafer having the first and second tantalum layers formed thereon is heated under an atmosphere including ultraviolet rays and ozone to a low temperature, such as 450° C., to perform a reforming process, and then heated to a temperature not lower than the crystallizing temperature of tantalum oxide, followed by lowering the temperature in 60 seconds.
  • the processed wafer is transferred into the common transfer chamber 3 and, then, housed in the cassette C arranged within the second cassette chamber 14 B.
  • a first tantalum oxide film 20 is formed as a metal oxide film in a predetermined thickness on the wafer W within the first CVD apparatus 4 , as shown in FIG. 2A.
  • the raw material gas is supplied by bubbling a liquid metal alkoxide of Ta(OC 2 H 5 ) with a He gas.
  • an oxidizing gas such as O 2 gas is supplied to the reaction system.
  • the supply rate of the metal alkoxide which depends on the film forming rate, is, for example, about several mg/min.
  • the process pressure of the CVD process is about 0.2 to 0.3 Torr, and the process temperature should be set to fall within a range of 250 to 450° C., e.g., 400° C.
  • the first tantalum oxide film 20 is deposited in a thickness t 1 of, for example, 3.5 to 5.0 nm.
  • the first tantalum oxide layer 20 as deposited is in an amorphous state. Since an organic material is used as a raw material in forming the first tantalum oxide layer 20 , it is unavoidable for the first layer 20 to contain organic impurities.
  • the wafer W is transferred into the reforming apparatus 8 for applying a reforming process to the first tantalum oxide layer 20 .
  • an oxidizing gas e.g., ozone
  • ozone is used as a process gas serving to provide active oxygen atoms
  • the first layer 20 is irradiated with a large amount of ultraviolet rays emitted from the ultraviolet irradiating means 18 , as shown in FIG. 2B.
  • the ozone is excited by irradiation with the ultraviolet rays so as to generate a large amount of active oxygen atoms.
  • the active oxygen atoms serve to oxidize the organic impurities contained in the first tantalum oxide layer 20 formed on the surface of the wafer W.
  • the C—C bonds, etc. of the organic impurities are broken by the energy of the ultraviolet rays so as to decompose the organic impurities.
  • the organic impurities contained in the first tantalum oxide layer 20 can be removed substantially completely.
  • the first tantalum oxide layer 20 is irradiated with a large amount of the ultraviolet rays having a wavelength of mainly 185 nm and 254 nm.
  • the process pressure is set to fall within a range of about 1 to 600 Torr, and the process temperature is set at 600° C., which is the crystallizing temperature of tantalum oxide, or less.
  • the process temperature is set to fall within a range of 320 to 600° C., e.g., about 425° C. Where the process temperature is lower than 320° C., the processed first tantalum oxide layer 20 fails to exhibit a sufficiently high insulating breakdown voltage.
  • the reforming time which depends on the film thickness, should desirably be at least 10 minutes.
  • the reforming process can be performed by the ozone supply alone without employing the ultraviolet irradiation.
  • the wafer W is transferred into the second CVD apparatus 6 for depositing a second tantalum oxide layer 22 on the first tantalum oxide layer 20 , as shown in FIG. 2C.
  • the depositing conditions of the second layer 22 such as the kind of the raw material gas, the flow rate of the raw material gas, the process pressure, and the process temperature are exactly equal to those for deposition of the first layer 20 .
  • the thickness t 2 of the second layer 22 is set equal to the thickness t 1 of the first layer 20 , i.e., 3.5 to 5.0 nm.
  • each of the first and second tantalum oxide layers 20 and 22 is in an amorphous state.
  • the wafer W is transferred into the heat processing apparatus 10 for the processes described below.
  • a process gas e.g., ozone
  • the process pressure is set to fall within a range of about 1 to 600 Torr, as shown in FIG. 2D.
  • the process temperature is varied across the crystallizing temperature of tantalum oxide.
  • the temperature of the wafer W including the first and second tantalum oxide layers 20 and 22 (hereinafter simply referred to as the wafer temperature) is controlled by allowing a controller 51 shown in FIG. 7 to adjust the electric power supply to each of the lamps 50 .
  • the temperature of the wafer is set lower than the crystallizing temperature (700° C.) of the tantalum oxide and, preferably, is set at a first temperature lower than the upper limit (600° C.) of the reforming temperature in order to apply a reforming process to the second tantalum oxide layer 22 .
  • the wafer temperature is rapidly elevated to a second temperature higher than the crystallizing temperature so as to apply a crystallizing process to the first and second tantalum oxide layers 20 and 22 , followed by promptly cooling the wafer to a temperature lower than 600° C. It should be noted that the period during which the wafer temperature is maintained at the first temperature is longer than the period during which the wafer temperature is held higher than the crystallizing temperature.
  • the second tantalum oxide layer 22 constituting the uppermost metal oxide layer is subjected to a reforming process until the wafer temperature is elevated to reach the crystallizing temperature. It should also be noted that, when the wafer temperature exceeds 700° C., all the tantalum layers including the first tantalum layer 20 and the second tantalum layer 22 are crystallized. What should be noted is that, in the present invention, the reforming process of the second tantalum oxide layer 22 constituting the uppermost layer and the crystallizing process of the first and second tantalum oxide layers 20 and 22 are carried out successively within the same chamber.
  • FIG. 3 is a graph showing the changes in the process temperature of the heat processing apparatus 10 .
  • time T 1 (sec) is plotted on the abscissa, with the process temperature TP(° C.) being plotted on the ordinate.
  • the wafer W is transferred into the process chamber 34 (see FIG. 7) under the condition that each of the wafer temperature and the temperature within the process chamber 34 is set at about 450° C.
  • a reforming process is carried out by maintaining the set temperature for a predetermined period of time, e.g., for about 2 minutes.
  • the power supply to the lamps 50 is increased so as to rapidly increase the wafer temperature to a level not lower than 700° C., e.g., 750° C.
  • the temperature should be elevated at a rate of 30 to 130° C./sec, e.g., 100° C./sec.
  • a reforming process is applied to the second tantalum oxide layer 22 .
  • a crystallizing process is applied to the first and second tantalum oxide layers 20 and 22 .
  • the reforming time T 1 of the tantalum oxide layer 22 which depends on the thickness of the tantalum oxide layer 22 , should be about 120 seconds when the second tantalum oxide layer 22 has a thickness of about 4.5 nm.
  • the time t 2 during which the wafer temperature is not lower than 700° C. should be set at, for example, about 60 seconds. It is desirable for the crystallizing temperature to fall within a range of 700 to 800° C. If the wafer temperature is higher than 800° C., the underlying substance under the tantalum oxide layer is oxidized so as to increase the effective film thickness.
  • the process chamber 34 is purged with N 2 gas, followed by lowering the temperature within the process chamber to about 425° C. Further, the pressure within the process chamber 34 is adjusted, followed by taking the processed wafer out of the heat processing apparatus 10 .
  • the step shown in FIG. 2D can be carried out by using ozone alone without employing the ultraviolet irradiation.
  • the ultraviolet (UV) irradiation for promoting the reforming process as in the step shown in FIG. 2B.
  • the ultraviolet irradiation permits further promoting the reforming process of the second tantalum oxide layer 22 so as to shorten the reforming time T 1 shown in FIG. 3. Even in this case, however, the period during which the wafer temperature is maintained at the reforming temperature is longer than the period during which the wafer temperature is held higher than the crystallizing temperature.
  • FIG. 4 is a graph showing the results of the experiment.
  • the effective film thickness ET is plotted on the abscissa, with the insulation breakdown voltage BV being plotted on the ordinate.
  • Line LA shown in FIG. 4 denotes the properties of the insulating film prepared by the conventional method.
  • line LB denotes the properties of the insulating film prepared by the method of the present invention, in which ozone alone was used without employing the ultraviolet irradiation.
  • line LC shown in FIG. 4 denotes the properties of the insulating film prepared by the method of the present invention, in which the ultraviolet irradiation and ozone were both employed.
  • the insulating films prepared by the method of the present invention exhibit insulation breakdown voltages slightly higher than that exhibited by the insulating film prepared by the conventional method.
  • the number of process steps employed in the method of the present invention is smaller by one than that employed in the conventional method.
  • the insulating films prepared by the method of the present invention exhibit insulating properties better than those exhibited by the insulating film prepared by the conventional method.
  • the insulation breakdown voltage can be further increased by employing both ozone and the ultraviolet irradiation, as denoted by line LC.
  • the tantalum oxide layers 20 and 22 are set at the same thickness, i.e., at about 3.5 to 5.0 nm.
  • the thickness t 1 can be set at 5.5 to 6.0 nm.
  • the thickness t 2 of the second tantalum oxide layer 22 can be made somewhat smaller than 4.5 nm.
  • the thickness t 2 of the second tantalum oxide layer 22 can be set at 2.5 to 4.0 nm.
  • the decrease in the thickness of the second tantalum oxide layer 22 makes it possible to perform the reformation promptly. It follows that, in the step shown in FIG. 5D, the thin tantalum oxide layer 22 can be reformed sufficiently in a short time by only the process with ozone without employing the ultraviolet irradiation. In other words, the reforming time T 1 shown in FIG. 3 can be shortened.
  • the tantalum oxide insulating film is of a two-layer structure.
  • a tantalum oxide layer 24 is deposited in a predetermined thickness as shown in FIG. 6A, followed by applying a reforming and crystallizing process to the tantalum oxide layer 24 , as shown in FIG. 6B.
  • the tantalum oxide layer 24 is subjected to the reforming process and the crystallizing process substantially simultaneously.
  • FIG. 10 schematically shows the constitution of the main part of a cluster-tool-type film forming system according to another embodiment of the present invention.
  • the film forming system 1 M shown in FIG. 10 differs from the film forming system 1 shown in FIG. 1, in that it has no reforming apparatus 8 , but has two heat processing apparatuses 10 .
  • a thin metal oxide film of a double layer structure can be formed by the following method in which a reforming process and a crystallizing process of each layer are successively performed.
  • a cassette C housing for example, 25 unprocessed wafers is placed on a cassette stage (not shown) within the first cassette chamber 14 A. Then, the gate door G 3 is closed to establish an inert gas atmosphere consisting of N 2 gas within the first cassette chamber 14 A. At the same time, the chamber 14 A is vacuum-exhausted.
  • the gate valve G 1 is opened to permit the cassette chamber 14 A to communicate with the common transfer chamber 3 evacuated in advance to set up an inert gas atmosphere. Then, the wafer W is transferred from the cassette chamber 14 A into the common transfer chamber 3 by the arm mechanism 16 .
  • the wafer W is transferred through the opened gate valve G 5 into the first CVD apparatus 4 evacuated in advance.
  • a metal oxide film e.g., tantalum oxide (Ta 2 O 5 ) film, is deposited as a first layer of an insulating thin film.
  • the wafer W is transferred from the first CVD apparatus 4 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16 .
  • the wafer W is transferred through the opened gate valve G 6 into one of the heat processing apparatuses 10 evacuated in advance.
  • the wafer having the first tantalum layer formed thereon is heated under an atmosphere including ultraviolet rays and ozone to a low temperature, such as 450° C., to perform a reforming process of the first tantalum oxide layer, and then heated to a temperature not lower than the crystallizing temperature of tantalum oxide, followed by lowering the temperature in 60 seconds.
  • a low temperature such as 450° C.
  • the wafer is transferred into the common transfer chamber 3 maintained at vacuum, by using an arm mechanism 16 . Then, the wafer W is transferred through the opened gate valve G 8 into the second CVD apparatus 6 evacuated in advance. Within the second CVD apparatus 6 , a second tantalum layer is deposited under the same conditions as in the film formation within the first CVD chamber 4 .
  • the wafer W is transferred from the second CVD apparatus 6 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16 . Then, the wafer W is transferred through the opened gate valve G 7 into the other of the heat processing apparatuses 10 evacuated in advance.
  • the wafer having the first and second tantalum layers formed thereon is heated under an atmosphere including ultraviolet rays and ozone to a low temperature, such as 450° C., to perform a reforming process of the second tantalum oxide layer, and then heated to a temperature not lower than the crystallizing temperature of tantalum oxide, followed by lowering the temperature in 60 seconds.
  • the processed wafer is transferred into the common transfer chamber 3 and, then, housed in the cassette C arranged within the second cassette chamber 14 B.
  • a program can be set such that only a reforming process of a first tantalum oxide layer is performed within one of the heat processing apparatuses 10 , and a reforming process of a second tantalum oxide layer and a crystallizing process of the first and second tantalum oxide layers are performed within the other of the heat processing apparatuses 10 , as described with reference to the film forming system 1 shown in FIG. 1.
  • FIG. 11 schematically shows the constitution of the main part of a heat processing apparatus 102 according to still another embodiment of the present invention.
  • the constitution shown in FIG. 11 can be used as the main part of any of the reforming apparatus 8 and the heat processing apparatus 10 included in the film forming system shown in FIGS. 1 and 10.
  • the heat processing apparatus 102 comprises a process chamber 104 made of aluminum having the surface covered with anodized aluminum and shaped like a substantially rectangular box, as shown in the drawing.
  • a plurality of exhaust ports 112 are formed in the peripheral portion of a bottom portion 106 of the process chamber 104 .
  • a vacuum exhaust mechanism 110 including a vacuum pump 108 is connected to the exhaust port 112 so as to make it possible to vacuum-exhaust the inner space of the process chamber 104 .
  • a port 172 is formed in the side wall of the process chamber 104 .
  • a load lock chamber 174 that can be vacuum-exhausted is connected to the port 172 with a gate valve 176 interposed therebetween.
  • the semiconductor wafer W is transferred into the process chamber 104 through the load lock chamber 174 .
  • an N 2 gas supply mechanism (not shown) for the purging purpose is connected to each of the process chamber 104 and the load lock chamber 174 .
  • the semiconductor wafer W as a target substrate can be placed on the work table 114 .
  • the central portion in the lower surface of the work table 114 is supported by the tip of a hollow rotary shaft 116 vertically extending through the bottom portion 106 of the process chamber 104 .
  • a magnetic fluid seal 118 is arranged in the portion where the rotary shaft 116 extends through the bottom portion 106 of the process chamber 104 .
  • the rotary shaft 116 is airtightly and rotatably supported by the seal 118 , and the work table 114 can be rotated, as desired.
  • the rotary shaft 116 is rotated by a driving force generated from a rotating motor (not shown).
  • a resistance heater 120 made of carbon and coated with, for example, SiC is embedded in the work table 114 so as to heat the semiconductor wafer W placed thereon to a desired temperature.
  • a thin electrostatic chuck 124 made of a ceramic material is arranged on the work table 114 .
  • An electrode 122 formed of a copper plate or the like is buried in the electrostatic chuck 124 .
  • the wafer W is pulled by Coulomb's force generated from the electrostatic chuck 124 so as to be supported on the upper surface of the work table 114 .
  • a plurality of holes 126 are formed in peripheral portions of the work table 114 such that these holes 126 extend through the work table 114 in a vertical direction.
  • lifter pins 128 are arranged to be movable in a vertical direction through these holes 126 . These lifter pins 128 are moved together in a vertical direction by a pin driving rod 130 that can be moved in a vertical direction through the bottom portion 106 of the process chamber 104 .
  • a shrinkable bellows 132 made of a metal is arranged in that portion of the bottom portion 106 through which the rod 130 extends so as to permit the rod 130 to be moved in a vertical direction while maintaining an airtight state.
  • the wafer W When the wafer W is transferred into and out of the process chamber 104 , the wafer W is moved upward or downward by a lift mechanism (not shown) via the lifter pins 128 .
  • a lift mechanism not shown
  • three lifter pins 128 are arranged in a manner to support peripheral portions of the wafer W.
  • a shower head 134 made of a heat resistant material that is transparent to ultraviolet rays and infrared rays such as quartz is formed in a ceiling portion of the process chamber 104 .
  • a process gas is spurted through the shower head 134 into a process field PF.
  • the shower head 134 is shaped like a lattice like the shower head 56 shown in FIG. 8.
  • the shower head 134 comprises an annular pipe 136 connected to a line pipe 142 and having a diameter larger than the diameter of the wafer W and inside pipes 138 connected inside the annular pipe 136 .
  • a large number of gas spurting holes 61 as shown in FIG. 8 are equidistantly formed on the lower side of the inside pipes 138 .
  • the inner diameters of the annular pipe 136 and the inside pipe 138 are set at about 16 mm and 4.35 mm, respectively.
  • the diameter of the gas spurting hole 61 is set at about 0.3 to 0.5 mm.
  • the projected surface area of the inside pipes 138 on the wafer W placed on the work table 114 is smaller than 20% of the area of the wafer surface.
  • the wafer surface can be irradiated directly with light rays, which are to be described later, running through the clearances of the lattice of the inside pipes 138 .
  • the shower head 134 is transparent to ultraviolet rays and infrared rays, the constitution of the shower head 134 is not limited to that shown in the drawing and described above.
  • the line pipe 142 for introducing a process gas into the shower head 134 airtightly extends through the side wall of the process chamber so as to be led to the outside.
  • the line pipe 142 is connected to a gas source 144 via a mass flow controller (not shown).
  • a process gas such as ozone gas is introduced into the shower head 134 through the line pipe 142 .
  • a rectangular aperture 146 set larger than the wafer diameter is formed in a ceiling portion of the process chamber 104 .
  • a rectangular transmitting window 148 made of a material transparent to ultraviolet rays and infrared rays such as quarts is airtightly mounted in the rectangular aperture 146 by a fixing frame 152 using a seal member 150 such as an O-ring.
  • the rectangular transmitting window 148 has a thickness of, for example, 20 mm to enable the window 148 to withstand the atmospheric pressure.
  • a light radiating mechanism 156 for radiating light rays 154 toward the process chamber 104 is arranged above the transmitting window 148 .
  • the process gas of ozone is irradiated with the light rays 154 so as to generate active oxygen atoms.
  • the light radiating mechanism 156 includes mainly a substantially spherical mercury-sealed lamp 158 having mercury sealed therein for emitting ultraviolet rays UV and a substantially spherical infrared lamp 160 for emitting infrared rays IR.
  • a microwave generating mechanism 162 for generating a microwave of, for example, 2.45 GHz is connected to the mercury-sealed lamp 158 via a waveguide 164 .
  • a power source 166 is connected to the infrared lamp 160 via a lead wire 168 .
  • the infrared lamp 160 is used for heating a metal oxide film, which is a target substrate. Therefore, the power source 166 of the infrared lamp 160 and the power source 120 A of the resistance heater 120 on the side of the work table 114 are controlled by the common temperature controller 51 .
  • a substantially dome-shaped light reflector 170 for reflecting mixed light rays 154 consisting of ultraviolet rays UV and infrared rays IR toward the process field within the process chamber 104 is arranged to cover the upper side of the lamps 158 and 160 .
  • the light reflector 170 is prepared by forming, for example, an aluminum plate into a shape of a dome. The curvature of the light reflector 170 is determined to permit the light rays 154 to be reflected substantially uniformly onto the surface of the work table 114 .
  • the semiconductor wafer W having a metal oxide film such as a tantalum oxide (Ta 2 O 5 ) film formed thereon as an insulating film is introduced from the load lock chamber 174 through the port 172 into the process chamber 104 held at a vacuum condition. Then, the wafer W is placed on the work table 114 so as to be attracted and held on the work table 114 by Coulomb's force of the electrostatic chuck 124 .
  • a metal oxide film such as a tantalum oxide (Ta 2 O 5 ) film formed thereon as an insulating film
  • the wafer W is maintained at a predetermined process temperature by the resistance heater 120 . Also, a predetermined process pressure is maintained within the process chamber 104 by supplying a process gas containing ozone into the process field PF through the shower head 134 while vacuum-exhausting the process chamber 104 . Under this condition, a reforming process or both reforming process and crystallizing process are started as described previously with reference to the film forming system shown in FIG. 1.
  • a microwave of 2.45 GHz is generated from the microwave generating mechanism 162 included in the light radiating mechanism 156 so as to allow the mercury-sealed lamp 158 to be irradiated with the microwave through the waveguide 164 .
  • a large amount of ultraviolet rays are emitted from the mercury-sealed lamp 158 .
  • a large amount of infrared rays IR are generated from the infrared lamp 160 by the electric power supplied from the power source 166 .
  • the light rays 154 containing both the ultraviolet rays UV and the infrared rays IR are reflected directly by the dome-shaped light reflector 170 , and the reflected light is transmitted through the transmitting window 148 made of quartz so as to enter the process chamber 104 maintained at a predetermined vacuum pressure. Further, the light rays 154 pass through the shower head 134 made of quartz so as to have the process gas containing ozone as a main component irradiated with the light rays 154 within the process field PF.
  • Ozone is irradiated with the ultraviolet rays UV so as to generate a large amount of active oxygen atoms.
  • the active oxygen atoms act on the metal oxide film so as to dissociate organic impurities such as C—C bonds and hydrocarbons contained in the metal oxide film so as to reform the metal oxide film.
  • the surface of the wafer W is particularly heated by the infrared rays IR, with the result that the atoms in the crystal lattice of the metal oxide film are vigorously vibrated thermally. As a result, removal of the organic impurities are promoted when the active oxygen atoms act on the metal oxide film.
  • the inner space of the process chamber 104 is held at a vacuum condition or at a state of reduced pressure, the probability of collision of the generated active oxygen atoms against gaseous atoms or gaseous molecules is very low.
  • the light rays 154 are less likely to be absorbed by gaseous molecules, the density of the active oxygen atoms is increased so as to perform the processing promptly. By this processing, the insulating properties of the metal oxide film can be markedly improved rapidly.
  • the dome-shaped light reflector 170 of the light radiation mechanism 156 is set to have an appropriate curvature to permit the reflected light to be distributed substantially uniformly on the surface of the work table 114 .
  • the generated ultraviolet rays UV and the infrared rays IR can be utilized efficiently for generation of the active oxygen atoms.
  • the work table 114 supported by the rotary shaft 116 is rotated together with the wafer W placed on the table 114 .
  • the wafer can be processed uniformly over the entire surface, and the metal oxide film formed on the wafer can be processed substantially uniformly over the entire surface.
  • the process pressure should be set to fall within a range of 1 to 600 Torr, e.g., at about 30 Torr. Where the process pressure does not fall within the range noted above, the heat process proceeds slowly or cannot be performed sufficiently, with the result that the insulation breakdown voltage of the metal oxide film is lowered.
  • the process temperature should be set to fall within a range of 320 to 600° C., e.g., at about 425° C., in the case of the reforming process, and should be set to fall within a range of 700 to 800° C., e.g., 750° C., in the case of the crystallizing process.
  • the process gas such as ozone introduced into the shower head 134 flows first through the annular pipe 136 and, then, into the inside pipes 138 . Then, the process gas is supplied into the process chamber 104 through a large number of the spurting holes 61 made in the inside pipes 138 .
  • the particular arrangement makes it possible to supply the process gas uniformly to the wafer surface.
  • a large amount of the ultraviolet rays UV and the infrared rays IR pass through the free spaces formed between the adjacent inside pipes 138 arranged to form a lattice in the shower head 134 . Accordingly, the ultraviolet rays UV and the infrared rays IR do not interfere with ozone or the like, with the result that the surface of the wafer is irradiated directly with a large amount of the ultraviolet rays UV and the infrared rays IR. Naturally, the amount of the active species is increased on the wafer surface so as to make it possible to perform the process efficiently.
  • a comparative experiment was carried out between a conventional method in which ultraviolet rays alone were used for a reforming process and a method of the present invention in which ultraviolet rays and infrared rays were used for a reforming process.
  • Each of the reforming processes was carried out under the temperature of 425° C., the pressure of 30 Torr, the O 2 flow rate of 10 slm, the O 3 concentration of 130 g/m 3 , and the process time of 30 seconds.
  • FIG. 12 is a graph showing the results of the experiment.
  • the effective film thickness ET is plotted on the abscissa, with the insulation breakdown voltage BV being plotted on the ordinate.
  • Line L 11 shown in the graph represents the conventional method, with line L 12 representing the method of the present invention.
  • the method of the present invention is markedly superior to the conventional method in the insulation breakdown voltage of the insulating film.
  • the method of the present invention is prominently superior to the conventional in the insulation breakdown voltage of the insulating film where the film thickness is 10 nm or less.
  • two different light sources i.e., the mercury-sealed lamp 158 and the infrared lamp 160 , are used as the light radiation mechanism 156 .
  • a lamp that emits light having wavelengths falling within the ultraviolet ray range and within the infrared ray range e.g., a light-emitting lamp of an electrodeless microwave system
  • the light-emitting lamp of an electrodeless microwave system emits light rays of both the ultraviolet and infrared ranges as well as the visible light range, making it possible to decrease the number of lamps used. It follows that it is possible to decrease the running cost and the initial cost.
  • the mercury-sealed lamp 158 of a large capacity and the infrared lamp 160 of a large capacity are fixed within the heat processing apparatus.
  • lamps having a medium capacity or small capacity it is possible to use lamps having a medium capacity or small capacity. In this case, the semiconductor wafer W is scanned with the light rays 154 emitted from these lamps.
  • FIG. 13 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention.
  • FIG. 14 is a top view schematically showing the apparatus shown in FIG. 13.
  • a slender rod-like mercury-sealed lamp 158 A and a slender rod-like infrared lamp 160 A are used in this embodiment as the light radiation mechanism 156 .
  • slender light reflectors 170 A and 170 B each having a substantially arcuate cross-sectional shape are arranged behind these lamps 158 A and 160 A, respectively, to reflect downward the ultraviolet rays UV and the infrared rays IR with a high directivity.
  • These lamps 158 A and 160 A are housed in a casing 178 having a lower open end.
  • the casing 178 is mounted to a scanning mechanism 192 and can be moved in a horizontal direction over the process chamber 104 , as shown in FIG. 14.
  • the scanning mechanism 192 comprises a guide rail 194 mounted on one side above the process chamber 104 and a driving rail 196 consisting of, for example, a ball screw, which is arranged on the other side above the process chamber 104 .
  • the casing 178 is stretched over these rails 194 and 196 so as to be movable along these rails.
  • a driving motor 198 such as a step motor, which is arranged at one end portion of the driving rail 196 , driven in forward and backward directions so as to permit the lamps 158 A and 160 A to be moved along the rails 194 and 196 .
  • the light rays 154 consisting of the ultraviolet rays UV emitted from the mercury-sealed lamp 158 a and infrared rays IR emitted from the infrared lamp 160 A scan the surface of the wafer W by the scanning mechanism 192 of the constitution described above.
  • the metal oxide film formed on the surface of the wafer W is promptly processed efficiently by the light rays 154 consisting of ultraviolet rays UV and infrared rays IR, as already described in conjunction with FIG. 11.
  • the metal oxide film can be processed uniformly over the entire surface by allowing the wafer surface to be irradiated and scanned with the light rays 154 .
  • the scanning speed is slightly lowered in the edge portion on the starting side and in the edge portion on the finishing side of the scanning, as shown in FIG. 15. By lowering the scanning speed, the amount of the irradiating light is increased in the edge portions on the starting side and on the finishing side of the scanning so as to further improve the uniformity of the process over the entire surface of the metal oxide film.
  • the two lamps 158 A and 160 A used in this embodiment do not have markedly large capacities, making it possible to markedly decrease the facility cost, compared with the case where a large number of lamps are arranged over the entire ceiling region of the process chamber 104 or with the case where highly powerful lamps are used as shown in FIG. 11.
  • the casing 178 including two lamps 158 A and 160 A is moved for the scanning purpose.
  • the scanning can be performed by moving a reflective mirror that reflects the light emitted from the two lamps toward the wafer W.
  • FIG. 16 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention, which is based on the view point given above.
  • a casing 178 provided with a mercury-sealed lamp 158 A, an infrared lamp 160 A, and light reflectors 170 A and 170 B is horizontally fixed on one side in an upper region of the ceiling portion of the process chamber 104 .
  • a reflective mirror 180 inclined at about 45° relative to a horizontal plane is stretched over the guide rail 194 (see FIG. 14) and the driving rail 196 of the scanning mechanism 192 in a manner to face the casing 178 .
  • the reflective mirror 180 is movable along these rails 194 and 196 .
  • the light rays 154 consisting of ultraviolet rays UV and infrared rays IR that are emitted in the horizontal direction from the two lamps 158 A and 160 A, respectively, are reflected substantially downward by the moving reflective mirror 180 so as to scan the surface of the wafer W. It follows that the metal oxide film formed on the wafer W can be processed promptly and efficiently as in the apparatus shown in FIG. 13. It should also be noted that, since the surface of the wafer W is scanned by the light rays 154 , the metal oxide film formed on the wafer can be processed more uniformly over the entire surface.
  • the amount of the diffused light is increased with increase in the distance of the reflective mirror 180 from the light source lamps 158 A and 160 a . Therefore, the scanning speed of the reflective mirror 180 is set to be gradually decreased with increase in the distance of the reflective mirror 180 from the light source lamps 158 A and 160 a , as shown in the graph of the scanning speed given in an upper portion of FIG. 16. As a result, the light amount irradiating the wafer surface is increased with increase in the distance of the reflective mirror 180 from the light source lamps 158 A and 160 a so as to further improve the uniformity of the process over the entire surface of the metal oxide film formed on the wafer.
  • the reflective mirror 180 is moved in the horizontal direction so as to allow the light to scan the wafer surface.
  • FIG. 17 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention, which is based on the view point given above.
  • a reflective mirror mechanism 182 is arranged in a central portion in an upper region of the ceiling portion of a process chamber 104 in place of the scanning mechanism 192 shown in FIG. 16.
  • the mirror mechanism 182 comprises a slender reflective mirror 180 and a rotary shaft 184 for fixing and integrally rotating the reflective mirror.
  • a driving mechanism such as a step motor (not shown) is arranged at one end of the rotary shaft 184 to permit the reflective mirror 180 to be rotated (or swung) in forward and backward directions within a predetermined range of angles.
  • a casing 178 provided with a mercury-sealed lamp 158 A, an infrared lamp 160 A, and two reflective mirrors 170 A and 170 B is horizontally arranged on one side in an upper region of the ceiling portion of the process chamber 104 .
  • the light rays 154 consisting of ultraviolet rays UV and infrared rays IR emitted from the two lamps 158 A and 160 A, respectively, in the horizontal direction are reflected by the reflective mirror 180 so as to scan the surface of the wafer W.
  • the metal oxide film formed on the semiconductor wafer W can be processed promptly and efficiently in this embodiment, too, as in the embodiment shown in FIG. 16. Also, since the light rays 154 scan the wafer surface, the uniformity of the process over the entire region of the metal oxide film formed on the wafer can be further improved.
  • the reflective mirror 180 is swung at the highest speed when the reflected light runs vertically downward. Since the length of the optical path is gradually increased so as to gradually increase the amount of the diffused light with increase in the swinging angle of the reflective mirror 180 to the right side or left side, the swinging speed of the reflective mirror 180 is set to be lowered with increase in the swinging angle noted above. As a result, the light amount, which is decreased by the diffusion on the wafer surface, can be compensated so as to further improve the uniformity of the reforming process over the entire surface of the metal oxide film formed on the wafer.
  • FIG. 18 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention.
  • FIG. 19 is a top view of the apparatus shown in FIG. 18.
  • a transmitting window is not formed in the ceiling portion of the process chamber 104 , and the entire ceiling portion is formed of, for example, an aluminum plate.
  • An aperture 186 is formed on one side of the process chamber 104 , and a slender transmitting window 190 made of the material equal to that used for forming the transmitting window 148 in the embodiment shown in FIG. 11 is arranged at the aperture 186 using a seal member 188 .
  • the slender transmitting window 190 is made of, for example, quartz.
  • a casing 178 equipped with two lamps 158 A and 160 A and two light reflectors 170 A and 170 B, which is equal to those shown in FIG. 17, etc. is horizontally fixed on the outside of the transmitting window 190 . In this case, the casing 178 is arranged to permit the light rays 154 emitted from the lamps 158 A and 160 A to run in a horizontal direction through the process field PF.
  • the process gas containing ozone is excited by the light rays 154 introduced in a horizontal direction into the process field PF in this case, too, the metal oxide film formed on the surface of the wafer can be processed efficiently.
  • the lamps 156 A and 160 A are arranged on the side surface of the process chamber 104 , with the result that the light rays 154 need not be transmitted through the portion of the shower head 134 formed in the ceiling portion. Therefore, the light rays 154 emitted from the lamps are less absorbed before the light rays 154 run to reach the process field PF and, thus, a large amount of light rays 154 enter the process field PF.
  • the increase in the amount of the light rays 154 entering the process field PF permits promoting the process of the metal oxide film formed on the wafer surface.
  • the light amount in a region close to the lamps 158 A and 160 A is larger than that in a region remote from these lamps 158 A and 160 A because the light ray is diffused while running within the process field PF.
  • the uniformity of the process can be maintained at a high level over the entire region of the metal oxide film formed on the wafer surface.
  • the resistance heater 120 is used as a heater on the side of the work table 114 .
  • the heating lamps 50 as shown in FIGS. 7 and 9 can be used in place of the resistance heater 120 .
  • the heat processing apparatus of the present invention is used as an apparatus for performing a reforming process and a crystallizing process, it is more desirable to use the heating lamps 50 rather than the resistance heater 120 in view of the heating power.
  • the heat processing apparatus shown in each of FIGS. 13 to 18 is featured in that the apparatus can be used not only in the case where both the ultraviolet lamp 158 A and the infrared lamp 160 A are used but also the case where the ultraviolet lamp 158 A alone is used.
  • Each of these lamps need not be limited to a linear lamp.
  • a tantalum oxide layer is used as a metal oxide film to be processed.
  • the heat processing apparatus of the present invention can also be used for processing other films including, for example, metal oxide films such as a titanium oxide film, a zirconium oxide film, a barium oxide film, and a strontium oxide film; metal nitride films such as a titanium nitride film and a tungsten nitride film; and metal films such as a titanium film, a platinum film, a ruthenium film and an iridium film. Further, it is desirable to use ozone or oxygen gas as a process gas in the case of processing a metal oxide film or a metal nitride film.
  • an inert gas such as a nitrogen gas, a hydrogen gas, a neon gas, a helium gas or an argon gas as a process gas in place of the ozone gas that is corrosive.

Abstract

An insulating film consisting of first and second tantalum oxide layers is formed on a semiconductor wafer. First, an amorphous first layer is formed by CVD, and a reforming process for removing organic impurities contained in the first layer is carried out. Then, an amorphous second layer is formed by CVD on the first layer. Then, a reforming process for removing organic impurities contained in the second layer is carried out by supplying a process gas containing ozone into a process chamber while heating the wafer to a temperature lower than a crystallizing temperature over a certain period. Further, within the same process chamber, the wafer is successively heated to a second temperature higher than the crystallizing temperature, followed by cooling the wafer to a temperature lower than the crystallizing temperature so as to crystallize the first and second layers simultaneously.

Description

    BACKGROUND OF THE INVENTION
  • The present invention relates to a single-substrate-heat-processing apparatus and method for performing a reforming process for removing inorganic impurities contained in a thin film formed on a target substrate and for performing a crystallizing process for crystallizing the thin film, and particularly, to a heat processing apparatus and method applied to a metal oxide film deposited by MOCVD (Metal Organic Chemical Vapor Deposition) method. [0001]
  • In the manufacturing process of a semiconductor device, a film forming process and a pattern etching process are repeatedly applied to a semiconductor wafer. The specification for the film forming process becomes severer and severer in recent years in accordance with increases in the density and in the degree of integration of the semiconductor devices. For example, a further a decrease in thickness and a higher insulating properties are required even for a very thin insulating film such as an insulating film included in a capacitor or a gate insulating film. [0002]
  • A silicon oxide film or a silicon nitride film is widely used as such an insulating film. However, a metal oxide film such as a tantalum oxide (Ta[0003] 2O5) film has come to be used in recent years as an insulating film exhibiting further improved insulating properties. Such a metal oxide film can be formed by an MOCVD method, in which an organometallic compound is gasified for deposition of the metal. The insulating properties of the metal oxide film can be further improved by applying a reforming process to the surface of the metal oxide film after deposition. A reforming processing technique is disclosed in, for example, Jpn. Pat. Appln. KOKAI Publication No. 2-283022.
  • A CVD apparatus is used for forming a tantalum oxide film. A raw material gas containing, for example, tantalum alkoxide (Ta(OC[0004] 2H5)5) is used as a process gas together with O2 gas. The process pressure is set at about 0.2 to 0.3 Torr, and the process temperature is set at about 250 to 450° C. Under these conditions, the excited species generated by dissociation of the raw material gas perform reactions with the oxygen gas, with the result that an amorphous tantalum oxide film is deposited on a semiconductor wafer.
  • A reforming apparatus is used for performing the reforming process of the tantalum oxide film after the deposition. The wafer having the tantalum oxide film formed thereon is put under an atmosphere of the atmospheric pressure containing ozone. Ozone is irradiated with ultraviolet rays emitted from a mercury lamp so as to generate active oxygen atoms. The organic impurities having C—C bonds, etc. and contained in the tantalum oxide film are decomposed by the active oxygen atoms so as to be removed from the tantalum oxide film. As a result, the insulating properties of the tantalum oxide film are improved. Incidentally, the reforming process is carried out at a temperature lower than the crystallizing temperature, e.g., at about 425° C., in order to allow the tantalum oxide film to maintain its amorphous state. [0005]
  • Then, the wafer is transferred into a heat processing apparatus for crystallization. The tantalum oxide film is heated within the heat processing apparatus in the presence of O[0006] 2 gas to a temperature higher than the crystallizing temperature, e.g., to about 700° C. By this annealing process, the tantalum oxide film is crystallized and the density thereof is increased in the molecule level, with the result that the insulating properties of the tantalum oxide film are further improved.
  • Jpn. Pat. Appln. KOKAI Publication No. 9-121035 teaches a tantalum oxide film of a two-layer structure. In this prior art, an amorphous first layer is deposited first on a semiconductor wafer, followed by applying a reforming process to the first layer. Then, a second amorphous layer is deposited on the first layer, followed by applying a reforming process to the second layer. Finally, the wafer is subjected to a heat process at a high temperature so as to crystallize both the first and second layers simultaneously. The technique disclosed in this prior art makes it possible to remove effectively the organic impurities in the step of the individual reforming process because each of the first and second layers is sufficiently thin so as to further improve the insulating properties of the tantalum oxide film. However, the number of the process steps and the number of transfer steps are increased in this prior art, leading to a decrease in the through-put. In addition, the facility cost and the manufacturing cost are increased. [0007]
  • Further, Jpn. Pat. Appln. KOKAI Publication No. 10-79377 (U.S. patent application Ser. No. 08/889,590) relating to an invention achieved by the present inventors discloses a cluster-tool-type film forming system in which a deposition apparatus, a reforming apparatus and a heat processing apparatus for crystallization are connected to each other via a common transfer chamber. The cluster-tool-type film forming system permits solving the problem of the through-put, etc. to some extent. However, a further improvement is required. [0008]
    • BRIEF SUMMARY OF THE INVENTION
  • An object of the present invention is to provide a single-substrate-heat-processing apparatus and method for performing a reforming process and a crystallizing process while increasing the through-put and reducing the facility cost and the manufacturing cost. [0009]
  • According to a first aspect of the present invention, there is provided a single-substrate-heat-processing apparatus for performing a reforming process for removing organic impurities contained in a thin film formed on a target substrate and a crystallizing process for crystallizing the thin film, the thin film being formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, the apparatus comprising: [0010]
  • an airtight process chamber; [0011]
  • a work table arranged within the process chamber configured to place the target substrate thereon; [0012]
  • an exhaust mechanism configured to exhaust the process chamber; [0013]
  • a supply mechanism configured to supply a process gas containing oxygen atoms into the process chamber; [0014]
  • a heating mechanism configured to heat the thin film while the target substrate is placed on the work table; and [0015]
  • a control section configured to serve to control the heating mechanism such that the thin film is heated to a first temperature lower than the crystallizing temperature of the material over a first period and, then, the thin film is heated to a second temperature higher than the crystallizing temperature, followed by cooling the thin film to a temperature lower than the crystallizing temperature, the first period being longer than a second period during which the thin film has a temperature higher than the crystallizing temperature. [0016]
  • According to a second aspect of the present invention, there is provided a film forming system for forming a crystallized thin film on a target substrate, the thin film being formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, the system comprising: [0017]
  • an airtight common transfer chamber; [0018]
  • a transfer mechanism arranged within the common transfer chamber configured to transfer the target substrate; [0019]
  • a single-substrate-processing CVD apparatus connected to the common transfer chamber via a gate valve, configured to deposit an amorphous thin film by CVD on the target substrate; and [0020]
  • a single-substrate-heat-processing apparatus connected to the common transfer chamber configured to perform a reforming process for removing organic impurities contained in the thin film and a crystallizing process for crystallizing the thin film, the heat-processing apparatus including, [0021]
  • an airtight process chamber, [0022]
  • a work table arranged within the process chamber configured to place the target substrate thereon, [0023]
  • an exhaust mechanism configured to exhaust the process chamber, [0024]
  • a supply mechanism configured to supply a process gas containing oxygen atoms into the process chamber, [0025]
  • a heating mechanism configured to heat the thin film while the target substrate is placed on the work table, and [0026]
  • a control section configured to serve to control the heating mechanism such that the thin film is heated to a first temperature lower than the crystallizing temperature of the material over a first period and, then, the thin film is heated to a second temperature higher than the crystallizing temperature, followed by cooling the thin film to a temperature lower than the crystallizing temperature, the first period being longer than a second period during which the thin film has a temperature higher than the crystallizing temperature. [0027]
  • According to a third aspect of the present invention, there is provided a method of forming a thin film on a target substrate, the thin film being formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, the method comprising: [0028]
  • depositing a thin film in an amorphous state by CVD on the target substrate; [0029]
  • placing the target substrate having the thin film deposited thereon on a work table arranged within an airtight process chamber; [0030]
  • performing a reforming process for removing organic impurities from the thin film by supplying a process gas containing oxygen atoms into the process chamber and heating over a first period the thin film formed on the target substrate placed on the work table to a first temperature lower than a crystallizing temperature of the material while exhausting the process chamber; and [0031]
  • performing a crystallizing process for crystallizing the thin film after the reforming process by heating the thin film formed on the target substrate placed on the work table to a second temperature higher than the crystallizing temperature, followed by cooling the thin film to a temperature lower than the crystallizing temperature, the first period being longer than a second period during which the thin film has a temperature higher than the crystallizing temperature. [0032]
  • According to a fourth aspect of the present invention, there is provided a method of forming a thin film on a target substrate, the thin film including a first layer and a second layer formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, the method comprising: [0033]
  • depositing a first layer in an amorphous state by CVD on the target substrate; [0034]
  • performing a reforming process for removing organic impurities contained in the first layer by heating the first layer to a temperature lower than a crystallizing temperature of the material within an atmosphere containing active oxygen atoms; [0035]
  • depositing a second layer in an amorphous state by CVD on the first layer having being reformed; [0036]
  • placing the target substrate having the second layer deposited thereon on a work table arranged within an airtight process chamber; [0037]
  • performing a reforming process for removing organic impurities contained in the second layer by supplying a process gas containing oxygen atoms into the process chamber and by heating over a first period the second layer deposited on the target substrate placed on the work table to a first temperature lower than the crystallizing temperature; and [0038]
  • performing a crystallizing process for crystallizing the first and second layers after the reforming process of the second layer by heating the first and second layers deposited on the target substrate placed on the work table to a second temperature higher than the crystallizing temperature, followed by cooling the first and second layers to a temperature lower than the crystallizing temperature, the first period being longer than a second period during which the first and second layers have a temperature higher than the crystallizing temperature. [0039]
  • Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter. [0040]
    • BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING
  • The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate presently preferred embodiments of the invention, and together with the general description given above and the detailed description of the preferred embodiments given below, serve to explain the principles of the invention. [0041]
  • FIG. 1 schematically shows the constitution of the main part of a cluster-tool-type film forming system according to one embodiment of the present invention; [0042]
  • FIGS. 2A to [0043] 2D are cross-sectional views collectively showing a thin film forming method according to one embodiment of the present invention;
  • FIG. 3 is a graph showing changes in the process temperature in a heat processing apparatus; [0044]
  • FIG. 4 is a graph showing the insulation breakdown characteristics of a tantalum oxide film; [0045]
  • FIGS. 5A to [0046] 5D are cross-sectional views collectively showing a thin film forming method according to another embodiment of the present invention;
  • FIGS. 6A and 6B are cross-sectional views collectively showing a thin film forming method according to still another embodiment of the present invention; [0047]
  • FIG. 7 schematically shows the constitution of the main part of the heat processing apparatus included in the film forming system shown in FIG. 1; [0048]
  • FIG. 8 is a plan view showing the shower head of the apparatus shown in FIG. 7; [0049]
  • FIG. 9 schematically shows the constitution of the main part of a heat processing apparatus according to another embodiment of the present invention; [0050]
  • FIG. 10 schematically shows the constitution of the main part of a cluster-tool-type film forming system according to another embodiment of the present invention; [0051]
  • FIG. 11 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention; [0052]
  • FIG. 12 is a graph comparing the prior art in which reformation is carried out by ultraviolet rays alone with the method of the present invention in which reformation is carried out by using both ultraviolet rays and an infrared light; [0053]
  • FIG. 13 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention; [0054]
  • FIG. 14 is a top view schematically showing the apparatus shown in FIG. 13; [0055]
  • FIG. 15 is a graph showing changes in the scanning speed of light; [0056]
  • FIG. 16 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention; [0057]
  • FIG. 17 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention; [0058]
  • FIG. 18 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention; and [0059]
  • FIG. 19 is a top view schematically showing the apparatus shown in FIG. 18. [0060]
    • DETAILED DESCRIPTION OF THE INVENTION
  • Embodiments of the present invention will be described hereinafter with reference to the accompanying drawings. In the following description, the constituent elements having substantially the same function and arrangement are denoted by the same reference numerals, and a repetitive description will be made only when necessary. [0061]
  • FIG. 1 schematically shows the constitution of the main part of a cluster-tool-type [0062] film forming system 1 according to one embodiment of the present invention.
  • In the [0063] film forming system 1 shown in FIG. 1, two CVD apparatuses 4 and 6, a reforming apparatus 8 and a heat processing apparatus 10 are connected to a common transfer chamber 3. Further, two cassette chambers 14A and 14B are also connected to the common transfer chamber 3 for improving the wafer transfer efficiency. A wafer is transferred among these apparatuses 4, 6, 8, 10 and the cassette chambers 14A, 14B through the common transfer chamber 3. For transferring the wafer, an arm mechanism 16 consisting of a multi-joint arm that can be elongated, shrunk and swingable is arranged within the common transfer chamber 3.
  • The [0064] common transfer chamber 3 is connected to the cassette chamber 14A via a gate valve G1 and to the cassette chamber 14B via a gate valve G2. The cassette chambers 14A and 14B are provided with gate doors G3 and G4, respectively, that can be opened or closed to allow the inner spaces of the cassette chambers 14A, 14B to communicate with the outer working environment. Further, the common transfer chamber 3 is connected to the CVD apparatuses 4, 6, the reforming apparatus 8, and the heat processing apparatus 10 via gate valves G5, G6, G7 and G8, respectively.
  • Each of the [0065] common transfer chamber 3 and the cassette chambers 14A and 14B is of an airtight structure. The cassette chambers 14A and 14B constitute the wafer load/unload of the entire film forming system. A cassette C housing a plurality of semiconductor wafers is transferred into and taken out of each of the cassette chambers 14A and 15B through the gate doors G3 and G4 that are opened. Each of the cassette chambers 14A and 14B is provided with a cassette stage (not shown) that can be moved in a vertical direction and swung. Further, these cassette chambers 14A, 14B can be vacuum-exhausted with the cassette C housed therein.
  • Each of the [0066] CVD apparatuses 4 and 6 is used for forming an amorphous metal oxide film on a target substrate, e.g., a semiconductor wafer, under a vacuum atmosphere containing an evaporated metal oxide film raw material and an oxidizing gas. The reforming apparatus 8 is used for subjecting a metal oxide film to a reforming process by exposing the metal oxide film to active oxygen atoms under a vacuum atmosphere. Further, the heat processing apparatus 10 is used for subjecting a metal oxide film successively to a reforming process and to a crystallizing process by heating the metal oxide film to a temperature higher than the crystallizing temperature.
  • Each of the [0067] apparatuses 4, 6, 8, 10 and the cassette chambers 14A and 14B is connected to a gas supply mechanism (not shown) for purging the inner spaces with an inert gas, e.g., N2 gas, and to a vacuum exhaust mechanism (not shown) for vacuum-exhausting the inner spaces. The N2 gas supply to these apparatuses 4, 6, 8, 10 and the cassette chambers 14A, 14B and the vacuum exhaust of these apparatuses 4, 6, 8, 10 and the cassette chambers 14A, 14B can be controlled independently of each other.
  • The CVD apparatus and the reforming apparatus disclosed in Jpn. Pat. Appln. KOKAI Publication No. 10-79377 (U.S. patent application Ser. No. 08/889,590, the teachings of which are hereby incorporated by reference) can be used as the [0068] CVD apparatuses 4, 6 and as the reforming apparatus 8. In each of these CVD apparatuses 4 and 6, an amorphous metal oxide film, e.g., a tantalum oxide (Ta2O5) film, is deposited on the surface of a wafer by CVD. As a raw material of the metal oxide film, an organic compound of a liquid metal alkoxide, e.g., Ta(OC2H5)5, which is bubbled by, for example, a He gas, is supplied to the CVD apparatus. The process gas is mixed with O2 gas used as an oxidizing gas within the process chamber so as to carry out a CVD film forming reaction under the particular atmosphere. Two CVD apparatuses of the same constitution are used in the present invention so as to improve the through-put. It is possible to use as an oxidizing gas O3, N2O, NO, a gasified alcohol, etc. in addition to O2.
  • In the reforming [0069] apparatus 8, the surface of the wafer placed on a work table having a heater arranged therein is exposed to active oxygen atoms so as to reform the metal oxide film formed on the wafer surface. The active oxygen atoms are obtained by irradiating ozone (O3) introduced from the outside with ultraviolet rays emitted from a lamp 18 on the ceiling of the apparatus. The active oxygen atoms can also be obtained by using N2O gas in place of ozone. The organic impurities having C—C bonds or hydrocarbons contained in the metal oxide film are decomposed by the active oxygen atoms so as to be removed from the metal oxide film. The reforming process should be carried out at a temperature lower than the crystallizing temperature of the metal oxide film in order to remove the organic impurities completely from the metal oxide film.
  • In the [0070] heat processing apparatus 10, the wafer is heated in the presence of active oxygen atoms from a temperature not higher than the crystallizing temperature to a temperature not lower than the crystallizing temperature of the metal oxide film. As a result, a reforming process of the metal oxide film formed as the uppermost layer of the wafer and a crystallizing process of all the metal oxide films formed on the wafer are carried out successively. The reforming process and the crystallizing process may be carried out substantially simultaneously by heating the wafer in the presence of active oxygen atoms.
  • FIG. 7 schematically shows the constitution of the main part of an [0071] apparatus 32 used as the heat processing apparatus 10 of the film forming system shown in FIG. 1.
  • As shown in FIG. 7, the [0072] heat processing apparatus 32 comprises a process chamber 34 made of, for example, aluminum having the surface covered with anodized aluminum. A bottom plate 38 is airtightly arranged in a bottom portion of the process chamber 34 using a seal member 36 such as an O-ring.
  • A work table [0073] 44 on which a semiconductor wafer is placed is arranged within the process chamber 34. The work table 44 comprises a base 45 and a cover 46 removably mounted onto the base 45 via a clamp 48. The cover 46 is made of a transparent quartz, and a plurality of pins 47 made of quartz are arranged on the cover 46 for supporting a wafer W. An airtight space separated from the atmosphere within the process chamber 34 is formed between the base 45 and the cover 46.
  • A plurality of [0074] heating lamps 50 consisting of, for example, halogen lamps are arranged within the airtight space of the work table 44. The wafer W is heated from the back side by the lamps 50. The power supply to the lamps 50 can be controlled individually by a controller 51, making it possible to set the temperature of the wafer W and the metal oxide film formed on the wafer W at an optional desired value. A reflective mirror 52 that is substantially elliptical or parabolic in cross section is arranged below the lamp 50 so as to permit the back surface of the wafer W to be efficiently irradiated with light radiated from the lamp 50.
  • A plurality of [0075] exhaust ports 54 connected to a vacuum exhaust mechanism 55 are formed in the bottom plate 38 of the process chamber 34. The vacuum exhaust mechanism 55 makes it possible to exhaust the process chamber 34 and to set up a vacuum condition within the process chamber 34. A gate valve G7 that is opened when the wafer W is transferred into and out of the process chamber 34 is formed in the side wall of the process chamber 54. Also, a shower head 56 is arranged above the work table 44 to face the work table 56. The shower head 56 is connected to a gas source 59 of a process gas (O2 or O3) through a line 58 extending through the side wall of the process chamber 54.
  • The [0076] shower head 56 has a lattice shape as shown in FIG. 8. To be more specific, the shower head 56 includes a ring pipe 60A connected to a line pipe 58 and an inside pipe 60B connected inside the ring pipe 60A and arranged to form a lattice. A large number of gas spurting holes 61 are equidistantly formed on the lower side of the inside pipe 60B.
  • An opening having a diameter larger than that of the wafer W is formed in the [0077] ceiling plate 42 of the process chamber 34. A window 64 made of a transparent quartz is airtightly arranged to close the opening via a seal member 62 such as an O-ring. A large number of ultraviolet lamps 66 are arranged above the window 64. Ultraviolet rays having a wavelength of, for example, 254 nm are emitted from the ultraviolet lamp 66 to allow the process gas and the target surface of the wafer W to be irradiated with the ultraviolet rays through the window 64. As a result, active oxygen atoms are generated from the process gas.
  • FIG. 9 schematically shows the constitution of the main part of a [0078] heat processing apparatus 72, which may be used as the heat processing apparatus 10, according to another embodiment of the present invention. As shown in the drawing, the heat processing apparatus 72 comprises a process chamber 74 made of, for example, aluminum having the surface covered with anodized aluminum. The shower head 56, the window 64 and the ultraviolet lamp 66 as shown in FIG. 7 are not arranged in the heat processing apparatus 72. In place of the particular constitution employed in the apparatus shown in FIG. 7, a nozzle 78 connected to a gas source 59 of a process gas (O2) via a plasma cavity 76 is connected to the ceiling plate 42 of the process chamber 74. In the plasma cavity 76, the process gas is converted into a plasma by application of the power of a microwave power source 80. As a result, active oxygen atoms are supplied from the nozzle 78 into the process chamber 72. A distributing plate 82 having a large number of apertures 84 is arranged to face the nozzle 78, with the result that active oxygen atoms are uniformly distributed on the surface of the wafer.
  • A film forming method of the present invention is carried out as follows by using the [0079] film forming system 1 shown in FIG. 1. The following description covers the case where a thin metal oxide film of a double layer structure is formed as an insulating film.
  • Let us describe first the overall flow of, for example, an 8 inch wafer. Specifically, a cassette C housing, for example, 25 unprocessed wafers is placed on a cassette stage (not shown) within the [0080] first cassette chamber 14A. Then, the gate door G3 is closed to establish an inert gas atmosphere consisting of N2 gas within the first cassette chamber 14A. At the same time, the chamber 14A is vacuum-exhausted.
  • Then, the gate valve G[0081] 1 is opened to permit the cassette chamber 14A to communicate with the common transfer chamber 3 evacuated in advance to set up an inert gas atmosphere. Then, the wafer W is transferred from the cassette chamber 14A into the common transfer chamber 3 by the arm mechanism 16.
  • Then, the wafer W is transferred through the opened gate valve G[0082] 5 into the first CVD apparatus 4 evacuated in advance. Within the first CVD apparatus 4, a metal oxide film, e.g., tantalum oxide (Ta2O5) film, is deposited as a first layer of an insulating thin film. After completion of the deposition step of the first layer, the wafer W is transferred from the first CVD apparatus 4 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16.
  • Then, the wafer W is transferred through the opened gate valve G[0083] 6 into the reforming apparatus 8 evacuated in advance. A reforming process is carried out within the reforming apparatus 8. Specifically, organic impurities such as hydrocarbons and C—C bonds, which are contained in the first tantalum oxide layer formed on the wafer surface, are removed by using the ultraviolet rays emitted from the ultraviolet irradiating means 18 and ozone.
  • After completion of the reforming process, the wafer W is transferred from the reforming [0084] apparatus 8 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16. Then, the wafer W is transferred through the opened gate valve G8 into the second CVD apparatus 6 evacuated in advance. Within the second CVD apparatus 6, a second tantalum layer is deposited under the same conditions as in the film formation within the first CVD chamber 4.
  • After completion of the depositing step of the second layer, the wafer W is transferred from the [0085] second CVD apparatus 6 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16. Then, the wafer W is transferred through the opened gate valve G7 into the heat processing apparatus 10 evacuated in advance. Within the heat processing apparatus 10, the wafer having the first and second tantalum layers formed thereon is heated under an atmosphere including ultraviolet rays and ozone to a low temperature, such as 450° C., to perform a reforming process, and then heated to a temperature not lower than the crystallizing temperature of tantalum oxide, followed by lowering the temperature in 60 seconds. As a result, a reforming process of the second tantalum oxide layer and a crystallizing process of the first and second tantalum oxide layers are performed successively. After completion of the crystallizing step, the processed wafer is transferred into the common transfer chamber 3 and, then, housed in the cassette C arranged within the second cassette chamber 14B.
  • Let us describe each of the process steps described above with reference to FIGS. 2A to [0086] 2D.
  • First, a first [0087] tantalum oxide film 20 is formed as a metal oxide film in a predetermined thickness on the wafer W within the first CVD apparatus 4, as shown in FIG. 2A. In this step, the raw material gas is supplied by bubbling a liquid metal alkoxide of Ta(OC2H5) with a He gas. At the same time, an oxidizing gas such as O2 gas is supplied to the reaction system. The supply rate of the metal alkoxide, which depends on the film forming rate, is, for example, about several mg/min.
  • The process pressure of the CVD process is about 0.2 to 0.3 Torr, and the process temperature should be set to fall within a range of 250 to 450° C., e.g., 400° C. In this case, the first [0088] tantalum oxide film 20 is deposited in a thickness t1 of, for example, 3.5 to 5.0 nm. The first tantalum oxide layer 20 as deposited is in an amorphous state. Since an organic material is used as a raw material in forming the first tantalum oxide layer 20, it is unavoidable for the first layer 20 to contain organic impurities.
  • Then, the wafer W is transferred into the reforming [0089] apparatus 8 for applying a reforming process to the first tantalum oxide layer 20. In this reforming process, an oxidizing gas, e.g., ozone, is used as a process gas serving to provide active oxygen atoms, and the first layer 20 is irradiated with a large amount of ultraviolet rays emitted from the ultraviolet irradiating means 18, as shown in FIG. 2B. As a result, the ozone is excited by irradiation with the ultraviolet rays so as to generate a large amount of active oxygen atoms. It should be noted that the active oxygen atoms serve to oxidize the organic impurities contained in the first tantalum oxide layer 20 formed on the surface of the wafer W. At the same time, the C—C bonds, etc. of the organic impurities are broken by the energy of the ultraviolet rays so as to decompose the organic impurities. As a result, the organic impurities contained in the first tantalum oxide layer 20 can be removed substantially completely.
  • In this reforming process, the first [0090] tantalum oxide layer 20 is irradiated with a large amount of the ultraviolet rays having a wavelength of mainly 185 nm and 254 nm. Also, the process pressure is set to fall within a range of about 1 to 600 Torr, and the process temperature is set at 600° C., which is the crystallizing temperature of tantalum oxide, or less. To be more specific, the process temperature is set to fall within a range of 320 to 600° C., e.g., about 425° C. Where the process temperature is lower than 320° C., the processed first tantalum oxide layer 20 fails to exhibit a sufficiently high insulating breakdown voltage. On the other hand, if the process temperature is higher than 600° C., the first tantalum oxide layer 20 begins to be crystallized, resulting in failure to achieve a sufficient reformation. Also, the reforming time, which depends on the film thickness, should desirably be at least 10 minutes. Incidentally, where the thickness t1 of the first tantalum oxide layer 20 is smaller than 4.5 nm, the reforming process can be performed by the ozone supply alone without employing the ultraviolet irradiation.
  • After completion of the reforming process, the wafer W is transferred into the [0091] second CVD apparatus 6 for depositing a second tantalum oxide layer 22 on the first tantalum oxide layer 20, as shown in FIG. 2C. The depositing conditions of the second layer 22 such as the kind of the raw material gas, the flow rate of the raw material gas, the process pressure, and the process temperature are exactly equal to those for deposition of the first layer 20. The thickness t2 of the second layer 22 is set equal to the thickness t1 of the first layer 20, i.e., 3.5 to 5.0 nm. At the time when deposition of the second layer 22 is finished, each of the first and second tantalum oxide layers 20 and 22 is in an amorphous state.
  • Then, the wafer W is transferred into the [0092] heat processing apparatus 10 for the processes described below. Specifically, a process gas, e.g., ozone, is supplied into the heat processing apparatus 10 as a source of active oxygen atoms as in the reforming process described above, and the process pressure is set to fall within a range of about 1 to 600 Torr, as shown in FIG. 2D. On the other hand, the process temperature is varied across the crystallizing temperature of tantalum oxide. The temperature of the wafer W including the first and second tantalum oxide layers 20 and 22 (hereinafter simply referred to as the wafer temperature) is controlled by allowing a controller 51 shown in FIG. 7 to adjust the electric power supply to each of the lamps 50.
  • First the temperature of the wafer is set lower than the crystallizing temperature (700° C.) of the tantalum oxide and, preferably, is set at a first temperature lower than the upper limit (600° C.) of the reforming temperature in order to apply a reforming process to the second [0093] tantalum oxide layer 22. Then, the wafer temperature is rapidly elevated to a second temperature higher than the crystallizing temperature so as to apply a crystallizing process to the first and second tantalum oxide layers 20 and 22, followed by promptly cooling the wafer to a temperature lower than 600° C. It should be noted that the period during which the wafer temperature is maintained at the first temperature is longer than the period during which the wafer temperature is held higher than the crystallizing temperature.
  • By the particular process, the second [0094] tantalum oxide layer 22 constituting the uppermost metal oxide layer is subjected to a reforming process until the wafer temperature is elevated to reach the crystallizing temperature. It should also be noted that, when the wafer temperature exceeds 700° C., all the tantalum layers including the first tantalum layer 20 and the second tantalum layer 22 are crystallized. What should be noted is that, in the present invention, the reforming process of the second tantalum oxide layer 22 constituting the uppermost layer and the crystallizing process of the first and second tantalum oxide layers 20 and 22 are carried out successively within the same chamber.
  • FIG. 3 is a graph showing the changes in the process temperature of the [0095] heat processing apparatus 10. In the graph of FIG. 3, time T1 (sec) is plotted on the abscissa, with the process temperature TP(° C.) being plotted on the ordinate. As shown in FIG. 3, the wafer W is transferred into the process chamber 34 (see FIG. 7) under the condition that each of the wafer temperature and the temperature within the process chamber 34 is set at about 450° C. A reforming process is carried out by maintaining the set temperature for a predetermined period of time, e.g., for about 2 minutes. Then, the power supply to the lamps 50 is increased so as to rapidly increase the wafer temperature to a level not lower than 700° C., e.g., 750° C. In this case, the temperature should be elevated at a rate of 30 to 130° C./sec, e.g., 100° C./sec. Before the wafer temperature is elevated to reach about 600° C., a reforming process is applied to the second tantalum oxide layer 22. Also, in the temperature region exceeding 700° C., a crystallizing process is applied to the first and second tantalum oxide layers 20 and 22.
  • There is a gap of about 100° C. between the upper limit (600° C.) of the reforming temperature and the crystallizing temperature (700° C.) of the tantalum oxide layer. This is because the crystallization does not take place instantly when a certain temperature level is exceeded, but proceeds gradually over a certain temperature range. To be more specific, the second [0096] tantalum oxide layer 22 is reformed and, at the same time, the first and second tantalum oxide layers 20 and 22 are gradually crystallized so as to perform both the reforming process and the crystallizing process simultaneously when the wafer temperature is elevated from 600° C. to 700° C.
  • In this case, the reforming time T[0097] 1 of the tantalum oxide layer 22, which depends on the thickness of the tantalum oxide layer 22, should be about 120 seconds when the second tantalum oxide layer 22 has a thickness of about 4.5 nm. On the other hand, the crystallization takes place instantly. Therefore, the time t2 during which the wafer temperature is not lower than 700° C., should be set at, for example, about 60 seconds. It is desirable for the crystallizing temperature to fall within a range of 700 to 800° C. If the wafer temperature is higher than 800° C., the underlying substance under the tantalum oxide layer is oxidized so as to increase the effective film thickness. Also, a serious thermal effect is given to the semiconductor device so as to deteriorate the characteristics of the semiconductor device. After the crystallizing process, the process chamber 34 is purged with N2 gas, followed by lowering the temperature within the process chamber to about 425° C. Further, the pressure within the process chamber 34 is adjusted, followed by taking the processed wafer out of the heat processing apparatus 10.
  • As described previously, the step shown in FIG. 2D can be carried out by using ozone alone without employing the ultraviolet irradiation. However, it is of course possible to apply the ultraviolet (UV) irradiation for promoting the reforming process as in the step shown in FIG. 2B. In addition, the ultraviolet irradiation permits further promoting the reforming process of the second [0098] tantalum oxide layer 22 so as to shorten the reforming time T1 shown in FIG. 3. Even in this case, however, the period during which the wafer temperature is maintained at the reforming temperature is longer than the period during which the wafer temperature is held higher than the crystallizing temperature.
  • Evaluated were the insulating properties of the insulating film consisting of the first and second [0099] tantalum oxide films 20 and 22, which was prepared by the method of the present invention, and the insulating film consisting of the first and second tantalum oxide films, which was prepared by the conventional method in which each reforming process and each crystallizing process were carried out quite independently of each other.
  • FIG. 4 is a graph showing the results of the experiment. In the graph of FIG. 4, the effective film thickness ET is plotted on the abscissa, with the insulation breakdown voltage BV being plotted on the ordinate. Line LA shown in FIG. 4 denotes the properties of the insulating film prepared by the conventional method. On the other hand, line LB denotes the properties of the insulating film prepared by the method of the present invention, in which ozone alone was used without employing the ultraviolet irradiation. Further, line LC shown in FIG. 4 denotes the properties of the insulating film prepared by the method of the present invention, in which the ultraviolet irradiation and ozone were both employed. [0100]
  • As shown in FIG. 4, the insulating films prepared by the method of the present invention exhibit insulation breakdown voltages slightly higher than that exhibited by the insulating film prepared by the conventional method. What should be noted is that the number of process steps employed in the method of the present invention is smaller by one than that employed in the conventional method. Nevertheless, the insulating films prepared by the method of the present invention exhibit insulating properties better than those exhibited by the insulating film prepared by the conventional method. What should also be noted is that the insulation breakdown voltage can be further increased by employing both ozone and the ultraviolet irradiation, as denoted by line LC. [0101]
  • In the method shown in FIGS. 2A to [0102] 2D, the tantalum oxide layers 20 and 22 are set at the same thickness, i.e., at about 3.5 to 5.0 nm. However, it is also possible to make the thickness t1 of the first tantalum oxide layer 20 somewhat larger than 4.5 nm, as shown in FIGS. 5A to 5D. For example, the thickness t1 can be set at 5.5 to 6.0 nm. By contraries, the thickness t2 of the second tantalum oxide layer 22 can be made somewhat smaller than 4.5 nm. For example, the thickness t2 of the second tantalum oxide layer 22 can be set at 2.5 to 4.0 nm. In this case, the decrease in the thickness of the second tantalum oxide layer 22 makes it possible to perform the reformation promptly. It follows that, in the step shown in FIG. 5D, the thin tantalum oxide layer 22 can be reformed sufficiently in a short time by only the process with ozone without employing the ultraviolet irradiation. In other words, the reforming time T1 shown in FIG. 3 can be shortened.
  • In the embodiment described above, the tantalum oxide insulating film is of a two-layer structure. However, it is possible to form a [0103] tantalum oxide layer 24 as a single layer as shown in FIGS. 6A and 6B. In this case, the tantalum oxide layer 24 is deposited in a predetermined thickness as shown in FIG. 6A, followed by applying a reforming and crystallizing process to the tantalum oxide layer 24, as shown in FIG. 6B. As already described in conjunction with FIG. 2D, the tantalum oxide layer 24 is subjected to the reforming process and the crystallizing process substantially simultaneously. It also suffices to determine whether to use ozone alone or both the ozone and the ultraviolet irradiation depending on the thickness of the tantalum oxide layer 24. In this case, two or three process steps can be omitted, compared with the conventional method, while maintaining sufficiently high insulation breakdown properties of the insulating film.
  • FIG. 10 schematically shows the constitution of the main part of a cluster-tool-type film forming system according to another embodiment of the present invention. [0104]
  • The film forming system [0105] 1M shown in FIG. 10 differs from the film forming system 1 shown in FIG. 1, in that it has no reforming apparatus 8, but has two heat processing apparatuses 10. Using the film forming system 1M shown in FIG. 10, a thin metal oxide film of a double layer structure can be formed by the following method in which a reforming process and a crystallizing process of each layer are successively performed.
  • First, a cassette C housing, for example, 25 unprocessed wafers is placed on a cassette stage (not shown) within the [0106] first cassette chamber 14A. Then, the gate door G3 is closed to establish an inert gas atmosphere consisting of N2 gas within the first cassette chamber 14A. At the same time, the chamber 14A is vacuum-exhausted.
  • Then, the gate valve G[0107] 1 is opened to permit the cassette chamber 14A to communicate with the common transfer chamber 3 evacuated in advance to set up an inert gas atmosphere. Then, the wafer W is transferred from the cassette chamber 14A into the common transfer chamber 3 by the arm mechanism 16.
  • Then, the wafer W is transferred through the opened gate valve G[0108] 5 into the first CVD apparatus 4 evacuated in advance. Within the first CVD apparatus 4, a metal oxide film, e.g., tantalum oxide (Ta2O5) film, is deposited as a first layer of an insulating thin film. After completion of the deposition step of the first layer, the wafer W is transferred from the first CVD apparatus 4 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16.
  • Then, the wafer W is transferred through the opened gate valve G[0109] 6 into one of the heat processing apparatuses 10 evacuated in advance. Within this one of the heat processing apparatuses 10, the wafer having the first tantalum layer formed thereon is heated under an atmosphere including ultraviolet rays and ozone to a low temperature, such as 450° C., to perform a reforming process of the first tantalum oxide layer, and then heated to a temperature not lower than the crystallizing temperature of tantalum oxide, followed by lowering the temperature in 60 seconds. As a result, reforming and crystallizing processes of the first tantalum oxide layer are performed successively.
  • After completion of the processes within this one of the [0110] heat processing apparatuses 10, the wafer is transferred into the common transfer chamber 3 maintained at vacuum, by using an arm mechanism 16. Then, the wafer W is transferred through the opened gate valve G8 into the second CVD apparatus 6 evacuated in advance. Within the second CVD apparatus 6, a second tantalum layer is deposited under the same conditions as in the film formation within the first CVD chamber 4.
  • After completion of the depositing step of the second layer, the wafer W is transferred from the [0111] second CVD apparatus 6 into the common transfer chamber 3 maintained at vacuum, by using the arm mechanism 16. Then, the wafer W is transferred through the opened gate valve G7 into the other of the heat processing apparatuses 10 evacuated in advance. Within the other of the heat processing apparatuses 10, the wafer having the first and second tantalum layers formed thereon is heated under an atmosphere including ultraviolet rays and ozone to a low temperature, such as 450° C., to perform a reforming process of the second tantalum oxide layer, and then heated to a temperature not lower than the crystallizing temperature of tantalum oxide, followed by lowering the temperature in 60 seconds. As a result, reforming and crystallizing processes of the second tantalum oxide layer are performed successively. After completion of the processes within the other of the heat processing apparatuses 10, the processed wafer is transferred into the common transfer chamber 3 and, then, housed in the cassette C arranged within the second cassette chamber 14B.
  • It should be noted that, even with the film forming system [0112] 1M shown in FIG. 10, a program can be set such that only a reforming process of a first tantalum oxide layer is performed within one of the heat processing apparatuses 10, and a reforming process of a second tantalum oxide layer and a crystallizing process of the first and second tantalum oxide layers are performed within the other of the heat processing apparatuses 10, as described with reference to the film forming system 1 shown in FIG. 1.
  • FIG. 11 schematically shows the constitution of the main part of a [0113] heat processing apparatus 102 according to still another embodiment of the present invention. The constitution shown in FIG. 11 can be used as the main part of any of the reforming apparatus 8 and the heat processing apparatus 10 included in the film forming system shown in FIGS. 1 and 10.
  • The [0114] heat processing apparatus 102 comprises a process chamber 104 made of aluminum having the surface covered with anodized aluminum and shaped like a substantially rectangular box, as shown in the drawing. A plurality of exhaust ports 112 are formed in the peripheral portion of a bottom portion 106 of the process chamber 104. A vacuum exhaust mechanism 110 including a vacuum pump 108 is connected to the exhaust port 112 so as to make it possible to vacuum-exhaust the inner space of the process chamber 104.
  • A [0115] port 172 is formed in the side wall of the process chamber 104. A load lock chamber 174 that can be vacuum-exhausted is connected to the port 172 with a gate valve 176 interposed therebetween. The semiconductor wafer W is transferred into the process chamber 104 through the load lock chamber 174. Also, an N2 gas supply mechanism (not shown) for the purging purpose is connected to each of the process chamber 104 and the load lock chamber 174.
  • A disc-like work table [0116] 114 made of a nonconductive material, e.g., alumina, is arranged within the process chamber 104. The semiconductor wafer W as a target substrate can be placed on the work table 114. The central portion in the lower surface of the work table 114 is supported by the tip of a hollow rotary shaft 116 vertically extending through the bottom portion 106 of the process chamber 104. A magnetic fluid seal 118 is arranged in the portion where the rotary shaft 116 extends through the bottom portion 106 of the process chamber 104. The rotary shaft 116 is airtightly and rotatably supported by the seal 118, and the work table 114 can be rotated, as desired. Incidentally, the rotary shaft 116 is rotated by a driving force generated from a rotating motor (not shown).
  • A [0117] resistance heater 120 made of carbon and coated with, for example, SiC is embedded in the work table 114 so as to heat the semiconductor wafer W placed thereon to a desired temperature. A thin electrostatic chuck 124 made of a ceramic material is arranged on the work table 114. An electrode 122 formed of a copper plate or the like is buried in the electrostatic chuck 124. The wafer W is pulled by Coulomb's force generated from the electrostatic chuck 124 so as to be supported on the upper surface of the work table 114.
  • A plurality of [0118] holes 126 are formed in peripheral portions of the work table 114 such that these holes 126 extend through the work table 114 in a vertical direction. Also, lifter pins 128 are arranged to be movable in a vertical direction through these holes 126. These lifter pins 128 are moved together in a vertical direction by a pin driving rod 130 that can be moved in a vertical direction through the bottom portion 106 of the process chamber 104. A shrinkable bellows 132 made of a metal is arranged in that portion of the bottom portion 106 through which the rod 130 extends so as to permit the rod 130 to be moved in a vertical direction while maintaining an airtight state. When the wafer W is transferred into and out of the process chamber 104, the wafer W is moved upward or downward by a lift mechanism (not shown) via the lifter pins 128. In general, three lifter pins 128 are arranged in a manner to support peripheral portions of the wafer W.
  • A [0119] shower head 134 made of a heat resistant material that is transparent to ultraviolet rays and infrared rays such as quartz is formed in a ceiling portion of the process chamber 104. A process gas is spurted through the shower head 134 into a process field PF.
  • The [0120] shower head 134 is shaped like a lattice like the shower head 56 shown in FIG. 8. To be more specific, the shower head 134 comprises an annular pipe 136 connected to a line pipe 142 and having a diameter larger than the diameter of the wafer W and inside pipes 138 connected inside the annular pipe 136. A large number of gas spurting holes 61 as shown in FIG. 8 are equidistantly formed on the lower side of the inside pipes 138. The inner diameters of the annular pipe 136 and the inside pipe 138 are set at about 16 mm and 4.35 mm, respectively. Also, the diameter of the gas spurting hole 61 is set at about 0.3 to 0.5 mm.
  • It is desirable for the projected surface area of the [0121] inside pipes 138 on the wafer W placed on the work table 114 to be smaller than 20% of the area of the wafer surface. In this case, the wafer surface can be irradiated directly with light rays, which are to be described later, running through the clearances of the lattice of the inside pipes 138. However, if the shower head 134 is transparent to ultraviolet rays and infrared rays, the constitution of the shower head 134 is not limited to that shown in the drawing and described above.
  • The [0122] line pipe 142 for introducing a process gas into the shower head 134 airtightly extends through the side wall of the process chamber so as to be led to the outside. The line pipe 142 is connected to a gas source 144 via a mass flow controller (not shown). A process gas such as ozone gas is introduced into the shower head 134 through the line pipe 142.
  • A [0123] rectangular aperture 146 set larger than the wafer diameter is formed in a ceiling portion of the process chamber 104. A rectangular transmitting window 148 made of a material transparent to ultraviolet rays and infrared rays such as quarts is airtightly mounted in the rectangular aperture 146 by a fixing frame 152 using a seal member 150 such as an O-ring. The rectangular transmitting window 148 has a thickness of, for example, 20 mm to enable the window 148 to withstand the atmospheric pressure.
  • A [0124] light radiating mechanism 156 for radiating light rays 154 toward the process chamber 104 is arranged above the transmitting window 148. The process gas of ozone is irradiated with the light rays 154 so as to generate active oxygen atoms.
  • To be more specific, the [0125] light radiating mechanism 156 includes mainly a substantially spherical mercury-sealed lamp 158 having mercury sealed therein for emitting ultraviolet rays UV and a substantially spherical infrared lamp 160 for emitting infrared rays IR. A microwave generating mechanism 162 for generating a microwave of, for example, 2.45 GHz is connected to the mercury-sealed lamp 158 via a waveguide 164. On the other hand, a power source 166 is connected to the infrared lamp 160 via a lead wire 168.
  • As described herein later, the [0126] infrared lamp 160 is used for heating a metal oxide film, which is a target substrate. Therefore, the power source 166 of the infrared lamp 160 and the power source 120A of the resistance heater 120 on the side of the work table 114 are controlled by the common temperature controller 51.
  • A substantially dome-shaped [0127] light reflector 170 for reflecting mixed light rays 154 consisting of ultraviolet rays UV and infrared rays IR toward the process field within the process chamber 104 is arranged to cover the upper side of the lamps 158 and 160. The light reflector 170 is prepared by forming, for example, an aluminum plate into a shape of a dome. The curvature of the light reflector 170 is determined to permit the light rays 154 to be reflected substantially uniformly onto the surface of the work table 114.
  • Let us describe how to carry out a heat process by using the apparatus shown in FIG. 11. [0128]
  • First, the semiconductor wafer W having a metal oxide film such as a tantalum oxide (Ta[0129] 2O5) film formed thereon as an insulating film is introduced from the load lock chamber 174 through the port 172 into the process chamber 104 held at a vacuum condition. Then, the wafer W is placed on the work table 114 so as to be attracted and held on the work table 114 by Coulomb's force of the electrostatic chuck 124.
  • The wafer W is maintained at a predetermined process temperature by the [0130] resistance heater 120. Also, a predetermined process pressure is maintained within the process chamber 104 by supplying a process gas containing ozone into the process field PF through the shower head 134 while vacuum-exhausting the process chamber 104. Under this condition, a reforming process or both reforming process and crystallizing process are started as described previously with reference to the film forming system shown in FIG. 1.
  • During the process, a microwave of 2.45 GHz is generated from the [0131] microwave generating mechanism 162 included in the light radiating mechanism 156 so as to allow the mercury-sealed lamp 158 to be irradiated with the microwave through the waveguide 164. As a result, a large amount of ultraviolet rays are emitted from the mercury-sealed lamp 158. At the same time, a large amount of infrared rays IR are generated from the infrared lamp 160 by the electric power supplied from the power source 166. The light rays 154 containing both the ultraviolet rays UV and the infrared rays IR are reflected directly by the dome-shaped light reflector 170, and the reflected light is transmitted through the transmitting window 148 made of quartz so as to enter the process chamber 104 maintained at a predetermined vacuum pressure. Further, the light rays 154 pass through the shower head 134 made of quartz so as to have the process gas containing ozone as a main component irradiated with the light rays 154 within the process field PF.
  • Ozone is irradiated with the ultraviolet rays UV so as to generate a large amount of active oxygen atoms. The active oxygen atoms act on the metal oxide film so as to dissociate organic impurities such as C—C bonds and hydrocarbons contained in the metal oxide film so as to reform the metal oxide film. In this step, the surface of the wafer W is particularly heated by the infrared rays IR, with the result that the atoms in the crystal lattice of the metal oxide film are vigorously vibrated thermally. As a result, removal of the organic impurities are promoted when the active oxygen atoms act on the metal oxide film. [0132]
  • Since the inner space of the [0133] process chamber 104 is held at a vacuum condition or at a state of reduced pressure, the probability of collision of the generated active oxygen atoms against gaseous atoms or gaseous molecules is very low. In addition, since the light rays 154 are less likely to be absorbed by gaseous molecules, the density of the active oxygen atoms is increased so as to perform the processing promptly. By this processing, the insulating properties of the metal oxide film can be markedly improved rapidly.
  • As described previously, the dome-shaped [0134] light reflector 170 of the light radiation mechanism 156 is set to have an appropriate curvature to permit the reflected light to be distributed substantially uniformly on the surface of the work table 114. As a result, the generated ultraviolet rays UV and the infrared rays IR can be utilized efficiently for generation of the active oxygen atoms.
  • During the heat process described above, the work table [0135] 114 supported by the rotary shaft 116 is rotated together with the wafer W placed on the table 114. As a result, the wafer can be processed uniformly over the entire surface, and the metal oxide film formed on the wafer can be processed substantially uniformly over the entire surface.
  • The process pressure should be set to fall within a range of 1 to 600 Torr, e.g., at about 30 Torr. Where the process pressure does not fall within the range noted above, the heat process proceeds slowly or cannot be performed sufficiently, with the result that the insulation breakdown voltage of the metal oxide film is lowered. On the other hand, the process temperature should be set to fall within a range of 320 to 600° C., e.g., at about 425° C., in the case of the reforming process, and should be set to fall within a range of 700 to 800° C., e.g., 750° C., in the case of the crystallizing process. [0136]
  • The process gas such as ozone introduced into the [0137] shower head 134 flows first through the annular pipe 136 and, then, into the inside pipes 138. Then, the process gas is supplied into the process chamber 104 through a large number of the spurting holes 61 made in the inside pipes 138. The particular arrangement makes it possible to supply the process gas uniformly to the wafer surface.
  • A large amount of the ultraviolet rays UV and the infrared rays IR pass through the free spaces formed between the adjacent inside [0138] pipes 138 arranged to form a lattice in the shower head 134. Accordingly, the ultraviolet rays UV and the infrared rays IR do not interfere with ozone or the like, with the result that the surface of the wafer is irradiated directly with a large amount of the ultraviolet rays UV and the infrared rays IR. Naturally, the amount of the active species is increased on the wafer surface so as to make it possible to perform the process efficiently.
  • Since a large amount of an electric power can be supplied to the mercury-sealed [0139] lamp 158, ultraviolet rays having wavelengths of mainly 185 nm and 254 nm, which contribute to activation of the gas, are emitted in a large amount from the mercury-sealed lamp 158. Also, if an excimer lamp that emits ultraviolet rays having a wavelength not longer than 180 nm, which further contribute to the activation of the gas, in a large amount is used in place of the mercury-sealed lamp 158, the process can be expected to be carried out more promptly. It is possible to use O2 gas, N2O gas, etc. as an additive gas to ozone contained in the process gas.
  • A comparative experiment was carried out between a conventional method in which ultraviolet rays alone were used for a reforming process and a method of the present invention in which ultraviolet rays and infrared rays were used for a reforming process. Each of the reforming processes was carried out under the temperature of 425° C., the pressure of 30 Torr, the O[0140] 2 flow rate of 10 slm, the O3 concentration of 130 g/m3, and the process time of 30 seconds.
  • FIG. 12 is a graph showing the results of the experiment. In the graph of FIG. 12, the effective film thickness ET is plotted on the abscissa, with the insulation breakdown voltage BV being plotted on the ordinate. Line L[0141] 11 shown in the graph represents the conventional method, with line L12 representing the method of the present invention. As apparent from the graph, the method of the present invention is markedly superior to the conventional method in the insulation breakdown voltage of the insulating film. Particularly, the method of the present invention is prominently superior to the conventional in the insulation breakdown voltage of the insulating film where the film thickness is 10 nm or less.
  • In the embodiment shown in FIG. 11, two different light sources, i.e., the mercury-sealed [0142] lamp 158 and the infrared lamp 160, are used as the light radiation mechanism 156. Alternatively, it is possible to use a lamp that emits light having wavelengths falling within the ultraviolet ray range and within the infrared ray range, e.g., a light-emitting lamp of an electrodeless microwave system, can be used in place of the light radiation mechanism 156. The light-emitting lamp of an electrodeless microwave system emits light rays of both the ultraviolet and infrared ranges as well as the visible light range, making it possible to decrease the number of lamps used. It follows that it is possible to decrease the running cost and the initial cost.
  • In the embodiment shown in FIG. 11, the mercury-sealed [0143] lamp 158 of a large capacity and the infrared lamp 160 of a large capacity are fixed within the heat processing apparatus. Alternatively, it is possible to use lamps having a medium capacity or small capacity. In this case, the semiconductor wafer W is scanned with the light rays 154 emitted from these lamps.
  • FIG. 13 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention. FIG. 14 is a top view schematically showing the apparatus shown in FIG. 13. [0144]
  • As shown in FIG. 13, a slender rod-like mercury-sealed [0145] lamp 158A and a slender rod-like infrared lamp 160A are used in this embodiment as the light radiation mechanism 156. Also, slender light reflectors 170A and 170B each having a substantially arcuate cross-sectional shape are arranged behind these lamps 158A and 160A, respectively, to reflect downward the ultraviolet rays UV and the infrared rays IR with a high directivity.
  • These [0146] lamps 158A and 160A are housed in a casing 178 having a lower open end. The casing 178 is mounted to a scanning mechanism 192 and can be moved in a horizontal direction over the process chamber 104, as shown in FIG. 14. To be more specific, the scanning mechanism 192 comprises a guide rail 194 mounted on one side above the process chamber 104 and a driving rail 196 consisting of, for example, a ball screw, which is arranged on the other side above the process chamber 104. The casing 178 is stretched over these rails 194 and 196 so as to be movable along these rails. A driving motor 198 such as a step motor, which is arranged at one end portion of the driving rail 196, driven in forward and backward directions so as to permit the lamps 158A and 160A to be moved along the rails 194 and 196.
  • The light rays [0147] 154 consisting of the ultraviolet rays UV emitted from the mercury-sealed lamp 158 a and infrared rays IR emitted from the infrared lamp 160A scan the surface of the wafer W by the scanning mechanism 192 of the constitution described above. As a result, the metal oxide film formed on the surface of the wafer W is promptly processed efficiently by the light rays 154 consisting of ultraviolet rays UV and infrared rays IR, as already described in conjunction with FIG. 11. Particularly, in this embodiment of the present invention, the metal oxide film can be processed uniformly over the entire surface by allowing the wafer surface to be irradiated and scanned with the light rays 154.
  • It is unavoidable for the light emitted from each of the [0148] lamps 158A and 160A to be diffused sideways, though the diffusion amount is small. Therefore, it is considered that the light amount in the edge portion of the wafer is diminished, compared with the central portion of the wafer in the scanning direction. To overcome this difficulty, the scanning speed is slightly lowered in the edge portion on the starting side and in the edge portion on the finishing side of the scanning, as shown in FIG. 15. By lowering the scanning speed, the amount of the irradiating light is increased in the edge portions on the starting side and on the finishing side of the scanning so as to further improve the uniformity of the process over the entire surface of the metal oxide film.
  • The two [0149] lamps 158A and 160A used in this embodiment do not have markedly large capacities, making it possible to markedly decrease the facility cost, compared with the case where a large number of lamps are arranged over the entire ceiling region of the process chamber 104 or with the case where highly powerful lamps are used as shown in FIG. 11.
  • In the embodiment shown in FIG. 13, the [0150] casing 178 including two lamps 158A and 160A is moved for the scanning purpose. Alternatively, the scanning can be performed by moving a reflective mirror that reflects the light emitted from the two lamps toward the wafer W.
  • FIG. 16 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention, which is based on the view point given above. [0151]
  • In this embodiment, a [0152] casing 178 provided with a mercury-sealed lamp 158A, an infrared lamp 160A, and light reflectors 170A and 170B is horizontally fixed on one side in an upper region of the ceiling portion of the process chamber 104. Also, a reflective mirror 180 inclined at about 45° relative to a horizontal plane is stretched over the guide rail 194 (see FIG. 14) and the driving rail 196 of the scanning mechanism 192 in a manner to face the casing 178. The reflective mirror 180 is movable along these rails 194 and 196.
  • The light rays [0153] 154 consisting of ultraviolet rays UV and infrared rays IR that are emitted in the horizontal direction from the two lamps 158A and 160A, respectively, are reflected substantially downward by the moving reflective mirror 180 so as to scan the surface of the wafer W. It follows that the metal oxide film formed on the wafer W can be processed promptly and efficiently as in the apparatus shown in FIG. 13. It should also be noted that, since the surface of the wafer W is scanned by the light rays 154, the metal oxide film formed on the wafer can be processed more uniformly over the entire surface.
  • It should be noted that heavy articles such as the [0154] lamps 158A and 160A and the casing 178 are moved in the embodiment shown in FIG. 13. In the embodiment shown in FIG. 16, however, the reflective mirror 180 that is relatively light in weight is moved. It follows that, in the embodiment shown in FIG. 16, the operability can be improved. In addition, the mechanical strength of the scanning mechanism 192 can be reduced.
  • It should also be noted that, in the embodiment shown in FIG. 16, the amount of the diffused light is increased with increase in the distance of the [0155] reflective mirror 180 from the light source lamps 158A and 160 a. Therefore, the scanning speed of the reflective mirror 180 is set to be gradually decreased with increase in the distance of the reflective mirror 180 from the light source lamps 158A and 160 a, as shown in the graph of the scanning speed given in an upper portion of FIG. 16. As a result, the light amount irradiating the wafer surface is increased with increase in the distance of the reflective mirror 180 from the light source lamps 158A and 160 a so as to further improve the uniformity of the process over the entire surface of the metal oxide film formed on the wafer.
  • In the embodiment shown in FIG. 16, the [0156] reflective mirror 180 is moved in the horizontal direction so as to allow the light to scan the wafer surface. Alternatively, it is possible to rotate the reflective mirror for the light to scan the wafer surface.
  • FIG. 17 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention, which is based on the view point given above. [0157]
  • In this embodiment, a [0158] reflective mirror mechanism 182 is arranged in a central portion in an upper region of the ceiling portion of a process chamber 104 in place of the scanning mechanism 192 shown in FIG. 16. To be more specific, the mirror mechanism 182 comprises a slender reflective mirror 180 and a rotary shaft 184 for fixing and integrally rotating the reflective mirror. A driving mechanism such as a step motor (not shown) is arranged at one end of the rotary shaft 184 to permit the reflective mirror 180 to be rotated (or swung) in forward and backward directions within a predetermined range of angles. Also, a casing 178 provided with a mercury-sealed lamp 158A, an infrared lamp 160A, and two reflective mirrors 170A and 170B is horizontally arranged on one side in an upper region of the ceiling portion of the process chamber 104.
  • The light rays [0159] 154 consisting of ultraviolet rays UV and infrared rays IR emitted from the two lamps 158A and 160A, respectively, in the horizontal direction are reflected by the reflective mirror 180 so as to scan the surface of the wafer W. The metal oxide film formed on the semiconductor wafer W can be processed promptly and efficiently in this embodiment, too, as in the embodiment shown in FIG. 16. Also, since the light rays 154 scan the wafer surface, the uniformity of the process over the entire region of the metal oxide film formed on the wafer can be further improved.
  • What should also be noted is that, in the embodiment shown in FIG. 17, it is unnecessary to use such a large scanning mechanism as used in the embodiments shown in FIGS. 13 and 16, making it possible to simplify the apparatus and, thus, to achieve a low facility cost. It should also be noted that, in the embodiment shown in FIG. 17, the [0160] reflective mirror 180 is swung at the highest speed when the reflected light runs vertically downward. Since the length of the optical path is gradually increased so as to gradually increase the amount of the diffused light with increase in the swinging angle of the reflective mirror 180 to the right side or left side, the swinging speed of the reflective mirror 180 is set to be lowered with increase in the swinging angle noted above. As a result, the light amount, which is decreased by the diffusion on the wafer surface, can be compensated so as to further improve the uniformity of the reforming process over the entire surface of the metal oxide film formed on the wafer.
  • FIG. 18 schematically shows the constitution of the main part of a heat processing apparatus according to still another embodiment of the present invention. FIG. 19 is a top view of the apparatus shown in FIG. 18. [0161]
  • In this embodiment, a transmitting window is not formed in the ceiling portion of the [0162] process chamber 104, and the entire ceiling portion is formed of, for example, an aluminum plate. An aperture 186 is formed on one side of the process chamber 104, and a slender transmitting window 190 made of the material equal to that used for forming the transmitting window 148 in the embodiment shown in FIG. 11 is arranged at the aperture 186 using a seal member 188. The slender transmitting window 190 is made of, for example, quartz. A casing 178 equipped with two lamps 158A and 160A and two light reflectors 170A and 170B, which is equal to those shown in FIG. 17, etc. is horizontally fixed on the outside of the transmitting window 190. In this case, the casing 178 is arranged to permit the light rays 154 emitted from the lamps 158A and 160A to run in a horizontal direction through the process field PF.
  • Since the process gas containing ozone is excited by the light rays [0163] 154 introduced in a horizontal direction into the process field PF in this case, too, the metal oxide film formed on the surface of the wafer can be processed efficiently. In the embodiment shown in FIG. 18, the lamps 156A and 160A are arranged on the side surface of the process chamber 104, with the result that the light rays 154 need not be transmitted through the portion of the shower head 134 formed in the ceiling portion. Therefore, the light rays 154 emitted from the lamps are less absorbed before the light rays 154 run to reach the process field PF and, thus, a large amount of light rays 154 enter the process field PF. Naturally, the increase in the amount of the light rays 154 entering the process field PF permits promoting the process of the metal oxide film formed on the wafer surface.
  • It should also be noted that the light amount in a region close to the [0164] lamps 158A and 160A is larger than that in a region remote from these lamps 158A and 160A because the light ray is diffused while running within the process field PF. However, since the wafer W is rotated during the process by the rotation of the work table 114, the uniformity of the process can be maintained at a high level over the entire region of the metal oxide film formed on the wafer surface.
  • In the embodiment shown in each of FIGS. [0165] 13 to 19, the resistance heater 120 is used as a heater on the side of the work table 114. However, the heating lamps 50 as shown in FIGS. 7 and 9 can be used in place of the resistance heater 120. Particularly, where the heat processing apparatus of the present invention is used as an apparatus for performing a reforming process and a crystallizing process, it is more desirable to use the heating lamps 50 rather than the resistance heater 120 in view of the heating power.
  • It should also be noted that the heat processing apparatus shown in each of FIGS. [0166] 13 to 18 is featured in that the apparatus can be used not only in the case where both the ultraviolet lamp 158A and the infrared lamp 160A are used but also the case where the ultraviolet lamp 158A alone is used. Each of these lamps need not be limited to a linear lamp. For example, it is also possible to use a lamp folded to present a U-shaped configuration.
  • In each of the embodiments described above, a tantalum oxide layer is used as a metal oxide film to be processed. However, the heat processing apparatus of the present invention can also be used for processing other films including, for example, metal oxide films such as a titanium oxide film, a zirconium oxide film, a barium oxide film, and a strontium oxide film; metal nitride films such as a titanium nitride film and a tungsten nitride film; and metal films such as a titanium film, a platinum film, a ruthenium film and an iridium film. Further, it is desirable to use ozone or oxygen gas as a process gas in the case of processing a metal oxide film or a metal nitride film. In the case of processing a metal film, however, it is desirable to use an inert gas such as a nitrogen gas, a hydrogen gas, a neon gas, a helium gas or an argon gas as a process gas in place of the ozone gas that is corrosive. [0167]
  • Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. [0168]

Claims (20)

1. A single-substrate-heat-processing apparatus for performing a reforming process for removing organic impurities contained in a thin film formed on a target substrate and a crystallizing process for crystallizing said thin film, said thin film being formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, said apparatus comprising:
an airtight process chamber;
a work table arranged within said process chamber configured to place said target substrate thereon;
an exhaust mechanism configured to exhaust said process chamber;
a supply mechanism configured to supply a process gas containing oxygen atoms into said process chamber;
a heating mechanism configured to heat said thin film while said target substrate is placed on said work table; and
a control section configured to serve to control said heating mechanism such that said thin film is heated to a first temperature lower than said crystallizing temperature of said material over a first period and, then, said thin film is heated to a second temperature higher than said crystallizing temperature, followed by cooling said thin film to a temperature lower than said crystallizing temperature, said first period being longer than a second period during which said thin film has a temperature higher than said crystallizing temperature.
2. The apparatus according to
claim 1
, further comprising an exciting mechanism configured to excite said process gas so as to generate active oxygen atoms that are to be supplied to said thin film.
3. The apparatus according to
claim 1
, wherein said exciting mechanism includes a lamp configured to irradiate said process gas with ultraviolet rays within said process chamber.
4. The apparatus according to
claim 3
, wherein said heating mechanism includes a heater configured to heat said target substrate from said work table and a lamp configured to irradiate said thin film with infrared rays from a side opposite to said work table.
5. The apparatus according to
claim 4
, wherein said ultraviolet rays and said infrared rays are emitted from different lamps.
6. The apparatus according to
claim 4
, wherein said heating mechanism includes a member configured to scan said thin film with said infrared rays.
7. The apparatus according to
claim 4
, wherein said exciting mechanism includes a member configured to convert said process gas into a plasma.
8. A film forming system for forming a crystallized thin film on a target substrate, said thin film being formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, said system comprising:
an airtight common transfer chamber;
a transfer mechanism arranged within said common transfer chamber configured to transfer said target substrate;
a single-substrate-processing CVD apparatus connected to said common transfer chamber via a gate valve, configured to deposit an amorphous thin film by CVD on said target substrate; and
a single-substrate-heat-processing apparatus connected to said common transfer chamber configured to perform a reforming process for removing organic impurities contained in said thin film and a crystallizing process for crystallizing said thin film, said heat-processing apparatus including,
an airtight process chamber,
a work table arranged within said process chamber configured to place said target substrate thereon,
an exhaust mechanism configured to exhaust said process chamber,
a supply mechanism configured to supply a process gas containing oxygen atoms into said process chamber,
a heating mechanism configured to heat said thin film while said target substrate is placed on said work table, and
a control section configured to serve to control said heating mechanism such that said thin film is heated to a first temperature lower than said crystallizing temperature of said material over a first period and, then, said thin film is heated to a second temperature higher than said crystallizing temperature, followed by cooling said thin film to a temperature lower than said crystallizing temperature, said first period being longer than a second period during which said thin film has a temperature higher than said crystallizing temperature.
9. The system according to
claim 8
, wherein said heat-processing apparatus further comprises an exciting mechanism configured to excite said process gas so as to generate active oxygen atoms that are to be supplied to said thin film.
10. The system according to
claim 8
, wherein said CVD apparatus is an apparatus configured to form a metal oxide film while supplying a first process gas containing a metal element and a second process gas containing an oxidizing gas.
11. A method of forming a thin film on a target substrate, said thin film being formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, said method comprising:
depositing a thin film in an amorphous state by CVD on said target substrate;
placing said target substrate having said thin film deposited thereon on a work table arranged within an airtight process chamber;
performing a reforming process for removing organic impurities from said thin film by supplying a process gas containing oxygen atoms into said process chamber and heating over a first period said thin film formed on said target substrate placed on said work table to a first temperature lower than a crystallizing temperature of said material while exhausting said process chamber; and
performing a crystallizing process for crystallizing said thin film after said reforming process by heating said thin film formed on said target substrate placed on said work table to a second temperature higher than said crystallizing temperature, followed by cooling said thin film to a temperature lower than said crystallizing temperature, said first period being longer than a second period during which said thin film has a temperature higher than said crystallizing temperature.
12. The method according to
claim 11
, wherein said process gas is excited during said reforming process to supply active oxygen atoms to said thin film.
13. The method according to
claim 11
, wherein said process gas within said process chamber is irradiated with ultraviolet rays for forming said active oxygen atoms.
14. The method according to
claim 13
, wherein said thin film is heated during said reforming process and said crystallizing process by heating said target substrate from said work table and by irradiating said thin film with infrared rays on a side opposite to said work table.
15. The method according to
claim 14
, wherein said ultraviolet rays and said infrared rays are emitted from different lamps.
16. The method according to
claim 14
, wherein said thin film is scanned with said infrared rays.
17. The method according to
claim 12
, wherein said process gas is converted into a plasma for generating said active oxygen atoms.
18. The method according to
claim 11
, wherein said thin film is heated from said first temperature to said second temperature at a heating rate of 30 to 100° C./sec.
19. The method according to
claim 11
, wherein said material consists essentially of tantalum oxide, and said first and second temperatures are 320 to 600° C. and 700 to 800° C., respectively.
20. A method of forming a thin film on a target substrate, said thin film including a first layer and a second layer formed of a material selected from the group consisting of metal oxides, metal nitrides and metals, said method comprising:
depositing a first layer in an amorphous state by CVD on said target substrate;
performing a reforming process for removing organic impurities contained in said first layer by heating said first layer to a temperature lower than a crystallizing temperature of said material within an atmosphere containing active oxygen atoms;
depositing a second layer in an amorphous state by CVD on said first layer having being reformed;
placing said target substrate having said second layer deposited thereon on a work table arranged within an airtight process chamber;
performing a reforming process for removing organic impurities contained in said second layer by supplying a process gas containing oxygen atoms into said process chamber and by heating over a first period said second layer deposited on said target substrate placed on said work table to a first temperature lower than said crystallizing temperature; and
performing a crystallizing process for crystallizing said first and second layers after said reforming process of said second layer by heating said first and second layers deposited on said target substrate placed on said work table to a second temperature higher than said crystallizing temperature, followed by cooling said first and second layers to a temperature lower than said crystallizing temperature, said first period being longer than a second period during which said first and second layers have a temperature higher than said crystallizing temperature.
US09/795,437 1998-07-03 2001-03-01 Single-substrate-heat-processing apparatus and method for performing reformation and crystallization Abandoned US20010018267A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US09/795,437 US20010018267A1 (en) 1998-07-03 2001-03-01 Single-substrate-heat-processing apparatus and method for performing reformation and crystallization
US10/913,531 US20050016687A1 (en) 1998-07-03 2004-08-09 Single-substrate-heat-processing apparatus for performing reformation and crystallization
US11/296,225 US20060081186A1 (en) 1998-07-03 2005-12-08 Single-substrate-heat-processing apparatus for performing reformation and crystallization

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP10-204502 1998-07-03
JP20450298A JP3209965B2 (en) 1998-07-03 1998-07-03 Method of forming metal oxide film
JP10274353A JP3078528B2 (en) 1998-09-10 1998-09-10 Equipment for reforming target film
US09/335,526 US6232248B1 (en) 1998-07-03 1999-06-18 Single-substrate-heat-processing method for performing reformation and crystallization
US09/795,437 US20010018267A1 (en) 1998-07-03 2001-03-01 Single-substrate-heat-processing apparatus and method for performing reformation and crystallization

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US09/335,526 Division US6232248B1 (en) 1998-07-03 1999-06-18 Single-substrate-heat-processing method for performing reformation and crystallization

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/913,531 Continuation US20050016687A1 (en) 1998-07-03 2004-08-09 Single-substrate-heat-processing apparatus for performing reformation and crystallization

Publications (1)

Publication Number Publication Date
US20010018267A1 true US20010018267A1 (en) 2001-08-30

Family

ID=26514499

Family Applications (4)

Application Number Title Priority Date Filing Date
US09/335,526 Expired - Fee Related US6232248B1 (en) 1998-07-03 1999-06-18 Single-substrate-heat-processing method for performing reformation and crystallization
US09/795,437 Abandoned US20010018267A1 (en) 1998-07-03 2001-03-01 Single-substrate-heat-processing apparatus and method for performing reformation and crystallization
US10/913,531 Abandoned US20050016687A1 (en) 1998-07-03 2004-08-09 Single-substrate-heat-processing apparatus for performing reformation and crystallization
US11/296,225 Abandoned US20060081186A1 (en) 1998-07-03 2005-12-08 Single-substrate-heat-processing apparatus for performing reformation and crystallization

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US09/335,526 Expired - Fee Related US6232248B1 (en) 1998-07-03 1999-06-18 Single-substrate-heat-processing method for performing reformation and crystallization

Family Applications After (2)

Application Number Title Priority Date Filing Date
US10/913,531 Abandoned US20050016687A1 (en) 1998-07-03 2004-08-09 Single-substrate-heat-processing apparatus for performing reformation and crystallization
US11/296,225 Abandoned US20060081186A1 (en) 1998-07-03 2005-12-08 Single-substrate-heat-processing apparatus for performing reformation and crystallization

Country Status (1)

Country Link
US (4) US6232248B1 (en)

Cited By (339)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030042484A (en) * 2001-11-22 2003-06-02 (주)한백 Low Temperature Poly-Si Crystalizing Apparatus for Flat display
US20030224567A1 (en) * 2002-05-31 2003-12-04 Samsung Electronics Co., Ltd. Method for forming dielectric layer of capacitor
US20040040496A1 (en) * 2000-11-01 2004-03-04 Tadatomo Ohnoda Excimer uv photo reactor
US20050196892A1 (en) * 2000-12-28 2005-09-08 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a light emitting device and thin film forming apparatus
US7037560B1 (en) * 1996-07-12 2006-05-02 Tokyo Electron Limited Film forming method, and film modifying method
US20070292604A1 (en) * 2005-08-31 2007-12-20 Lam Research Corporation Processes and systems for engineering a copper surface for selective metal deposition
US20070292603A1 (en) * 2005-08-31 2007-12-20 Lam Research Corporation Processes and systems for engineering a barrier surface for copper deposition
US20090039475A1 (en) * 2005-10-14 2009-02-12 Yoshimi Shioya Apparatus and Method for Manufacturing Semiconductor
US8137465B1 (en) 2005-04-26 2012-03-20 Novellus Systems, Inc. Single-chamber sequential curing of semiconductor wafers
US20130019803A1 (en) * 2011-07-22 2013-01-24 Applied Materials, Inc. Methods and apparatus for the deposition of materials on a substrate
US8398816B1 (en) 2006-03-28 2013-03-19 Novellus Systems, Inc. Method and apparatuses for reducing porogen accumulation from a UV-cure chamber
US8426778B1 (en) * 2007-12-10 2013-04-23 Novellus Systems, Inc. Tunable-illumination reflector optics for UV cure system
US8454750B1 (en) 2005-04-26 2013-06-04 Novellus Systems, Inc. Multi-station sequential curing of dielectric films
US8518210B2 (en) 2005-04-26 2013-08-27 Novellus Systems, Inc. Purging of porogen from UV cure chamber
US8980769B1 (en) 2005-04-26 2015-03-17 Novellus Systems, Inc. Multi-station sequential curing of dielectric films
US9028765B2 (en) 2013-08-23 2015-05-12 Lam Research Corporation Exhaust flow spreading baffle-riser to optimize remote plasma window clean
US9324811B2 (en) 2012-09-26 2016-04-26 Asm Ip Holding B.V. Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
US9384987B2 (en) 2012-04-04 2016-07-05 Asm Ip Holding B.V. Metal oxide protective layer for a semiconductor device
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US9404587B2 (en) 2014-04-24 2016-08-02 ASM IP Holding B.V Lockout tagout for semiconductor vacuum valve
US9412564B2 (en) 2013-07-22 2016-08-09 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9447498B2 (en) 2014-03-18 2016-09-20 Asm Ip Holding B.V. Method for performing uniform processing in gas system-sharing multiple reaction chambers
US9455138B1 (en) 2015-11-10 2016-09-27 Asm Ip Holding B.V. Method for forming dielectric film in trenches by PEALD using H-containing gas
US9478415B2 (en) 2015-02-13 2016-10-25 Asm Ip Holding B.V. Method for forming film having low resistance and shallow junction depth
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
US9543180B2 (en) 2014-08-01 2017-01-10 Asm Ip Holding B.V. Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
US9556516B2 (en) 2013-10-09 2017-01-31 ASM IP Holding B.V Method for forming Ti-containing film by PEALD using TDMAT or TDEAT
US9558931B2 (en) 2012-07-27 2017-01-31 Asm Ip Holding B.V. System and method for gas-phase sulfur passivation of a semiconductor surface
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
US9605342B2 (en) 2012-09-12 2017-03-28 Asm Ip Holding B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9607837B1 (en) 2015-12-21 2017-03-28 Asm Ip Holding B.V. Method for forming silicon oxide cap layer for solid state diffusion process
US9627221B1 (en) 2015-12-28 2017-04-18 Asm Ip Holding B.V. Continuous process incorporating atomic layer etching
US9640416B2 (en) 2012-12-26 2017-05-02 Asm Ip Holding B.V. Single-and dual-chamber module-attachable wafer-handling chamber
US9647114B2 (en) 2015-08-14 2017-05-09 Asm Ip Holding B.V. Methods of forming highly p-type doped germanium tin films and structures and devices including the films
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
US9711345B2 (en) 2015-08-25 2017-07-18 Asm Ip Holding B.V. Method for forming aluminum nitride-based film by PEALD
US9735024B2 (en) 2015-12-28 2017-08-15 Asm Ip Holding B.V. Method of atomic layer etching using functional group-containing fluorocarbon
US9754779B1 (en) 2016-02-19 2017-09-05 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US9793135B1 (en) 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US9793148B2 (en) 2011-06-22 2017-10-17 Asm Japan K.K. Method for positioning wafers in multiple wafer transport
US9790595B2 (en) 2013-07-12 2017-10-17 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
US9793115B2 (en) 2013-08-14 2017-10-17 Asm Ip Holding B.V. Structures and devices including germanium-tin films and methods of forming same
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9892908B2 (en) 2011-10-28 2018-02-13 Asm America, Inc. Process feed management for semiconductor substrate processing
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US9891521B2 (en) 2014-11-19 2018-02-13 Asm Ip Holding B.V. Method for depositing thin film
US9899405B2 (en) 2014-12-22 2018-02-20 Asm Ip Holding B.V. Semiconductor device and manufacturing method thereof
US9899291B2 (en) 2015-07-13 2018-02-20 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US9905420B2 (en) 2015-12-01 2018-02-27 Asm Ip Holding B.V. Methods of forming silicon germanium tin films and structures and devices including the films
US9909214B2 (en) 2015-10-15 2018-03-06 Asm Ip Holding B.V. Method for depositing dielectric film in trenches by PEALD
US9916980B1 (en) 2016-12-15 2018-03-13 Asm Ip Holding B.V. Method of forming a structure on a substrate
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US10043661B2 (en) 2015-07-13 2018-08-07 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10083836B2 (en) 2015-07-24 2018-09-25 Asm Ip Holding B.V. Formation of boron-doped titanium metal films with high work function
US10087522B2 (en) 2016-04-21 2018-10-02 Asm Ip Holding B.V. Deposition of metal borides
US10087525B2 (en) 2015-08-04 2018-10-02 Asm Ip Holding B.V. Variable gap hard stop design
US10090316B2 (en) 2016-09-01 2018-10-02 Asm Ip Holding B.V. 3D stacked multilayer semiconductor memory using doped select transistor channel
USD830981S1 (en) 2017-04-07 2018-10-16 Asm Ip Holding B.V. Susceptor for semiconductor substrate processing apparatus
US10103040B1 (en) 2017-03-31 2018-10-16 Asm Ip Holding B.V. Apparatus and method for manufacturing a semiconductor device
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US10177025B2 (en) 2016-07-28 2019-01-08 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10179947B2 (en) 2013-11-26 2019-01-15 Asm Ip Holding B.V. Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10236177B1 (en) 2017-08-22 2019-03-19 ASM IP Holding B.V.. Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US10249577B2 (en) 2016-05-17 2019-04-02 Asm Ip Holding B.V. Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method
US10262859B2 (en) 2016-03-24 2019-04-16 Asm Ip Holding B.V. Process for forming a film on a substrate using multi-port injection assemblies
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US20190189473A1 (en) * 2017-12-15 2019-06-20 Beijing Chuangyu Technology Co., LTD Cooling Member and Vacuum Coating Device
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US10361201B2 (en) 2013-09-27 2019-07-23 Asm Ip Holding B.V. Semiconductor structure and device formed using selective epitaxial process
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US10381226B2 (en) 2016-07-27 2019-08-13 Asm Ip Holding B.V. Method of processing substrate
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US10388546B2 (en) 2015-11-16 2019-08-20 Lam Research Corporation Apparatus for UV flowable dielectric
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
CN110952069A (en) * 2018-09-27 2020-04-03 东京毅力科创株式会社 Film forming apparatus and temperature control method
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10707106B2 (en) 2011-06-06 2020-07-07 Asm Ip Holding B.V. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US10714335B2 (en) 2017-04-25 2020-07-14 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10734497B2 (en) 2017-07-18 2020-08-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10734244B2 (en) 2017-11-16 2020-08-04 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by the same
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US10804098B2 (en) 2009-08-14 2020-10-13 Asm Ip Holding B.V. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10847371B2 (en) 2018-03-27 2020-11-24 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867786B2 (en) 2018-03-30 2020-12-15 Asm Ip Holding B.V. Substrate processing method
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US10914004B2 (en) 2018-06-29 2021-02-09 Asm Ip Holding B.V. Thin-film deposition method and manufacturing method of semiconductor device
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10928731B2 (en) 2017-09-21 2021-02-23 Asm Ip Holding B.V. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10934619B2 (en) 2016-11-15 2021-03-02 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11001925B2 (en) 2016-12-19 2021-05-11 Asm Ip Holding B.V. Substrate processing apparatus
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11056567B2 (en) 2018-05-11 2021-07-06 Asm Ip Holding B.V. Method of forming a doped metal carbide film on a substrate and related semiconductor device structures
US11069510B2 (en) 2017-08-30 2021-07-20 Asm Ip Holding B.V. Substrate processing apparatus
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11114294B2 (en) 2019-03-08 2021-09-07 Asm Ip Holding B.V. Structure including SiOC layer and method of forming same
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
US11127617B2 (en) 2017-11-27 2021-09-21 Asm Ip Holding B.V. Storage device for storing wafer cassettes for use with a batch furnace
US11127589B2 (en) 2019-02-01 2021-09-21 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11171025B2 (en) 2019-01-22 2021-11-09 Asm Ip Holding B.V. Substrate processing device
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
US11205585B2 (en) 2016-07-28 2021-12-21 Asm Ip Holding B.V. Substrate processing apparatus and method of operating the same
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11227789B2 (en) 2019-02-20 2022-01-18 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11251040B2 (en) 2019-02-20 2022-02-15 Asm Ip Holding B.V. Cyclical deposition method including treatment step and apparatus for same
US11251068B2 (en) 2018-10-19 2022-02-15 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11274369B2 (en) 2018-09-11 2022-03-15 Asm Ip Holding B.V. Thin film deposition method
US11282698B2 (en) 2019-07-19 2022-03-22 Asm Ip Holding B.V. Method of forming topology-controlled amorphous carbon polymer film
US11289326B2 (en) 2019-05-07 2022-03-29 Asm Ip Holding B.V. Method for reforming amorphous carbon polymer film
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
US11315794B2 (en) 2019-10-21 2022-04-26 Asm Ip Holding B.V. Apparatus and methods for selectively etching films
US11339476B2 (en) 2019-10-08 2022-05-24 Asm Ip Holding B.V. Substrate processing device having connection plates, substrate processing method
US11342216B2 (en) 2019-02-20 2022-05-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11345999B2 (en) 2019-06-06 2022-05-31 Asm Ip Holding B.V. Method of using a gas-phase reactor system including analyzing exhausted gas
US11355338B2 (en) 2019-05-10 2022-06-07 Asm Ip Holding B.V. Method of depositing material onto a surface and structure formed according to the method
US11361990B2 (en) 2018-05-28 2022-06-14 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11378337B2 (en) 2019-03-28 2022-07-05 Asm Ip Holding B.V. Door opener and substrate processing apparatus provided therewith
US11393690B2 (en) 2018-01-19 2022-07-19 Asm Ip Holding B.V. Deposition method
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US11390946B2 (en) 2019-01-17 2022-07-19 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11390945B2 (en) 2019-07-03 2022-07-19 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11401605B2 (en) 2019-11-26 2022-08-02 Asm Ip Holding B.V. Substrate processing apparatus
US11414760B2 (en) 2018-10-08 2022-08-16 Asm Ip Holding B.V. Substrate support unit, thin film deposition apparatus including the same, and substrate processing apparatus including the same
US11424119B2 (en) 2019-03-08 2022-08-23 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11430640B2 (en) 2019-07-30 2022-08-30 Asm Ip Holding B.V. Substrate processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11437241B2 (en) 2020-04-08 2022-09-06 Asm Ip Holding B.V. Apparatus and methods for selectively etching silicon oxide films
US11443926B2 (en) 2019-07-30 2022-09-13 Asm Ip Holding B.V. Substrate processing apparatus
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
US11469098B2 (en) 2018-05-08 2022-10-11 Asm Ip Holding B.V. Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
US11476109B2 (en) 2019-06-11 2022-10-18 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11482418B2 (en) 2018-02-20 2022-10-25 Asm Ip Holding B.V. Substrate processing method and apparatus
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
US11488854B2 (en) 2020-03-11 2022-11-01 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11488819B2 (en) 2018-12-04 2022-11-01 Asm Ip Holding B.V. Method of cleaning substrate processing apparatus
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11495459B2 (en) 2019-09-04 2022-11-08 Asm Ip Holding B.V. Methods for selective deposition using a sacrificial capping layer
US11499222B2 (en) 2018-06-27 2022-11-15 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11499226B2 (en) 2018-11-02 2022-11-15 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
US11515187B2 (en) 2020-05-01 2022-11-29 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11515188B2 (en) 2019-05-16 2022-11-29 Asm Ip Holding B.V. Wafer boat handling device, vertical batch furnace and method
US11521851B2 (en) 2020-02-03 2022-12-06 Asm Ip Holding B.V. Method of forming structures including a vanadium or indium layer
US11527400B2 (en) 2019-08-23 2022-12-13 Asm Ip Holding B.V. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US11530876B2 (en) 2020-04-24 2022-12-20 Asm Ip Holding B.V. Vertical batch furnace assembly comprising a cooling gas supply
US11530483B2 (en) 2018-06-21 2022-12-20 Asm Ip Holding B.V. Substrate processing system
US11551912B2 (en) 2020-01-20 2023-01-10 Asm Ip Holding B.V. Method of forming thin film and method of modifying surface of thin film
US11551925B2 (en) 2019-04-01 2023-01-10 Asm Ip Holding B.V. Method for manufacturing a semiconductor device
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
US11557474B2 (en) 2019-07-29 2023-01-17 Asm Ip Holding B.V. Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
US11594450B2 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Method for forming a structure with a hole
US11594600B2 (en) 2019-11-05 2023-02-28 Asm Ip Holding B.V. Structures with doped semiconductor layers and methods and systems for forming same
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
US11605528B2 (en) 2019-07-09 2023-03-14 Asm Ip Holding B.V. Plasma device using coaxial waveguide, and substrate treatment method
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
US11610774B2 (en) 2019-10-02 2023-03-21 Asm Ip Holding B.V. Methods for forming a topographically selective silicon oxide film by a cyclical plasma-enhanced deposition process
US11615970B2 (en) 2019-07-17 2023-03-28 Asm Ip Holding B.V. Radical assist ignition plasma system and method
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
US11626308B2 (en) 2020-05-13 2023-04-11 Asm Ip Holding B.V. Laser alignment fixture for a reactor system
US11626316B2 (en) 2019-11-20 2023-04-11 Asm Ip Holding B.V. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
US11629407B2 (en) 2019-02-22 2023-04-18 Asm Ip Holding B.V. Substrate processing apparatus and method for processing substrates
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
US11637011B2 (en) 2019-10-16 2023-04-25 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11639548B2 (en) 2019-08-21 2023-05-02 Asm Ip Holding B.V. Film-forming material mixed-gas forming device and film forming device
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US11644758B2 (en) 2020-07-17 2023-05-09 Asm Ip Holding B.V. Structures and methods for use in photolithography
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
US11646204B2 (en) 2020-06-24 2023-05-09 Asm Ip Holding B.V. Method for forming a layer provided with silicon
US11646184B2 (en) 2019-11-29 2023-05-09 Asm Ip Holding B.V. Substrate processing apparatus
US11658029B2 (en) 2018-12-14 2023-05-23 Asm Ip Holding B.V. Method of forming a device structure using selective deposition of gallium nitride and system for same
US11658035B2 (en) 2020-06-30 2023-05-23 Asm Ip Holding B.V. Substrate processing method
US11664267B2 (en) 2019-07-10 2023-05-30 Asm Ip Holding B.V. Substrate support assembly and substrate processing device including the same
US11664245B2 (en) 2019-07-16 2023-05-30 Asm Ip Holding B.V. Substrate processing device
US11664199B2 (en) 2018-10-19 2023-05-30 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
US11674220B2 (en) 2020-07-20 2023-06-13 Asm Ip Holding B.V. Method for depositing molybdenum layers using an underlayer
US11680839B2 (en) 2019-08-05 2023-06-20 Asm Ip Holding B.V. Liquid level sensor for a chemical source vessel
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
US11688603B2 (en) 2019-07-17 2023-06-27 Asm Ip Holding B.V. Methods of forming silicon germanium structures
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US11705333B2 (en) 2020-05-21 2023-07-18 Asm Ip Holding B.V. Structures including multiple carbon layers and methods of forming and using same
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11725280B2 (en) 2020-08-26 2023-08-15 Asm Ip Holding B.V. Method for forming metal silicon oxide and metal silicon oxynitride layers
US11725277B2 (en) 2011-07-20 2023-08-15 Asm Ip Holding B.V. Pressure transmitter for a semiconductor processing environment
US11735422B2 (en) 2019-10-10 2023-08-22 Asm Ip Holding B.V. Method of forming a photoresist underlayer and structure including same
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11767589B2 (en) 2020-05-29 2023-09-26 Asm Ip Holding B.V. Substrate processing device
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781221B2 (en) 2019-05-07 2023-10-10 Asm Ip Holding B.V. Chemical source vessel with dip tube
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
US11804364B2 (en) 2020-05-19 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus
US11814747B2 (en) 2019-04-24 2023-11-14 Asm Ip Holding B.V. Gas-phase reactor system-with a reaction chamber, a solid precursor source vessel, a gas distribution system, and a flange assembly
US11823866B2 (en) 2020-04-02 2023-11-21 Asm Ip Holding B.V. Thin film forming method
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11823876B2 (en) 2019-09-05 2023-11-21 Asm Ip Holding B.V. Substrate processing apparatus
US11827981B2 (en) 2020-10-14 2023-11-28 Asm Ip Holding B.V. Method of depositing material on stepped structure
US11828707B2 (en) 2020-02-04 2023-11-28 Asm Ip Holding B.V. Method and apparatus for transmittance measurements of large articles
US11830738B2 (en) 2020-04-03 2023-11-28 Asm Ip Holding B.V. Method for forming barrier layer and method for manufacturing semiconductor device
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11840761B2 (en) 2019-12-04 2023-12-12 Asm Ip Holding B.V. Substrate processing apparatus
US11873557B2 (en) 2020-10-22 2024-01-16 Asm Ip Holding B.V. Method of depositing vanadium metal
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US11885023B2 (en) 2018-10-01 2024-01-30 Asm Ip Holding B.V. Substrate retaining apparatus, system including the apparatus, and method of using same
US11885020B2 (en) 2020-12-22 2024-01-30 Asm Ip Holding B.V. Transition metal deposition method
US11887857B2 (en) 2020-04-24 2024-01-30 Asm Ip Holding B.V. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
US11891696B2 (en) 2020-11-30 2024-02-06 Asm Ip Holding B.V. Injector configured for arrangement within a reaction chamber of a substrate processing apparatus
US11901179B2 (en) 2020-10-28 2024-02-13 Asm Ip Holding B.V. Method and device for depositing silicon onto substrates
US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
US11915929B2 (en) 2019-11-26 2024-02-27 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
US11923181B2 (en) 2019-11-29 2024-03-05 Asm Ip Holding B.V. Substrate processing apparatus for minimizing the effect of a filling gas during substrate processing
US11929251B2 (en) 2019-12-02 2024-03-12 Asm Ip Holding B.V. Substrate processing apparatus having electrostatic chuck and substrate processing method
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
US11959168B2 (en) 2021-04-26 2024-04-16 Asm Ip Holding B.V. Solid source precursor vessel

Families Citing this family (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6555394B2 (en) * 1995-11-28 2003-04-29 Samsung Electronics Co., Ltd. Methods of fabricating capacitors including Ta2O5 layers in a chamber including changing a Ta2O5 layer to heater separation or chamber pressure
WO2000070666A1 (en) * 1999-05-14 2000-11-23 Tokyo Electron Limited Method and apparatus for processing
JP3711226B2 (en) * 2000-02-23 2005-11-02 大日本印刷株式会社 Vacuum drying apparatus and vacuum drying method
JP3437832B2 (en) * 2000-03-22 2003-08-18 東京エレクトロン株式会社 Film forming method and film forming apparatus
JP4470274B2 (en) * 2000-04-26 2010-06-02 東京エレクトロン株式会社 Heat treatment equipment
US6436194B1 (en) * 2001-02-16 2002-08-20 Applied Materials, Inc. Method and a system for sealing an epitaxial silicon layer on a substrate
KR100935401B1 (en) * 2003-03-06 2010-01-06 엘지디스플레이 주식회사 Substrate cleaning module using ultraviolet rays and operating method the same
US20050194098A1 (en) * 2003-03-24 2005-09-08 Advanced Energy Industries, Inc. Cast design for plasma chamber cooling
US7071077B2 (en) * 2003-03-26 2006-07-04 S.O.I.Tec Silicon On Insulator Technologies S.A. Method for preparing a bonding surface of a semiconductor layer of a wafer
US7253125B1 (en) 2004-04-16 2007-08-07 Novellus Systems, Inc. Method to improve mechanical strength of low-k dielectric film using modulated UV exposure
US20060035477A1 (en) * 2004-08-12 2006-02-16 Karen Mai Methods and systems for rapid thermal processing
JP4344886B2 (en) * 2004-09-06 2009-10-14 東京エレクトロン株式会社 Plasma processing equipment
US9659769B1 (en) 2004-10-22 2017-05-23 Novellus Systems, Inc. Tensile dielectric films using UV curing
US7510982B1 (en) 2005-01-31 2009-03-31 Novellus Systems, Inc. Creation of porosity in low-k films by photo-disassociation of imbedded nanoparticles
US7651568B2 (en) * 2005-03-28 2010-01-26 Tokyo Electron Limited Plasma enhanced atomic layer deposition system
US8889233B1 (en) 2005-04-26 2014-11-18 Novellus Systems, Inc. Method for reducing stress in porous dielectric films
US20100270004A1 (en) * 2005-05-12 2010-10-28 Landess James D Tailored profile pedestal for thermo-elastically stable cooling or heating of substrates
JP4664119B2 (en) * 2005-05-17 2011-04-06 東京エレクトロン株式会社 Plasma processing equipment
US7941039B1 (en) * 2005-07-18 2011-05-10 Novellus Systems, Inc. Pedestal heat transfer and temperature control
US7622378B2 (en) * 2005-11-09 2009-11-24 Tokyo Electron Limited Multi-step system and method for curing a dielectric film
US8956457B2 (en) * 2006-09-08 2015-02-17 Tokyo Electron Limited Thermal processing system for curing dielectric films
US7851232B2 (en) * 2006-10-30 2010-12-14 Novellus Systems, Inc. UV treatment for carbon-containing low-k dielectric repair in semiconductor processing
US8465991B2 (en) 2006-10-30 2013-06-18 Novellus Systems, Inc. Carbon containing low-k dielectric constant recovery using UV treatment
US20100267231A1 (en) * 2006-10-30 2010-10-21 Van Schravendijk Bart Apparatus for uv damage repair of low k films prior to copper barrier deposition
US10037905B2 (en) * 2009-11-12 2018-07-31 Novellus Systems, Inc. UV and reducing treatment for K recovery and surface clean in semiconductor processing
US20080113108A1 (en) * 2006-11-09 2008-05-15 Stowell Michael W System and method for control of electromagnetic radiation in pecvd discharge processes
US7960297B1 (en) 2006-12-07 2011-06-14 Novellus Systems, Inc. Load lock design for rapid wafer heating
US8242028B1 (en) 2007-04-03 2012-08-14 Novellus Systems, Inc. UV treatment of etch stop and hard mask films for selectivity and hermeticity enhancement
JP5003315B2 (en) * 2007-07-03 2012-08-15 東京エレクトロン株式会社 Substrate processing apparatus, substrate processing method, and storage medium
US8211510B1 (en) 2007-08-31 2012-07-03 Novellus Systems, Inc. Cascaded cure approach to fabricate highly tensile silicon nitride films
US20090075491A1 (en) * 2007-09-13 2009-03-19 Tokyo Electron Limited Method for curing a dielectric film
US20090101829A1 (en) * 2007-10-19 2009-04-23 Nordson Corporation Sensor, system, and method for an ultraviolet lamp system
US8052419B1 (en) 2007-11-08 2011-11-08 Novellus Systems, Inc. Closed loop temperature heat up and control utilizing wafer-to-heater pedestal gap modulation
US20090226694A1 (en) * 2008-03-06 2009-09-10 Tokyo Electron Limited POROUS SiCOH-CONTAINING DIELECTRIC FILM AND A METHOD OF PREPARING
US7977256B2 (en) * 2008-03-06 2011-07-12 Tokyo Electron Limited Method for removing a pore-generating material from an uncured low-k dielectric film
US20090226695A1 (en) * 2008-03-06 2009-09-10 Tokyo Electron Limited Method for treating a dielectric film with infrared radiation
US9050623B1 (en) 2008-09-12 2015-06-09 Novellus Systems, Inc. Progressive UV cure
US20100068897A1 (en) * 2008-09-16 2010-03-18 Tokyo Electron Limited Dielectric treatment platform for dielectric film deposition and curing
US8895942B2 (en) * 2008-09-16 2014-11-25 Tokyo Electron Limited Dielectric treatment module using scanning IR radiation source
US20100065758A1 (en) * 2008-09-16 2010-03-18 Tokyo Electron Limited Dielectric material treatment system and method of operating
US20100067886A1 (en) * 2008-09-16 2010-03-18 Tokyo Electron Limited Ir laser optics system for dielectric treatment module
US8033771B1 (en) 2008-12-11 2011-10-11 Novellus Systems, Inc. Minimum contact area wafer clamping with gas flow for rapid wafer cooling
KR101839292B1 (en) * 2009-07-28 2018-03-19 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Inspection method and manufacturing method of light-emitting device
US8525139B2 (en) * 2009-10-27 2013-09-03 Lam Research Corporation Method and apparatus of halogen removal
US8232538B2 (en) * 2009-10-27 2012-07-31 Lam Research Corporation Method and apparatus of halogen removal using optimal ozone and UV exposure
EP2365390A3 (en) 2010-03-12 2017-10-04 ASML Netherlands B.V. Lithographic apparatus and method
JP5085752B2 (en) * 2010-03-24 2012-11-28 株式会社東芝 Semiconductor manufacturing apparatus cleaning method, semiconductor manufacturing apparatus, and management system
US20110232677A1 (en) * 2010-03-29 2011-09-29 Tokyo Electron Limited Method for cleaning low-k dielectrics
US8371567B2 (en) 2011-04-13 2013-02-12 Novellus Systems, Inc. Pedestal covers
US20130008602A1 (en) * 2011-07-07 2013-01-10 Lam Research Ag Apparatus for treating a wafer-shaped article
CN104040710B (en) 2012-01-06 2017-11-28 诺发系统公司 Adaptive heat-transferring method and system for uniformly transfer heat
US9899242B2 (en) * 2015-04-06 2018-02-20 Varian Semiconductor Equipment Associates, Inc. Device and method for substrate heating during transport
US10347547B2 (en) 2016-08-09 2019-07-09 Lam Research Corporation Suppressing interfacial reactions by varying the wafer temperature throughout deposition
US9847221B1 (en) 2016-09-29 2017-12-19 Lam Research Corporation Low temperature formation of high quality silicon oxide films in semiconductor device manufacturing
JP7173730B2 (en) * 2017-11-24 2022-11-16 キヤノン株式会社 Management method for managing processing equipment, management device, program, and article manufacturing method
KR20230109159A (en) * 2020-12-14 2023-07-19 매슨 테크놀로지 인크 Workpiece processing apparatus having a heat treatment system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4356384A (en) * 1980-03-03 1982-10-26 Arnon Gat Method and means for heat treating semiconductor material using high intensity CW lamps

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0669027B2 (en) * 1983-02-21 1994-08-31 株式会社日立製作所 Method for forming thin film on semiconductor wafer
US4715318A (en) * 1985-01-17 1987-12-29 Nippon Kogaku K.K. Photochemical reaction apparatus
US5261961A (en) * 1985-07-23 1993-11-16 Canon Kabushiki Kaisha Device for forming deposited film
US4796562A (en) * 1985-12-03 1989-01-10 Varian Associates, Inc. Rapid thermal cvd apparatus
US5292393A (en) * 1986-12-19 1994-03-08 Applied Materials, Inc. Multichamber integrated process system
JPH02283022A (en) 1989-01-25 1990-11-20 Hitachi Ltd Manufacture of semiconductor device
US5504831A (en) * 1993-11-10 1996-04-02 Micron Semiconductor, Inc. System for compensating against wafer edge heat loss in rapid thermal processing
TW293983B (en) * 1993-12-17 1996-12-21 Tokyo Electron Co Ltd
US6015503A (en) * 1994-06-14 2000-01-18 Fsi International, Inc. Method and apparatus for surface conditioning
US5468687A (en) * 1994-07-27 1995-11-21 International Business Machines Corporation Method of making TA2 O5 thin film by low temperature ozone plasma annealing (oxidation)
KR0183732B1 (en) 1995-09-01 1999-03-20 김광호 Method of manufacturing semiconductor device capacitor
JP3062116B2 (en) 1996-07-12 2000-07-10 東京エレクトロン株式会社 Film forming and reforming assembly equipment
US6143081A (en) * 1996-07-12 2000-11-07 Tokyo Electron Limited Film forming apparatus and method, and film modifying apparatus and method
US5781693A (en) * 1996-07-24 1998-07-14 Applied Materials, Inc. Gas introduction showerhead for an RTP chamber with upper and lower transparent plates and gas flow therebetween
US6162744A (en) * 1998-02-28 2000-12-19 Micron Technology, Inc. Method of forming capacitors having high-K oxygen containing capacitor dielectric layers, method of processing high-K oxygen containing dielectric layers, method of forming a DRAM cell having having high-K oxygen containing capacitor dielectric layers
US6122566A (en) * 1998-03-03 2000-09-19 Applied Materials Inc. Method and apparatus for sequencing wafers in a multiple chamber, semiconductor wafer processing system
US6204203B1 (en) * 1998-10-14 2001-03-20 Applied Materials, Inc. Post deposition treatment of dielectric films for interface control
US6133086A (en) * 1999-06-24 2000-10-17 United Microelectronics Corp. Fabrication method of a tantalum pentoxide dielectric layer for a DRAM capacitor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4356384A (en) * 1980-03-03 1982-10-26 Arnon Gat Method and means for heat treating semiconductor material using high intensity CW lamps

Cited By (451)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7037560B1 (en) * 1996-07-12 2006-05-02 Tokyo Electron Limited Film forming method, and film modifying method
US20040040496A1 (en) * 2000-11-01 2004-03-04 Tadatomo Ohnoda Excimer uv photo reactor
US8273583B2 (en) 2000-12-28 2012-09-25 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a light emitting device and thin film forming apparatus
US20050196892A1 (en) * 2000-12-28 2005-09-08 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a light emitting device and thin film forming apparatus
US9412948B2 (en) 2000-12-28 2016-08-09 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a light emitting device and thin film forming apparatus
US8980660B2 (en) 2000-12-28 2015-03-17 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a light emitting device and thin film forming apparatus
US7871930B2 (en) * 2000-12-28 2011-01-18 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a light emitting device and thin film forming apparatus
US20110136266A1 (en) * 2000-12-28 2011-06-09 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a light emitting device and thin film forming apparatus
US8367439B2 (en) 2000-12-28 2013-02-05 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a light emitting device and thin film forming apparatus
KR20030042484A (en) * 2001-11-22 2003-06-02 (주)한백 Low Temperature Poly-Si Crystalizing Apparatus for Flat display
US20030224567A1 (en) * 2002-05-31 2003-12-04 Samsung Electronics Co., Ltd. Method for forming dielectric layer of capacitor
US7416904B2 (en) * 2002-05-31 2008-08-26 Samsung Electronics Co., Ltd. Method for forming dielectric layer of capacitor
US8454750B1 (en) 2005-04-26 2013-06-04 Novellus Systems, Inc. Multi-station sequential curing of dielectric films
US8518210B2 (en) 2005-04-26 2013-08-27 Novellus Systems, Inc. Purging of porogen from UV cure chamber
US8951348B1 (en) * 2005-04-26 2015-02-10 Novellus Systems, Inc. Single-chamber sequential curing of semiconductor wafers
US8137465B1 (en) 2005-04-26 2012-03-20 Novellus Systems, Inc. Single-chamber sequential curing of semiconductor wafers
US10121682B2 (en) 2005-04-26 2018-11-06 Novellus Systems, Inc. Purging of porogen from UV cure chamber
US9384959B2 (en) 2005-04-26 2016-07-05 Novellus Systems, Inc. Purging of porogen from UV cure chamber
US8734663B2 (en) 2005-04-26 2014-05-27 Novellus Systems, Inc. Purging of porogen from UV cure chamber
US8980769B1 (en) 2005-04-26 2015-03-17 Novellus Systems, Inc. Multi-station sequential curing of dielectric films
US8629068B1 (en) 2005-04-26 2014-01-14 Novellus Systems, Inc. Multi-station sequential curing of dielectric films
US20070292603A1 (en) * 2005-08-31 2007-12-20 Lam Research Corporation Processes and systems for engineering a barrier surface for copper deposition
US8241701B2 (en) * 2005-08-31 2012-08-14 Lam Research Corporation Processes and systems for engineering a barrier surface for copper deposition
US8771804B2 (en) * 2005-08-31 2014-07-08 Lam Research Corporation Processes and systems for engineering a copper surface for selective metal deposition
US20070292604A1 (en) * 2005-08-31 2007-12-20 Lam Research Corporation Processes and systems for engineering a copper surface for selective metal deposition
US20090039475A1 (en) * 2005-10-14 2009-02-12 Yoshimi Shioya Apparatus and Method for Manufacturing Semiconductor
US10020197B2 (en) 2005-12-05 2018-07-10 Novellus Systems, Inc. Method for reducing porogen accumulation from a UV-cure chamber
US9073100B2 (en) * 2005-12-05 2015-07-07 Novellus Systems, Inc. Method and apparatuses for reducing porogen accumulation from a UV-cure chamber
US11177131B2 (en) * 2005-12-05 2021-11-16 Novellus Systems, Inc. Method and apparatuses for reducing porogen accumulation from a UV-cure chamber
US20130284087A1 (en) * 2005-12-05 2013-10-31 Novellus Systems, Inc. Method and apparatuses for reducing porogen accumulation from a uv-cure chamber
US8398816B1 (en) 2006-03-28 2013-03-19 Novellus Systems, Inc. Method and apparatuses for reducing porogen accumulation from a UV-cure chamber
US8426778B1 (en) * 2007-12-10 2013-04-23 Novellus Systems, Inc. Tunable-illumination reflector optics for UV cure system
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US10844486B2 (en) 2009-04-06 2020-11-24 Asm Ip Holding B.V. Semiconductor processing reactor and components thereof
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US10480072B2 (en) 2009-04-06 2019-11-19 Asm Ip Holding B.V. Semiconductor processing reactor and components thereof
US10804098B2 (en) 2009-08-14 2020-10-13 Asm Ip Holding B.V. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US10707106B2 (en) 2011-06-06 2020-07-07 Asm Ip Holding B.V. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US9793148B2 (en) 2011-06-22 2017-10-17 Asm Japan K.K. Method for positioning wafers in multiple wafer transport
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US11725277B2 (en) 2011-07-20 2023-08-15 Asm Ip Holding B.V. Pressure transmitter for a semiconductor processing environment
US9499905B2 (en) * 2011-07-22 2016-11-22 Applied Materials, Inc. Methods and apparatus for the deposition of materials on a substrate
US20130019803A1 (en) * 2011-07-22 2013-01-24 Applied Materials, Inc. Methods and apparatus for the deposition of materials on a substrate
US10832903B2 (en) 2011-10-28 2020-11-10 Asm Ip Holding B.V. Process feed management for semiconductor substrate processing
US9892908B2 (en) 2011-10-28 2018-02-13 Asm America, Inc. Process feed management for semiconductor substrate processing
US9384987B2 (en) 2012-04-04 2016-07-05 Asm Ip Holding B.V. Metal oxide protective layer for a semiconductor device
US9558931B2 (en) 2012-07-27 2017-01-31 Asm Ip Holding B.V. System and method for gas-phase sulfur passivation of a semiconductor surface
US10566223B2 (en) 2012-08-28 2020-02-18 Asm Ip Holdings B.V. Systems and methods for dynamic semiconductor process scheduling
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
US9605342B2 (en) 2012-09-12 2017-03-28 Asm Ip Holding B.V. Process gas management for an inductively-coupled plasma deposition reactor
US10023960B2 (en) 2012-09-12 2018-07-17 Asm Ip Holdings B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9324811B2 (en) 2012-09-26 2016-04-26 Asm Ip Holding B.V. Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US11501956B2 (en) 2012-10-12 2022-11-15 Asm Ip Holding B.V. Semiconductor reaction chamber showerhead
US9640416B2 (en) 2012-12-26 2017-05-02 Asm Ip Holding B.V. Single-and dual-chamber module-attachable wafer-handling chamber
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
US10340125B2 (en) 2013-03-08 2019-07-02 Asm Ip Holding B.V. Pulsed remote plasma method and system
US10366864B2 (en) 2013-03-08 2019-07-30 Asm Ip Holding B.V. Method and system for in-situ formation of intermediate reactive species
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
US9790595B2 (en) 2013-07-12 2017-10-17 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
US9412564B2 (en) 2013-07-22 2016-08-09 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9793115B2 (en) 2013-08-14 2017-10-17 Asm Ip Holding B.V. Structures and devices including germanium-tin films and methods of forming same
US9028765B2 (en) 2013-08-23 2015-05-12 Lam Research Corporation Exhaust flow spreading baffle-riser to optimize remote plasma window clean
US10361201B2 (en) 2013-09-27 2019-07-23 Asm Ip Holding B.V. Semiconductor structure and device formed using selective epitaxial process
US9556516B2 (en) 2013-10-09 2017-01-31 ASM IP Holding B.V Method for forming Ti-containing film by PEALD using TDMAT or TDEAT
US10179947B2 (en) 2013-11-26 2019-01-15 Asm Ip Holding B.V. Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US10604847B2 (en) 2014-03-18 2020-03-31 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US9447498B2 (en) 2014-03-18 2016-09-20 Asm Ip Holding B.V. Method for performing uniform processing in gas system-sharing multiple reaction chambers
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US9404587B2 (en) 2014-04-24 2016-08-02 ASM IP Holding B.V Lockout tagout for semiconductor vacuum valve
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9543180B2 (en) 2014-08-01 2017-01-10 Asm Ip Holding B.V. Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
US10787741B2 (en) 2014-08-21 2020-09-29 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US11795545B2 (en) 2014-10-07 2023-10-24 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
US10561975B2 (en) 2014-10-07 2020-02-18 Asm Ip Holdings B.V. Variable conductance gas distribution apparatus and method
US9891521B2 (en) 2014-11-19 2018-02-13 Asm Ip Holding B.V. Method for depositing thin film
US9899405B2 (en) 2014-12-22 2018-02-20 Asm Ip Holding B.V. Semiconductor device and manufacturing method thereof
US10438965B2 (en) 2014-12-22 2019-10-08 Asm Ip Holding B.V. Semiconductor device and manufacturing method thereof
US9478415B2 (en) 2015-02-13 2016-10-25 Asm Ip Holding B.V. Method for forming film having low resistance and shallow junction depth
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US11742189B2 (en) 2015-03-12 2023-08-29 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US11242598B2 (en) 2015-06-26 2022-02-08 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US10043661B2 (en) 2015-07-13 2018-08-07 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US9899291B2 (en) 2015-07-13 2018-02-20 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10083836B2 (en) 2015-07-24 2018-09-25 Asm Ip Holding B.V. Formation of boron-doped titanium metal films with high work function
US10087525B2 (en) 2015-08-04 2018-10-02 Asm Ip Holding B.V. Variable gap hard stop design
US9647114B2 (en) 2015-08-14 2017-05-09 Asm Ip Holding B.V. Methods of forming highly p-type doped germanium tin films and structures and devices including the films
US9711345B2 (en) 2015-08-25 2017-07-18 Asm Ip Holding B.V. Method for forming aluminum nitride-based film by PEALD
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US10312129B2 (en) 2015-09-29 2019-06-04 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US9909214B2 (en) 2015-10-15 2018-03-06 Asm Ip Holding B.V. Method for depositing dielectric film in trenches by PEALD
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US11233133B2 (en) 2015-10-21 2022-01-25 Asm Ip Holding B.V. NbMC layers
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US9455138B1 (en) 2015-11-10 2016-09-27 Asm Ip Holding B.V. Method for forming dielectric film in trenches by PEALD using H-containing gas
US11270896B2 (en) 2015-11-16 2022-03-08 Lam Research Corporation Apparatus for UV flowable dielectric
US10388546B2 (en) 2015-11-16 2019-08-20 Lam Research Corporation Apparatus for UV flowable dielectric
US9905420B2 (en) 2015-12-01 2018-02-27 Asm Ip Holding B.V. Methods of forming silicon germanium tin films and structures and devices including the films
US9607837B1 (en) 2015-12-21 2017-03-28 Asm Ip Holding B.V. Method for forming silicon oxide cap layer for solid state diffusion process
US9627221B1 (en) 2015-12-28 2017-04-18 Asm Ip Holding B.V. Continuous process incorporating atomic layer etching
US9735024B2 (en) 2015-12-28 2017-08-15 Asm Ip Holding B.V. Method of atomic layer etching using functional group-containing fluorocarbon
US11956977B2 (en) 2015-12-29 2024-04-09 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US9754779B1 (en) 2016-02-19 2017-09-05 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US10720322B2 (en) 2016-02-19 2020-07-21 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on top surface
US11676812B2 (en) 2016-02-19 2023-06-13 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on top/bottom portions
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US10262859B2 (en) 2016-03-24 2019-04-16 Asm Ip Holding B.V. Process for forming a film on a substrate using multi-port injection assemblies
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10851456B2 (en) 2016-04-21 2020-12-01 Asm Ip Holding B.V. Deposition of metal borides
US10087522B2 (en) 2016-04-21 2018-10-02 Asm Ip Holding B.V. Deposition of metal borides
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US11101370B2 (en) 2016-05-02 2021-08-24 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10665452B2 (en) 2016-05-02 2020-05-26 Asm Ip Holdings B.V. Source/drain performance through conformal solid state doping
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10249577B2 (en) 2016-05-17 2019-04-02 Asm Ip Holding B.V. Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US11749562B2 (en) 2016-07-08 2023-09-05 Asm Ip Holding B.V. Selective deposition method to form air gaps
US10541173B2 (en) 2016-07-08 2020-01-21 Asm Ip Holding B.V. Selective deposition method to form air gaps
US11094582B2 (en) 2016-07-08 2021-08-17 Asm Ip Holding B.V. Selective deposition method to form air gaps
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US11649546B2 (en) 2016-07-08 2023-05-16 Asm Ip Holding B.V. Organic reactants for atomic layer deposition
US9793135B1 (en) 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US10381226B2 (en) 2016-07-27 2019-08-13 Asm Ip Holding B.V. Method of processing substrate
US10177025B2 (en) 2016-07-28 2019-01-08 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10741385B2 (en) 2016-07-28 2020-08-11 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11610775B2 (en) 2016-07-28 2023-03-21 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11205585B2 (en) 2016-07-28 2021-12-21 Asm Ip Holding B.V. Substrate processing apparatus and method of operating the same
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11694892B2 (en) 2016-07-28 2023-07-04 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11107676B2 (en) 2016-07-28 2021-08-31 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10090316B2 (en) 2016-09-01 2018-10-02 Asm Ip Holding B.V. 3D stacked multilayer semiconductor memory using doped select transistor channel
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US10943771B2 (en) 2016-10-26 2021-03-09 Asm Ip Holding B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US11810788B2 (en) 2016-11-01 2023-11-07 Asm Ip Holding B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10720331B2 (en) 2016-11-01 2020-07-21 ASM IP Holdings, B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10622375B2 (en) 2016-11-07 2020-04-14 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10644025B2 (en) 2016-11-07 2020-05-05 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10934619B2 (en) 2016-11-15 2021-03-02 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US11396702B2 (en) 2016-11-15 2022-07-26 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
US11851755B2 (en) 2016-12-15 2023-12-26 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US9916980B1 (en) 2016-12-15 2018-03-13 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11001925B2 (en) 2016-12-19 2021-05-11 Asm Ip Holding B.V. Substrate processing apparatus
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11251035B2 (en) 2016-12-22 2022-02-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10784102B2 (en) 2016-12-22 2020-09-22 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10468262B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by a cyclical deposition and related semiconductor device structures
US11410851B2 (en) 2017-02-15 2022-08-09 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US11658030B2 (en) 2017-03-29 2023-05-23 Asm Ip Holding B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10103040B1 (en) 2017-03-31 2018-10-16 Asm Ip Holding B.V. Apparatus and method for manufacturing a semiconductor device
USD830981S1 (en) 2017-04-07 2018-10-16 Asm Ip Holding B.V. Susceptor for semiconductor substrate processing apparatus
US10714335B2 (en) 2017-04-25 2020-07-14 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10950432B2 (en) 2017-04-25 2021-03-16 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US11848200B2 (en) 2017-05-08 2023-12-19 Asm Ip Holding B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
US11695054B2 (en) 2017-07-18 2023-07-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US10734497B2 (en) 2017-07-18 2020-08-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US11164955B2 (en) 2017-07-18 2021-11-02 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11004977B2 (en) 2017-07-19 2021-05-11 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US11802338B2 (en) 2017-07-26 2023-10-31 Asm Ip Holding B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US11587821B2 (en) 2017-08-08 2023-02-21 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US11417545B2 (en) 2017-08-08 2022-08-16 Asm Ip Holding B.V. Radiation shield
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10672636B2 (en) 2017-08-09 2020-06-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10236177B1 (en) 2017-08-22 2019-03-19 ASM IP Holding B.V.. Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US11581220B2 (en) 2017-08-30 2023-02-14 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US11069510B2 (en) 2017-08-30 2021-07-20 Asm Ip Holding B.V. Substrate processing apparatus
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
US10928731B2 (en) 2017-09-21 2021-02-23 Asm Ip Holding B.V. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11387120B2 (en) 2017-09-28 2022-07-12 Asm Ip Holding B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US11094546B2 (en) 2017-10-05 2021-08-17 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10734223B2 (en) 2017-10-10 2020-08-04 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US10734244B2 (en) 2017-11-16 2020-08-04 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by the same
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
US11127617B2 (en) 2017-11-27 2021-09-21 Asm Ip Holding B.V. Storage device for storing wafer cassettes for use with a batch furnace
US11682572B2 (en) 2017-11-27 2023-06-20 Asm Ip Holdings B.V. Storage device for storing wafer cassettes for use with a batch furnace
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US20190189473A1 (en) * 2017-12-15 2019-06-20 Beijing Chuangyu Technology Co., LTD Cooling Member and Vacuum Coating Device
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11501973B2 (en) 2018-01-16 2022-11-15 Asm Ip Holding B.V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11393690B2 (en) 2018-01-19 2022-07-19 Asm Ip Holding B.V. Deposition method
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
USD913980S1 (en) 2018-02-01 2021-03-23 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
US11735414B2 (en) 2018-02-06 2023-08-22 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US11387106B2 (en) 2018-02-14 2022-07-12 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US11482418B2 (en) 2018-02-20 2022-10-25 Asm Ip Holding B.V. Substrate processing method and apparatus
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
US11939673B2 (en) 2018-02-23 2024-03-26 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
US10847371B2 (en) 2018-03-27 2020-11-24 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US11398382B2 (en) 2018-03-27 2022-07-26 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US10867786B2 (en) 2018-03-30 2020-12-15 Asm Ip Holding B.V. Substrate processing method
US11469098B2 (en) 2018-05-08 2022-10-11 Asm Ip Holding B.V. Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
US11056567B2 (en) 2018-05-11 2021-07-06 Asm Ip Holding B.V. Method of forming a doped metal carbide film on a substrate and related semiconductor device structures
US11908733B2 (en) 2018-05-28 2024-02-20 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11361990B2 (en) 2018-05-28 2022-06-14 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11837483B2 (en) 2018-06-04 2023-12-05 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US11296189B2 (en) 2018-06-21 2022-04-05 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US11530483B2 (en) 2018-06-21 2022-12-20 Asm Ip Holding B.V. Substrate processing system
US11952658B2 (en) 2018-06-27 2024-04-09 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11814715B2 (en) 2018-06-27 2023-11-14 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11499222B2 (en) 2018-06-27 2022-11-15 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11168395B2 (en) 2018-06-29 2021-11-09 Asm Ip Holding B.V. Temperature-controlled flange and reactor system including same
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
US10914004B2 (en) 2018-06-29 2021-02-09 Asm Ip Holding B.V. Thin-film deposition method and manufacturing method of semiconductor device
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11646197B2 (en) 2018-07-03 2023-05-09 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11923190B2 (en) 2018-07-03 2024-03-05 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10755923B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11274369B2 (en) 2018-09-11 2022-03-15 Asm Ip Holding B.V. Thin film deposition method
US11804388B2 (en) 2018-09-11 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus and method
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
CN110952069A (en) * 2018-09-27 2020-04-03 东京毅力科创株式会社 Film forming apparatus and temperature control method
US11885023B2 (en) 2018-10-01 2024-01-30 Asm Ip Holding B.V. Substrate retaining apparatus, system including the apparatus, and method of using same
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11414760B2 (en) 2018-10-08 2022-08-16 Asm Ip Holding B.V. Substrate support unit, thin film deposition apparatus including the same, and substrate processing apparatus including the same
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
US11251068B2 (en) 2018-10-19 2022-02-15 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
US11664199B2 (en) 2018-10-19 2023-05-30 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11735445B2 (en) 2018-10-31 2023-08-22 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11866823B2 (en) 2018-11-02 2024-01-09 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11499226B2 (en) 2018-11-02 2022-11-15 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US11244825B2 (en) 2018-11-16 2022-02-08 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US11411088B2 (en) 2018-11-16 2022-08-09 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US11798999B2 (en) 2018-11-16 2023-10-24 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
US11488819B2 (en) 2018-12-04 2022-11-01 Asm Ip Holding B.V. Method of cleaning substrate processing apparatus
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11769670B2 (en) 2018-12-13 2023-09-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11658029B2 (en) 2018-12-14 2023-05-23 Asm Ip Holding B.V. Method of forming a device structure using selective deposition of gallium nitride and system for same
US11390946B2 (en) 2019-01-17 2022-07-19 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11171025B2 (en) 2019-01-22 2021-11-09 Asm Ip Holding B.V. Substrate processing device
US11127589B2 (en) 2019-02-01 2021-09-21 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11615980B2 (en) 2019-02-20 2023-03-28 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11251040B2 (en) 2019-02-20 2022-02-15 Asm Ip Holding B.V. Cyclical deposition method including treatment step and apparatus for same
US11342216B2 (en) 2019-02-20 2022-05-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11227789B2 (en) 2019-02-20 2022-01-18 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11798834B2 (en) 2019-02-20 2023-10-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
US11629407B2 (en) 2019-02-22 2023-04-18 Asm Ip Holding B.V. Substrate processing apparatus and method for processing substrates
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
US11114294B2 (en) 2019-03-08 2021-09-07 Asm Ip Holding B.V. Structure including SiOC layer and method of forming same
US11424119B2 (en) 2019-03-08 2022-08-23 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11901175B2 (en) 2019-03-08 2024-02-13 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11378337B2 (en) 2019-03-28 2022-07-05 Asm Ip Holding B.V. Door opener and substrate processing apparatus provided therewith
US11551925B2 (en) 2019-04-01 2023-01-10 Asm Ip Holding B.V. Method for manufacturing a semiconductor device
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
US11814747B2 (en) 2019-04-24 2023-11-14 Asm Ip Holding B.V. Gas-phase reactor system-with a reaction chamber, a solid precursor source vessel, a gas distribution system, and a flange assembly
US11781221B2 (en) 2019-05-07 2023-10-10 Asm Ip Holding B.V. Chemical source vessel with dip tube
US11289326B2 (en) 2019-05-07 2022-03-29 Asm Ip Holding B.V. Method for reforming amorphous carbon polymer film
US11355338B2 (en) 2019-05-10 2022-06-07 Asm Ip Holding B.V. Method of depositing material onto a surface and structure formed according to the method
US11515188B2 (en) 2019-05-16 2022-11-29 Asm Ip Holding B.V. Wafer boat handling device, vertical batch furnace and method
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
US11345999B2 (en) 2019-06-06 2022-05-31 Asm Ip Holding B.V. Method of using a gas-phase reactor system including analyzing exhausted gas
US11453946B2 (en) 2019-06-06 2022-09-27 Asm Ip Holding B.V. Gas-phase reactor system including a gas detector
US11908684B2 (en) 2019-06-11 2024-02-20 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
US11476109B2 (en) 2019-06-11 2022-10-18 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
US11746414B2 (en) 2019-07-03 2023-09-05 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11390945B2 (en) 2019-07-03 2022-07-19 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11605528B2 (en) 2019-07-09 2023-03-14 Asm Ip Holding B.V. Plasma device using coaxial waveguide, and substrate treatment method
US11664267B2 (en) 2019-07-10 2023-05-30 Asm Ip Holding B.V. Substrate support assembly and substrate processing device including the same
US11664245B2 (en) 2019-07-16 2023-05-30 Asm Ip Holding B.V. Substrate processing device
US11688603B2 (en) 2019-07-17 2023-06-27 Asm Ip Holding B.V. Methods of forming silicon germanium structures
US11615970B2 (en) 2019-07-17 2023-03-28 Asm Ip Holding B.V. Radical assist ignition plasma system and method
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
US11282698B2 (en) 2019-07-19 2022-03-22 Asm Ip Holding B.V. Method of forming topology-controlled amorphous carbon polymer film
US11557474B2 (en) 2019-07-29 2023-01-17 Asm Ip Holding B.V. Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
US11430640B2 (en) 2019-07-30 2022-08-30 Asm Ip Holding B.V. Substrate processing apparatus
US11443926B2 (en) 2019-07-30 2022-09-13 Asm Ip Holding B.V. Substrate processing apparatus
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11876008B2 (en) 2019-07-31 2024-01-16 Asm Ip Holding B.V. Vertical batch furnace assembly
US11680839B2 (en) 2019-08-05 2023-06-20 Asm Ip Holding B.V. Liquid level sensor for a chemical source vessel
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
US11639548B2 (en) 2019-08-21 2023-05-02 Asm Ip Holding B.V. Film-forming material mixed-gas forming device and film forming device
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
US11594450B2 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Method for forming a structure with a hole
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11898242B2 (en) 2019-08-23 2024-02-13 Asm Ip Holding B.V. Methods for forming a polycrystalline molybdenum film over a surface of a substrate and related structures including a polycrystalline molybdenum film
US11827978B2 (en) 2019-08-23 2023-11-28 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11527400B2 (en) 2019-08-23 2022-12-13 Asm Ip Holding B.V. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11495459B2 (en) 2019-09-04 2022-11-08 Asm Ip Holding B.V. Methods for selective deposition using a sacrificial capping layer
US11823876B2 (en) 2019-09-05 2023-11-21 Asm Ip Holding B.V. Substrate processing apparatus
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
US11610774B2 (en) 2019-10-02 2023-03-21 Asm Ip Holding B.V. Methods for forming a topographically selective silicon oxide film by a cyclical plasma-enhanced deposition process
US11339476B2 (en) 2019-10-08 2022-05-24 Asm Ip Holding B.V. Substrate processing device having connection plates, substrate processing method
US11735422B2 (en) 2019-10-10 2023-08-22 Asm Ip Holding B.V. Method of forming a photoresist underlayer and structure including same
US11637011B2 (en) 2019-10-16 2023-04-25 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
US11315794B2 (en) 2019-10-21 2022-04-26 Asm Ip Holding B.V. Apparatus and methods for selectively etching films
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
US11594600B2 (en) 2019-11-05 2023-02-28 Asm Ip Holding B.V. Structures with doped semiconductor layers and methods and systems for forming same
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
US11626316B2 (en) 2019-11-20 2023-04-11 Asm Ip Holding B.V. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
US11401605B2 (en) 2019-11-26 2022-08-02 Asm Ip Holding B.V. Substrate processing apparatus
US11915929B2 (en) 2019-11-26 2024-02-27 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
US11923181B2 (en) 2019-11-29 2024-03-05 Asm Ip Holding B.V. Substrate processing apparatus for minimizing the effect of a filling gas during substrate processing
US11646184B2 (en) 2019-11-29 2023-05-09 Asm Ip Holding B.V. Substrate processing apparatus
US11929251B2 (en) 2019-12-02 2024-03-12 Asm Ip Holding B.V. Substrate processing apparatus having electrostatic chuck and substrate processing method
US11840761B2 (en) 2019-12-04 2023-12-12 Asm Ip Holding B.V. Substrate processing apparatus
US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11551912B2 (en) 2020-01-20 2023-01-10 Asm Ip Holding B.V. Method of forming thin film and method of modifying surface of thin film
US11521851B2 (en) 2020-02-03 2022-12-06 Asm Ip Holding B.V. Method of forming structures including a vanadium or indium layer
US11828707B2 (en) 2020-02-04 2023-11-28 Asm Ip Holding B.V. Method and apparatus for transmittance measurements of large articles
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
US11837494B2 (en) 2020-03-11 2023-12-05 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11488854B2 (en) 2020-03-11 2022-11-01 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11823866B2 (en) 2020-04-02 2023-11-21 Asm Ip Holding B.V. Thin film forming method
US11830738B2 (en) 2020-04-03 2023-11-28 Asm Ip Holding B.V. Method for forming barrier layer and method for manufacturing semiconductor device
US11437241B2 (en) 2020-04-08 2022-09-06 Asm Ip Holding B.V. Apparatus and methods for selectively etching silicon oxide films
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11530876B2 (en) 2020-04-24 2022-12-20 Asm Ip Holding B.V. Vertical batch furnace assembly comprising a cooling gas supply
US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
US11887857B2 (en) 2020-04-24 2024-01-30 Asm Ip Holding B.V. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
US11515187B2 (en) 2020-05-01 2022-11-29 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11798830B2 (en) 2020-05-01 2023-10-24 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11626308B2 (en) 2020-05-13 2023-04-11 Asm Ip Holding B.V. Laser alignment fixture for a reactor system
US11804364B2 (en) 2020-05-19 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus
US11705333B2 (en) 2020-05-21 2023-07-18 Asm Ip Holding B.V. Structures including multiple carbon layers and methods of forming and using same
US11767589B2 (en) 2020-05-29 2023-09-26 Asm Ip Holding B.V. Substrate processing device
US11646204B2 (en) 2020-06-24 2023-05-09 Asm Ip Holding B.V. Method for forming a layer provided with silicon
US11658035B2 (en) 2020-06-30 2023-05-23 Asm Ip Holding B.V. Substrate processing method
US11644758B2 (en) 2020-07-17 2023-05-09 Asm Ip Holding B.V. Structures and methods for use in photolithography
US11674220B2 (en) 2020-07-20 2023-06-13 Asm Ip Holding B.V. Method for depositing molybdenum layers using an underlayer
US11725280B2 (en) 2020-08-26 2023-08-15 Asm Ip Holding B.V. Method for forming metal silicon oxide and metal silicon oxynitride layers
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US11827981B2 (en) 2020-10-14 2023-11-28 Asm Ip Holding B.V. Method of depositing material on stepped structure
US11873557B2 (en) 2020-10-22 2024-01-16 Asm Ip Holding B.V. Method of depositing vanadium metal
US11901179B2 (en) 2020-10-28 2024-02-13 Asm Ip Holding B.V. Method and device for depositing silicon onto substrates
US11891696B2 (en) 2020-11-30 2024-02-06 Asm Ip Holding B.V. Injector configured for arrangement within a reaction chamber of a substrate processing apparatus
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
US11885020B2 (en) 2020-12-22 2024-01-30 Asm Ip Holding B.V. Transition metal deposition method
US11961741B2 (en) 2021-03-04 2024-04-16 Asm Ip Holding B.V. Method for fabricating layer structure having target topological profile
US11959168B2 (en) 2021-04-26 2024-04-16 Asm Ip Holding B.V. Solid source precursor vessel
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
US11959171B2 (en) 2022-07-18 2024-04-16 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process

Also Published As

Publication number Publication date
US20050016687A1 (en) 2005-01-27
US20060081186A1 (en) 2006-04-20
US6232248B1 (en) 2001-05-15

Similar Documents

Publication Publication Date Title
US6232248B1 (en) Single-substrate-heat-processing method for performing reformation and crystallization
US6399922B2 (en) Single-substrate-heat-treating apparatus for semiconductor process system
KR100558768B1 (en) Film modifying apparatus and method
US6150265A (en) Apparatus for forming materials
US6649218B2 (en) Single substrate processing film forming method
US7029505B2 (en) Sheet type heat treating apparatus and method for processing semiconductors
JP2005531151A (en) Method of energy assisted atomic layer deposition and removal
JPH09153491A (en) Formation of tantalum oxide film and its device
WO2004021425A1 (en) Method of etching and etching apparatus
JP3088970B2 (en) Reforming method and apparatus
KR100538865B1 (en) Single-substrate-heat-processing apparatus and method for performing reformation and crystallization
JP3062116B2 (en) Film forming and reforming assembly equipment
US7361595B2 (en) Transition metal thin film forming method
JPH1079378A (en) Film forming method and device thereof
US6281122B1 (en) Method for forming materials
TW512461B (en) Single-substrate-heat-processing apparatus and method for performing reformation and crystallization
JP3130009B2 (en) Single wafer heat treatment equipment
KR100537679B1 (en) Film deposition apparatus and film formation method
JP3531672B2 (en) Method of forming metal oxide film
JP2000021874A (en) Method of forming metal oxide film and film forming- treating system
JPH10135233A (en) Method of reforming high-dielectric const. film and heat-treating apparatus using the same
JP2001110805A (en) Method for forming metal oxide film and film formation treatment system

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION