US20010022395A1 - Cooling structure for multichip module - Google Patents
Cooling structure for multichip module Download PDFInfo
- Publication number
- US20010022395A1 US20010022395A1 US09/747,517 US74751700A US2001022395A1 US 20010022395 A1 US20010022395 A1 US 20010022395A1 US 74751700 A US74751700 A US 74751700A US 2001022395 A1 US2001022395 A1 US 2001022395A1
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- United States
- Prior art keywords
- cooling structure
- electronic devices
- structure according
- heat
- multichip module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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- 238000001816 cooling Methods 0.000 title claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 239000002826 coolant Substances 0.000 claims description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 2
- 230000005855 radiation Effects 0.000 abstract description 26
- 239000004020 conductor Substances 0.000 abstract description 2
- 239000000463 material Substances 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000005549 size reduction Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/93—Thermoelectric, e.g. peltier effect cooling
Abstract
A first electronic device, a second electronic device which generates less heat than the first electric device, and an electrode are connected by a heat leveling plate formed of an electrically conductive material having high thermal conductivity. A heat radiation plate is provided below an insulated substrate to which the first and second electronic devices are mounted. The second electronic device is cooled by a heat radiation path which extends through the insulated substrate and the heat radiation plate and a heat radiation path which extends through the second electronic device and the electrode to the heat radiation plate. The first and the second electronic device have substantially the same temperature due to heat radiation through the heat leveling plate. As a result, cooling effect of the electronic devices can be enhanced.
Description
- The disclosures of Japanese Patent Application Nos. HEI 11-362058 filed on Dec. 21, 1999, and 2000-343677 filed on Nov. 10, 2000, including the specifications, drawings and abstracts are incorporated herein by reference in their entirety.
- 1. Field of the Invention
- The invention relates to a cooling structure for a multichip module and, more particularly, to a cooling structure for a multichip module having a plurality of electronic devices that generate different amounts of heat relative to each other.
- 2. Description of Related Art
- In general, as a cooling structure for a multichip module, there is proposed a structure for cooling a multichip module by radiating heat from one face thereof (e.g. Japanese Patent Application Laid-Open No. HEI 11-121666). In this structure, a heat radiation body for covering a plurality of electronic devices is attached to a substrate to which the electronic devices that are different in height are mounted, with a silicon seat of high thermal conductivity being interposed among the electronic devices. Heat generated from the respective electronic devices is radiated through the heat radiation body.
- The electronic devices, which are used to control electric power or the like, need to be kept below a permissible operating temperature and therefore heat generated in connection with switching operation or the like needs to be removed. Thus, it is considered important to achieve improvement of performance and size reduction in the cooling structure.
- It is an object of the invention to provide a cooling structure for a multichip module which is small in size and which demonstrates excellent cooling performance.
- In order to achieve the above-stated object, according to an aspect of the invention, there is provided a cooling structure for a multichip module having a plurality of electronic devices, in which the devices generate different amount of heat relative to each other, comprising a first member which is provided on a first face of the multichip module and which transmits heat generated by the electronic devices to the outside of the module and a second member which is provided on a second face that is different from the first face, which is in contact with the electronic devices, and which has thermal conductivity.
- According to the aforementioned aspect, part of the heat generated from a first electronic device which generates much heat is transmitted to a second electronic device by the second member. Thus, the electronic devices become uniform in temperature, whereby it becomes easier for the first member to transmit heat to the outside of the module. Consequently, a structure which is small in size and which provides excellent cooling effect can be obtained.
- In the aforementioned aspect, electric power may be supplied to the electronic devices through the second member. This makes it possible to economize space for the member for supplying electric power and thus to achieve further size reduction.
- The foregoing and further objects, features and advantages of the invention will become apparent from the following description of a preferred embodiment with reference to the accompanying drawings, wherein:
- FIG. 1 is a front view of the construction of a multichip module having a cooling structure according to one embodiment of the invention;
- FIG. 2 is a plan view of the multichip module shown in FIG. 1 as viewed in a direction indicated by an arrow A; and
- FIG. 3 is a plan view of the
multichip module 20 shown in FIG. 1 as viewed in a direction indicated by an arrow B. - An embodiment of the invention will be described with reference to the drawings. FIG. 1 is a front view of the overall construction of a
multichip module 20 having a cooling structure of the invention. FIG. 2 is a plan view of themultichip module 20 shown in FIG. 1 as viewed in a direction indicated by an arrow A. FIG. 3 is a plan view of themultichip module 20 shown in FIG. 1 as viewed in a direction indicated by an arrow B. - As shown in FIGS. 1 through 3, the
multichip module 20 haselectronic devices electronic devices electronic devices insulated substrate 22 by means of solder. It is assumed herein that the generation of heat by theelectronic device 24 is greater than that by theelectronic device 26. Themodule 20 has anelectrode 32 for supplying electric power to theelectronic devices heat leveling plate 30 that makes theelectronic devices heat radiation plate 40 disposed below theinsulated substrate 22. Also, aninsulator 34 with high thermal conductivity is provided between theelectrode 32 and theheat radiation plate 40. - In general, heat generated by electronic devices is varied depending on drive conditions. While the
electronic device 24 includes an IGBT, a power MOS and a power transistor, theelectronic device 26 includes a diode, for example. - The
heat leveling plate 30 makes the temperatures ofelectronic devices electrode 32. Thus, an electrically conductive material of high thermal conductivity is used as a base material of theheat leveling plate 30. For example, it is possible to use aluminum, copper, molybdenum and the like. - The
heat radiation plate 40 radiates heat to a cooling medium such as air and water and is thus made from a material of high thermal conductivity (e.g. a metal such as aluminum and stainless steel). - The
heat radiation plate 40 may include a flow passage for the cooling medium or form a flow passage for the cooling medium in combination with another member. Fins may be provided in a portion facing the flow passage for the cooling medium to enhance cooling effect. - Next, heat radiation paths of the multichip module constructed as described above will be described. The heat radiation paths of the
multichip module 20 of the embodiment include a first path wherein heat generated from theelectronic devices heat radiation plate 40 to the cooling medium through theinsulated substrate 22, a second path wherein heat generated from theelectronic device 24 flows to the cooling medium through theheat leveling plate 30, theelectronic device 26, theinsulated substrate 22 and theheat radiation plate 40, and a third path wherein heat generated from theelectronic device 24 flows to the cooling medium through theheat leveling plate 30, theelectrode 32, theinsulator 34 and theheat radiation plate 40. The second and third paths both include theheat leveling plate 30. That is, theheat leveling plate 30 distributes heat generated from theelectronic device 24 to theelectronic device 26 and theelectrode 32. Accordingly, theelectronic devices electrode 32 become substantially uniform in temperature. As a result, in comparison with a cooling structure provided only with the first path wherein heat generated from theelectronic device 24 flows from theheat radiation plate 40 to the cooling medium through theinsulated substrate 22, cooling effect of theelectronic device 24 can be enhanced. - In this case, the
electronic device 26 which generates less heat than theelectronic device 24 is supplied with heat from theelectronic device 24 by theheat leveling plate 30. Thus, the temperature ofelectronic device 26 becomes higher than a temperature attained by heat generation of theelectronic device 26 itself. However, the permissible operating temperature of a general semiconductor device is substantially constant (e.g. approximately 150° C.) regardless of its generation of heat. Thus, as long as the temperature of theelectronic device 24 is lower than the permissible operating temperature (as long as theelectronic device 24 is in normal operation), the temperature of theelectronic device 26 does not exceed the permissible operating temperature even if it has received heat generated by theelectronic device 24 through theheat leveling plate 30. - According to the
multichip module 20 described hitherto, theheat leveling plate 30 is used to make theelectronic devices electrode 32 substantially uniform in temperature. Thereby it becomes possible to enhance cooling effect of theelectronic device 24 in comparison with a cooling structure which does not have theheat leveling plate 30, and to reduce the size of the entire module. In addition, since theheat leveling plate 30 also serves as a member for supplying electric power to theelectronic devices electrode 32, additional wire bonding does not need for supplying electric power to theelectronic devices multichip module 20 can also be applied to small-size electronic devices which do not permit wire bonding. Also, it is possible to prevent complication of the multichip module. - It is preferable to maintain coefficient of thermal expansion of the
heat leveling plate 30 and theheat radiation plate 40 in a permissible range at a steady driving state to prevent warp of themutichip module 20. - As shown in FIG. 4, heat generated by the
electronic devices mutichip module 20 along respective paths as indicated by arrows, and the heat is radiated from theheat radiation plate 40 to the outside. Accordingly, it may be difficult to level the temperature of theheat leveling plate 30 and the temperature of theheat radiation plate 40 to be substantially equal to each other. Theheat radiation plate 40 having substantially the same coefficient of thermal expansion as that of theheat leveling plate 30 can prevent warp of themutichip module 20, even if there is a temperature gap between theheat leveling plate 30 and theheat radiation plate 40. It is possible to form theinsulated substrate 22, instead of theheat radiation plate 40, of a material having substantially the same coefficient of thermal expansion as that of theheat leveling plate 30. It is also possible to add another member to the structure, which has the substantially the same thermal expansion as theheat leveling plate 30. - A body of the
heat leveling plate 30 may be formed of a material which has thermal conductivity but which does not have electrical conductivity, for example, a ceramic material such as aluminum nitride and alumina. On a face of theheat leveling plate 30 which is in contact with theelectronic devices electrode 32 may be formed of a material which has electrical conductivity. - In the
multichip module 20 of the aforementioned embodiment, a member for supplying electric power to theelectronic devices heat leveling plate 30. - In the
multichip module 20 of the aforementioned embodiment, theelectronic devices heat leveling plate 30 and theheat radiation plate 40. Theheat leveling plate 30 is provided so as to advance uniformity of temperature among theelectronic devices electrode 32. Therefore, theelectronic devices heat leveling plate 30 which does not face theheat radiation plate 40, for example, to a lateral face or a front face of theheat leveling plate 30. - The invention may be applied to a multichip module having three or more electronic devices. For example, heat generated in a
multichip module 20 b having fourelectronic devices - Although the embodiment of the invention has been described hitherto, the invention is not limited thereto. It goes without saying that the invention can be implemented in various forms as long as they do not depart from the spirit and scope of the invention.
Claims (20)
1. A cooling structure for a multichip module having a plurality of electronic devices which generate different amounts of heat relative to each other, the cooling structure comprising:
a first member which is provided on a first face of the multichip module and which transmits heat generated by the electronic devices to the outside of the module; and
a second member which is provided on a second face that is different from the first face, which is in contact with the electronic devices, and which has thermal conductivity.
2. A cooling structure according to , wherein the first member transmits heat generated by the electronic devices to a cooling medium.
claim 1
3. A cooling structure according to , wherein the cooling medium includes air and water.
claim 2
4. A cooling structure according to , wherein the second member has electrical conductivity and is electrically in contact with the electronic devices.
claim 1
5. A cooling structure according to , wherein the second member comprises an insulating member and a wiring pattern which is electrically in contact with the electronic devices.
claim 2
6. A cooling structure according to , wherein the second member has electrical conductivity and is electrically in contact with the electronic devices.
claim 1
7. A cooling structure according to , wherein the second member comprises an insulating member and a wiring pattern which is electrically in contact with the electronic devices.
claim 2
8. A cooling structure according to , further comprising a third member that supports the electronic devices, wherein a coefficient of thermal expansion of the second member and that of the third member are in a predetermined range at steady driving state of the multichip module.
claim 1
9. A cooling structure according to , wherein the coefficient of thermal expansion of the second member is substantially the same as that of the third member.
claim 8
10. A cooling structure according to , wherein the third member is a substrate on which the electric devices are arranged.
claim 8
11. A cooling structure according to , wherein a coefficient of thermal expansion of the first member and that of the second member are in a predetermined range at steady driving state of the multichip module.
claim 1
12. A cooling structure according to , further comprising a third member that supports the electronic devices, wherein a coefficient of thermal expansion of the second member and that of the third member are in a predetermined range at steady driving state of the multichip module.
claim 4
13. A cooling structure according to , wherein the coefficient of thermal expansion of the second member is substantially the same as that of the third member.
claim 12
14. A cooling structure according to , wherein the third member is a substrate on which the electric devices are arranged.
claim 12
15. A cooling structure according to , wherein a coefficient of thermal expansion of the first member and that of the second member are in a predetermined range at steady driving state of the multichip module.
claim 4
16. A cooling structure according to , further comprising a third member that supports the electronic devices, wherein a coefficient of thermal expansion of the second member and that of the third member are in a predetermined range at steady driving state of the multichip module.
claim 6
17. A cooling structure according to , wherein the coefficient of thermal expansion of the second member is substantially the same as that of the third member.
claim 14
18. A cooling structure according to , wherein the third member is a substrate on which the electric devices are arranged.
claim 14
19. A cooling structure according to , wherein a coefficient of thermal expansion of the first member and that of the second member are in a predetermined range at steady driving state of the multichip module.
claim 6
20. A cooling structure according to , wherein the first and second members are so located to sandwich the electronic devices.
claim 1
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/262,865 US6969907B2 (en) | 1999-12-21 | 2002-10-03 | Cooling structure for multichip module |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11-362058 | 1999-12-21 | ||
JP36205899 | 1999-12-21 | ||
JP2000343677A JP2001244391A (en) | 1999-12-21 | 2000-11-10 | Cooling structure of multichip module |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/262,865 Continuation US6969907B2 (en) | 1999-12-21 | 2002-10-03 | Cooling structure for multichip module |
Publications (1)
Publication Number | Publication Date |
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US20010022395A1 true US20010022395A1 (en) | 2001-09-20 |
Family
ID=26581343
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
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US09/747,517 Abandoned US20010022395A1 (en) | 1999-12-21 | 2000-12-21 | Cooling structure for multichip module |
US10/262,865 Expired - Lifetime US6969907B2 (en) | 1999-12-21 | 2002-10-03 | Cooling structure for multichip module |
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Application Number | Title | Priority Date | Filing Date |
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US10/262,865 Expired - Lifetime US6969907B2 (en) | 1999-12-21 | 2002-10-03 | Cooling structure for multichip module |
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US (2) | US20010022395A1 (en) |
EP (1) | EP1111677B1 (en) |
JP (1) | JP2001244391A (en) |
DE (1) | DE60043767D1 (en) |
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DE10260663B4 (en) * | 2001-12-27 | 2011-02-10 | DENSO CORPORATION, Kariya-shi | Cooling unit and semiconductor device |
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US7612443B1 (en) * | 2003-09-04 | 2009-11-03 | University Of Notre Dame Du Lac | Inter-chip communication |
JP2005158917A (en) * | 2003-11-25 | 2005-06-16 | Sharp Corp | Electronic heat pump apparatus, laser part, optical pickup, and electronic equipment |
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US7462934B2 (en) * | 2006-06-20 | 2008-12-09 | Microsoft Corporation | Integrated heat sink |
US8091614B2 (en) * | 2006-11-10 | 2012-01-10 | International Business Machines Corporation | Air/fluid cooling system |
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US9620473B1 (en) | 2013-01-18 | 2017-04-11 | University Of Notre Dame Du Lac | Quilt packaging system with interdigitated interconnecting nodules for inter-chip alignment |
JP5765357B2 (en) * | 2013-03-22 | 2015-08-19 | カシオ計算機株式会社 | Circuit board structure and electronic device |
JP2015082960A (en) * | 2013-10-24 | 2015-04-27 | 株式会社オートネットワーク技術研究所 | Dc-dc converter device |
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- 2000-11-10 JP JP2000343677A patent/JP2001244391A/en active Pending
- 2000-12-20 EP EP00127971A patent/EP1111677B1/en not_active Expired - Lifetime
- 2000-12-20 DE DE60043767T patent/DE60043767D1/en not_active Expired - Lifetime
- 2000-12-21 US US09/747,517 patent/US20010022395A1/en not_active Abandoned
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2002
- 2002-10-03 US US10/262,865 patent/US6969907B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10260663B4 (en) * | 2001-12-27 | 2011-02-10 | DENSO CORPORATION, Kariya-shi | Cooling unit and semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
US6969907B2 (en) | 2005-11-29 |
EP1111677A2 (en) | 2001-06-27 |
EP1111677B1 (en) | 2010-01-27 |
US20030025197A1 (en) | 2003-02-06 |
JP2001244391A (en) | 2001-09-07 |
DE60043767D1 (en) | 2010-03-18 |
EP1111677A3 (en) | 2003-10-15 |
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