US20010047764A1 - Method and apparatus for improved chemical vapor deposition processes using tunable temperature controlled gas injectors - Google Patents

Method and apparatus for improved chemical vapor deposition processes using tunable temperature controlled gas injectors Download PDF

Info

Publication number
US20010047764A1
US20010047764A1 US09/229,975 US22997599A US2001047764A1 US 20010047764 A1 US20010047764 A1 US 20010047764A1 US 22997599 A US22997599 A US 22997599A US 2001047764 A1 US2001047764 A1 US 2001047764A1
Authority
US
United States
Prior art keywords
wafer
gas
injector
chamber
deposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
US09/229,975
Other versions
US6352594B2 (en
Inventor
Robert C. Cook
Daniel L. Brors
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/909,461 external-priority patent/US6352593B1/en
Priority claimed from US09/228,840 external-priority patent/US6321680B2/en
Priority to US09/229,975 priority Critical patent/US6352594B2/en
Application filed by Individual filed Critical Individual
Assigned to TORREX EQUIPMENT CORPORATION reassignment TORREX EQUIPMENT CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BRORS, DANIEL L., COOK, ROBERT C.
Publication of US20010047764A1 publication Critical patent/US20010047764A1/en
Publication of US6352594B2 publication Critical patent/US6352594B2/en
Application granted granted Critical
Assigned to IDANTA PARTNERS, LTD., AS COLLATERAL AGENT ON BEHALF OF THE SECURED PARTIES reassignment IDANTA PARTNERS, LTD., AS COLLATERAL AGENT ON BEHALF OF THE SECURED PARTIES SECURITY INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: TORREX EQUIPMENT CORPORATION
Assigned to TORREX EQUIPMENT CORPORATION reassignment TORREX EQUIPMENT CORPORATION TERMINATION OF PATENT SECURITY INTEREST Assignors: IDANTA PARTNERS LTD., AS COLLATERAL AGENT ON BEHALF OF THE SECURED PARTIES
Assigned to APPLIED MATERIALS, INC. reassignment APPLIED MATERIALS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: TORREX EQUIPMENT CORPORATION
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67757Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber vertical transfer of a batch of workpieces
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • C23C16/4404Coatings or surface treatment on the inside of the reaction chamber or on parts thereof
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4412Details relating to the exhausts, e.g. pumps, filters, scrubbers, particle traps
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45563Gas nozzles
    • C23C16/4557Heated nozzles
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45563Gas nozzles
    • C23C16/45572Cooled nozzles
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C23C16/4584Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally the substrate being rotated
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/48Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
    • C23C16/481Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation by radiant heating of the substrate
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • C23C16/509Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/54Apparatus specially adapted for continuous coating
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/14Feed and outlet means for the gases; Modifying the flow of the reactive gases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32733Means for moving the material to be treated
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67109Apparatus for thermal treatment mainly by convection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67115Apparatus for thermal treatment mainly by radiation

Definitions

  • This invention relates to a method and associated apparatus for accelerating deposition rates and improving other film properties of a variety of materials deposited via chemical vapor deposition onto semiconductor wafers and other substrates.
  • amorphous, polycrystalline and epitaxial silicon is typically deposited onto silicon wafers by injecting silane or dichlorosilane, with or without other gases, into an enclosed vessel where the temperatures, pressure, gas flow, RF plasma intensity (when used) and wafer motion (when employed) are precisely controlled.
  • Such processes are carried out in a wide variety of commercially available hot wall and cold wall reactors. Some of these process a single wafer at a time while others process a batch of two or more wafers at a time.
  • the operating regime of the process chamber is often chosen to be completely dominated either by the chemical reaction at the wafer surface (surface reaction rate limited) or by mass transport of the reactant to the wafer surface (mass transport limited) to make the overall deposition process least sensitive to variables which are poorly controlled in a given reactor.
  • surface reaction rate limited chemical reaction at the wafer surface
  • mass transport limited mass transport of the reactant to the wafer surface
  • the diffusion rate of the reactant species through the boundary layer that exists between the wafer's surface and the bulk gas, and the relative local concentration of the desired species at the surface have major impact upon the rate of reaction at the surface and hence upon the deposition rate.
  • a tube (or tubes) of high temperature material such as quartz having holes along its length is inserted into the main quartz envelope as shown in FIGS. 1 and 1A.
  • the gas(es) is injected via the tube(s) and directed toward the wafers resulting in an increased velocity of gas(es) across the wafers and a more uniform concentration of the desired reactant(s) in the bulk gas flow up and down the boat load.
  • deposition rates can thereby be improved, this technique has its problems and limitations. Because the injection tube(s) is contained within an isothermal chamber, the injection tube(s) is at the same temperature as the wafers. Thus, unwanted deposition occurs on the tube(s), especially at the injection holes.
  • the localized velocity and pressure at the holes can increase to the point where both excessive deposition at the holes and excessive gas phase reaction within the chamber occurs.
  • the excessive gas phase reaction causes particles to be generated which can fall onto the wafers' surfaces causing defects. Also, the excessive deposition on the injection tube flakes off and these particles can also fall onto the wafers. Thus, the maximum deposition rate which yields acceptable results on the wafers is limited.
  • FIG. 2 In a single wafer cold wall CVD reactor, the technique of rotating the wafer at high speed (500 to 1500 RPM) has been described as shown in FIG. 2.
  • a gas injection means shownhead
  • FIG. 2 a gas injection means (showerhead) directs the reactant gas perpendicularly toward the spinning wafer surface, thereby thinning the boundary layer for the gas flowing radially outwardly from a stagnation point at the wafer center.
  • the deposition rate does increase, but this technique also has its problems and limitations.
  • First is the problem of holding the wafer on the susceptor while rotating at such high speeds and the complexity of design for achieving such high rates of rotation in an evacuated chamber.
  • Second is the problem of heating the wafer uniformly while allowing for the injection of the gas perpendicular to the rotating wafer's surface which limits the maximum temperature.
  • the process gases are injected at relatively close proximity to the wafer(s) via independently temperature controlled injectors for both the case where the reactor is capable of processing one wafer at a time and for the case of a reactor where two or more wafers can be processed simultaneously.
  • the reactors are such that the temperature, pressure, flow of gases, and the application of RF energy (when employed for PECVD processes) can be controlled to produce the desired uniform and consistent process results at accelerated deposition rates.
  • FIG. 1 shows a gas injection system in a prior art vertical furnace
  • FIG. 1A is a detail view of FIG. 1;
  • FIG. 2 illustrates a single wafer CVD reactor with a showerhead injector and rotating susceptor
  • FIG. 3 is a cross-sectional view of a single wafer reaction chamber suited to use with the present invention
  • FIG. 4 is a detailed view of the gas injection system of FIG. 3;
  • FIG. 5 provides additional detail on the gas injection system and wafer rotation system illustrated by the apparatus of FIG. 3;
  • FIG. 6 is a cross-sectional view of a CVD reactor capable of processing more than one wafer simultaneously;
  • FIG. 7 shows the reactor of FIG. 6 with an elongated injector
  • FIG. 8 provides a detailed view of the elongated injector shown in FIG. 7;
  • FIG. 8A shows a detailed view of the liquid cooling of the injector
  • FIG. 9 shows use of individual metering values for tuning gas flow through injectors in a multiple wafer process chamber.
  • FIGS. 10A and 10B show alternative designs for a widened outlet face for the injector.
  • This invention relates to tunable temperature controlled gas injectors which allow improved chemical vapor deposition processes.
  • the disclosure of U.S. patent application Ser. No. 08/909,461 is incorporated herein by reference.
  • the features of this invention are advantageous not only in deposition processes such as CVD and PECVD, but also in etching processes and other processes where gases must efficiently be brought to the wafer surface and/or efficiently removed from surface, such as annealing and degassing processes and other heat treating processes.
  • CVD and/or PECVD processes with the understanding that the features of this invention would apply to reactive ion etching, photo-resist ashing and other processes as well.
  • the greatly accelerated deposition rates realized with this invention are a result of a number of factors influenced by the ability to inject the reactant gas(es) at very high velocities without the above mentioned deleterious side effects found in the prior art.
  • this high velocity gas stream passing across the wafer has the effect of thinning the boundary layer resulting in the faster delivery of the desired reactant(s) to the surface.
  • the very high gas flow provides an enhanced source of fresh gas with highest concentration(s) of the desired species of reactant to the water's surface.
  • this high velocity flow of the gas(es) results in a very low residence time of the gas in the area of interest (that is, over the wafer surface) which sweeps out unwanted reaction by-products resulting in further increase in the relative concentration of the desired species. All these factors contribute to enhanced deposition rates. As a result, deposition rates on the order of 10 to 50 times faster than the prior art can be realized.
  • each layer of the film can be deposited in an amorphous form and crystallize during continued deposition because of the lower energy of the polycrystalline structure. Nucleation of crystallites is most likely to occur by heterogeneous nucleation at the lower silicon-silicon dioxide interface. Crystallization of the amorphous silicon then continues on these initial nuclei, with the crystalline region propagating upward into the film by solid-phase epitaxial growth. When the crystallization rate is less than the deposition rate, only the lower portion of the film crystallizes during deposition, although the crystallization continues during the heat cycle after the deposition itself is terminated by stopping the silane flow.
  • the film can be crystalline near the bottom and amorphous near the top resulting in a very smooth surface texture.
  • Results in the single wafer process chamber of this invention show surface roughness to be five to ten times less than typical for conventional polysilicon depositions carried out in presently available commercial equipment. For example, a mean surface roughness of 6.5 nm has been demonstrated in this reactor for films of 2,500 angstrom thickness deposited at greater than 2,000 angstroms per minute at a temperature above 650 C and at a pressure of 250 millitorr.
  • the CVD films produced with this invention are of higher quality in terms of a reduced incorporation of unwanted impurities within the film.
  • All CVD reactors have some level of impurity molecules, such as water vapor, oxygen, nitrogen, etc., within the chamber. This is particularly true of cold wall reactors for impurities such as H 2 O (moisture) and others which tend to adhere to the cooled chamber walls and are released from the walls when the chamber is evacuated and when the interior surface of the walls are warmed from the heat of the wafer, the susceptor, and other heated surfaces within the chamber's interior.
  • H 2 O moisture
  • the levels of such unwanted molecules can be reduced through heating of the chamber's walls to elevated temperatures (above 100 C) while evacuating the chamber with turbo or cryo pumps to very low pressures on the order of 10E-6 to 10E-7 Torr while alternating such evacuation cycles with high flow purge cycles of impurity free inert gas such as nitrogen, these procedures are costly, time consuming, and there still remains some level of such unwanted impurities.
  • the amount of incorporation of unwanted impurities in CVD films is proportional to the partial pressure of such impurity molecules, the rate of reaction or entrapment of the impurities as the desired film is deposited, and the deposition time.
  • the reduction of impurities in the films produced with this invention is due to (a) the reduced partial pressure of the impurities in the gas stream above the wafer's surface resulting from the increased concentration of the desired reactant species in the gas stream, (b) the enhanced rate of removal of the unwanted impurities due to the very high gas velocities and resultant low residence time, and (c) the greatly reduced process time resulting from the high deposition rates that are achieved.
  • FIG. 3 shows a cross-section view of the single wafer reaction chamber described in U.S. Pat. No. 5,551,985.
  • the chamber provides: (a) a method of heating a wafer uniformly in a cold wall chamber to minimize wall deposits for ease of cleaning (e.g.
  • the gas injector ( 150 ) extends inward toward the chamber's center such that the outlet (or outlets) of the gas injector is in relatively close proximity to the rotating susceptor ( 74 ) and hence the wafer's ( 12 ) edge.
  • One embodiment of the injector as shown in FIG. 4 has multiple outlets and is designed such that both the rate of flow through each outlet and the direction of flow out of each outlet can be varied along the length of the injector's outlet side which faces the rotating susceptor and the wafer.
  • this chamber design has a thermal diffuser plate ( 54 ) (FIG. 4) that is generally parallel to the wafer surface and is held in close proximity (about 16.5 mm in the prototype) above the wafer. This has the effect of containing the flowing gas(es) within a volume having a relatively small cross-sectional area in the direction of the flow, further enhancing the gas velocity above the wafer surface.
  • the effective average gas velocity was in the range of approximately 100 to 200 cm/sec equaling a gas residence time above an 8 inch wafer of about 100 to 200 milli-seconds.
  • this very high velocity gas flowing generally in parallel to the surface is believed to be, in part, responsible for the low quantity of particles on the wafers processed in this fashion.
  • the use of the thermal diffuser plate ( 54 ) facing the wafer surface made from materials such as graphite or silicon carbide that promote very high adhesion of most common CVD deposits results in a great reduction of the flaking off of particles which can land on the wafer surface and is most a major reason for the decreased particle contamination.
  • a small flow inert gas e.g. argon
  • the RF energy is coupled to either the thermal diffusing plate above the wafer, to the thermal heat block which surrounds the susceptor, or to the susceptor itself via a rotating RF power feedthrough to produce the plasma.
  • FIG. 6 shows a cross-sectional top view of a small batch cold wall reactor of the type more fully described in U.S. patent application Ser. No. 08/909,461, which is capable of processing more than one wafer simultaneously.
  • This chamber provides: (a) the ability to process one or more wafers at a time; (b) a method of heating the wafers uniformly in a cold wall chamber to minimize wall deposits for ease of cleaning (e.g.
  • the gas(es) is injected toward the wafers via a temperature controlled injection plate which bolts onto and is vacuum sealed to one of the shorter width sides of the eight sided prototype chamber.
  • the injection plate may be elongated within the chamber in the direction toward the wafers as shown in FIG. 7.
  • FIG. 8 shows one type of the injector design which allows for the elongation of the injector toward the wafers such that the outlet face of the injector can be held in close proximity to the wafers while at the same time permitting the flow of liquid through passages in the injector to maintain the injector at a uniform and constant temperature.
  • a low temperature typically 25 to 100 C
  • the wafers are maintained at a temperature in excess of 600 C for the deposition of polysilicon. This reduced injector temperature prevents the deposition along the outlet face and at the outlets of the injector.
  • the temperature of the injector can be maintained at higher temperatures (e.g. 100 C or above) to prevent the condensation of the vapor in and on the injector while still preventing the deposition on the injector or at its outlets.
  • FIG. 8 shows such an injector which allows for the separation of gases to preclude premature reaction of, for example, oxidizers and reducers before they enter the reaction chamber.
  • gas channels are milled from the atmospheric side of the injector toward the outlet face.
  • a series of holes are drilled from the outlet face through to the milled channels (in this depiction, the hole spacing is shown to differ for the two channels which may be desired for some processes).
  • Plates are welded to the input side of the injector for gas tight sealing of the channels and are tapped to accept gas fittings.
  • holes are drilled at angles such that they intersect to form a continuous passage as more clearly shown in FIG. 8A.
  • Bosses are welded at the ends of the uppermost and bottom most holes and tapped to accept fluid fittings.
  • Cover plates are welded over the outside intersecting ends of the holes to produce the leak tight passage way.
  • such alternative designs can employ, for example: (a) a variation of the outlet hole size along the vertical axis of the injector's outlet face; (b) a variation of the spacing of the outlet holes drilled into the axis of the outlet face; (c) the use of a multitude of individual holes drilled into the injector from the outside to provide the variation of gas flow along the vertical axis via the use of individual metering valves or mass flow controllers as shown in FIG. 9; or (d) a variation of the type of tunable injector of U.S. Pat. No. 5,551,985 where the flow from each outlet can be adjusted and/or the injection angle from each outlet can be adjusted along the vertical axis.
  • FIGS. 10A and 10B Another type of injector which provides for the horizontal widening of the outlet near the wafers is shown in FIGS. 10A and 10B.
  • the widened outlet face can be bolted onto the injector body from the inside of the chamber as in FIG. 10A or the widened face and the elongated body can be fashioned from a single piece of material and o-ring sealed to the injector's mounting plate with the liquid cooling inlet and outlet pipes protruding through holes in the mounting plate for more efficient cooling of the widened face as in FIG. 10B.
  • the two side heater lamps that face toward the widened injector can be removed or disconnected to reduce heat transfer to the injector.

Abstract

A method and apparatus for improved CVD process results uses tunable temperature controlled gas injectors. The design is suited to single wafer and multiple wafer CVD process chambers.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • This invention relates to a method and associated apparatus for accelerating deposition rates and improving other film properties of a variety of materials deposited via chemical vapor deposition onto semiconductor wafers and other substrates. [0002]
  • 2. Brief Description of the Prior Art [0003]
  • There are a large number of CVD processes that are performed inside of enclosed chambers wherein the pressure, temperature, composition of gases and other factors are controlled to produce the desired thin film deposition of various materials onto substrates such as semiconductor wafers and flat panel displays. For convenience the term wafer(s) will be used with the understanding that the following would apply to the manufacture of flat panel displays and other types of substrates. [0004]
  • For instance, amorphous, polycrystalline and epitaxial silicon is typically deposited onto silicon wafers by injecting silane or dichlorosilane, with or without other gases, into an enclosed vessel where the temperatures, pressure, gas flow, RF plasma intensity (when used) and wafer motion (when employed) are precisely controlled. Such processes are carried out in a wide variety of commercially available hot wall and cold wall reactors. Some of these process a single wafer at a time while others process a batch of two or more wafers at a time. [0005]
  • To obtain the best thickness uniformity, the operating regime of the process chamber is often chosen to be completely dominated either by the chemical reaction at the wafer surface (surface reaction rate limited) or by mass transport of the reactant to the wafer surface (mass transport limited) to make the overall deposition process least sensitive to variables which are poorly controlled in a given reactor. However, other factors such as the need for high deposition rate, high wafer capacity, or small grain size sometimes make operation near the transition region (between surface reaction-rate limited and mass transport limited) desirable. In the case of operation in either the mass transport limited regime or the transition region for a given temperature and pressure, the diffusion rate of the reactant species through the boundary layer that exists between the wafer's surface and the bulk gas, and the relative local concentration of the desired species at the surface, have major impact upon the rate of reaction at the surface and hence upon the deposition rate. [0006]
  • In the prior art, methods to increase the velocity of the gas over the wafer surface have been employed to effectively decrease the thickness of the boundary layer and increase the relative concentration of the desired species at the surface for a given temperature, pressure and relative concentration of the desired species in the bulk gas. [0007]
  • For example, in a batch reactor such as a convention vertical furnace, a tube (or tubes) of high temperature material such as quartz having holes along its length is inserted into the main quartz envelope as shown in FIGS. 1 and 1A. The gas(es) is injected via the tube(s) and directed toward the wafers resulting in an increased velocity of gas(es) across the wafers and a more uniform concentration of the desired reactant(s) in the bulk gas flow up and down the boat load. Although deposition rates can thereby be improved, this technique has its problems and limitations. Because the injection tube(s) is contained within an isothermal chamber, the injection tube(s) is at the same temperature as the wafers. Thus, unwanted deposition occurs on the tube(s), especially at the injection holes. As the gas flow rate (velocity) is increased to achieve higher deposition rates, the localized velocity and pressure at the holes can increase to the point where both excessive deposition at the holes and excessive gas phase reaction within the chamber occurs. The excessive gas phase reaction causes particles to be generated which can fall onto the wafers' surfaces causing defects. Also, the excessive deposition on the injection tube flakes off and these particles can also fall onto the wafers. Thus, the maximum deposition rate which yields acceptable results on the wafers is limited. [0008]
  • In a single wafer cold wall CVD reactor, the technique of rotating the wafer at high speed (500 to 1500 RPM) has been described as shown in FIG. 2. Here, a gas injection means (showerhead) directs the reactant gas perpendicularly toward the spinning wafer surface, thereby thinning the boundary layer for the gas flowing radially outwardly from a stagnation point at the wafer center. Again the deposition rate does increase, but this technique also has its problems and limitations. First is the problem of holding the wafer on the susceptor while rotating at such high speeds and the complexity of design for achieving such high rates of rotation in an evacuated chamber. Second is the problem of heating the wafer uniformly while allowing for the injection of the gas perpendicular to the rotating wafer's surface which limits the maximum temperature. In addition, there is the problem of minimizing the gas turbulence to achieve the laminar type gas flow toward the wafer as required by this technique to achieve the desired uniformity. This can limit the maximum flow rate and hence the deposition rate. [0009]
  • SUMMARY OF THE INVENTION
  • An improved method for the injection of high velocity reactant gas(es) and associated apparatus are disclosed which overcomes problems in the prior art. In accordance with the present invention, the process gases are injected at relatively close proximity to the wafer(s) via independently temperature controlled injectors for both the case where the reactor is capable of processing one wafer at a time and for the case of a reactor where two or more wafers can be processed simultaneously. In both cases the reactors are such that the temperature, pressure, flow of gases, and the application of RF energy (when employed for PECVD processes) can be controlled to produce the desired uniform and consistent process results at accelerated deposition rates.[0010]
  • IN THE DRAWING
  • FIG. 1 shows a gas injection system in a prior art vertical furnace; [0011]
  • FIG. 1A is a detail view of FIG. 1; [0012]
  • FIG. 2 illustrates a single wafer CVD reactor with a showerhead injector and rotating susceptor; [0013]
  • FIG. 3 is a cross-sectional view of a single wafer reaction chamber suited to use with the present invention; [0014]
  • FIG. 4 is a detailed view of the gas injection system of FIG. 3; [0015]
  • FIG. 5 provides additional detail on the gas injection system and wafer rotation system illustrated by the apparatus of FIG. 3; [0016]
  • FIG. 6 is a cross-sectional view of a CVD reactor capable of processing more than one wafer simultaneously; [0017]
  • FIG. 7 shows the reactor of FIG. 6 with an elongated injector; [0018]
  • FIG. 8 provides a detailed view of the elongated injector shown in FIG. 7; [0019]
  • FIG. 8A shows a detailed view of the liquid cooling of the injector; [0020]
  • FIG. 9 shows use of individual metering values for tuning gas flow through injectors in a multiple wafer process chamber; and [0021]
  • FIGS. 10A and 10B show alternative designs for a widened outlet face for the injector.[0022]
  • DESCRIPTION OF THE PREFERRED EMBODIMENT
  • This invention relates to tunable temperature controlled gas injectors which allow improved chemical vapor deposition processes. The disclosure of U.S. patent application Ser. No. 08/909,461 is incorporated herein by reference. [0023]
  • The features of this invention are advantageous not only in deposition processes such as CVD and PECVD, but also in etching processes and other processes where gases must efficiently be brought to the wafer surface and/or efficiently removed from surface, such as annealing and degassing processes and other heat treating processes. For convenience, the following will refer to CVD and/or PECVD processes with the understanding that the features of this invention would apply to reactive ion etching, photo-resist ashing and other processes as well. In addition to the enhanced CVD and PECVD deposition rates, other advantageous properties of many of the films so deposited include: smoother surface texture of the films, enhanced conformity of the films over the device structures at lower pressures and at the higher deposition rates, enhanced film purity via reduced concentration of unwanted impurities, and reduction of particles generated that end up on the wafer surface. [0024]
  • The greatly accelerated deposition rates realized with this invention are a result of a number of factors influenced by the ability to inject the reactant gas(es) at very high velocities without the above mentioned deleterious side effects found in the prior art. First, this high velocity gas stream passing across the wafer has the effect of thinning the boundary layer resulting in the faster delivery of the desired reactant(s) to the surface. Second, the very high gas flow provides an enhanced source of fresh gas with highest concentration(s) of the desired species of reactant to the water's surface. Third, this high velocity flow of the gas(es) results in a very low residence time of the gas in the area of interest (that is, over the wafer surface) which sweeps out unwanted reaction by-products resulting in further increase in the relative concentration of the desired species. All these factors contribute to enhanced deposition rates. As a result, deposition rates on the order of 10 to 50 times faster than the prior art can be realized. [0025]
  • The very high rates of deposition enabled by this invention at relatively low overall chamber pressures (e.g. 3,000 Angstroms/minute for polysilicon at 250 millitorr at typical process temperatures) moves the reaction into the regime where the deposition rate exceeds the crystallization rate. CVD depositions of, for example, polysilicon, in this regime can result in a much smoother surface, caused by the deposited film having a two layered structure with amorphous silicon at the top. It is well known in the art that for the CVD deposition of silicon at a given pressure, there is a transition temperature above which a polycrystalline structure develops in each layer as that layer is deposited, and the atoms are unlikely to continue rearranging after they have been covered by other silicon atoms. However, in films deposited slightly below the transition temperature, each layer of the film can be deposited in an amorphous form and crystallize during continued deposition because of the lower energy of the polycrystalline structure. Nucleation of crystallites is most likely to occur by heterogeneous nucleation at the lower silicon-silicon dioxide interface. Crystallization of the amorphous silicon then continues on these initial nuclei, with the crystalline region propagating upward into the film by solid-phase epitaxial growth. When the crystallization rate is less than the deposition rate, only the lower portion of the film crystallizes during deposition, although the crystallization continues during the heat cycle after the deposition itself is terminated by stopping the silane flow. Thus, the film can be crystalline near the bottom and amorphous near the top resulting in a very smooth surface texture. Results in the single wafer process chamber of this invention show surface roughness to be five to ten times less than typical for conventional polysilicon depositions carried out in presently available commercial equipment. For example, a mean surface roughness of 6.5 nm has been demonstrated in this reactor for films of 2,500 angstrom thickness deposited at greater than 2,000 angstroms per minute at a temperature above 650 C and at a pressure of 250 millitorr. [0026]
  • Since these very high deposition rates can be realized at very low pressures it has the effect of enhancing the deposited films' conformality over the wafer's topography. This is a result of the ability to provide a higher concentration of the desired reactant(s) on all surfaces of the wafer including sidewalls and bottoms of vias. The accelerated deposition rate achievable via this invention at reduced pressures results in an effective increase of the mean free path in the gas phase which allows more penetration of the reactant to the bottom and along the walls of device features. The very low gas residence times achieved via this invention and the resultant sweeping of unwanted reaction byproducts (e.g. hydrogen) out of the gas phase has the effect of increasing the diffusion of the desired silicon producing species in both the gas phase and on the surface which enhances the deposited films while, at the same time, providing more absorption sites available for the desired silicon producing species such as SiH[0027] 4 and SiH2 since less of the absorption sites are occupied by the unwanted by-products, thereby increasing the rate of deposition on all surfaces. SEM photomicrographs of polysilicon depositions (2,000 angstroms per minute at 250 milli-torr and 650 C) in the single wafer chamber of this invention into 0.25 micron vias exhibit very uniform thickness conforming to the vias' walls and bottom without cusping at the top edges of the vias.
  • In addition, the CVD films produced with this invention are of higher quality in terms of a reduced incorporation of unwanted impurities within the film. All CVD reactors have some level of impurity molecules, such as water vapor, oxygen, nitrogen, etc., within the chamber. This is particularly true of cold wall reactors for impurities such as H[0028] 2O (moisture) and others which tend to adhere to the cooled chamber walls and are released from the walls when the chamber is evacuated and when the interior surface of the walls are warmed from the heat of the wafer, the susceptor, and other heated surfaces within the chamber's interior. Although the levels of such unwanted molecules can be reduced through heating of the chamber's walls to elevated temperatures (above 100 C) while evacuating the chamber with turbo or cryo pumps to very low pressures on the order of 10E-6 to 10E-7 Torr while alternating such evacuation cycles with high flow purge cycles of impurity free inert gas such as nitrogen, these procedures are costly, time consuming, and there still remains some level of such unwanted impurities. The amount of incorporation of unwanted impurities in CVD films is proportional to the partial pressure of such impurity molecules, the rate of reaction or entrapment of the impurities as the desired film is deposited, and the deposition time. The reduction of impurities in the films produced with this invention is due to (a) the reduced partial pressure of the impurities in the gas stream above the wafer's surface resulting from the increased concentration of the desired reactant species in the gas stream, (b) the enhanced rate of removal of the unwanted impurities due to the very high gas velocities and resultant low residence time, and (c) the greatly reduced process time resulting from the high deposition rates that are achieved.
  • FIG. 3 shows a cross-section view of the single wafer reaction chamber described in U.S. Pat. No. 5,551,985. The chamber provides: (a) a method of heating a wafer uniformly in a cold wall chamber to minimize wall deposits for ease of cleaning (e.g. via plasma enhanced reaction of NF[0029] 3, other such etchant gases, or via the injection of etchant gases such as HCl at high temperatures without plasma); (b) the positioning of a temperature controlled gas injector at close proximity to the subject wafer within the chamber to produce the desired localized and controlled high velocity gas flow; (c) the ability to rotate the wafer while the gas is being swept into the chamber on one side and exhausted out the other side, which causes a near mono-directional flow path which, without rotation, would result in a very non-uniform deposition across the surface topography of the wafer; (d) the ability to induce a very uniform plasma (glow discharge) in close proximity to the wafer surface for PECVD processing; (e) the capability for depositing CVD films on one side of the wafer and not the other; and (f) the ability to load and unload wafers via robotics permitting automatic operation and the capability for clustering one or more such chambers around a central transfer chamber for enhanced process control, higher throughputs, the minimization of particles, and the capability for sequential processing.
  • In FIG. 4, the gas injector ([0030] 150) extends inward toward the chamber's center such that the outlet (or outlets) of the gas injector is in relatively close proximity to the rotating susceptor (74) and hence the wafer's (12) edge. One embodiment of the injector as shown in FIG. 4 has multiple outlets and is designed such that both the rate of flow through each outlet and the direction of flow out of each outlet can be varied along the length of the injector's outlet side which faces the rotating susceptor and the wafer. Once the desired flow rates and angles are determined for a particular process and set of conditions, such a tunable injector can be replaced with less expensive ones having a simpler non-tunable design.
  • In addition to the injector which dispenses the gas in close proximity to the rotating wafer (see FIG. 5), this chamber design has a thermal diffuser plate ([0031] 54) (FIG. 4) that is generally parallel to the wafer surface and is held in close proximity (about 16.5 mm in the prototype) above the wafer. This has the effect of containing the flowing gas(es) within a volume having a relatively small cross-sectional area in the direction of the flow, further enhancing the gas velocity above the wafer surface. For polysilicon depositions in the prototype having deposition rates of from 1,500 to over 3,000 angstroms per minute at pressures of about 200 milli-Torr, it is calculated that the effective average gas velocity was in the range of approximately 100 to 200 cm/sec equaling a gas residence time above an 8 inch wafer of about 100 to 200 milli-seconds.
  • In addition to supplying an enhanced concentration of the desired reactant(s) to the surface and the accelerated sweeping away of unwanted reaction by-products and impurity molecules, this very high velocity gas flowing generally in parallel to the surface is believed to be, in part, responsible for the low quantity of particles on the wafers processed in this fashion. Of course, the use of the thermal diffuser plate ([0032] 54) facing the wafer surface made from materials such as graphite or silicon carbide that promote very high adhesion of most common CVD deposits results in a great reduction of the flaking off of particles which can land on the wafer surface and is most a major reason for the decreased particle contamination. Also contributing to the reduced particulates is the injection of a small flow in inert gas (e.g. argon) into the space between the quartz window and the thermal diffuser plate which prevents deposition on the window which would otherwise easily flake off due to the relatively poor adhesion of such CVD materials on quartz surfaces.
  • The same type of enhanced CVD deposition rates will occur for plasma enhanced CVD (PECVD) processes with this chamber design. In this case, the RF energy is coupled to either the thermal diffusing plate above the wafer, to the thermal heat block which surrounds the susceptor, or to the susceptor itself via a rotating RF power feedthrough to produce the plasma. [0033]
  • FIG. 6 shows a cross-sectional top view of a small batch cold wall reactor of the type more fully described in U.S. patent application Ser. No. 08/909,461, which is capable of processing more than one wafer simultaneously. This chamber provides: (a) the ability to process one or more wafers at a time; (b) a method of heating the wafers uniformly in a cold wall chamber to minimize wall deposits for ease of cleaning (e.g. via plasma enhanced reaction of NF[0034] 3, other such etchant gases, or via the injection of etchant gases such as HCl at high temperatures without plasma); (c) the positioning of a temperature controlled gas injector at relatively close proximity to the subject wafers within the chamber to produce the desired and controlled localized high velocity gas flow; (d) the ability to rotate the wafers while the gas is being swept into the chamber on one side and exhausted out the other side which causes a near mono-directional flow which, without rotation, would result in a very non uniform deposition across the surface topography of the wafers; (e) the ability to induce a very uniform plasma (glow discharge) in close proximity to the wafers' surfaces for PECVD processing (see the U.S. non-provisional patent application filed Jan. 12, 1999, titled “Vertical Plasma Enhanced Process Apparatus and Method” based on U.S. Provisional Patent Application No. 60/071,571, the disclosures of both are incorporated herein by reference); (f) the capability to deposit CVD films on one side of the wafer and not the other and the ability to exclude edge deposition around the periphery of the wafer which is desired for certain films such as tungsten, and (g) the ability to load and unload wafers via robotics permitting automatic operation and the capability for clustering one or more such chambers around a central transfer chamber or enhanced process control, higher throughputs, the minimization of particles and the capability for sequential processing.
  • Referring to FIG. 6, the gas(es) is injected toward the wafers via a temperature controlled injection plate which bolts onto and is vacuum sealed to one of the shorter width sides of the eight sided prototype chamber. The injection plate may be elongated within the chamber in the direction toward the wafers as shown in FIG. 7. [0035]
  • FIG. 8 shows one type of the injector design which allows for the elongation of the injector toward the wafers such that the outlet face of the injector can be held in close proximity to the wafers while at the same time permitting the flow of liquid through passages in the injector to maintain the injector at a uniform and constant temperature. Usually, for gaseous sources such as silane, it is desired to maintain the injector at a low temperature (typically 25 to 100 C) while the wafers are maintained at a temperature in excess of 600 C for the deposition of polysilicon. This reduced injector temperature prevents the deposition along the outlet face and at the outlets of the injector. For CVD depositions using a vaporized liquid precursor (such as TEOS), the temperature of the injector can be maintained at higher temperatures (e.g. 100 C or above) to prevent the condensation of the vapor in and on the injector while still preventing the deposition on the injector or at its outlets. FIG. 8 shows such an injector which allows for the separation of gases to preclude premature reaction of, for example, oxidizers and reducers before they enter the reaction chamber. In this case, gas channels are milled from the atmospheric side of the injector toward the outlet face. A series of holes are drilled from the outlet face through to the milled channels (in this depiction, the hole spacing is shown to differ for the two channels which may be desired for some processes). Plates are welded to the input side of the injector for gas tight sealing of the channels and are tapped to accept gas fittings. To provide the flow of temperature controlled liquid through the injector, holes are drilled at angles such that they intersect to form a continuous passage as more clearly shown in FIG. 8A. Bosses are welded at the ends of the uppermost and bottom most holes and tapped to accept fluid fittings. Cover plates are welded over the outside intersecting ends of the holes to produce the leak tight passage way. [0036]
  • Alternative designs of high velocity gas injectors adaptable to the reactor described in U.S. patent application Ser. No. 08/909,461 can be such that the quantity of gas(es) flowing out of the injector's face can be varied along the vertical axis (up and down the load of wafers) to overcome any non-symmetrical gas flow dynamics in the vicinity of the upper and lower regions of the batch of wafers to achieve desired velocities and concentration of reactant(s) above the surfaces of the individual wafers in the load for uniform process results on the individual wafers. To achieve this, such alternative designs can employ, for example: (a) a variation of the outlet hole size along the vertical axis of the injector's outlet face; (b) a variation of the spacing of the outlet holes drilled into the axis of the outlet face; (c) the use of a multitude of individual holes drilled into the injector from the outside to provide the variation of gas flow along the vertical axis via the use of individual metering valves or mass flow controllers as shown in FIG. 9; or (d) a variation of the type of tunable injector of U.S. Pat. No. 5,551,985 where the flow from each outlet can be adjusted and/or the injection angle from each outlet can be adjusted along the vertical axis. Another type of injector which provides for the horizontal widening of the outlet near the wafers is shown in FIGS. 10A and 10B. Here, the widened outlet face can be bolted onto the injector body from the inside of the chamber as in FIG. 10A or the widened face and the elongated body can be fashioned from a single piece of material and o-ring sealed to the injector's mounting plate with the liquid cooling inlet and outlet pipes protruding through holes in the mounting plate for more efficient cooling of the widened face as in FIG. 10B. If necessary, the two side heater lamps that face toward the widened injector can be removed or disconnected to reduce heat transfer to the injector. [0037]
  • While particular embodiments of the present invention have been shown and described, it will be obvious to those skilled in the art that changes and modifications may be made without departing from this invention in its broader aspects and, therefore, the appended claims are to encompass within their scope all such changes and modifications as fall within the true spirit and scope of this invention.[0038]

Claims (1)

What is claimed is:
1. A CVD reactor comprising:
(a) a chamber;
(b) means for positioning a wafer boat in the chamber, the wafer boat capable of holding a plurality of wafers in a vertical stack arrangement;
(c) means for rotating the wafer boat; and
(d) means for introducing a reactant gas mixture to the chamber, the introduction means including a gas injector that is temperature controlled with circulation of liquid through the body of the injector; and
(e) an exhaust manifold for exhausting the gas mixture from the first chamber.
US09/229,975 1997-08-11 1999-01-14 Method and apparatus for improved chemical vapor deposition processes using tunable temperature controlled gas injectors Expired - Lifetime US6352594B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US09/229,975 US6352594B2 (en) 1997-08-11 1999-01-14 Method and apparatus for improved chemical vapor deposition processes using tunable temperature controlled gas injectors

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US08/909,461 US6352593B1 (en) 1997-08-11 1997-08-11 Mini-batch process chamber
US7157198P 1998-01-15 1998-01-15
US7157098P 1998-01-15 1998-01-15
US09/228,840 US6321680B2 (en) 1997-08-11 1999-01-12 Vertical plasma enhanced process apparatus and method
US09/229,975 US6352594B2 (en) 1997-08-11 1999-01-14 Method and apparatus for improved chemical vapor deposition processes using tunable temperature controlled gas injectors

Related Parent Applications (2)

Application Number Title Priority Date Filing Date
US08/909,461 Continuation-In-Part US6352593B1 (en) 1997-08-11 1997-08-11 Mini-batch process chamber
US09/228,840 Continuation-In-Part US6321680B2 (en) 1997-08-11 1999-01-12 Vertical plasma enhanced process apparatus and method

Publications (2)

Publication Number Publication Date
US20010047764A1 true US20010047764A1 (en) 2001-12-06
US6352594B2 US6352594B2 (en) 2002-03-05

Family

ID=27490914

Family Applications (1)

Application Number Title Priority Date Filing Date
US09/229,975 Expired - Lifetime US6352594B2 (en) 1997-08-11 1999-01-14 Method and apparatus for improved chemical vapor deposition processes using tunable temperature controlled gas injectors

Country Status (1)

Country Link
US (1) US6352594B2 (en)

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030047138A1 (en) * 2001-09-11 2003-03-13 Ceramoptec Industries, Inc. Spiral gas flow plasma reactor
EP1522090A2 (en) * 2002-07-15 2005-04-13 Aviza Technology, Inc. Thermal processing system and configurable vertical chamber
US20060223315A1 (en) * 2005-04-05 2006-10-05 Applied Materials, Inc. Thermal oxidation of silicon using ozone
US20070013845A1 (en) * 2005-07-14 2007-01-18 Seiko Epson Corporation Manufacturing apparatus for oriented film, liquid crystal device and electronic device
US20070084406A1 (en) * 2005-10-13 2007-04-19 Joseph Yudovsky Reaction chamber with opposing pockets for gas injection and exhaust
US20070084408A1 (en) * 2005-10-13 2007-04-19 Applied Materials, Inc. Batch processing chamber with diffuser plate and injector assembly
WO2009082608A1 (en) 2007-12-20 2009-07-02 S.O.I.Tec Silicon On Insulator Technologies Apparatus for delivering precursor gases to an epitaxial growth substrate
US20130014895A1 (en) * 2011-07-08 2013-01-17 Tokyo Electron Limited Substrate processing apparatus
US20150167161A1 (en) * 2012-06-07 2015-06-18 Soitec Gas injection components for deposition systems and related methods
JP2016516293A (en) * 2013-04-08 2016-06-02 ユ−ジーン テクノロジー カンパニー.リミテッド Substrate processing equipment
US20160244876A1 (en) * 2013-02-23 2016-08-25 Hermes-Epitek Corporation Gas injector and cover plate assembly for semiconductor equipment
US9875895B2 (en) * 2011-11-17 2018-01-23 Eugene Technology Co., Ltd. Substrate processing apparatus including exhaust ports and substrate processing method
US20180105933A1 (en) * 2015-04-21 2018-04-19 Eugene Technology Co., Ltd. Substrate processing apparatus and method for cleaning chamber
US20190070639A1 (en) * 2017-09-07 2019-03-07 Applied Materials, Inc. Automatic cleaning machine for cleaning process kits
US11170990B2 (en) * 2019-02-19 2021-11-09 Applied Materials, Inc. Polysilicon liners
CN114207767A (en) * 2019-06-07 2022-03-18 朗姆研究公司 Independently adjustable flow conductance in multi-station semiconductor processing
US11342164B2 (en) * 2011-12-16 2022-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. High density plasma chemical vapor deposition chamber and method of using
US20230070825A1 (en) * 2021-04-19 2023-03-09 Innoscience (Suzhou) Technology Co., Ltd. Laminar flow mocvd apparatus for iii-nitride films

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050188923A1 (en) * 1997-08-11 2005-09-01 Cook Robert C. Substrate carrier for parallel wafer processing reactor
WO2003003414A2 (en) * 2001-06-29 2003-01-09 Tokyo Electron Limited Directed gas injection apparatus for semiconductor processing
US6962732B2 (en) * 2001-08-23 2005-11-08 Applied Materials, Inc. Process for controlling thin film uniformity and products produced thereby
KR100443121B1 (en) * 2001-11-29 2004-08-04 삼성전자주식회사 Method for processing of semiconductor and apparatus for processing of semiconductor
US7067439B2 (en) * 2002-06-14 2006-06-27 Applied Materials, Inc. ALD metal oxide deposition process using direct oxidation
US6656284B1 (en) * 2002-06-28 2003-12-02 Jusung Engineering Co., Ltd. Semiconductor device manufacturing apparatus having rotatable gas injector and thin film deposition method using the same
US20070243317A1 (en) * 2002-07-15 2007-10-18 Du Bois Dale R Thermal Processing System and Configurable Vertical Chamber
KR100515052B1 (en) * 2002-07-18 2005-09-14 삼성전자주식회사 semiconductor manufacturing apparatus for depositing a material on semiconductor substrate
US7199061B2 (en) * 2003-04-21 2007-04-03 Applied Materials, Inc. Pecvd silicon oxide thin film deposition
US8082932B2 (en) * 2004-03-12 2011-12-27 Applied Materials, Inc. Single side workpiece processing
US8119210B2 (en) * 2004-05-21 2012-02-21 Applied Materials, Inc. Formation of a silicon oxynitride layer on a high-k dielectric material
US20060060920A1 (en) * 2004-09-17 2006-03-23 Applied Materials, Inc. Poly-silicon-germanium gate stack and method for forming the same
US20060084283A1 (en) * 2004-10-20 2006-04-20 Paranjpe Ajit P Low temperature sin deposition methods
KR100631972B1 (en) * 2005-02-28 2006-10-11 삼성전기주식회사 Method for manufacturing superlattice semiconductor structure using chemical vapor deposition process
US8088223B2 (en) 2005-03-10 2012-01-03 Asm America, Inc. System for control of gas injectors
US7402534B2 (en) * 2005-08-26 2008-07-22 Applied Materials, Inc. Pretreatment processes within a batch ALD reactor
US8075953B2 (en) * 2005-09-15 2011-12-13 Hiap L. Ong and Kyoritsu Optronics Co., Ltd Thin organic alignment layers with a batch process for liquid crystal displays
US7955648B2 (en) * 2005-09-15 2011-06-07 Hiap L. Ong and Kyoritsu Optronics, Co., Ltd Thin alignment layers for liquid crystal displays
US20070065578A1 (en) * 2005-09-21 2007-03-22 Applied Materials, Inc. Treatment processes for a batch ALD reactor
US20070181062A1 (en) * 2006-02-07 2007-08-09 Kim Il-Kyoung Semiconductor device manufacturing apparatus including temperature measuring unit
US20070207625A1 (en) * 2006-03-06 2007-09-06 Ravinder Aggarwal Semiconductor processing apparatus with multiple exhaust paths
US7678710B2 (en) * 2006-03-09 2010-03-16 Applied Materials, Inc. Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
US7837838B2 (en) * 2006-03-09 2010-11-23 Applied Materials, Inc. Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus
US7645710B2 (en) * 2006-03-09 2010-01-12 Applied Materials, Inc. Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
US7902018B2 (en) * 2006-09-26 2011-03-08 Applied Materials, Inc. Fluorine plasma treatment of high-k gate stack for defect passivation
US7976634B2 (en) * 2006-11-21 2011-07-12 Applied Materials, Inc. Independent radiant gas preheating for precursor disassociation control and gas reaction kinetics in low temperature CVD systems
US8067061B2 (en) * 2007-10-25 2011-11-29 Asm America, Inc. Reaction apparatus having multiple adjustable exhaust ports
US8721836B2 (en) * 2008-04-22 2014-05-13 Micron Technology, Inc. Plasma processing with preionized and predissociated tuning gases and associated systems and methods
US20100006025A1 (en) * 2008-07-11 2010-01-14 Asm Japan K.K. Exhaust gas trap for semiconductor processes
US8486191B2 (en) * 2009-04-07 2013-07-16 Asm America, Inc. Substrate reactor with adjustable injectors for mixing gases within reaction chamber
JP5243519B2 (en) * 2010-12-22 2013-07-24 東京エレクトロン株式会社 Deposition equipment
US8956683B2 (en) 2011-06-16 2015-02-17 Zimmer, Inc. Chemical vapor infiltration apparatus and process
AU2012271616B2 (en) 2011-06-16 2015-05-07 Zimmer, Inc. Micro-alloyed porous metal having optimized chemical composition and method of manufacturing the same
KR101408084B1 (en) * 2011-11-17 2014-07-04 주식회사 유진테크 Apparatus for processing substrate including auxiliary gas supply port
KR101364701B1 (en) * 2011-11-17 2014-02-20 주식회사 유진테크 Apparatus for processing substrate with process gas having phase difference
US10128087B2 (en) 2014-04-07 2018-11-13 Lam Research Corporation Configuration independent gas delivery system
US20160111257A1 (en) * 2014-10-17 2016-04-21 Lam Research Corporation Substrate for mounting gas supply components and methods thereof
US10557197B2 (en) 2014-10-17 2020-02-11 Lam Research Corporation Monolithic gas distribution manifold and various construction techniques and use cases therefor
US10022689B2 (en) 2015-07-24 2018-07-17 Lam Research Corporation Fluid mixing hub for semiconductor processing tool
US10118263B2 (en) 2015-09-02 2018-11-06 Lam Researech Corporation Monolithic manifold mask and substrate concepts
US10215317B2 (en) 2016-01-15 2019-02-26 Lam Research Corporation Additively manufactured gas distribution manifold
JP6925214B2 (en) * 2017-09-22 2021-08-25 東京エレクトロン株式会社 Substrate processing method and substrate processing equipment
CN112086378A (en) * 2019-06-12 2020-12-15 株式会社国际电气 Heating unit, temperature control system, processing apparatus, and method for manufacturing semiconductor device

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53112066A (en) * 1977-03-11 1978-09-30 Fujitsu Ltd Plasma treatment apparatus
JPS5846057B2 (en) * 1979-03-19 1983-10-14 富士通株式会社 Plasma treatment method
US4381965A (en) * 1982-01-06 1983-05-03 Drytek, Inc. Multi-planar electrode plasma etching
US4565157A (en) * 1983-03-29 1986-01-21 Genus, Inc. Method and apparatus for deposition of tungsten silicides
US4693777A (en) 1984-11-30 1987-09-15 Kabushiki Kaisha Toshiba Apparatus for producing semiconductor devices
JPS61191015A (en) * 1985-02-20 1986-08-25 Hitachi Ltd Semiconductor vapor growth and equipment thereof
JPS61197638A (en) 1985-02-28 1986-09-01 Sumitomo Bakelite Co Ltd Method and apparatus for carrying out plasma treatment
US4870245A (en) 1985-04-01 1989-09-26 Motorola, Inc. Plasma enhanced thermal treatment apparatus
US4728389A (en) * 1985-05-20 1988-03-01 Applied Materials, Inc. Particulate-free epitaxial process
US4969416A (en) 1986-07-03 1990-11-13 Emcore, Inc. Gas treatment apparatus and method
US4951601A (en) 1986-12-19 1990-08-28 Applied Materials, Inc. Multi-chamber integrated process system
US5225036A (en) * 1988-03-28 1993-07-06 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
JP2768685B2 (en) * 1988-03-28 1998-06-25 株式会社東芝 Semiconductor device manufacturing method and device
US5458724A (en) 1989-03-08 1995-10-17 Fsi International, Inc. Etch chamber with gas dispersing membrane
JPH02298024A (en) 1989-05-12 1990-12-10 Tadahiro Omi Reactive ion etching apparatus
JP2603722B2 (en) 1989-06-09 1997-04-23 日本電子株式会社 High frequency inductively coupled plasma mass spectrometer
DE69032952T2 (en) * 1989-11-15 1999-09-30 Kokusai Electric Co Ltd Dry treatment device
US5203956A (en) 1990-01-08 1993-04-20 Lsi Logic Corporation Method for performing in-situ etch of a CVD chamber
US5198071A (en) * 1991-11-25 1993-03-30 Applied Materials, Inc. Process for inhibiting slip and microcracking while forming epitaxial layer on semiconductor wafer
JP3156326B2 (en) * 1992-01-07 2001-04-16 富士通株式会社 Semiconductor growth apparatus and semiconductor growth method using the same
US5291030A (en) 1992-06-04 1994-03-01 Torrex Equipment Corporation Optoelectronic detector for chemical reactions
US5383984A (en) * 1992-06-17 1995-01-24 Tokyo Electron Limited Plasma processing apparatus etching tunnel-type
US5356475A (en) * 1993-02-22 1994-10-18 Lsi Logic Corporation Ceramic spacer assembly for ASM PECVD boat
JPH06330323A (en) * 1993-05-18 1994-11-29 Mitsubishi Electric Corp Production device for semiconductor device and cleaning method therefor
EP0664347A3 (en) 1994-01-25 1997-05-14 Applied Materials Inc Apparatus for depositing a uniform layer of material on a substrate.
US5493987A (en) 1994-05-16 1996-02-27 Ag Associates, Inc. Chemical vapor deposition reactor and method
JP3058037B2 (en) 1994-11-07 2000-07-04 株式会社島津製作所 Mass spectrometer
US5613821A (en) * 1995-07-06 1997-03-25 Brooks Automation, Inc. Cluster tool batchloader of substrate carrier
US5551985A (en) 1995-08-18 1996-09-03 Torrex Equipment Corporation Method and apparatus for cold wall chemical vapor deposition
US5844195A (en) 1996-11-18 1998-12-01 Applied Materials, Inc. Remote plasma source
US5849092A (en) * 1997-02-25 1998-12-15 Applied Materials, Inc. Process for chlorine trifluoride chamber cleaning
US5968276A (en) * 1997-07-11 1999-10-19 Applied Materials, Inc. Heat exchange passage connection

Cited By (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050000429A1 (en) * 2001-09-11 2005-01-06 Ceramoptec Industries, Inc. Spiral gas flow plasma reactor
US20030047138A1 (en) * 2001-09-11 2003-03-13 Ceramoptec Industries, Inc. Spiral gas flow plasma reactor
EP1522090A2 (en) * 2002-07-15 2005-04-13 Aviza Technology, Inc. Thermal processing system and configurable vertical chamber
EP1522090A4 (en) * 2002-07-15 2006-04-05 Aviza Tech Inc Thermal processing system and configurable vertical chamber
US7972441B2 (en) * 2005-04-05 2011-07-05 Applied Materials, Inc. Thermal oxidation of silicon using ozone
US20060223315A1 (en) * 2005-04-05 2006-10-05 Applied Materials, Inc. Thermal oxidation of silicon using ozone
US8409353B2 (en) * 2005-04-05 2013-04-02 Applied Materials, Inc. Water cooled gas injector
US20120031332A1 (en) * 2005-04-05 2012-02-09 Applied Materials, Inc. Water cooled gas injector
US20070013845A1 (en) * 2005-07-14 2007-01-18 Seiko Epson Corporation Manufacturing apparatus for oriented film, liquid crystal device and electronic device
US7518681B2 (en) * 2005-07-14 2009-04-14 Seiko Epson Corporation Manufacturing apparatus for oriented film, liquid crystal device and electronic device
US20070084406A1 (en) * 2005-10-13 2007-04-19 Joseph Yudovsky Reaction chamber with opposing pockets for gas injection and exhaust
US20070084408A1 (en) * 2005-10-13 2007-04-19 Applied Materials, Inc. Batch processing chamber with diffuser plate and injector assembly
WO2007131053A2 (en) * 2006-05-05 2007-11-15 Applied Materials, Inc. Batch processing chamber with diffuser plate and injector assembly
WO2007131053A3 (en) * 2006-05-05 2008-07-03 Applied Materials Inc Batch processing chamber with diffuser plate and injector assembly
US20100258053A1 (en) * 2007-12-20 2010-10-14 Chantal Arena Apparatus for delivering precursor gases to an epitaxial growth substrate
CN101849042A (en) * 2007-12-20 2010-09-29 硅绝缘体技术有限公司 Device to epitaxy substrate delivering precursor gases
WO2009082608A1 (en) 2007-12-20 2009-07-02 S.O.I.Tec Silicon On Insulator Technologies Apparatus for delivering precursor gases to an epitaxial growth substrate
US9175419B2 (en) 2007-12-20 2015-11-03 Soitec Apparatus for delivering precursor gases to an epitaxial growth substrate
US20130014895A1 (en) * 2011-07-08 2013-01-17 Tokyo Electron Limited Substrate processing apparatus
US9460893B2 (en) * 2011-07-08 2016-10-04 Tokyo Electron Limited Substrate processing apparatus
US9875895B2 (en) * 2011-11-17 2018-01-23 Eugene Technology Co., Ltd. Substrate processing apparatus including exhaust ports and substrate processing method
US11342164B2 (en) * 2011-12-16 2022-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. High density plasma chemical vapor deposition chamber and method of using
US20150167161A1 (en) * 2012-06-07 2015-06-18 Soitec Gas injection components for deposition systems and related methods
US20160244876A1 (en) * 2013-02-23 2016-08-25 Hermes-Epitek Corporation Gas injector and cover plate assembly for semiconductor equipment
US9855575B2 (en) * 2013-02-23 2018-01-02 Hermes-Epitek Corporation Gas injector and cover plate assembly for semiconductor equipment
US9368380B2 (en) 2013-04-08 2016-06-14 Eugene Technology Co., Ltd. Substrate processing device with connection space
JP2016516293A (en) * 2013-04-08 2016-06-02 ユ−ジーン テクノロジー カンパニー.リミテッド Substrate processing equipment
US20180105933A1 (en) * 2015-04-21 2018-04-19 Eugene Technology Co., Ltd. Substrate processing apparatus and method for cleaning chamber
US20190070639A1 (en) * 2017-09-07 2019-03-07 Applied Materials, Inc. Automatic cleaning machine for cleaning process kits
US11170990B2 (en) * 2019-02-19 2021-11-09 Applied Materials, Inc. Polysilicon liners
CN114207767A (en) * 2019-06-07 2022-03-18 朗姆研究公司 Independently adjustable flow conductance in multi-station semiconductor processing
US20230070825A1 (en) * 2021-04-19 2023-03-09 Innoscience (Suzhou) Technology Co., Ltd. Laminar flow mocvd apparatus for iii-nitride films
US11827977B2 (en) * 2021-04-19 2023-11-28 Innoscience (Suzhou) Technology Co., Ltd. Laminar flow MOCVD apparatus for III-nitride films

Also Published As

Publication number Publication date
US6352594B2 (en) 2002-03-05

Similar Documents

Publication Publication Date Title
US20010047764A1 (en) Method and apparatus for improved chemical vapor deposition processes using tunable temperature controlled gas injectors
US6506691B2 (en) High rate silicon nitride deposition method at low pressures
US5895530A (en) Method and apparatus for directing fluid through a semiconductor processing chamber
US5525157A (en) Gas injectors for reaction chambers in CVD systems
US7833352B2 (en) Apparatus for fabrication of thin films
US5015330A (en) Film forming method and film forming device
KR950012910B1 (en) Vapor phase growth apparatus
US6486083B1 (en) Semiconductor device manufacturing method and semiconductor manufacturing apparatus
EP1386981B1 (en) A thin film-forming apparatus
US5695819A (en) Method of enhancing step coverage of polysilicon deposits
US20030049372A1 (en) High rate deposition at low pressures in a small batch reactor
US8450220B2 (en) Substrate processing apparatus , method of manufacturing semiconductor device, and method of manufacturing substrate
JP3414018B2 (en) Substrate surface treatment equipment
US6287635B1 (en) High rate silicon deposition method at low pressures
US4696833A (en) Method for applying a uniform coating to integrated circuit wafers by means of chemical deposition
US6780464B2 (en) Thermal gradient enhanced CVD deposition at low pressure
WO1999036588A1 (en) Method and apparatus for improved chemical vapor deposition processes using tunable temperature controlled gas injectors
US5677235A (en) Method for forming silicon film
JPH0565652A (en) Apparatus for plasma-intensified chemical vapor deposition
EP1123423A1 (en) High rate silicon deposition method at low pressures
JPH05198520A (en) Film formation device
JPH05251359A (en) Vapor silicon epitaxial growth device
JP4620288B2 (en) Batch heat treatment equipment
US6235652B1 (en) High rate silicon dioxide deposition at low pressures
JP2723053B2 (en) Method and apparatus for forming thin film

Legal Events

Date Code Title Description
AS Assignment

Owner name: TORREX EQUIPMENT CORPORATION, CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:COOK, ROBERT C.;BRORS, DANIEL L.;REEL/FRAME:009897/0878

Effective date: 19990407

STCF Information on status: patent grant

Free format text: PATENTED CASE

AS Assignment

Owner name: IDANTA PARTNERS, LTD., AS COLLATERAL AGENT ON BEHA

Free format text: SECURITY INTEREST;ASSIGNOR:TORREX EQUIPMENT CORPORATION;REEL/FRAME:013699/0001

Effective date: 20030522

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

AS Assignment

Owner name: TORREX EQUIPMENT CORPORATION, CALIFORNIA

Free format text: TERMINATION OF PATENT SECURITY INTEREST;ASSIGNOR:IDANTA PARTNERS LTD., AS COLLATERAL AGENT ON BEHALF OF THE SECURED PARTIES;REEL/FRAME:014797/0312

Effective date: 20040624

AS Assignment

Owner name: APPLIED MATERIALS, INC., CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TORREX EQUIPMENT CORPORATION;REEL/FRAME:015027/0787

Effective date: 20040823

FEPP Fee payment procedure

Free format text: PAT HOLDER NO LONGER CLAIMS SMALL ENTITY STATUS, ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: STOL); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

REFU Refund

Free format text: REFUND - SURCHARGE, PETITION TO ACCEPT PYMT AFTER EXP, UNINTENTIONAL (ORIGINAL EVENT CODE: R2551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

FPAY Fee payment

Year of fee payment: 12