US20040016921A1 - High peak current density resonant tunneling diode - Google Patents
High peak current density resonant tunneling diode Download PDFInfo
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- US20040016921A1 US20040016921A1 US09/772,559 US77255901A US2004016921A1 US 20040016921 A1 US20040016921 A1 US 20040016921A1 US 77255901 A US77255901 A US 77255901A US 2004016921 A1 US2004016921 A1 US 2004016921A1
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- 230000005641 tunneling Effects 0.000 title claims abstract description 43
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 68
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 230000004888 barrier function Effects 0.000 claims abstract description 34
- 238000000034 method Methods 0.000 claims abstract description 28
- 229910052751 metal Inorganic materials 0.000 claims abstract description 21
- 239000002184 metal Substances 0.000 claims abstract description 21
- 239000000463 material Substances 0.000 claims abstract description 18
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 10
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 10
- 125000006850 spacer group Chemical group 0.000 claims abstract description 8
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 claims abstract description 7
- 238000004519 manufacturing process Methods 0.000 claims description 8
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 abstract description 32
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 18
- 239000000377 silicon dioxide Substances 0.000 description 9
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 238000000151 deposition Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 230000008021 deposition Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 238000001465 metallisation Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 238000004627 transmission electron microscopy Methods 0.000 description 4
- 101100269850 Caenorhabditis elegans mask-1 gene Proteins 0.000 description 3
- 229910018885 Pt—Au Inorganic materials 0.000 description 3
- 238000003486 chemical etching Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 238000004151 rapid thermal annealing Methods 0.000 description 3
- 238000012827 research and development Methods 0.000 description 3
- 238000009987 spinning Methods 0.000 description 3
- 230000007704 transition Effects 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 2
- 238000004630 atomic force microscopy Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000002173 high-resolution transmission electron microscopy Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000005424 photoluminescence Methods 0.000 description 2
- 239000008247 solid mixture Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- WVKNYBCYDZQHOC-UHFFFAOYSA-N 2-(1,2-benzothiazol-3-yl)-4-(dimethylamino)-2-phenylbutanamide;hydrochloride Chemical compound Cl.N=1SC2=CC=CC=C2C=1C(C(N)=O)(CCN(C)C)C1=CC=CC=C1 WVKNYBCYDZQHOC-UHFFFAOYSA-N 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 238000013019 agitation Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical group [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 238000011031 large-scale manufacturing process Methods 0.000 description 1
- 238000001883 metal evaporation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000004626 scanning electron microscopy Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000013169 thromboelastometry Methods 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/88—Tunnel-effect diodes
- H01L29/882—Resonant tunneling diodes, i.e. RTD, RTBD
Abstract
A resonant tunneling diode is produced in a gallium arsenide material system formed with barrier layers of AlGaAs with a quantum well layer of low band-gap material between them. The material of the well is selected to adjust the second energy level to the edge of the conduction band in GaAs, with a preferred quantum well layer formed of InGaAs. The resonant tunneling diode structure is grown by a metal organic chemical vapor deposition process on the surface of the nominally exact (100) GaAs substrate. Layers of doped GaAs may be formed on either side of the multilayer resonant tunneling diode structure, and spacer layers of GaAs may also be provided on either side of the barrier layers to reduce the intrinsic capacitance of the structure.
Description
- This application claims the benefit of U.S. provisional application No. 60/020,141, filed Jun. 21, 1996.
- This invention pertains generally to the field of semiconductor devices and more particularly to resonant tunneling diodes.
- Resonant tunneling diodes comprise semiconductor structures having two large band-gap barrier layers with a single low band-gap quantum well between them.
Collector 30 andemitter 31 contact regions are provided in the semiconductor structure to provide collection and supply of electrons as illustrated in the simplified band diagram of FIG. 1. The thicknesses ofbarrier layers resonant energy level 37 slightly above the emitterconduction band edge 38. As theemitter 31 is negatively biased, the two bands will come into alignment at a peak voltage Vp, as illustrated in FIG. 2, and electrons will tunnel through to thecollector region 30 where they are collected. As the negative bias is increased still further, theemitter conduction band 38 rises above theresonant energy level 37, as illustrated in FIG. 3, drastically reducing the tunneling current. The result is a negative resistance region that creates the utility of the resonant tunneling diode (RTD). As the emitter bias is increased still further, current will rise again as electrons are emitted over the barrier. FIG. 4 shows a typical current-voltage relationship curve 40 for a typical RTD. - The high speed voltage transition occurs when the RTD is switched from the stable point “a” in FIG. 4 to the stable point “b”. The voltage swing is maximized by making the voltage Vp low and the voltage Vv high. Switching speed is maximized by making the peak current Ip as large as possible for a given conduction area. The valley current at the voltage Vv is of great significance for high-speed applications, and should be as low as possible to maximize the current available to charge the load capacitance thus reducing the switching time.
- It is desirable that RTDs be highly reliable and stable over time and with temperature changes, and have typical performance characteristics that include voltage swings of one to two volts, peak current densities of 100 to 200 kA/cm2, peak currents of 10 to 20 mA, peak voltages of 1 volt, peak to valley current ratios of at least 3, and a rise time of less than 2 picoseconds. Such characteristics have been achieved previously in devices made of pseudomorphic AlAs/InAs/AlAs quantum wells fed by lattice-matched InGaAs contact layers, and grown on InP by molecular beam epitaxy. However, the InP material system is not well suited for practical applications, and the technology is immature. GaAs would be ideal, but GaAs/AlAs RTDs cannot reach the performances of InP-based devices.
- The resonant tunneling diode (RTD) of the present invention combines all of the desirable characteristics for such a diode in a single device which can be produced in a gallium arsenide material system using the processing techniques compatible with large scale production, particularly metal organic chemical vapor deposition (MOCVD). The device is capable of peak current densities in excess of 300 kA/cm2 at relatively low peak voltages in the range of 1 volt. Switching times in the range of 1 picosecond can be obtained.
- The multilayer RTD structure preferably is formed of barrier layers of AlGaAs with a quantum well layer formed of low band-gap material between them. The material of the well is selected to adjust the second energy level to, i.e., at or slightly above, the edge of the conduction band in GaAs. A preferred material for the quantum well layer is InGaAs. The RTD structure is grown by an MOCVD process on the surface of a nominally exact (100) GaAs substrate. To complete the device, layers of doped GaAs may similarly be formed on either side of the multilayer RTD structure. Spacer layers of GaAs may also be provided as part of the RTD structure on either side of the barrier layers to reduce the intrinsic capacitance of the structure.
- It has been found that in the present invention a structure grown by the MOCVD process on the exact (100) GaAs substrate will produce smooth interfaces between the various layers, including the strained layer quantum well structure, to allow the achievement of high current density and other desirable characteristics at conventional operating temperatures (e.g., 300 K). The resulting structure provides resonant tunneling through the second energy level in a strained-layer quantum-well. The growth of strained-layer InGaAs quantum well structures using exact on-orientation substrates produces distinct layers with relatively abrupt transitions at interfaces, significantly improving the smoothness of the interfaces and consequent device performance over devices which are grown off-orientation. Specifically, rough interfaces cause carrier scattering which significantly increases the valley current and thus makes the device impractical. By smoothing the interfaces, high peak-to-valley ratios can thus be obtained.
- Further objects, features and advantages of the invention will be apparent from the following detailed description when taken in conjunction with the accompanying drawings.
- In the drawings:
- FIG. 1 is a simplified band diagram of a typical resonant tunneling diode (RTD) structure.
- FIG. 2 is a band diagram as in FIG. 1 illustrating negative bias of the emitter.
- FIG. 3 is a band diagram as in FIG. 2 with further negative bias of the emitter.
- FIG. 4 is a typical current-voltage relationship curve for a typical RTD.
- FIG. 5 is a simplified band diagram for the RTD of the present invention.
- FIG. 6 is a simplified schematic view of the multilayer structure of an embodiment of an RTD in accordance with the present invention.
- FIG. 7 is a cross-sectional view of an RTD semiconductor device formed in accordance with the present invention.
- FIG. 8 are calculated peak current density (stars) and peak voltage (blank circles) as a function of well width for the RTD embodiment of FIG. 6.
- FIG. 9 is a measured current-voltage curve for a 6*6 μm2 RTD device in accordance with the present invention operating at room temperature.
- The present invention achieves all of the desirable characteristics for an RTD in a device structure in the GaAs material system. GaAs is a preferred material because it is less expensive than InP, its technology is the most mature of all III-V material systems, and it provides the possibility of integration with other high-speed devices. A conduction band diagram for an RTD quantum well of a preferred resonant tunneling diode in accordance with the present invention is illustrated in simplified form in FIG. 5, illustrating a
GaAs emitter region 50, afirst barrier layer 51 and asecond barrier layer 52, both formed of AlGaAs, aquantum well layer 53 between thelayers GaAs collector layer 55 adjacent to thebarrier layer 52. In such a multilayer RTD structure thesecond level band 56 is slightly above the emitterconduction band edge 57. The first level band is illustrated at 58 in FIG. 5. The second level is preferably just at or, as a practical matter, slightly above the conduction band edge because peak voltage for the device increases rapidly as the second level is raised further above the conduction band edge. - A schematic view of a practical
RTD multilayer structure 60 grown by metal organic chemical vapor deposition (MOCVD) is given in FIG. 6. In this device, n-type gallium arsenide (GaAs) is used as asubstrate 61. A suitable dopant is silicon. On this substrate is grown a layer of GaAs 62, followed by themultilayer RTD structure 60 formed of the GaAsspacer layer 55, thebarrier layer 52, thequantum well layer 53, thebarrier layer 51, and the GaAsintrinsic layer 50, and then followed by afurther layer 63 of n-doped GaAs. A cross-sectional view of the physical arrangement of the device is shown in FIG. 7. TheRTD structure 60 is preferably grown on the exact-orientation (100)GaAs substrate 61. An insulating layer of silicon dioxide (SiO2) 72 is formed over thesubstrate 61 and thestructure 60 is grown on the substrate, with an opening provided in theinsulating layer 72 over an already deposited Ge—Au/Ge—Ni—Aucontact 73. A conductinglayer 75 of, e.g., Ti—Pt—Au is deposited over the SiO2 insulating layer 72 and forms an electrical connection to acontact 73 to form one externally accessible terminal of the device. - By taking advantage of resonant tunneling through the second energy level of a deep quantum well in a strained-layer structure, this RTD structure provides two times higher peak current densities (PCD's) than conventional GaAs-based resonant tunneling diodes (RTD's) and more than 3 times higher PCD values than those typical of MOCVD-grown RTD's. PCD values higher than 300 kA/cm2, peak voltages as low as 1.2 volts, and peak-to-valley current ratios (PVR's) of 3:1 at 300 K are obtained from the structures of FIGS. 7 with, e.g., 14 Å-thick Al0.8Ga0.2As
barriers - The GaAs-based RTDs of the present invention have practical advantages over GaSb- and InP-based structures due to the maturity of growth and material processing techniques for GaAs, as well as the possibility of integration of these RTD's with other high-speed devices. The need for relatively high current density, which is basically the crucial figure of merit for high-speed RTD switching applications, has been a major drawback for previous GaAs-based RTD's. As reported in T. P. E. Broekaert, et al., Appl. Phys. Lett., 53 (16), pp. 1545-1547, October 1988, the peak current density associated with the second resonant energy level of an RTD is almost 10 times greater than the one resulting from the first energy level for the same structure, but this level has, however, been attainable only at high peak voltages (≈4 volts). In the present invention, by using a low-bandgap material, In0.3Ga0.7As, for the well, the second resonant energy level is well-adjusted to the edge of the conduction band of GaAs, and thus provides a relatively low peak voltage. FIG. 8 shows calculated data demonstrating that, for the structure of FIGS. 6 and 7, (an In0.3Ga0.7As well, 14 Å-thick barriers, and a 300 Å-thick spacer layer), very high PCD values together with a relatively low peak voltage are obtained, while the well thickness stays below the critical value for In0.3Ga0.7As grown on GaAs substrate (≈100 Å).
- FIG. 9 shows the measured I-V curve for a 6*6 μm2 device as in FIG. 7. Circuit simulations show that this device, if fabricated with minimal parasitic capacitance, can switch 1 volt in less than 3 ps. Optimized spacer layer structures that minimize intrinsic capacitance can be utilized to reduce the switching time by a factor of two or more, resulting in subpicosecond switching speed. The relatively good peak-to-valley current ratio shown in FIG. 9 results from the use of a deep quantum well, good ohmic contacts made by a 2-step process (i.e., as shown in FIG. 7), and the growth on an exact-orientation (100)-
GaAs substrate 61, which results in smooth interfaces between the strained-layer quantum well 53 and thebarriers - The following is an illustrative example of a fabrication process in accordance with the invention. The fabrication process consists of two major steps: structure growth and device fabrication.
- Material growth is carried out by the Metal Organic Chemical Vapor Deposition (MOCVD) technique, and the quality of the grown structures can be examined by transmission electron microscopy (TEM). By running TEM on several test structures, the growth rates for various layers are very well calibrated (at the level of a few i). The process is composed of various steps to fabricate proper contacts for emitter and collector sides, and to etch mesas to form isolated devices. Due to the crucial effect of series resistance on the negative differential resistance of RTD's, a two-step process is used to make a low-resistance ohmic contact on top of the mesa (emitter side). Metal contacts are deposited by e-beam metal deposition and patterned by the lift-off technique. The structure may also be grown on a semi-insulating GaAs substrate in accordance with conventional planar processing techniques, in which case all contacts are formed on the same side of the substrate.
- A total of three different masks are used throughout the fabrication process; the most precise alignment needed in the process is the alignment of windows in an SiO2 isolation layer with the top metal contacts. The fabrication process is explained in greater detail below.
- The RTD structure is grown using low-pressure (50 mbar) metalorganic chemical vapor deposition (LP-MOCVD) in an Aixtron A-200 system, at a growth temperature of 700° C. The metalorganic precursors are trimethylgallium, trimethylaluminum, and trimethylindium. The group V source is arsine with silane used as an n-type dopant. Prior to growth of the RTD structure, the solid composition (x) of AlxGa1−xAs is measured using x-ray diffraction, as a function of the aluminum gas-phase mole-fraction. Growth rates are obtained from film-thickness measurements using scanning electron microscopy. Similarly, the solid composition (y) of InyGa1−yAs is determined from x-ray diffraction rocking curve measurements on thick (relaxed) layers.
- To improve the quantum-well interfacial morphology, RTD structures are grown on nominally exact (100),0° to ±0.5°, and preferably ±0.1°, GaAs substrates. Such a substrate orientation is selected because recent studies of strained-layer InGaAs quantum-well structures, via atomic force microscopy (AFM) and low-temperature photoluminescence, indicate that growth using exact on-orientation substrates significantly improves the interfacial structure by eliminating step-bunching. By contrast, the growth of strained-layer InGaAs quantum wells on misoriented substrates will generally result in increased surface roughness and broadening of low-temperature photoluminescence. After growth of the RTD structure, the thicknesses of the layers are confirmed using high-resolution TEM lattice imaging. The TEMs of In0.3Ga0.7As/Al0.8Ga0.2As/GaAs structures show a clear image of distinct layers with relatively abrupt transitions at interfaces. From a high-resolution TEM lattice image, it is possible to estimate the thicknesses of the first barrier 52 (from the bottom), well 53, and
second barrier 51 as being 14.5 Å, 57 Å, and 13 Å, respectively, which estimates are in good agreement with the target values. A schematic view of the grownstructure 60 in FIG. 6 includes (from bottom to top): a 300Å spacer layer 55 to reduce the intrinsic capacitance of the device, a 14 Å Al0.8Ga0.2Asbarrier layer 52, a 57 Å In0.3Ga0.7As well 53, thesecond barrier layer 51, and a 100 Å layer of intrinsic GaAs to separate the structure from the dopedtop layer 63. - The device fabrication starts with the deposition of the top metal contact using e-beam metal deposition. In order to make a good ohmic contact, a sequence of various metal layers are used, such as Ge—Au/Ge—Ni—Au. The deposited metal is patterned to 3×3 μm2 squares, separated by 1 mm from each other. Then, using chemical etching, mesas of different sizes (from 5×5 μm2 to 8×8 μm2) are etched around contacts. After covering the whole wafer with a 1000 Å-thick SiO2 film 72 as an isolation layer, 3×3 μm2 windows are opened on top of the buried contacts. Then, the second layer of metal, composed of Ti—Pt—Au layers, is deposited on the wafer. In order to facilitate cleaving the wafer into devices, the wafer is thinned to 150 μm by mechanical lapping. After depositing the back contact 76 (Ge—Au/Ge—Ni—Au), the contacts are alloyed by rapid thermal annealing in order not to damage the structure (at 400° C. for 30 seconds). The last step is to cleave the wafer into devices.
- The major fabrication process steps are summarized below, with further details for steps 4-11:
- 1. System calibration.
- 2. Wafer preparation (if necessary).
- 3. MOCVD device growth.
- 4. Patterning top contact by lift-off method;
- a) Using
mask 2 and negative photoresist topattern 3 μm by 3 μm contacts. - b) Metal evaporation Ge—Au/Ge—Ni—Au.
- c) Removing extra metal.
- 5. Chemical etching to isolate devices:
- a)
Photolithography using mask 1. - b) Chemical etching for a thickness of greater than 1 μm.
- 6. SiO2 deposition by PE-CVD.
- 7. Patterning SiO2 to open 3 μm by 3 μm windows, using
mask 2. - 8. Top contact deposition and patterning by lift-off (mask3) Ti—Pt—Au.
- 9. Wafer thinning.
- 10. Bottom contact deposition Ge—Au/Ge—Ni—Au.
- 11. Making ohmic contacts by annealing @400C. for 30 seconds.
- 12. Cleaving.
- Step 4-a:
- In order to be able to pattern metal contacts on wafer through the lift-off technique, the thickness of photoresist must be greater than the thickness of deposited metal. Therefore, for this step Shipley AZ 1375 negative photoresist is used.
- Spinning: 4500 RPM for 30 seconds
- Prebake: 30 min. @90° C.
- Exposure time: 45 sec. using mask aligner Karl Suss MJB3 (mask2).
- Developing: MF 321 for 1 min.
- Postbake: 30 min. @120° C.
- Step 4-b:
- The metal is deposited on top of the patterned photoresist by E-beam metal deposition (CHA Industries) at a pressure below 10−6 Torr.
- Ge: 200 Å
- Au/Ge: 800 Å
- Ni: 300 Å
- Au: 1000 Å
- Step 4-c:
- By placing the wafer in acetone and using ultrasound agitation, the extra metal from the surface of wafer is lifted (2 min.).
- Step 5-a:
- Shipley AZ 1805 negative photoresist is used as the mask for mesa definition during the wet etching process.
Mask 1 is used to pattern the photoresist. - Spinning: 5000 RPM for 30 seconds
- Prebake: 30 min. @90° C.
- Exposure time: 2.7 sec. (mask1).
- Developing: MF 321 for 45 sec.
- Postbake: 30 min. @120° C.
- Step 5-b:
- Isolated mesa structures are formed by the wet etching process using H3PO4/H2O2/H2O (5:1:1) solution. The mesas are etched as high as 1 μm at a rate of 4000 Å/min at 9° C.
- Step 6:
- Through Plasma Enhanced Chemical Vapor Deposition (PE-CVD) (Waf'r/Batch Plasma-
Therm 70 series system), a 1000 Å-thick layer of SiO2 is deposited on the structures. - Pressure: 900 mTorr.
- Temperature: 250° C.
- Step 7:
- In order to open windows in the SiO2 layer, Shipley AZ 1813 negative photoresist is used which is thick enough to cover the mesas, and forms a planar surface proper for photolithography.
- Spinning: 4000 RPM for 30 seconds
- Prebake: 30 min. @90° C.
- Exposure time: 7 sec (mask2).
- Developing: MF 321 for 1 min.
- Postbake: 30 min @120° C.
- Step 8:
- The second layer of top metal was deposited by e-beam metal deposition and patterned by lift-off (mask3).
- Ti: 500 Å
- Pt: 600 Å
- Au: 1000 Å
- Step 9:
- In order to facilitate cleaving the wafer into devices, it is thinned to 150 μm by mechanical lapping (LOGITECH PM2A machine and 3 μm Aluminum Oxide powder).
- Step 10:
- Deposition of bottom contact: The same as step 4-b.
- Ge: 200 Å
- Au/Ge: 1000 Å
- Ni: 300 Å
- Au: 3000 Å
- Step 11:
- By Rapid Thermal Annealing (RTA), the contacts are alloyed at 400° C. for 30 seconds which is short enough not to damage the grown structure.
- It is understood that the present invention is not limited to the embodiments disclosed herein, but encompasses all such forms thereof that come within the scope of the following claims.
Claims (24)
1. A resonant tunneling diode comprising:
(a) a substrate of (100) GaAs;
(b) a multilayer resonant tunneling diode structure grown on the (100) GaAs substrate, the resonant tunneling diode structure comprising a quantum well layer of low band-gap material between barrier layers of AlGaAs, and wherein the material of the quantum well layer is selected such that the second energy level of the quantum well layer is at or slightly above the conduction band edge in GaAs, the quantum well layer grown to be a strained layer with smooth interfaces with the barrier layers.
2. The resonant tunneling diode device of claim 1 wherein the quantum well layer comprises InGaAs.
3. The resonant tunneling diode device of claim 2 wherein the barrier layers are composed of Al0.8Ga0.2As, and the quantum well layer is formed of In0.3Ga0.7As.
4. The resonant tunneling diode device of claim 3 wherein the barrier layers are about 14 Å thick and the quantum well layer is about 57 Å thick.
5. The resonant tunneling diode device of claim 2 including a spacer layer of intrinsic GaAs adjacent to each barrier layer.
6. The resonant tunneling diode device of claim 5 further including a layer of n-doped GaAs adjacent to each GaAs intrinsic layer.
7. The resonant tunneling diode device of claim 6 wherein the substrate is doped GaAs and the resonant tunneling diode structure is isolated on a mesa with a doped GaAs layer at the top of the mesa and further including an insulating layer over the exposed surfaces of the substrate and the mesa and a contact formed through the insulating layer to the doped GaAs layer, and a contact on the doped GaAs substrate opposite the mesa.
8. The resonant tunneling diode device of claim 1 wherein the resonant tunneling diode structure is grown on a nominally exact (100) ±0.5° GaAs substrate.
9. The resonant tunneling diode device of claim 1 wherein the resonant tunneling diode structure is grown on a nominally exact (100) ±0.1° GaAs substrate.
10. The resonant tunneling diode device of claim 1 wherein the resonant tunneling diode structure is grown on the GaAs substrate by metal organic chemical vapor deposition.
11. A resonant tunneling diode comprising:
(a) a substrate of (100) GaAs;
(b) a multilayer resonant tunneling diode structure grown on the (100) GaAs substrate, the resonant tunneling diode structure comprising a quantum well layer of InGaAs between barrier layers of AlGaAs, a spacer layer of intrinsic GaAs adjacent to each barrier layer, and a layer of n-doped GaAs adjacent to each GaAs intrinsic layer, wherein the second energy level of the quantum well layer is at or slightly above the conduction band edge in GaAs, the quantum well layer grown by metal organic chemical vapor deposition to be a strained layer with smooth interfaces with the barrier layers.
12. The resonant tunneling diode device of claim 11 wherein the barrier layers are composed of Al0.8Ga0.2As, and the quantum well layer is formed of In0.3Ga0.7As.
13. The resonant tunneling diode device of claim 12 wherein the barrier layers are about 14 Å thick and the quantum well layer is about 57 Å thick.
14. The resonant tunneling diode device of claim 11 wherein the substrate is doped GaAs and the resonant tunneling diode structure is isolated on a mesa with a doped GaAs layer at the top of the mesa and further including an insulating layer over the exposed surfaces of the substrate and the mesa and a contact formed through the insulating layer to the doped GaAs layer and a contact on the doped GaAs substrate opposite the mesa.
15. The resonant tunneling diode device of claim 11 wherein the resonant tunneling diode structure is grown on a nominally exact (100) ±0.5° GaAs substrate.
16. The resonant tunneling diode device of claim 11 wherein the resonant tunneling diode structure is grown on a nominally exact (100) ±0.1° GaAs doped substrate.
17. A method of making a resonant tunneling diode comprising the steps of:
(a) providing a substrate of nominally exact (100) GaAs;
(b) growing on the substrate by metal organic chemical vapor deposition successive layers comprising at least a barrier layer of AlGaAs, a strained quantum well layer of low band-gap material, and a barrier layer of AlGaAs, the quantum well layer grown with smooth interfaces with the barrier layers with the second energy level of the quantum well layer at or slightly above the conduction band edge in GaAs.
18. The method of claim 17 wherein the quantum well layer material is InGaAs.
19. The method of claim 15 wherein the barrier layers are formed to be composed of Al0.8Ga0.2As, and the quantum well layer is formed to be composed of In0.3Ga0.7As.
20. The method of claim 17 further including growing by metal organic chemical vapor deposition a spacer layer of intrinsic GaAs adjacent to each barrier layer.
21. The method of claim 20 further including growing by metal organic chemical vapor deposition a layer of n-doped GaAs adjacent to each GaAs intrinsic layer.
22. The method of claim 21 wherein the substate is doped GaAs and including isolating the resonant tunneling diode structure on a mesa with a doped GaAs layer at the top of the mesa and further including forming an insulating layer over the exposed surfaces of the substrate and the mesa and forming a contact through the insulating layer to the doped GaAs layer and forming a contact on the doped GaAs substrate opposite the mesa.
23. The method of claim 17 wherein the substrate is nominally exact (100) ±0.5° GaAs.
24. The method of claim 17 wherein the substrate is nominally exact (100) ±0.1° GaAs.
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US08/879,161 US6229153B1 (en) | 1996-06-21 | 1997-06-19 | High peak current density resonant tunneling diode |
US09/772,559 US20040016921A1 (en) | 1996-06-21 | 2001-01-30 | High peak current density resonant tunneling diode |
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