US20040097174A1 - Method for polishing semiconductor wafer and polishing pad for the same - Google Patents
Method for polishing semiconductor wafer and polishing pad for the same Download PDFInfo
- Publication number
- US20040097174A1 US20040097174A1 US10/665,015 US66501503A US2004097174A1 US 20040097174 A1 US20040097174 A1 US 20040097174A1 US 66501503 A US66501503 A US 66501503A US 2004097174 A1 US2004097174 A1 US 2004097174A1
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- United States
- Prior art keywords
- polishing
- polishing pad
- semiconductor wafer
- grooves
- pad
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
- B24B37/26—Lapping pads for working plane surfaces characterised by the shape of the lapping pad surface, e.g. grooved
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B21/00—Machines or devices using grinding or polishing belts; Accessories therefor
- B24B21/04—Machines or devices using grinding or polishing belts; Accessories therefor for grinding plane surfaces
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- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
On the surface of a belt-type surface plate wound around two rollers whose rotation axes are arranged in parallel with each other, four or other number of sheet-shaped polishing pads of polyurethane are stuck. Each of the polishing pads has grooves extending in the same direction as the drive direction of the surface plate. Moreover, the polishing pads adjacently arranged in the drive direction of the surface plate are stuck apart in such a manner that the grooves of one polishing pad are spaced not to align with the respective grooves of the other polishing pad.
Description
- The present invention relates to methods for polishing a semiconductor wafer and to polishing pads for the same. In particular, the present invention relates to polishing pads including a plurality of grooves for use in chemical mechanical polishing equipment designed for semiconductor wafers, and to methods for polishing a semiconductor wafer using such polishing pads.
- Semiconductor devices have been miniaturized significantly in recent years. In order to accomplish the miniaturization, a variety of new technologies for fabricating a semiconductor device have been developed. Among the technologies, multilevel interlayer technology in which an interconnect layer of metal materials and an interconnect layer of insulating materials are repeatedly mutilayered contributes greatly to further miniaturization and high functionality of the semiconductor devices, but this technology also faces a number of technical challenges.
- One of the challenges is to ensure the flatness of each interconnect layer. For example, the interconnect layers whose surfaces are not made flat but left uneven cause defocusing in a lithography process that is the key to the miniaturization of the semiconductor devices, which makes it impossible to form an interconnection pattern. To solve this challenge, chemical mechanical polishing (CMP) in which the surface of a semiconductor wafer is polished chemically and mechanically for planarization has often been used in recent years (see, e.g., Japanese Unexamined Patent Publication No. 11-58219).
- Hereinafter, so-called belt-polishing CMP equipment, not conventional turntable-type CMP equipment, will be described with reference to the accompanying drawings.
- FIG. 8A schematically shows a structure of a polishing section of the conventional belt-polishing CMP equipment.
- As shown in FIG. 8A, a plurality of sheet-
shaped polishing pads 101 of which the base material is composed of polyurethane foam are stuck on a belt-type surface plate 102. Withslurry 104 supplied from anozzle 103 onto thepolishing pads 101, thesurface plate 102 is driven. With acarrier 105 rotated, the surface of asemiconductor wafer 106 adhering by suction to thecarrier 105 is pressed against the surface of thepolishing pad 101, thereby polishing thesemiconductor wafer 106. In order to activate (fuzz) the surfaces of thepolishing pads 101, adresser 108 equipped on the bottom of acylinder 107 is moved, whenever necessary, in the direction perpendicular to the drive direction of thesurface plate 102 with thedresser 108 pressed against thepolishing pad 101. - FIG. 8B shows one of the
polishing pads 101 before it is stuck on thesurface plate 102. As shown in FIG. 8B, a plurality oflinear grooves 101 a spaced in parallel with one other are formed in the surface (polishing surface) of thepolishing pad 101. Thesegrooves 101 a serve to efficiently supply theslurry 104 onto the surface (work surface) of thesemiconductor wafer 106 in polishing thesemiconductor wafer 106 and they are formed linearly and in parallel with the drive direction of thesurface plate 102. - In sticking the
polishing pads 101 on the surface of thesurface plate 102, thepolishing pads 101 adjacently arranged in the drive direction of thesurface plate 102 are stuck slightly apart one from another. - The inventors recognize the following two problems of the conventional belt-polishing CMP equipment.
- The first problem arises in the case where, as shown in FIG. 9A, the
multiple polishing pads 101 each having themultiple grooves 101 a are stuck on the surface of the belt-type surface plate 102 in such a manner that thegrooves 101 a of eachpolishing pad 101 are spaced to align with therespective grooves 101 a of theadjacent polishing pad 101. - When the
semiconductor wafer 106 is polished by the CMP equipment as shown in FIG. 8A, thesurface plate 102 with thepolishing pads 101 stuck thereon is driven at a predetermined speed in the direction that goes away from thenozzle 103. That is to say, theindividual grooves 101 a of eachpolishing pad 101 move with fixed positions thereof kept relative to thesemiconductor wafer 106. - On the other hand, the
carrier 105 with the semiconductor wafer 106 adhering thereto rotates at a given position. Therefore, as shown in FIG. 9B, if the center portion of thesemiconductor wafer 106 is matched in position to thegroove 101 a provided in the center portion of thepolishing pad 101, a portion of the work surface of the semiconductor wafer 106 out of contact with the polishing surfaces of thepolishing pads 101 occurs at the center portion thereof - The polishing speed of the semiconductor wafer106 by the
polishing pads 101 degreases with increasing proximity to the center of the work surface of thesemiconductor wafer 106. As can be seen from the graph in FIG. 10A illustrating the relation between the position within the wafer and the wafer surface thickness, the difference of the polishing speed within the wafer causes ununiformity in the wafer surface thickness such that the center portion of the work surface of thesemiconductor wafer 106 has a greater thickness than the peripheral portion thereof. This ununiformity results from the fact that theindividual grooves 101 a of onepolishing pad 101 are in line with therespective grooves 101 a of the other consecutively-arrangedpolishing pads 101. To be more specific, as shown in FIG. 10B, concentric portions of the polished surface of thesemiconductor wafer 106 each having a greater thickness than the surroundings occur with increasing proximity to the center of the polished surface of thesemiconductor wafer 106, so that a desired surface flatness cannot be obtained in the polished surface of thesemiconductor wafer 106. As has been described earlier, the thickness ununiformity causes defocusing in the lithography process that is the key to the miniaturization of semiconductor devices, which makes it impossible to form an interconnection pattern. - Next description will be made of the second problem of the conventional belt-polishing CMP equipment.
- The second problem arises from the fact shown in FIG. 8B that the
grooves 101 a provided in the polishing surface of eachpolishing pad 101 are not formed in the both edge portions thereof Because of such a structure, as shown in the sectional view in FIG. 11A, the inside portion A of the polishing surface of thepolishing pad 101 has a smaller contact area with adresser 108 than the edge portion B thereof, so that the inside portion A of thepolishing pad 101 has a greater pressure per unit area placed by thedresser 108 than the edge portion B thereof The pressure difference causes the phenomenon in which the inside portion A of the polishing surface of thepolishing pad 101 is removed by thedresser 108 more deeply than the edge portion B thereof Thus, the inside portion A of thepolishing pad 101 is thinner than the edge portion B thereof As a result, as shown in FIG. 12A, the inside portion A of thepolishing pad 101 becomes thinned as compared to the edge portions B thereof every time thepolishing pad 101 is activated by thedresser 108, and finally thepolishing pad 101 has a concave cross-sectional shape taken transversely of the drive direction of the pad. As can be seen from the graph in FIG. 12B illustrating the relation between the position within the wafer and the wafer surface thickness, thepolishing pad 101 having this concave cross-sectional shape polishes thesemiconductor wafer 106 in such a shape that the peripheral portion of thesemiconductor wafer 106 is polished more deeply than the center portion thereof As a result, thesemiconductor wafer 106 cannot obtain a desired surface flatness. - To solve the conventional problems described above, an object of the present invention is to obtain a desired surface flatness of a semiconductor wafer using belt-polishing type polishing equipment.
- To attain the foregoing object, a method for polishing a semiconductor wafer of the present invention is designed so that in sticking a plurality of polishing pads on a surface plate, grooves of the polishing pad are spaced not to align with respective grooves of the adjacent polishing pad. Further, a polishing pad for a semiconductor wafer of the present invention has a structure in which multiple grooves of the polishing pad for a semiconductor wafer are provided over the entire width from edge to edge thereof in the direction perpendicular to the drive direction of the polishing pad.
- To be more specific, in a method for polishing a semiconductor wafer according to the present invention, the semiconductor wafer is polished by continuously driving a surface plate on which a plurality of polishing pads are stuck, and the surface of each of the polishing pads is provided with a plurality of grooves each extending in the drive direction of the pad. The method comprises the steps of: sticking the plurality of polishing pads on the surface of the surface plate; and polishing the semiconductor wafer by pressing the wafer against the surface of each said polishing pad with the surface plate driven. In the sticking step, the polishing pads are stuck in such a manner that the grooves of each said polishing pad are spaced not to align with the respective grooves of the polishing pad adjacently arranged in the drive direction of the surface plate.
- With the inventive method, in the step of sticking the polishing pads on the surface plate, the polishing pads are stuck in such a manner that the grooves of each polishing pad are spaced not to align with the respective grooves of the polishing pad adjacently arranged in the drive direction of the surface plate. Therefore, even though a semiconductor wafer rotates during the wafer polishing, the position of each groove in contact with the work surface of the semiconductor wafer varies every time the polishing pad in contact with the semiconductor wafer changes. This solves the first problem in which the polished surface of the semiconductor wafer has concentric portions each of which has a greater thickness than the surroundings thereof As a result, desired surface flatness can be obtained in the wafer.
- Preferably in the sticking step in the inventive method, the polishing pads are stuck in such a manner that the grooves of each said polishing pad are offset by a predetermined distance from the respective grooves of the polishing pad adjacently arranged in the drive direction.
- Preferably in the polishing step in the inventive method, the semiconductor wafer is polished with slurry containing abrasives flowing on the surfaces of the polishing pads.
- A first polishing pad for a semiconductor wafer according to the present invention is intended for a polishing pad for a semiconductor wafer stuck on the surface of a belt-type surface plate. A plurality of grooves extending in the drive direction of the polishing pad are formed over the entire width from edge to edge of the polishing pad in the direction perpendicular to the drive direction.
- With the first polishing pad for a semiconductor wafer, even though the polishing pad is activated by the dresser during the wafer polishing, the edge portions and the inner portion of the polishing pad are equalized in the contact area of the dresser with the polishing pad. Thus, these portions have the same pressure per unit area placed by the dresser. Even though the dresser continues to activate the polishing pad, the sectional shape of the polishing pad taken transversely of the drive direction of the pad does not become concave. This solves the second problem in which only the edge of the work surface of the semiconductor wafer is polished more deeply. As a result, desired surface flatness can be obtained in the wafer.
- A second polishing pad for a semiconductor wafer according to the present invention is intended for a polishing pad for a semiconductor wafer stuck on the surface of a belt-type surface plate. In the surface of the polishing pad, a plurality of grooves extending in the drive direction of the polishing pad are formed at an angle relative to the drive direction.
- With the second polishing pad for a semiconductor wafer, even though the semiconductor wafer rotates during the wafer polishing, the position of each groove in contact with the work surface of the semiconductor wafer varies according to even the travel of one polishing pad. This solves the first problem in which the polished surface of he semiconductor wafer has concentric portions each of which has a greater thickness than the surroundings thereof As a result, desired surface flatness can be obtained in the wafer.
- Preferably in the first and second inventive polishing pads, the plurality of grooves are formed at regular intervals. This equalizes the contact times of the polishing surface of the polishing pad with all portions of the work surface of the semiconductor wafer during the wafer polishing. As a result, the polished surface of the semiconductor wafer is further planarized.
- The first and second inventive polishing pads are preferably made of polyurethane foam.
- FIGS. 1A and 1B show belt-polishing CMP equipment for implementing a method for polishing a semiconductor wafer according to a first embodiment of the present invention. FIG. 1A is a perspective view schematically illustrating a polishing section of the CMP equipment, and FIG. 1B is a plan view partly illustrating the state in which polishing pads are stuck on a surface plate.
- FIG. 2A is a sectional view illustrating a state of the polishing method of a semiconductor wafer according to the first embodiment of the present invention, in which one of the polishing pads comes into contact with the semiconductor wafer.
- FIG. 2B is a graph showing the relation between the position within the wafer and the wafer surface thickness obtained by the polishing method of a semiconductor wafer according to the first embodiment of the present invention.
- FIG. 3 is a perspective view illustrating a polishing pad for use in belt-polishing CMP equipment according to a second embodiment of the present invention.
- FIG. 4A is a sectional view illustrating the state in which the polishing pad for a semiconductor wafer according to the second embodiment of the present invention comes into contact with a dresser.
- FIG. 4B is a plan view partly illustrating a plurality of the polishing pads for a semiconductor wafer according to the second embodiment of the present invention.
- FIG. 5A is a perspective view partly illustrating the state in which a polishing pad for a semiconductor wafer according to a third embodiment of the present invention is stuck on a surface plate.
- FIG. 5B is a plan view partly illustrating the state in which a plurality of the polishing pads for a semiconductor wafer according to the third embodiment of the present invention are stuck on the surface plate.
- FIG. 6 is a graph showing the relation between the position within a wafer and the wafer surface thickness obtained by the polishing method of a semiconductor wafer according to the third embodiment of the present invention.
- FIG. 7 is a plan view partly illustrating the state in which polishing pads for a semiconductor wafer according to a modification of the third embodiment of the present invention are stuck on a surface plate.
- FIGS. 8A and 8B show conventional belt-polishing CMP equipment. FIG. 8A is a perspective view schematically illustrating a polishing section of the CMP equipment, and FIG. 8B is a perspective view illustrating a polishing pad.
- FIG. 9A is a plan view partly illustrating the state in which a plurality of the polishing pads in the conventional belt-polishing CMP equipment are stuck on a surface plate.
- FIG. 9B is a sectional view illustrating the state in which the polishing pad in the conventional belt-polishing CMP equipment comes into contact with a semiconductor wafer.
- FIG. 10A is a graph showing the relation between the position within the wafer and the wafer surface thickness obtained by using the polishing pad in the conventional belt-polishing CMP equipment.
- FIG. 10B is a plan view illustrating the polished surface of the semiconductor wafer obtained by using the polishing pad in the conventional belt-polishing CMP equipment.
- FIG. 11A is a sectional view illustrating the state in which the polishing pad in the conventional belt-polishing CMP equipment comes into contact with a dresser. FIG. 11B is a sectional view illustrating the state after activation process by the dresser is continuously performed.
- FIG. 12A is a sectional view of a semiconductor wafer and the polishing pad in the conventional belt-polishing CMP equipment which is obtained in the case where the activation process by the dresser is continuously performed on the polishing pad.
- FIG. 12B is a graph showing the relation between the position within the wafer and the wafer surface thickness obtained in the case where the activation process by the dresser is continuously performed on the polishing pad in the conventional belt-polishing CMP equipment.
- (First Embodiment)
- A first embodiment of the present invention will be described below with reference to the accompanying drawings.
- FIG. 1A schematically shows a structure of a polishing section of belt-polishing CMP equipment according to the first embodiment of the present invention.
- As shown in FIG. 1A, a belt-
type surface plate 11 is wound around two rollers (pulleys) 10 whose rotation axes are arranged in parallel with each other. On the surface of thesurface plate 11, four sheet-shapedpolishing pads 12 of which the base material is made of polyurethane are stuck. Polyurethane used for the base material of thepolishing pads 12 is preferably closed-cell polyurethane foam. - A method for polishing a
semiconductor wafer 20 adhering by suction to acarrier 13 is as follows. With thesurface plate 11 driven in a predetermined direction,slurry 15 containing abrasives is supplied from anozzle 14 onto the surface (polishing surface) of thepolishing pad 12. With the surface of thesemiconductor wafer 20 rotated, the surface (the work surface) of thesemiconductor wafer 20 is pressed against the surface of thepolishing pad 12. In order to activate the surfaces of thepolishing pads 12, adresser 17 equipped on the bottom of acylinder 16 is moved, whenever necessary, in the direction perpendicular to the drive direction of thesurface plate 11 with thedresser 17 pressed against thepolishing pad 12. - As shown in the enlarged plan view in FIG. 1B, each of the
polishing pads 12 according to the first embodiment hasgrooves 12 a extending in the same direction as the drive direction of thesurface plate 11. Thepolishing pads 12 adjacently arranged in the drive direction of thesurface plate 11 are stuck apart in such a manner that thegrooves 12 a of onepolishing pad 12 are spaced not to align with therespective grooves 12 a of theother polishing pad 12. Note that thegrooves 12 a serve to efficiently supply theslurry 15 onto the surface of thesemiconductor wafer 20. - As described above, the
polishing pads 12 adjacently arranged in the drive direction of thesurface plate 11 are stuck in such a manner that thegrooves 12 a of onepolishing pad 12 are spaced not to align with therespective grooves 12 a of theother polishing pad 12. In accordance with the foregoing, in FIG. 2A, thegrooves 12 a provided in one polishing pad 12 (shown with solid lines) are offset from thegrooves 12 a provided in another polishing pad 12 (shown with broken lines) next to one saidpolishing pad 12, so that all the portions of the work surface of thesemiconductor wafer 20 come into contact reliably with any one of the polishing surfaces of thepolishing pads 12 even though thesemiconductor wafer 20 is rotating. Thus, even when the center portion of thesemiconductor wafer 20 in FIG. 2A is not polished by thegrooves 12 a of one saidpolishing pad 12 immediately after the initiation of polishing, the center portion is surely polished by thegrooves 12 a of another said polishingpad 12. Consequently, this eliminates the unpolished portion of the work surface of thesemiconductor wafer 20 which is located at the center thereof. - Note that there is no limit to the number of
polishing pads 12 stuck on the belt-type surface plate 11. However, in the first embodiment, the fourpolishing pads 12 are stuck in such a manner that thegrooves 12 a of each polishingpad 12 are offset from therespective grooves 12 a of theadjacent polishing pad 12 in a pitch with a half width of eachgroove 12 a. This equalizes the time thegrooves 12 a of thepolishing pads 12 do not polish thesemiconductor wafer 20 as well, so that no unpolished portion exists in the center portion of thesemiconductor wafer 20. As a result, the entire work surface of thesemiconductor wafer 20 can be polished uniformly. - (Second Embodiment)
- A second embodiment of the present invention will be described below with reference to the accompanying drawings.
- FIG. 3 shows a polishing pad used in belt-polishing CMP equipment according to the second embodiment of the present invention.
- As shown in FIG. 3, a
polishing pad 12 according to the second embodiment has a plurality ofgrooves 12 a formed on the polishing surface thereof Thegrooves 12 a extend in parallel with one other in the drive direction of thepolishing pad 12, and they are provided over the entire width from edge to edge of the polishing surface in the direction perpendicular to the drive direction of thepolishing pad 12. - When the
polishing pad 12 of this formation polishes a semiconductor wafer, the inside portion A and the edge portion B of thepolishing pad 12 are equalized in the contact area of the polishing surface thereof with adresser 17 as shown in the sectional view in FIG. 4A. Therefore, thedresser 17 can activate the entire polishing surface of thepolishing pad 12 uniformly. This prevents a large removal of only the inside portion A of thepolishing pad 12 in the activation by thedresser 17. Consequently, as shown in FIG. 2B, the polishing pad can polish the peripheral portion of the semiconductor wafer no thinner than the center portion thereof, and therefore the polishing pad can polish the entire work surface of the semiconductor wafer uniformly. - As shown in FIG. 4B, the
polishing pads 12 adjacently arranged in the drive direction thereof are stuck in such a manner that thegrooves 12 a of onepolishing pad 12 are spaced not to align with therespective grooves 12 a of theother polishing pad 12, which prevents the center portion of the polished semiconductor wafer from being thickened as compared to the surroundings thereof. - (Third Embodiment)
- A third embodiment of the present invention will be described below with reference to the accompanying drawings.
- FIG. 5A shows a polishing pad used in belt-polishing CMP equipment according to the third embodiment of the present invention.
- As shown in FIG. 5A, a
polishing pad 12 according to the third embodiment has a plurality ofgrooves 12 b extending in parallel with one other in the drive direction of thepolishing pad 12. Thegrooves 12 a are inclined at a predetermined angle θ relative to the drive direction of thepolishing pad 12. The predetermined angle θ is set to such an extent that the essential functionality of the grooves in which the grooves ensure an efficient supply of slurry delivered from a nozzle onto thepolishing pad 12 does not deteriorate, preferably at about 1 to 15°. Thegrooves 12 b provided in thepolishing pad 12 are formed over the entire width from edge to edge of the polishing surface in the direction perpendicular to the drive direction of thepolishing pad 12. In the case where a plurality of thepolishing pads 12 are stuck on the surface of asurface plate 11, a gap must be provided between the polishingpads 12 adjacently arranged in the drive direction thereof - Using the
polishing pad 12 according to the third embodiment, a semiconductor wafer is polished. Then, as can be seen from the graph in FIG. 6 illustrating the relation between the position within the wafer and the wafer surface thickness, there is no unpolished portion in the center of the semiconductor wafer and in addition there is no thinned peripheral portion in the semiconductor wafer. Therefore, a uniform surface thickness can be attained in the entire polished surface of the semiconductor wafer. - (Modification of Third Embodiment)
- As shown in FIG. 7, in the case where a plurality of polishing
pads 12 are stuck on the surface of asurface plate 11,grooves 12 b provided in therespective polishing pads 12 are disposed in a zigzag arrangement in which thegrooves 12 b of each polishingpad 12 are inclined in an opposed direction to the direction of inclination of thegrooves 12 b provided in theadjacent polishing pad 12 relative to the drive direction of thepolishing pads 12. This further improves the flatness of the polished surface of a semiconductor wafer.
Claims (9)
1. A method for polishing a semiconductor wafer, in which the semiconductor wafer is polished by continuously driving a surface plate on which a plurality of polishing pads are stuck, the surface of each of the polishing pads being provided with a plurality of grooves each extending in the drive direction of the pad,
the method comprising the steps of:
sticking the plurality of polishing pads on the surface of the surface plate; and
polishing the semiconductor wafer by pressing the wafer against the surface of each said polishing pad with the surface plate driven,
wherein in the sticking step, the polishing pads are stuck in such a manner that the grooves of each said polishing pad are spaced not to align with the respective grooves of the polishing pad adjacently arranged in the drive direction of the surface plate.
2. The method of claim 1 , wherein in the sticking step, the polishing pads are stuck in such a manner that the grooves of each said polishing pad are offset by a predetermined distance from the respective grooves of the polishing pad adjacently arranged in the drive direction.
3. The method of claim 1 , wherein in the polishing step, the semiconductor wafer is polished with slurry containing abrasives flowing on the surfaces of the polishing pads.
4. A polishing pad for a semiconductor wafer,
wherein the polishing pad is stuck on the surface of a belt-type surface plate, and
a plurality of grooves extending in the drive direction of the polishing pad are formed over the entire width from edge to edge of the polishing pad in the direction perpendicular to the drive direction.
5. The pad of claim 4 , wherein the plurality of grooves are formed at regular intervals.
6. The pad of claim 4 , wherein the polishing pad is made of polyurethane foam.
7. A polishing pad for a semiconductor wafer,
wherein the polishing pad is stuck on the surface of a belt-type surface plate, and
in the surface of the polishing pad, a plurality of grooves extending in the drive direction of the polishing pad are formed at an angle relative to the drive direction.
8. The pad of claim 7 , wherein the plurality of grooves are formed at regular intervals.
9. The pad of claim 7 , wherein the polishing pad is made of polyurethane foam.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2002335617A JP2004172296A (en) | 2002-11-19 | 2002-11-19 | Polishing method for semiconductor wafer, and polishing pad therefor |
JP2002-335617 | 2002-11-19 |
Publications (1)
Publication Number | Publication Date |
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US20040097174A1 true US20040097174A1 (en) | 2004-05-20 |
Family
ID=32290345
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US10/665,015 Abandoned US20040097174A1 (en) | 2002-11-19 | 2003-09-22 | Method for polishing semiconductor wafer and polishing pad for the same |
Country Status (3)
Country | Link |
---|---|
US (1) | US20040097174A1 (en) |
JP (1) | JP2004172296A (en) |
CN (1) | CN1503332A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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US20090191794A1 (en) * | 2008-01-30 | 2009-07-30 | Iv Technologies Co., Ltd. | Polishing method, polishing pad, and polishing system |
US20120017935A1 (en) * | 2010-07-21 | 2012-01-26 | International Business Machines Corporation | Magnetic tape head cleaning |
US20120244785A1 (en) * | 2011-03-21 | 2012-09-27 | Powerchip Technology Corporation | Polishing method and polishing system |
CN105643405A (en) * | 2016-01-27 | 2016-06-08 | 南京宝泰特种材料股份有限公司 | Metal plate belt sander with adhesive belt replaced without being dismounted |
CN105922103A (en) * | 2016-06-23 | 2016-09-07 | 昆山市金旺来机械有限公司 | Horizontal adjusting mechanism for proportion roller of belt sander |
US9579826B2 (en) | 2014-04-04 | 2017-02-28 | Siltronic Ag | Method for slicing wafers from a workpiece using a sawing wire |
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CN101422882B (en) * | 2007-10-31 | 2015-05-20 | 智胜科技股份有限公司 | Grinding mat and method |
CN102922413B (en) * | 2011-08-12 | 2015-07-01 | 无锡华润上华科技有限公司 | Chemical mechanical polishing method |
KR101342063B1 (en) * | 2012-11-20 | 2013-12-18 | 최재현 | Belt typed polishing pad |
TWI558502B (en) * | 2014-11-07 | 2016-11-21 | 智勝科技股份有限公司 | Polishing pad set, polishing system and polishing method |
JP6372859B2 (en) * | 2015-10-01 | 2018-08-15 | 信越半導体株式会社 | Polishing pad conditioning method and polishing apparatus |
JP7178662B2 (en) * | 2019-04-10 | 2022-11-28 | パナソニックIpマネジメント株式会社 | Polishing device and polishing method |
CN111941221A (en) * | 2020-08-12 | 2020-11-17 | 赣州市业润自动化设备有限公司 | Belt-type chemical mechanical polishing device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6261168B1 (en) * | 1999-05-21 | 2001-07-17 | Lam Research Corporation | Chemical mechanical planarization or polishing pad with sections having varied groove patterns |
US6315857B1 (en) * | 1998-07-10 | 2001-11-13 | Mosel Vitelic, Inc. | Polishing pad shaping and patterning |
US6602123B1 (en) * | 2002-09-13 | 2003-08-05 | Infineon Technologies Ag | Finishing pad design for multidirectional use |
-
2002
- 2002-11-19 JP JP2002335617A patent/JP2004172296A/en active Pending
-
2003
- 2003-09-22 US US10/665,015 patent/US20040097174A1/en not_active Abandoned
- 2003-11-19 CN CNA2003101161835A patent/CN1503332A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6315857B1 (en) * | 1998-07-10 | 2001-11-13 | Mosel Vitelic, Inc. | Polishing pad shaping and patterning |
US6261168B1 (en) * | 1999-05-21 | 2001-07-17 | Lam Research Corporation | Chemical mechanical planarization or polishing pad with sections having varied groove patterns |
US6602123B1 (en) * | 2002-09-13 | 2003-08-05 | Infineon Technologies Ag | Finishing pad design for multidirectional use |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090191794A1 (en) * | 2008-01-30 | 2009-07-30 | Iv Technologies Co., Ltd. | Polishing method, polishing pad, and polishing system |
US8118645B2 (en) * | 2008-01-30 | 2012-02-21 | Iv Technologies Co., Ltd. | Polishing method, polishing pad, and polishing system |
US20120017935A1 (en) * | 2010-07-21 | 2012-01-26 | International Business Machines Corporation | Magnetic tape head cleaning |
US20120244785A1 (en) * | 2011-03-21 | 2012-09-27 | Powerchip Technology Corporation | Polishing method and polishing system |
US9393665B2 (en) * | 2011-03-21 | 2016-07-19 | Iv Technologies Co., Ltd. | Polishing method and polishing system |
US9579826B2 (en) | 2014-04-04 | 2017-02-28 | Siltronic Ag | Method for slicing wafers from a workpiece using a sawing wire |
CN105643405A (en) * | 2016-01-27 | 2016-06-08 | 南京宝泰特种材料股份有限公司 | Metal plate belt sander with adhesive belt replaced without being dismounted |
CN105922103A (en) * | 2016-06-23 | 2016-09-07 | 昆山市金旺来机械有限公司 | Horizontal adjusting mechanism for proportion roller of belt sander |
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JP2004172296A (en) | 2004-06-17 |
CN1503332A (en) | 2004-06-09 |
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