US20040175878A1 - Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices - Google Patents

Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices Download PDF

Info

Publication number
US20040175878A1
US20040175878A1 US10/799,069 US79906904A US2004175878A1 US 20040175878 A1 US20040175878 A1 US 20040175878A1 US 79906904 A US79906904 A US 79906904A US 2004175878 A1 US2004175878 A1 US 2004175878A1
Authority
US
United States
Prior art keywords
wafer
heating furnace
holding jig
semiconductor wafer
furnace
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US10/799,069
Inventor
Mikio Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FTL Co Ltd
Topco Scientific Co Ltd
Original Assignee
FTL Co Ltd
Topco Scientific Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FTL Co Ltd, Topco Scientific Co Ltd filed Critical FTL Co Ltd
Priority to US10/799,069 priority Critical patent/US20040175878A1/en
Assigned to TOPCO SCIENTIFIC CO., LTD., F.T.L. CO., LTD. reassignment TOPCO SCIENTIFIC CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: TAKAGI, MIKIO
Publication of US20040175878A1 publication Critical patent/US20040175878A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67109—Apparatus for thermal treatment mainly by convection
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4587—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially vertically
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/08—Reaction chambers; Selection of materials therefor
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/12—Substrate holders or susceptors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67303—Vertical boat type carrier whereby the substrates are horizontally supported, e.g. comprising rod-shaped elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67346—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders characterized by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68707—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a robot blade, or gripped by a gripper for conveyance

Definitions

  • the present invention relates to an assembly of a hot wall-heating furnace used in the process of manufacturing various semiconductor devices; including the CVD process and diffusion process, and a semiconductor wafer-holding jig.
  • the present invention also relates to a process of manufacturing semiconductor devices using this assembly.
  • CMOS devices by using the above-mentioned vertical heating furnace (3rd International Rapid Thermal Processing conference, RTP '95. Aug. 30-Sep. 1, 1995, Amsterdam, Netherlands, THE EFFECTS OF RAPID THERMAL PROCESSING ON QUARTER MICRON CMOS DEVICES, pp 101-103). It is also reported that this type of furnace is suitable for use in the reflow process (4 th Int. Conf. On Advanced Thermal Processing of Semiconductors-RTP, '96, 30-33), and in the annealing of gigabit DRAM devices (4 th Int. Conf., On Advanced Thermal Processing of Semiconductors, RTP '96).
  • FIG. 1 shows the main structure of a vertical single wafer heating furnace having excellent temperature distribution.
  • 1 is a furnace body made of refractory or heat insulating material.
  • 2 is a heater.
  • 3 is a reaction chamber made of quartz.
  • 4 is a gas introduction conduit opened at the top of the reaction chamber 3 for feeding reaction gas from the bottom portion of the furnace.
  • 5 is a furnace floor plate.
  • 6 is a lifting rod which is elevated and rotated in the furnace body in the heat treatment process.
  • 7 is a wafer holding portion extended upwards obliquely from the lifting rod 6 .
  • 8 is a wafer.
  • 9 is a claw extended horizontally from the wafer holding portion for holding the back surface of the wafer.
  • 10 is an O-ring.
  • the temperature distribution of the wafer 8 is influenced by the distance from the heater 2 , and thus the temperature at the center of the wafer is high while the temperature in the peripheral portion is low.
  • U.S. Pat. No. 6,159,873 disclosed several embodiments of the use of thermal storage plates as heaters.
  • FIG. 12 of the US patent it is shown that the front surface of the wafer is positioned in the direct proximity of the heater that is mounted in the flat ceiling portion of the furnace. In this manner, as the wafer and the heater are positioned close to each other, the temperature distribution of the front surface of the wafer can be significantly improved.
  • An object of the present invention is to provide an assembly of a heating furnace and wafer-holding jig that can significantly reduce the clean room footprint of the heating furnace.
  • Another object of this invention is to provide a process of manufacturing semiconductor devices using the assembly of the invention.
  • the footprint is larger than the surface area of the wafers. Moreover, if the wafers are held upright in a horizontal heating furnace, similarly, the footprint is larger than the surface area of the wafers. In any case, the size of the heating furnace becomes larger.
  • the wafer-holding jig is usually assembled with the heating furnace.
  • the assembly of heating furnace and semiconductor wafer-holding jig of the invention includes a furnace body made of refractory or heat insulting material; a heater disposed around the inner side surface of the furnace body; a reaction tube which forms a uniform heating zone; and a wafer-holding jig capable of holding the wafer, and advancing and retracting in the uniform heating zone along the longitudinal axes of the furnace body.
  • the assembly of the invention is characterized in that the front surface of the wafer is held on the wafer-holding jig in such a manner that the front surface is substantially in parallel with the surface of the heater.
  • the assembly can be applied in a vertical heating furnace or a horizontal-heating furnace.
  • the assembly can include a plurality of thermal storage plates disposed in the uniform heating zone.
  • the thermal storage plates are of the same size, or are smaller than the wafers, and are disposed substantially in parallel with one of the wafers or between two wafers.
  • the assembly of the invention can be used in rapid thermal processing (RTP) including RTA (Rapid Thermal Annealing), RTO (Rapid Thermal Oxidation), RTN (Rapid Thermal Nitriding), RTCVD (Rapid Thermal Chemical Vapor Deposition), and RT-Wet Reflowing.
  • RTA Rapid Thermal Annealing
  • RTO Rapid Thermal Oxidation
  • RTN Rapid Thermal Nitriding
  • RTCVD Rapid Thermal Chemical Vapor Deposition
  • RT-Wet Reflowing RT-Wet Reflowing.
  • the assembly also can be used in atmosphere of CVD gas, under the same conditions, to form a CVD film.
  • the assembly can also be used in high temperature steam to reflow a film of BPSG.
  • RTP can be applied on 8-12 inch CVD film.
  • the assembly of the invention also includes a gas- introduction hollow conduit disposed along the longitudinal axes of the heating furnace.
  • the gas-guiding hollow conduit is communicated with the wafer-holding jig.
  • the wafer-holding jig includes a wafer-holding portion having an ejecting hole for ejecting a gas that is inert to the wafer from the gas introduction hollow conduit.
  • FIG. 1 illustrates an embodiment of a vertical single wafer hot wall heating furnace according to the prior art
  • FIG. 2 is a cross-sectional view illustrating an embodiment of an assembly of vertical heating furnace and vertically disposed wafer-holding jig according to the present invention
  • FIG. 3 is a vertical-sectional view of the furnace shown in FIG. 2;
  • FIG. 4 is a cross-sectional view illustrating an embodiment of an assembly of vertical heating furnace, wafer-holding jig and thermal storage plate according to the present invention
  • FIG. 5 is a sectional view taken from A-A of FIG. 4;
  • FIG. 6 illustrates an embodiment of an assembly of a horizontal heating furnace and vertically disposed wafer-holding jig, which is a sectional view taken from A-A of FIG. 7;
  • FIG. 7 is a sectional view taken from B-B of FIG. 6;
  • FIG. 8 illustrates an embodiment of the structure of the claw portion of the wafer-holding jig, which is a sectional view taken from C-C of FIG. 7;
  • FIG. 9 illustrates another embodiment of the structure of the claw portion of the wafer-holding jig, which is a sectional view taken from B-B of FIG. 7;
  • FIGS. 10 a and 10 b illustrate the wafer-holding jig which is horizontally disposed in a horizontal heating furnace
  • FIG. 10 c is a schematic view showing the heating profile of the wafer
  • FIG. 11 is a schematic view of an assembly of a horizontal heating furnace and a horizontally disposed wafer-holding jig;
  • FIG. 12 is a plan view of FIG. 11.
  • FIG. 13 is a schematic view illustrating the section of the frame shown in FIG. 11 and FIG. 12.
  • FIGS. 2 and 3 it should be noted that the same portions of the heating furnace as illustrated in FIG. 1 are given the same reference numerals.
  • wafer 8 is held upright in the vertical heating furnace.
  • the heater 2 of the heating furnace is disposed around the inner side surface of the furnace body 1 and is not arranged in a circular shape as in a conventional heating furnace.
  • the cross-sectional profile of heater 2 is arranged in an oblong shape comprising a straight line connected with a curved line, as can be seen in FIG. 2.
  • the uniformity of the temperature distribution of the front surface of the wafers can be increased and the footprint of the heating furnace is reduced.
  • w is the diameter of the wafer, and when w equals 12 inches, L 0 (length of the reaction tube) equals 400 mm, L 1 (maximum diameter of heater 2 ) equals 410 mm, L 2 (minimum diameter of heater 2 ) equals 70 mm, t (minimum diameter of reaction tube) equals 50 mm, and T (thickness of the furnace wall) equals 70 mm. Note that although only one wafer is shown in FIG. 2, two wafers can be held in parallel according to the present invention. It can be understood from FIG. 2 that the products of d ⁇ D and D ⁇ D(D 2 ) respectively approximate to the footprint of the heating furnace disclosed and a conventional furnace. Accordingly, the reduction rate of the footprint according to the present invention can be denoted by d/D, which is about 30-50%.
  • FIG. 4 and FIG. 5 are respectively a modified structure of FIG. 2 and FIG. 3 with the addition of thermal storage plates 12 for simultaneously heat-treating two wafers. That is to say the thermal storage plates 12 have nothing to do with the loading of the wafers 8 and are disposed in the uniform heating zone of the heating furnace. Moreover, similar to U.S. Pat. No. 6,159,873, the thermal storage plates 12 are disposed between the two upright held wafers 8 . Note that the thermal storage plate 12 has the same size as the wafers 8 . If the thermal storage plate 12 has a bigger size than the wafers 8 , then temperature non-uniformity will occur, and the uniformity of temperature distribution can not be obtained.
  • the thermal storage plates 12 are held in the recessed portion 3 a of the upper reaction chamber 3 .
  • the heating furnace having a structure as shown in FIG. 4 and FIG. 5 two wafers can be heat-treated at same temperature distribution profile as described in FIG. 1.
  • the footprint ratio corresponding to the number of the wafers is two times of that of the heating furnace of FIG. 2.
  • wafer 8 is held upright in a horizontal heating furnace.
  • the furnace body 1 and the heater 2 are divided into high temperature heating zone a, where reaction occurs, and low temperature heating zone b, where wafer 8 is held at low temperature prior to reaction.
  • reference numeral 13 is an exhaust conduit
  • 14 is an lid for closing the inlet of the furnace
  • 20 is a perforated rectifying plate in honeycomb shape for adjusting the gas flow in the reaction room.
  • the width between furnace bodies 1 a and 1 b of the horizontal furnace is less than ⁇ fraction (1/2) ⁇ of a conventional furnace, and thus the footprint is reduced.
  • the wafer holding jig 16 as shown in FIG. 7 comprises a hollow rod 17 , and a curved arm portion 19 mounted on the front end of the hollow rod 17 for holding the wafer 8 .
  • the wafer holding jig 16 is driven by any driving means so that it can be advanced and retracted in the furnace along the low temperature heating zone b and high temperature heating zone a. 15 is a spacer.
  • the hollow rod 17 functions both as a wafer-moving jig and a gas introduction conduit.
  • the curved arm portion 19 is opened at an angle of 120° so as to hold the bottom portion of the wafer 8 .
  • claws 19 a , 19 b formed on the curved arm portion 19 and protruded to the center of the wafer 8 .
  • the two claws 19 a are so disposed that the extended line of each claw 19 a forms an angle of 60 degree with respect to the vertical line.
  • These two claw portions 19 a have the function of preventing the wafer 8 from falling off. That is, the claws 19 can hold the peripheral portion of the wafer 8 from its two sides, and the inner portion of the claws is forked to nip the wafer 8 so as to prevent the wafer from falling off.
  • the claw 19 b holds the wafer 8 from-its bottom portion along the vertical line. Reaction gas is flowed in the bore of the hollow rod 17 to the reaction room. The holding of the wafer 8 by the claws 19 will be described in more detail hereinafter.
  • FIG. 8 an embodiment of the structure in which the reaction gas is flowed in the claws 19 a is shown.
  • the claws 19 a hold the wafer 8 to prevent it from falling off.
  • the claws 19 are mounted on the front end of the hollow rod 17 , and have a structure that can hold the wafer 8 and eject reaction gas.
  • a space 23 that communicates with the bore of the hollow rod 17 is formed in the outer shell 21 of the claw 19 a .
  • the upper two sides of the outer shell 21 are bent to form a reversed U-shaped recessed portion 27 .
  • a U-shaped inner member 22 is disposed and is engaged in a portion of the outer shell 21 .
  • the U-shaped inner member 22 forms a part of the recessed portion 27 .
  • the silicon of the wafer 8 adheres to the quartz of the claw 19 a when they are heated to a temperature of above 1000° C. and sintering reaction occurs. As long as they are in adhesion, the frictional force between them becomes larger, which usually causes a risk of production of particles. Moreover, when the completely adhered wafer 8 and outer shell 21 and inner member 22 are separated, particles are produced. However, according to the present invention, a clearance 23 is formed between the U-shaped inner portion 22 and the outer shell 21 . Thus, reaction gas flows in the space formed by the U-shaped inner member 22 , and escapes from the small clearance formed at the contacting portion of the wafer 8 and the quartz.
  • reaction gas has a small specific heat, it is sufficiently preheated to a high temperature in the furnace and ejected out from the clearance 24 , and thus the temperature distribution of the wafer 8 is not influenced.
  • 25 is a room for the flow of the reaction gas from the hollow rod 16 , and functions as an interior room of the communicated claws 19 a .
  • 26 is an ejection hole for the flow of inert gas, ie., a gas that does not react with the wafer, such as nitrogen gas.
  • a holding frame 31 is disposed and similarly, eight pins 34 are protruded from the holding frame 31 . After the holding portion 30 is moved to the upper side of the holding frame 31 , wafer 8 is connected with pins 34 and then descends. After that, the holding portion 30 is retracted.
  • FIG. 11 in a horizontal furnace in which two wafers are horizontally held, when the wafers are held on one level, the occupied space is small, and by holding the wafers on multi-levels, the occupied space can be further reduced.
  • the wafer-holding jig (not shown) is so designed that its upper and lower forks can hold respectively one wafer, and the wafers 8 can be held in an upper rack and a lower rack respectively.
  • FIG. 11 also illustrates another method for the prevention of the sintering of wafer and quartz. Two wafers are held in a wafer rack 41 by a wafer-holding jig (not shown).
  • Wafer 18 is held from its bottom portion by 4 claws 19 c which are 90 degree separated from the wafer's center.
  • Claws 19 c are fixed on frame 42 , which is short when viewing from the plan view.
  • the frame 42 holds the flat surface 3 a of the quartz reaction chamber 3 via a base (not shown).
  • a gas introduction conduit is extended from the inlet of the quartz reaction gas chamber 3 to the zone of the frame 42 of the furnace, and the gas for preventing the sintering is ejected from an ejection hole 19 c opened at the front end of the claw 19 c .
  • the tube 41 which constitutes the frame, can eject gqs from the ejecting hole 19 c and thus lift the wafer 8 slightly, so that sintering can be prevented.
  • the temperature distribution of the wafers can be uniformly maintained, and the cost of the investment of the semiconductor manufacturing equipment can be saved.

Abstract

An assembly of heating furnace and semiconductor wafer-holding jig. This assembly includes a furnace body made of refractory or heat insulting material; a heater disposed around the inner side surface of the furnace body; a reaction chamber which forms a uniform heating zone; and a wafer-holding jig. The wafer-holding jig is capable of holding the wafer and advancing and retracting the wafer in the uniform heating region along the longitudinal direction of the furnace body. The front surface of the semiconductor wafer to be heat-treated is substantially in parallel with the surface of the heater. The assembly of the invention can be used in rapid thermal processing and the footprint of the heating furnace can be reduced.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention relates to an assembly of a hot wall-heating furnace used in the process of manufacturing various semiconductor devices; including the CVD process and diffusion process, and a semiconductor wafer-holding jig. The present invention also relates to a process of manufacturing semiconductor devices using this assembly. [0002]
  • 2. Description of the Related Art [0003]
  • Semiconductor manufacturing apparatuses using a hot wall-heating furnace are well known. For example, in the Conference of Applied Physics, (No. 55, Nagoya, Japan, Sep. 19-22, 1994), it is reported that, in rapid thermal annealing (RTA) , moving a wafer between a low temperature zone and a high temperature zone, disposed respectively at the top and bottom portion of a vertical hot wall heating furnace, can obtain a better sheet resistance distribution in the wafer surface than that by using an ordinary RTA. It is also reported that in RTA, five wafers are heat-treated at a temperature of 1000° C. for 10 seconds to produce CMOS devices by using the above-mentioned vertical heating furnace (3rd International Rapid Thermal Processing conference, RTP '95. Aug. 30-Sep. 1, 1995, Amsterdam, Netherlands, THE EFFECTS OF RAPID THERMAL PROCESSING ON QUARTER MICRON CMOS DEVICES, pp 101-103). It is also reported that this type of furnace is suitable for use in the reflow process (4[0004] th Int. Conf. On Advanced Thermal Processing of Semiconductors-RTP, '96, 30-33), and in the annealing of gigabit DRAM devices (4th Int. Conf., On Advanced Thermal Processing of Semiconductors, RTP '96).
  • FIG. 1 shows the main structure of a vertical single wafer heating furnace having excellent temperature distribution. Referring to FIG. 1, 1 is a furnace body made of refractory or heat insulating material. [0005] 2 is a heater. 3 is a reaction chamber made of quartz. 4 is a gas introduction conduit opened at the top of the reaction chamber 3 for feeding reaction gas from the bottom portion of the furnace. 5 is a furnace floor plate. 6 is a lifting rod which is elevated and rotated in the furnace body in the heat treatment process. 7 is a wafer holding portion extended upwards obliquely from the lifting rod 6. 8 is a wafer. 9 is a claw extended horizontally from the wafer holding portion for holding the back surface of the wafer. 10 is an O-ring. 11 is an exhaust conduit opened at the bottom of the reaction chamber 3. By using a heating furnace having such a structure, the temperature distribution of the wafer 8 is influenced by the distance from the heater 2, and thus the temperature at the center of the wafer is high while the temperature in the peripheral portion is low.
  • In order to make the temperature distribution of the front surface of the wafer uniform, the applicant of this application has proposed a method that has been patented in the United States as U.S. Pat. No. 6,159,873. According to the patented method, thermal storage plates having substantially the same size of the wafer are disposed in the heating furnace, and are preliminarily heated to a heat-treating temperature, and then the wafer is positioned to the proximity of the thermal storage plates. By using both the heat from the heater and from the thermal storage plates, it is possible to make temperature distribution of the front surface of the wafer uniform and raise the temperature of the wafer rapidly. In the article published in the Conference of Applied Physics, Spring, 1998, the effect of the thermal storage plates has been investigated and studied by means of simulation by the inventors of said U.S. patent. [0006]
  • Moreover, U.S. Pat. No. 6,159,873 disclosed several embodiments of the use of thermal storage plates as heaters. In FIG. 12 of the US patent, it is shown that the front surface of the wafer is positioned in the direct proximity of the heater that is mounted in the flat ceiling portion of the furnace. In this manner, as the wafer and the heater are positioned close to each other, the temperature distribution of the front surface of the wafer can be significantly improved. [0007]
  • According to the method of the U.S. patent, since the wafer is positioned in direct proximity of the heater mounted in the ceiling portion of the furnace, the temperature distribution is improved. However, because the section of the heating furnace is circular in shape, the clean room footprint of the furnace is big. As the building cost of a clean room for accommodating a heating furnace for manufacturing semiconductor devices is high, it is desirable to reduce the clean room footprint of the heating furnace. [0008]
    • SUMMARY OF THE INVENTION
  • An object of the present invention is to provide an assembly of a heating furnace and wafer-holding jig that can significantly reduce the clean room footprint of the heating furnace. [0009]
  • Another object of this invention is to provide a process of manufacturing semiconductor devices using the assembly of the invention. [0010]
  • In the heat treatment of semiconductor wafers (hereinafter wafer(s)), if the wafers are horizontally supported in a vertical heating furnace, the footprint is larger than the surface area of the wafers. Moreover, if the wafers are held upright in a horizontal heating furnace, similarly, the footprint is larger than the surface area of the wafers. In any case, the size of the heating furnace becomes larger. In order to make the front surface of the wafer be consistent with the longitudinal axes of the furnace, i.e., the vertical axes of a vertical heating furnace or the horizontal axes of a horizontal heating furnace, the wafer-holding jig is usually assembled with the heating furnace. [0011]
  • It has been found by the inventors that by changing the sectional profile of the heating furnace in such a manner that the front surface of the wafer is parallel to the inner side surface of the furnace, the above objects can be attained. [0012]
  • Specifically, the assembly of heating furnace and semiconductor wafer-holding jig of the invention includes a furnace body made of refractory or heat insulting material; a heater disposed around the inner side surface of the furnace body; a reaction tube which forms a uniform heating zone; and a wafer-holding jig capable of holding the wafer, and advancing and retracting in the uniform heating zone along the longitudinal axes of the furnace body. The assembly of the invention is characterized in that the front surface of the wafer is held on the wafer-holding jig in such a manner that the front surface is substantially in parallel with the surface of the heater. [0013]
  • According to an aspect of the invention, the assembly can be applied in a vertical heating furnace or a horizontal-heating furnace. [0014]
  • According to another aspect of the invention, the assembly can include a plurality of thermal storage plates disposed in the uniform heating zone. The thermal storage plates are of the same size, or are smaller than the wafers, and are disposed substantially in parallel with one of the wafers or between two wafers. [0015]
  • According to a further aspect of the invention, the assembly of the invention can be used in rapid thermal processing (RTP) including RTA (Rapid Thermal Annealing), RTO (Rapid Thermal Oxidation), RTN (Rapid Thermal Nitriding), RTCVD (Rapid Thermal Chemical Vapor Deposition), and RT-Wet Reflowing. When the assembly of the invention is used in a RTA, the temperature of the furnace is raised or lowered at a rate of 10-150° C./sec and kept for 0-20 seconds at the heat-treating temperature. Under the same conditions above, the assembly can be used in RTO to form thin oxide film, and in RTN to form nitride film on the silicon surface. The assembly also can be used in atmosphere of CVD gas, under the same conditions, to form a CVD film. The assembly can also be used in high temperature steam to reflow a film of BPSG. By using the assembly of the invention, RTP can be applied on 8-12 inch CVD film. [0016]
  • According to a further aspect of the invention, the assembly of the invention also includes a gas- introduction hollow conduit disposed along the longitudinal axes of the heating furnace. The gas-guiding hollow conduit is communicated with the wafer-holding jig. The wafer-holding jig includes a wafer-holding portion having an ejecting hole for ejecting a gas that is inert to the wafer from the gas introduction hollow conduit. [0017]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The present invention can be more fully understood by reading the subsequent detailed description in conjunction with the preferred embodiments and references made to the accompanying drawing, wherein: [0018]
  • FIG. 1 illustrates an embodiment of a vertical single wafer hot wall heating furnace according to the prior art; [0019]
  • FIG. 2 is a cross-sectional view illustrating an embodiment of an assembly of vertical heating furnace and vertically disposed wafer-holding jig according to the present invention; [0020]
  • FIG. 3 is a vertical-sectional view of the furnace shown in FIG. 2; [0021]
  • FIG. 4 is a cross-sectional view illustrating an embodiment of an assembly of vertical heating furnace, wafer-holding jig and thermal storage plate according to the present invention; [0022]
  • FIG. 5 is a sectional view taken from A-A of FIG. 4; [0023]
  • FIG. 6 illustrates an embodiment of an assembly of a horizontal heating furnace and vertically disposed wafer-holding jig, which is a sectional view taken from A-A of FIG. 7; [0024]
  • FIG. 7 is a sectional view taken from B-B of FIG. 6; [0025]
  • FIG. 8 illustrates an embodiment of the structure of the claw portion of the wafer-holding jig, which is a sectional view taken from C-C of FIG. 7; [0026]
  • FIG. 9 illustrates another embodiment of the structure of the claw portion of the wafer-holding jig, which is a sectional view taken from B-B of FIG. 7; [0027]
  • FIGS. 10[0028] a and 10 b illustrate the wafer-holding jig which is horizontally disposed in a horizontal heating furnace;
  • FIG. 10[0029] c is a schematic view showing the heating profile of the wafer;
  • FIG. 11 is a schematic view of an assembly of a horizontal heating furnace and a horizontally disposed wafer-holding jig; [0030]
  • FIG. 12 is a plan view of FIG. 11; and [0031]
  • FIG. 13 is a schematic view illustrating the section of the frame shown in FIG. 11 and FIG. 12.[0032]
    • DETAILED DESCRIPTION OF THE INVENTION
  • Referring to FIGS. 2 and 3, it should be noted that the same portions of the heating furnace as illustrated in FIG. 1 are given the same reference numerals. As can be seen from FIG. 2 and FIG. 3, [0033] wafer 8 is held upright in the vertical heating furnace. The heater 2 of the heating furnace is disposed around the inner side surface of the furnace body 1 and is not arranged in a circular shape as in a conventional heating furnace. The cross-sectional profile of heater 2 is arranged in an oblong shape comprising a straight line connected with a curved line, as can be seen in FIG. 2. As a result, the uniformity of the temperature distribution of the front surface of the wafers can be increased and the footprint of the heating furnace is reduced. In these figures, w is the diameter of the wafer, and when w equals 12 inches, L0 (length of the reaction tube) equals 400 mm, L1 (maximum diameter of heater 2) equals 410 mm, L2 (minimum diameter of heater 2) equals 70 mm, t (minimum diameter of reaction tube) equals 50 mm, and T (thickness of the furnace wall) equals 70 mm. Note that although only one wafer is shown in FIG. 2, two wafers can be held in parallel according to the present invention. It can be understood from FIG. 2 that the products of d×D and D×D(D2) respectively approximate to the footprint of the heating furnace disclosed and a conventional furnace. Accordingly, the reduction rate of the footprint according to the present invention can be denoted by d/D, which is about 30-50%.
  • The structures as shown in FIG. 4 and FIG. 5 are respectively a modified structure of FIG. 2 and FIG. 3 with the addition of [0034] thermal storage plates 12 for simultaneously heat-treating two wafers. That is to say the thermal storage plates 12 have nothing to do with the loading of the wafers 8 and are disposed in the uniform heating zone of the heating furnace. Moreover, similar to U.S. Pat. No. 6,159,873, the thermal storage plates 12 are disposed between the two upright held wafers 8. Note that the thermal storage plate 12 has the same size as the wafers 8. If the thermal storage plate 12 has a bigger size than the wafers 8, then temperature non-uniformity will occur, and the uniformity of temperature distribution can not be obtained. The thermal storage plates 12 are held in the recessed portion 3 a of the upper reaction chamber 3. By using the heating furnace having a structure as shown in FIG. 4 and FIG. 5, two wafers can be heat-treated at same temperature distribution profile as described in FIG. 1. Moreover, the footprint ratio corresponding to the number of the wafers is two times of that of the heating furnace of FIG. 2.
  • Referring now to FIG. 6 and FIG. 7, [0035] wafer 8 is held upright in a horizontal heating furnace. The furnace body 1 and the heater 2 are divided into high temperature heating zone a, where reaction occurs, and low temperature heating zone b, where wafer 8 is held at low temperature prior to reaction. As shown in FIG. 7, reference numeral 13 is an exhaust conduit, 14 is an lid for closing the inlet of the furnace, and 20 is a perforated rectifying plate in honeycomb shape for adjusting the gas flow in the reaction room. The width between furnace bodies 1 a and 1 b of the horizontal furnace is less than {fraction (1/2)} of a conventional furnace, and thus the footprint is reduced.
  • The [0036] wafer holding jig 16 as shown in FIG. 7 comprises a hollow rod 17, and a curved arm portion 19 mounted on the front end of the hollow rod 17 for holding the wafer 8. The wafer holding jig 16 is driven by any driving means so that it can be advanced and retracted in the furnace along the low temperature heating zone b and high temperature heating zone a. 15 is a spacer. Actually, the hollow rod 17 functions both as a wafer-moving jig and a gas introduction conduit. The curved arm portion 19 is opened at an angle of 120° so as to hold the bottom portion of the wafer 8. There are three claws 19 a, 19 b formed on the curved arm portion 19 and protruded to the center of the wafer 8. The two claws 19 a are so disposed that the extended line of each claw 19 a forms an angle of 60 degree with respect to the vertical line. These two claw portions 19 a have the function of preventing the wafer 8 from falling off. That is, the claws 19 can hold the peripheral portion of the wafer 8 from its two sides, and the inner portion of the claws is forked to nip the wafer 8 so as to prevent the wafer from falling off. The claw 19 b, however, holds the wafer 8 from-its bottom portion along the vertical line. Reaction gas is flowed in the bore of the hollow rod 17 to the reaction room. The holding of the wafer 8 by the claws 19 will be described in more detail hereinafter.
  • Referring to FIG. 8, an embodiment of the structure in which the reaction gas is flowed in the [0037] claws 19 a is shown. The claws 19 a hold the wafer 8 to prevent it from falling off. The claws 19 are mounted on the front end of the hollow rod 17, and have a structure that can hold the wafer 8 and eject reaction gas. As can be seen from FIG. 8, a space 23 that communicates with the bore of the hollow rod 17 is formed in the outer shell 21 of the claw 19 a. The upper two sides of the outer shell 21 are bent to form a reversed U-shaped recessed portion 27. On the other hand, inside the outer shell 21, a U-shaped inner member 22 is disposed and is engaged in a portion of the outer shell 21. The U-shaped inner member 22 forms a part of the recessed portion 27. The silicon of the wafer 8 adheres to the quartz of the claw 19 a when they are heated to a temperature of above 1000° C. and sintering reaction occurs. As long as they are in adhesion, the frictional force between them becomes larger, which usually causes a risk of production of particles. Moreover, when the completely adhered wafer 8 and outer shell 21 and inner member 22 are separated, particles are produced. However, according to the present invention, a clearance 23 is formed between the U-shaped inner portion 22 and the outer shell 21. Thus, reaction gas flows in the space formed by the U-shaped inner member 22, and escapes from the small clearance formed at the contacting portion of the wafer 8 and the quartz. As a result, it is possible to prevent the friction between the wafer 8 and the claws, and thus prevent the production of particles. Moreover, as reaction gas has a small specific heat, it is sufficiently preheated to a high temperature in the furnace and ejected out from the clearance 24, and thus the temperature distribution of the wafer 8 is not influenced.
  • Referring to FIG. 9 now, a structure in which the gas is ejected from the vertically formed [0038] claw 19 b is shown. 25 is a room for the flow of the reaction gas from the hollow rod 16, and functions as an interior room of the communicated claws 19 a. 26 is an ejection hole for the flow of inert gas, ie., a gas that does not react with the wafer, such as nitrogen gas.
  • The present invention can also be applied in a horizontal heating furnace in which the wafers are horizontally held. Although an embodiment is not shown, it can be easily understood by rearranging the [0039] sides 1 a, 1 b of the furnace body 1 of FIG. 6 to be in the upper and lower positions. FIG. 10 is an embodiment illustrating the wafer holding jig used in this situation. As shown in FIG. 10, a different wafer-holding jig from that shown in FIG. 7 is illustrated. That is, at the front end of the rod 32 that can be advanced and retracted in the furnace, a U-shaped holding portion 30 is fixed. From the front end, eight pins 33 are protruded wherein the four inside pins hold the wafer 8 from its bottom portion. In the high temperature zone of the furnace, a holding frame 31 is disposed and similarly, eight pins 34 are protruded from the holding frame 31. After the holding portion 30 is moved to the upper side of the holding frame 31, wafer 8 is connected with pins 34 and then descends. After that, the holding portion 30 is retracted.
  • Referring to FIG. 11, in a horizontal furnace in which two wafers are horizontally held, when the wafers are held on one level, the occupied space is small, and by holding the wafers on multi-levels, the occupied space can be further reduced. In this case, the wafer-holding jig (not shown) is so designed that its upper and lower forks can hold respectively one wafer, and the [0040] wafers 8 can be held in an upper rack and a lower rack respectively. FIG. 11 also illustrates another method for the prevention of the sintering of wafer and quartz. Two wafers are held in a wafer rack 41 by a wafer-holding jig (not shown). Wafer 18 is held from its bottom portion by 4 claws 19 c which are 90 degree separated from the wafer's center. Claws 19 c are fixed on frame 42, which is short when viewing from the plan view. The frame 42 holds the flat surface 3 a of the quartz reaction chamber 3 via a base (not shown). A gas introduction conduit is extended from the inlet of the quartz reaction gas chamber 3 to the zone of the frame 42 of the furnace, and the gas for preventing the sintering is ejected from an ejection hole 19 c opened at the front end of the claw 19 c. Referring to FIG. 13, the tube 41, which constitutes the frame, can eject gqs from the ejecting hole 19 c and thus lift the wafer 8 slightly, so that sintering can be prevented.
  • Referring to FIG. 10[0041] c now, when a silicon wafer is heated by using the furnace of the invention and the high temperature section is below 700° C., the silicon wafer can be directly placed in the high temperature section for heating. However, if the high temperature section is higher than 800° C., it is preferably to place the wafer first in a uniform heating section and preliminarily heated, and then rapidly moved to the high temperature section for a rapid heating so as to reduce the stress that may be occurred in the wafer.
  • When a horizontal furnace as shown in FIG. 7 and FIG. 11 is used, it is also possible to follow the heating profile as illustrated in FIG. 10[0042] c. That is, the wafer can be first placed in a low temperature section for uniform heating, and then be moved to high temperature section for rapid heating.
  • As described above, by using the present invention, the temperature distribution of the wafers can be uniformly maintained, and the cost of the investment of the semiconductor manufacturing equipment can be saved. [0043]

Claims (9)

What is claimed is:
1. An assembly of heating furnace and semiconductor wafer-holding jig, comprising:
a furnace body made of refractory or heat insulting material having at least one flat surface;
a heater disposed around the inner side surface of said furnace body;
a reaction chamber which forms a uniform heating zone; and
a wafer-holding jig capable of holding a semiconductor wafer and advancing and retracting the semiconductor wafer in the uniform heating zone along the longitudinal axes of the furnace body, the wafer-holding jig arranged such that the front surface of the semiconductor wafer is substantially in parallel with said flat surface of said heater.
2. The assembly as claimed in claim 1, wherein said heating furnace is a vertical heating furnace.
3. The assembly as claimed in claim 1, wherein said heating furnace is a horizontal heating furnace.
4. The assembly as claimed in claim 1, further comprising a plurality of thermal storage plates disposed in the uniform heating zone, wherein the thermal storage plates are of the same size, or are smaller than the semiconductor wafers, and are disposed substantially in parallel with the semiconductor wafer or between two semiconductor wafers.
5. A method of manufacturing a semiconductor device, comprising heat-treating a semiconductor wafer by rapid thermal processing using the assembly as claimed in claim 1.
6. A method of manufacturing a semiconductor device, comprising heat-treating a semiconductor wafer by rapid thermal processing using the assembly as claimed in claim 4.
7. A semiconductor wafer-holding jig used in a-heating furnace, comprising:
a gas introduction hollow conduit disposed along the longitudinal direction of the heating furnace; and
a wafer-holding jig disposed on the front end of said gas introduction hollow conduit, comprising a wafer-holding portion which includes an ejection hole for ejecting a gas to the semiconductor wafer from said gas introduction hollow conduit.
8. The semiconductor wafer-holding jig as claimed in claim 7, which is used in a vertical heating furnace.
9. The semiconductor wafer-holding jig as claimed in claim 7, which is used in a horizontal heating furnace.
US10/799,069 2001-07-26 2004-03-12 Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices Abandoned US20040175878A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/799,069 US20040175878A1 (en) 2001-07-26 2004-03-12 Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2001225713A JP3554297B2 (en) 2001-07-26 2001-07-26 Semiconductor substrate heat treatment apparatus and semiconductor element manufacturing method
JP2001-225713 2001-07-26
US10/202,698 US6793734B2 (en) 2001-07-26 2002-07-25 Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices
US10/799,069 US20040175878A1 (en) 2001-07-26 2004-03-12 Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US10/202,698 Division US6793734B2 (en) 2001-07-26 2002-07-25 Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices

Publications (1)

Publication Number Publication Date
US20040175878A1 true US20040175878A1 (en) 2004-09-09

Family

ID=19058657

Family Applications (2)

Application Number Title Priority Date Filing Date
US10/202,698 Expired - Fee Related US6793734B2 (en) 2001-07-26 2002-07-25 Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices
US10/799,069 Abandoned US20040175878A1 (en) 2001-07-26 2004-03-12 Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US10/202,698 Expired - Fee Related US6793734B2 (en) 2001-07-26 2002-07-25 Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices

Country Status (5)

Country Link
US (2) US6793734B2 (en)
JP (1) JP3554297B2 (en)
KR (1) KR100524390B1 (en)
CN (1) CN1196177C (en)
TW (1) TW554419B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090191499A1 (en) * 2008-01-25 2009-07-30 Micron Technology, Inc. Methods and apparatuses for heating semiconductor wafers
US20100025909A1 (en) * 2006-10-13 2010-02-04 Toshiaki Ono Method and jig for holding silicon wafer
US20130112887A1 (en) * 2011-11-09 2013-05-09 Shenzhen China Star Optoelectronics Technology Co. Ltd. Method for Inspecting UV Illuminance in Multi-Level Bake Furnace for TFT-LCD Manufacturing Process and Pickup Assembly Device for Performing the Method

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100864117B1 (en) * 2001-03-05 2008-10-16 도쿄엘렉트론가부시키가이샤 Heat treatment method and heat treatment apparatus
JP3554297B2 (en) * 2001-07-26 2004-08-18 株式会社エフティーエル Semiconductor substrate heat treatment apparatus and semiconductor element manufacturing method
JP2004260174A (en) * 2003-02-25 2004-09-16 Samsung Electronics Co Ltd Semiconductor element manufacturing apparatus
JP4560660B2 (en) * 2003-03-14 2010-10-13 三井造船株式会社 Semiconductor heat treatment apparatus and method
US7727588B2 (en) * 2003-09-05 2010-06-01 Yield Engineering Systems, Inc. Apparatus for the efficient coating of substrates
JP4534619B2 (en) * 2004-06-21 2010-09-01 株式会社Ｓｕｍｃｏ Heat treatment jig for semiconductor silicon substrate
US20070281086A1 (en) * 2006-06-05 2007-12-06 Hon Hai Precision Industry Co., Ltd. Apparatus and method for producing carbon nanotubes
JP5173225B2 (en) * 2007-03-30 2013-04-03 三井造船株式会社 Heating system
US7977258B2 (en) * 2007-04-06 2011-07-12 Mattson Technology, Inc. Method and system for thermally processing a plurality of wafer-shaped objects
US8603246B2 (en) 2008-01-30 2013-12-10 Palo Alto Research Center Incorporated Growth reactor systems and methods for low-temperature synthesis of nanowires
DE102011056211B3 (en) * 2011-12-09 2013-02-07 Degudent Gmbh Method and apparatus for sintering sintered material
CN104233460B (en) * 2013-06-09 2017-03-22 北京北方微电子基地设备工艺研究中心有限责任公司 Reaction chamber and MOCVD equipment provided with reaction chamber
US9808891B2 (en) 2014-01-16 2017-11-07 Taiwan Semiconductor Manufacturing Co., Ltd. Tool and method of reflow
DE102018204107A1 (en) * 2018-03-17 2019-09-19 centrotherm international AG Heating unit for horizontal oven

Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4096822A (en) * 1975-09-29 1978-06-27 Nippondenso Co., Ltd. Gaseous atmosphere control apparatus for a semiconductor manufacturing system
US4466381A (en) * 1981-01-14 1984-08-21 Northern Telecom Limited Coating of semiconductor wafers and apparatus therefor
US4558660A (en) * 1982-03-16 1985-12-17 Handotai Kenkyu Shinkokai Semiconductor fabricating apparatus
US4819579A (en) * 1981-01-14 1989-04-11 Northern Telecom Limited Coating of semiconductor wafers and apparatus therefor
US4911638A (en) * 1989-05-18 1990-03-27 Direction Incorporated Controlled diffusion environment capsule and system
US5429498A (en) * 1991-12-13 1995-07-04 Tokyo Electron Sagami Kabushiki Kaisha Heat treatment method and apparatus thereof
US5443648A (en) * 1993-04-13 1995-08-22 Tokyo Electron Kabushiki Kaisha Vertical heat treatment apparatus with a rotary holder turning independently of a liner plate
US5520742A (en) * 1993-03-03 1996-05-28 Tokyo Electron Kabushiki Kaisha Thermal processing apparatus with heat shielding member
US5536918A (en) * 1991-08-16 1996-07-16 Tokyo Electron Sagami Kabushiki Kaisha Heat treatment apparatus utilizing flat heating elements for treating semiconductor wafers
US5662469A (en) * 1991-12-13 1997-09-02 Tokyo Electron Tohoku Kabushiki Kaisha Heat treatment method
US5743967A (en) * 1995-07-13 1998-04-28 Semiconductor Energy Laboratory Co. Low pressure CVD apparatus
US5763856A (en) * 1993-08-11 1998-06-09 Tokyo Electron Limited Heat treatment apparatus and method
US5903711A (en) * 1996-03-26 1999-05-11 Toyko Electron Limited Heat treatment apparatus and heat treatment method
US6001175A (en) * 1995-03-03 1999-12-14 Maruyama; Mitsuhiro Crystal producing method and apparatus therefor
US6159873A (en) * 1995-03-30 2000-12-12 F.T.L. Co., Ltd. Method for producing semiconductor device and production apparatus of semiconductor device
US6462411B1 (en) * 1997-12-05 2002-10-08 Kokusai Electric Co., Ltd Semiconductor wafer processing apparatus for transferring a wafer mount
US20030031974A1 (en) * 2001-07-26 2003-02-13 Mikio Takagi Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices
US6753506B2 (en) * 2001-08-23 2004-06-22 Axcelis Technologies System and method of fast ambient switching for rapid thermal processing

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58116724A (en) * 1981-12-29 1983-07-12 Pioneer Electronic Corp Device for manufacturing semiconductor
JPS62299017A (en) * 1986-06-18 1987-12-26 Matsushita Electric Ind Co Ltd Heat treatment device
JPS6471118A (en) * 1987-09-11 1989-03-16 Hitachi Ltd Thermal treatment equipment for semiconductor wafer
JPH0744159B2 (en) * 1987-09-11 1995-05-15 株式会社日立製作所 Semiconductor wafer heat treatment apparatus and heat treatment method
JPH088220B2 (en) * 1988-09-05 1996-01-29 株式会社日立製作所 Semiconductor wafer heat treatment apparatus and heat treatment method
JP2728488B2 (en) * 1989-02-17 1998-03-18 株式会社日立製作所 Semiconductor wafer heat treatment equipment
JP3249240B2 (en) * 1993-06-15 2002-01-21 三洋電機株式会社 microwave
JP3501601B2 (en) * 1996-10-31 2004-03-02 東京エレクトロン株式会社 Vertical heat treatment equipment Approximate heat treatment furnace maintenance method
JP4071315B2 (en) * 1996-12-18 2008-04-02 株式会社山形信越石英 Wafer heat treatment equipment
JP2000286200A (en) * 1999-03-31 2000-10-13 Kokusai Electric Co Ltd Heat-treating method and system thereof
KR20010058712A (en) * 1999-12-30 2001-07-06 강웅식 A rapid thermal process system for wafer

Patent Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4096822A (en) * 1975-09-29 1978-06-27 Nippondenso Co., Ltd. Gaseous atmosphere control apparatus for a semiconductor manufacturing system
US4466381A (en) * 1981-01-14 1984-08-21 Northern Telecom Limited Coating of semiconductor wafers and apparatus therefor
US4819579A (en) * 1981-01-14 1989-04-11 Northern Telecom Limited Coating of semiconductor wafers and apparatus therefor
US4558660A (en) * 1982-03-16 1985-12-17 Handotai Kenkyu Shinkokai Semiconductor fabricating apparatus
US4911638A (en) * 1989-05-18 1990-03-27 Direction Incorporated Controlled diffusion environment capsule and system
US5536918A (en) * 1991-08-16 1996-07-16 Tokyo Electron Sagami Kabushiki Kaisha Heat treatment apparatus utilizing flat heating elements for treating semiconductor wafers
US5429498A (en) * 1991-12-13 1995-07-04 Tokyo Electron Sagami Kabushiki Kaisha Heat treatment method and apparatus thereof
US5662469A (en) * 1991-12-13 1997-09-02 Tokyo Electron Tohoku Kabushiki Kaisha Heat treatment method
US5520742A (en) * 1993-03-03 1996-05-28 Tokyo Electron Kabushiki Kaisha Thermal processing apparatus with heat shielding member
US5443648A (en) * 1993-04-13 1995-08-22 Tokyo Electron Kabushiki Kaisha Vertical heat treatment apparatus with a rotary holder turning independently of a liner plate
US5763856A (en) * 1993-08-11 1998-06-09 Tokyo Electron Limited Heat treatment apparatus and method
US6001175A (en) * 1995-03-03 1999-12-14 Maruyama; Mitsuhiro Crystal producing method and apparatus therefor
US6159873A (en) * 1995-03-30 2000-12-12 F.T.L. Co., Ltd. Method for producing semiconductor device and production apparatus of semiconductor device
US5743967A (en) * 1995-07-13 1998-04-28 Semiconductor Energy Laboratory Co. Low pressure CVD apparatus
US5903711A (en) * 1996-03-26 1999-05-11 Toyko Electron Limited Heat treatment apparatus and heat treatment method
US6462411B1 (en) * 1997-12-05 2002-10-08 Kokusai Electric Co., Ltd Semiconductor wafer processing apparatus for transferring a wafer mount
US20030031974A1 (en) * 2001-07-26 2003-02-13 Mikio Takagi Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices
US6793734B2 (en) * 2001-07-26 2004-09-21 F.T.L. Co., Ltd. Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices
US6753506B2 (en) * 2001-08-23 2004-06-22 Axcelis Technologies System and method of fast ambient switching for rapid thermal processing

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100025909A1 (en) * 2006-10-13 2010-02-04 Toshiaki Ono Method and jig for holding silicon wafer
US8419001B2 (en) 2006-10-13 2013-04-16 Sumco Corporation Method and jig for holding silicon wafer
US20090191499A1 (en) * 2008-01-25 2009-07-30 Micron Technology, Inc. Methods and apparatuses for heating semiconductor wafers
US8007275B2 (en) 2008-01-25 2011-08-30 Micron Technology, Inc. Methods and apparatuses for heating semiconductor wafers
US20130112887A1 (en) * 2011-11-09 2013-05-09 Shenzhen China Star Optoelectronics Technology Co. Ltd. Method for Inspecting UV Illuminance in Multi-Level Bake Furnace for TFT-LCD Manufacturing Process and Pickup Assembly Device for Performing the Method
US8754381B2 (en) * 2011-11-09 2014-06-17 Shenzhen China Star Optoelectronics Technology Co., Ltd. Method for inspecting UV illuminance in multi-level bake furnace for TFT-LCD manufacturing process and pickup assembly device for performing the method

Also Published As

Publication number Publication date
TW554419B (en) 2003-09-21
US20030031974A1 (en) 2003-02-13
JP3554297B2 (en) 2004-08-18
CN1196177C (en) 2005-04-06
US6793734B2 (en) 2004-09-21
CN1416153A (en) 2003-05-07
JP2002110686A (en) 2002-04-12
KR20030011617A (en) 2003-02-11
KR100524390B1 (en) 2005-10-28

Similar Documents

Publication Publication Date Title
US6793734B2 (en) Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices
US6780251B2 (en) Substrate processing apparatus and method for fabricating semiconductor device
JP3218164B2 (en) Support boat for object to be processed, heat treatment apparatus and heat treatment method
JP3241401B2 (en) Rapid heat treatment equipment
US7077913B2 (en) Apparatus for fabricating a semiconductor device
US20050054198A1 (en) Apparatus of chemical vapor deposition
US8211798B2 (en) Substrate treating apparatus and method for manufacturing semiconductor device
US5903711A (en) Heat treatment apparatus and heat treatment method
US20040035359A1 (en) Heat-treating apparatus and heat-treating method
KR100841116B1 (en) Film forming equipment and film forming method
TW200816347A (en) Bernoulli wand
KR101072356B1 (en) Substrate processing apparatus, method of manufacturing semiconductor device, and ceiling insulating part
US6159873A (en) Method for producing semiconductor device and production apparatus of semiconductor device
US20030221623A1 (en) Fabricating a semiconductor device
JPS63289813A (en) Heat treatment of semiconductor wafer
US20190115231A1 (en) Method and apparatus for treating substrate
EP1187188A1 (en) Method of processing wafer
JP2971818B2 (en) Wafer heat treatment equipment
JP2001308085A (en) Heat-treating method
JPH0917739A (en) Manufacture of semiconductor device
JPH08330245A (en) Manufacture of semiconductor device, and manufacture device for semiconductor
JP3067658B2 (en) Wafer heat treatment equipment
JPH08288372A (en) Wafer support plate
JP3664193B2 (en) Heat treatment apparatus and heat treatment method
JPH058936U (en) Semiconductor manufacturing equipment

Legal Events

Date Code Title Description
AS Assignment

Owner name: F.T.L. CO., LTD., JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TAKAGI, MIKIO;REEL/FRAME:015092/0083

Effective date: 20020719

Owner name: TOPCO SCIENTIFIC CO., LTD., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TAKAGI, MIKIO;REEL/FRAME:015092/0083

Effective date: 20020719

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION