US20040209475A1 - Planarization process for semiconductor substrates - Google Patents
Planarization process for semiconductor substrates Download PDFInfo
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- US20040209475A1 US20040209475A1 US10/838,545 US83854504A US2004209475A1 US 20040209475 A1 US20040209475 A1 US 20040209475A1 US 83854504 A US83854504 A US 83854504A US 2004209475 A1 US2004209475 A1 US 2004209475A1
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- deformable material
- chemical mechanical
- planarization process
- mechanical planarization
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
Definitions
- the present invention relates to the manufacturing of semiconductor devices. More particularly, the present invention relates to an improved chemical mechanical planarization process for the planarization of surfaces in the manufacturing of semiconductor devices.
- integrated circuits are manufactured by the deposition of layers of predetermined materials to form the desired circuit components on a silicon wafer semiconductor substrate.
- the layers are deposited on the substrate wafer to form the desired circuit component, the planarity of each of the layers is an important consideration because the deposition of each layer produces a rough, or nonplanar topography initially on the surface of the wafer substrate and, subsequently, on any previously deposited layer of material.
- a chemical etch-back process of planarization or a global press planarization process typically followed by a chemical etch-back process of planarization, or chemical mechanical planarization process may be used to planarize the layers before the subsequent deposition of a layer of material thereover. In this manner, the surface irregularities of a layer may be minimized so that subsequent layers deposited thereon do not substantially reflect the irregularities of the underlying layer.
- One type of chemical etch-back process of planarization illustrated in EUROPEAN PATENT APPLICATION 0 683 511 A2, uses a coating technique in which an object having a flat surface is used to planarize a coating material applied to the wafer surface prior to a plasma reactive ion etching process being used to planarize the wafer surface.
- the planarization surface will contain defects, such as pits or other surface irregularities. These may result from defects in the flat surface used for planarizing or from foreign material adhering to the flat surface.
- the etching of such a wafer surface having irregularities will, at best, translate those undesirable irregularities to the etched surface. Further, since some etching processes may not be fully anisotropic, etching such irregular surfaces may increase the size of the defects in the etched wafer surface.
- One type of global press planarization process illustrated in U.S. Pat. No. 5,434,107, subjects a wafer with features formed thereon having been coated with an inter-level dielectric material to an elevated temperature while an elevated pressure is applied to the wafer using a press until the temperature and pressure conditions exceed the yield stress of the upper film on the wafer so that the film will attempt to be displaced into and fill both the microscopic and local depressions in the wafer surface.
- the film is only deformed locally on the wafer, not globally, during the application of elevated temperature and pressure since the object contacting the surface of the wafer will only contact the highest points or areas on the surface of the wafer to deform or displace such points or areas of material on the entire wafer surface.
- global planar surfaces are created on a semiconductor wafer using a press located in a chamber.
- a global planarization apparatus 100 is illustrated.
- the global planarization apparatus 100 serves to press the surface of a semiconductor wafer 120 having multiple layers including a deformable outermost layer 122 against a fixed pressing surface 132 .
- the surface of the deformable layer 122 will assume the shape and surface characteristics of the pressing surface 132 under the application of force to the wafer 120 .
- the global planarization apparatus 100 includes a fully enclosed apparatus having a hollow cylindrical chamber body and having open top and bottom ends 113 and 114 , respectively, and interior surface 116 and an evacuation port 111 .
- a base plate 118 having an inner surface 117 is attached to the bottom end 114 of chamber body 112 by bolts 194 .
- a press plate 130 is removably mounted to the top end 113 of chamber body 112 with pressing surface 132 facing base plate 118 .
- the interior surface 116 of chamber body 112 , the pressing surface 132 of press plate 130 and the inner surface 117 of base plate 118 define a sealable chamber.
- Evacuation port 111 can be positioned through any surface, such as through base plate 118 , and not solely through chamber body 112 .
- the press plate 130 has a pressing surface 132 with dimensions greater than that of wafer 120 and being thick enough to withstand applied pressure.
- Press plate 130 is formed from nonadhering material capable of being highly polished so that pressing surface 132 will impart the desired smooth and flat surface quality to the surface of the deformable layer 122 on wafer 120 .
- the press plate is a disc shaped quartz optical flat.
- a rigid plate 150 having top and bottom surfaces 152 and 154 , respectively, and lift pin penetrations 156 therethrough is disposed within chamber body 112 with the top surface 152 substantially parallel to and facing the pressing surface 132 .
- the rigid plate 150 is constructed of rigid material to transfer a load under an applied force with minimal deformation.
- a uniform force is applied to the bottom surface 154 of rigid plate 150 through the use of a bellows arrangement 140 and relatively pressurized gas to drive rigid plate 150 toward pressing surface 132 .
- Relative pressure can be achieved by supplying gas under pressure or, if the chamber body 112 is under vacuum, allowing atmospheric pressure into bellows arrangement 140 to drive the same.
- the bellows arrangement 140 is attached at one end to the bottom surface 154 of rigid plate 150 and to the inner surface 117 of base plate 118 with a bolted mounting plate 115 to form a pressure containment that is relatively pressurized through port 119 in base plate 118 .
- brackets 142 are mounted to the inner surface 117 of the base plate 118 to limit the motion toward base plate 118 of the rigid plate 150 when bellows arrangement 140 is not relatively pressurized.
- the application of force through the use of a relatively pressurized gas ensures the uniform application of force to the bottom surface 154 of rigid plate 150 .
- the use of rigid plate 150 will serve to propagate the uniform pressure field with minimal distortion.
- the bellows arrangement 140 can be replaced by any suitable means for delivering a uniform force, such as a hydraulic means.
- a flexible pressing member 160 is provided having upper and lower surfaces 162 and 164 , respectively, which are substantially parallel to the top surface 152 of rigid plate 150 and pressing surface 132 .
- Lift pin penetrations 166 are provided through flexible pressing member 160 .
- the flexible pressing member 160 is positioned with its lower surface 164 in contact with the top surface 152 of rigid plate 150 and lift pin penetrations 166 aligned with lift pin penetrations 156 in rigid plate 150 .
- the upper surface 162 of the flexible pressing member 160 is formed from a material having a low viscosity that will deform under an applied force to close lift pin penetrations 166 and uniformly distribute the applied force to the wafer, even when the top surface 152 , the upper surface 162 and/or the lower surface 164 is not completely parallel to the pressing surface 132 or when thickness variations exist in the wafer 120 , rigid plate 150 or flexible pressing member 160 , as well as any other source of nonuniform applied force.
- Lift pins 170 are slidably disposable through lift pin penetrations 156 and 166 , respectively, in the form of apertures, to contact the bottom surface 126 of wafer 120 for lifting the wafer 120 off the top surface 162 of flexible pressing member 160 . Movement of the lift pins 170 is controlled by lift pin drive assembly 172 , which is mounted on the inner surface 117 of the base plate 118 . The lift pin drive assembly provides control of the lift pins 170 through conventional means. Lift pins 170 and lift pin drive assembly 172 are preferably positioned outside the pressure boundary defined by the bellows arrangement 140 to minimize the number of pressure boundary penetrations. However, they can be located within the pressure boundary, if desired, in a suitable manner.
- a multi-piece assembly consisting of lower lid 180 , middle lid 182 , top lid 184 , gasket 186 and top clamp ring 188 are used to secure the press plate 130 to the top end 113 of chamber body 112 .
- the ring-shaped lower lid 180 is mounted to the top end 113 of chamber body 112 and has a portion with an inner ring dimension smaller than press plate 130 so that press plate 130 is seated on lower lid 180 .
- Middle lid 182 and top lid 184 are ring-shaped members having an inner ring dimension greater than press plate 130 and are disposed around press plate 130 .
- Middle lid 182 is located between lower lid 180 and top lid 184 .
- a gasket 186 and top clamp ring 188 are members having an inner ring dimension less than that of press plate 130 and are seated on the surface of press plate 130 external to the chamber.
- Bolts 194 secure press plate 130 to the chamber body 112 .
- Heating elements 190 and thermocouples 192 control the temperature of the member 160 .
- top clamp ring 188 , gasket 186 , top lid 184 , and middle lid 182 are removed from the body 112 and the press plate 130 lifted from lower lid 180 .
- the bellows arrangement 140 is deflated and rigid plate 150 is seated on stand off brackets 142 .
- the wafer 120 is placed on the flexible pressing member 160 with the side of the wafer 120 opposite the deformable layer 122 in contact with flexible pressing member 160 .
- the press plate 130 is mounted on the lower lid 180 and the middle lid 182 and upper lid 184 are installed and tightened using gasket 186 and top clamp ring 188 sealing press plate 130 between top clamp ring 188 and lower lid 180 .
- the temperature of flexible pressing member 160 , press plate 130 , and rigid plate 150 are adjusted through the use of heating elements 190 monitored by thermocouples 192 to vary the deformation characteristics of the deformaable layer 122 of wafer 120 .
- Chamber body 112 is evacuated through port 119 to a desired pressure.
- a pressure differential is established between the interior and exterior of the bellows arrangement 140 , whether by pressurizing or by venting when the chamber body 112 having been evacuated thereby drives rigid plate 150 , flexible pressing member 160 , and wafer 120 toward press plate 130 and brings deformable layer 122 of wafer 120 into engagement with pressing surface 132 of press plate 130 .
- the continued application of force will deform the flexible pressing member 160 which, in turn, serves to close lift pin penetrations 166 and distribute the force to ensure the wafer 120 experiences uniform pressure on its deformable layer 122 .
- the deformable layer 122 is hardened or cured.
- the pressure is released from the bellows arrangement 140 , thereby retracting wafer 120 , flexible pressing member 160 , and rigid plate 150 from the press plate 130 .
- the downward movement of rigid plate 150 will be terminated by its engagement with stand off offset brackets 142 .
- a system used or depicted in FIG. 1 provides an optimal method of deforming a flowable, curable material to form a generally planarized surface. However, the method is still subject to yielding a wafer surface with irregularities therein, and the need for the subsequent etch to define the desired surface height will still result in undesirable transfer and possible enlargement of any such surface irregularities.
- CMP chemical mechanical planarization
- a chemical mechanical planarization (CMP) process planarizes a nonplanar irregular surface of a wafer by pressing the wafer against a moving polishing surface that is wetted with a chemically reactive, abrasive slurry.
- the slurry is usually either basic or acidic and generally contains alumina or silica abrasive particles.
- the polishing surface is usually a planar pad made of a relatively soft, porous material, such as a blown polyurethane, mounted on a planar platen.
- FIG. 2 a conventional chemical mechanical planarization apparatus is schematically illustrated.
- a semiconductor wafer 1112 is held by a wafer carrier 1111 .
- a soft, resilient pad 1113 is positioned between the wafer carrier 1111 and the wafer 1112 .
- the wafer 1112 is held against the pad 1113 by a partial vacuum.
- the wafer carrier 1111 is continuously rotated by a drive motor 1114 and is also designed for transverse movement as indicated by the arrows 1115 .
- the rotational and transverse movement is intended to reduce variability in material removal rates over the surface of the wafer 1112 .
- the apparatus further comprises a rotating platen 1116 on which is mounted a polishing pad 1117 .
- the platen 1116 is relatively large in comparison to the wafer 1112 , so that during the chemical mechanical planarization process, the wafer 1112 may be moved across the surface of the polishing pad 1117 by the wafer carrier 1111 .
- a polishing slurry containing a chemically reactive solution, in which abrasive particles are suspended, is delivered through a supply tube 1121 onto the surface of the polishing pad 1117 .
- FIG. 3 a typical polishing table is illustrated in top view.
- the surface of the polishing table 1 is precision machined to be flat and may have a polishing pad affixed thereto.
- the surface of the table rotates the polishing pad past one or more wafers 3 to be polished.
- the wafer 3 is held by a wafer holder, as illustrated hereinbefore, which exerts vertical pressure on the wafer against the polishing pad.
- the wafer holder may also rotate and/or orbit the wafer on the table during wafer polishing.
- the table 1 may be stationary and serve as a supporting surface for individual polishing platens 2 , each having their own individual polishing pad.
- each platen may have its own mechanism for rotating or orbiting the platen 2 .
- a wafer holder will bring a wafer in contact with the platen 2 and an internal or external mechanism to the wafer holder may be used to also rotate the wafer during the polishing operation.
- each platen must be precision machined.
- the wafers 3 are typically stored and transported in wafer cassettes which hold multiple wafers.
- the wafers 3 or wafer holders are transported between the wafer cassettes and the polishing table 1 using the wafer transport arm 4 .
- the wafer transport arm 4 will transport the wafers 3 between the polishing table and the stations 5 , which may be wafer cassette stations or wafer monitoring stations.
- the polishing characteristics of the polishing pad will change during use as multiple wafers 3 are polished.
- the glazing or changing of the polishing characteristics will affect the planarization of the surface of the wafers 3 if the pads are not periodically conditioned and unglazed.
- the pad conditioner 6 is used to periodically unglaze the surface of the polishing pad.
- the pad conditioner 6 has a range of motion which allows it to come in contact with the individual pads and conduct the periodic unglazing and then to move to its rest position.
- the pressure between the surface of the wafer to be polished and the moving polishing pad may be generated by either the force of gravity acting on the wafer and the wafer carrier or by mechanical force applied normal to the wafer surface.
- the slurry may be delivered or injected through the polishing pad onto its surface.
- the planar platens may be moved in a plane parallel to the pad surface with either an orbital, fixed-direction vibratory or random direction vibratory motion.
- the surface irregularities extending into or down to the wafer surface being planarized tend to collect slurry, thereby causing such areas of the wafer to be subjected to the corrosive effects of the slurry longer than other areas of the wafer surface which do not collect the slurry.
- dummy structures have also been included on the wafer surface in an attempt to provide a more uniform spacing of structures on the wafer surface. While the use of such dummy structures will often be useful, the ultimate result is also highly dependent upon the later chemical mechanical planarization process conditions.
- the present invention relates to an improved chemical mechanical planarization process for the planarization of surfaces in the manufacturing of semiconductor devices.
- the improved chemical mechanical planarization process of the present invention includes the formation of a flat, planar surface from a deformable, planar coating on the surface of the wafer filling the areas between the surface irregularities prior to the planarization of the surface through a chemical mechanical planarization process.
- FIG. 1 is a side view of a global planarization apparatus
- FIG. 2 is an illustration of a conventional rotational chemical mechanical planarization apparatus
- FIG. 3 is an illustration of a top view of a polishing table of a conventional rotational chemical mechanical planarization apparatus
- FIG. 4 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon with a coating thereover;
- FIG. 5 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon, a coating thereover, a deformable coating, and a portion of a flat pressing member used in the present invention
- FIG. 6 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon, a coating thereover, and a deformable coating after the deformation thereof using a flat pressing member in the process of the present invention
- FIG. 7 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon and a coating material between the electrical circuit components after the chemical mechanical planarization process of the present invention of the configuration illustrated in drawing FIG. 6;
- FIG. 8 is a cross-sectional view of a portion of a wafer substrate, a resilient member located below the wafer substrate, a support member located below the resilient member and electrical circuit components formed on the wafer substrate, a coating located over the electrical circuits, and a deformable coating located over the coating formed over the electrical circuits after the deformation thereof using a flat pressing member in the process of the present invention;
- FIGS. 9A and 9B are a process flow description of the improved chemical mechanical planarization process of the present invention as illustrated in FIG. 7;
- FIGS. 10A and 10B are a process flow description of the improved chemical mechanical planarization process of the alternative embodiment of the present invention illustrated in drawing FIG. 8.
- a portion of a wafer substrate 20 is illustrated having portions of electrical circuit components 22 formed thereon and a coating of material 24 , typically a metallic material, a semiconductor material, or an insulating material 24 , covering the electrical circuit components 22 and portions of the wafer substrate 20 located between the electrical circuit components 22 .
- the portions of the electrical circuit components 22 are formed having upper surfaces 26 thereon while the coating of insulating material 24 is formed having an irregular nonplanar surface 28 extending over the upper surfaces 26 of the electrical circuit components 22 .
- the insulating material 24 typically comprises an insulating oxide or other dielectric material and may include a plurality of layers of such insulating or other types of material, as desired. In this instance, for convenience, the insulating material 24 is illustrated covering the wafer substrate 20 and the electrical circuit components 22 thereon regardless of the number of layers thereof.
- the nonplanar surface 28 of insulating material 24 would cause masking and etching problems as the masking of the insulating material 24 as well as the etching thereof would not be uniform. Therefore, the nonplanar surface 28 must be globally planarized to facilitate further electrical circuit component formation.
- Some of the problems associated with such a conventional chemical mechanical planarization process are that the reactive slurry is unevenly distributed about the wafer substrate 20 and the pad used in the process, that particulates removed from the wafer substrate 20 and insulating material 24 during the polishing process may become lodged in the polishing pad, forming a glaze thereon, thereby affecting the rate of removal by the pad and causing the polishing pad to unevenly remove material during the process, and that as the chemical mechanical planarization process begins by polishing an irregular surface on the wafer, such surface causes the deformation of the polishing pad (dishing), thereby further inducing irregularities not initially present in the surface being polished, the induced irregularities of the surface of the wafer during the chemical mechanical planarization of the wafer surface being caused by the dishing of the polishing pad from the force applied thereto and the deformation of the pad by surface areas of the wafer.
- the surface to be planarized as nearly planar as possible to help ensure the even removal of material therefrom and to help eliminate the deformation of the polishing pad(s) being used to thereby, in turn, help minimize any surface irregularities being introduced into the surface being planarized by such pad deformation.
- the improved chemical mechanical planarization process of the present invention is illustrated in relation to a wafer substrate 20 having electrical circuit components 22 thereon and a coating of insulating material 24 thereover.
- a layer of deformable material 30 is coated or deposited over the insulating material 24 prior to the initiation of the chemical mechanical planarization of the wafer substrate 20 .
- the deformable material 30 may be of any suitable type material that readily flows over the nonplanar surface 28 of the insulating material 24 and that is subsequently solidified through curing or hardening or other type of solidification.
- the deformable material 30 may be a readily deformable metal capable of being deformed under low temperature and low pressure which may be readily deposited over the insulating material 24 through well known techniques and processes. Whatever the type of deformable material 30 , the deformable material 30 is applied over the insulating material 24 to any desired depth but is typically applied in a thickness greater than the thickness of the surface topography of the wafer, the thickness of the deformable material 30 initially applied to the wafer depending upon the type of material selected for such use, the dimensions of the surface irregularities, etc.
- an object 32 having a flat planar surface 34 thereon is forced under pressure into the deformable material 30 to form a flat, planar surface 36 thereon and is kept in contact with the deformable material 30 while the deformable material 30 cures, hardens, or solidifies.
- the object 32 may be of any well known suitable material, such as an optical quartz glass disc shaped object, having a desired flat, planar ground surface thereon which may be used to be pressed into the deformable material 30 to form a flat, planar surface 36 thereon.
- the object 32 may be tailored to meet process requirements of the desired range of pressure to be applied to the deformable material 30 and the method of curing, hardening or solidifying the deformable material 30 .
- the flat, planar surface 34 on the object 32 may have a shape other than a flat, planar surface 34 , such as either a concave surface, convex surface, concave and convex surface, or any type desired surface suitable in a chemical mechanical planarization process.
- the flat, planar surface 34 of the object 32 may be coated with a suitable release agent coating to facilitate its removal from the deformable material 30 after the curing, hardening or solidification thereof.
- the deformable material 30 may be any suitable well known organic type, such as monomers, monomer mixtures, oligomers, and oligomer mixtures that are solidified through curing. Alternately, the deformable material 30 may be any suitable type epoxy resin which may be cured using an acid catalyst.
- the object 32 is kept through the application of suitable pressure thereto, or application of pressure to the wafer substrate 20 , or the application of pressure to both the object 32 and the wafer substrate 20 in engagement with the deformable material 30 until such material has hardened or solidified to form a permanently flat, planar surface 36 thereon being the mirror image of the flat, planar surface 34 on the object 32 . At such time, the object 32 is removed from engagement with the deformable material 30 .
- the wafer substrate 20 having electrical circuit components 22 and insulative material 24 thereon is illustrated having the deformable material 30 having a flat, planar surface 36 thereon providing a global flat, planar surface on the wafer substrate.
- the flat, planar surface 36 on the deformable material 30 is a flat, planar surface from which the chemical mechanical planarization process is to begin on the wafer substrate 20 .
- a conventional, well known chemical mechanical planarization process as described hereinbefore can be used to form flat planar surfaces on the insulating material 24 .
- any deformation of the pad 1117 (FIG. 2) is minimized. Also, any nonuniform planarization which may occur due to the uneven distribution of the chemical reactive solution and abrasives included therein or material particles from the surfaces being planarized being collected or present in the polishing pad 1117 resulting from surface irregularities is minimized.
- the chemical mechanical planarization process from a globally flat, planar surface 36 of the deformable material 30 , as the chemical mechanical planarization process is carried out, the surfaces of the layers being planarized remain flat and planar because the polishing pad 1117 is subjected to more uniform loading and operation during the process. This is in clear contrast to the use of a chemical mechanical planarization process beginning from an irregular nonplanar surface as is typically carried out in the prior art.
- FIG. 7 illustrated is a wafer substrate 20 , electrical circuit components 22 and insulating material 24 which have been planarized using the improved chemical mechanical planarization process of the present invention.
- a flat, planar surface 40 has been formed through the use of the chemical mechanical planarization process of the present invention as described hereinbefore with the flat, planar surface 40 including flat planar surface 28 ′ of the insulating material 24 .
- FIG. 8 an alternate apparatus and method of the improved chemical mechanical planarization process of the present invention is illustrated.
- the present invention is illustrated in relation to a wafer substrate 20 having electrical circuit components 22 thereon and a coating of insulating material 24 thereover.
- a layer of deformable material 30 is coated or deposited over the insulating material 24 .
- the deformable material 30 may be of any suitable type material which readily flows over the nonplanar surface 28 of the insulating material 24 that is subsequently solidified through curing or hardening.
- the deformable material 30 is applied over the insulating material 24 to any desired depth but is typically applied in a thickness greater than the surface topography of the wafer, the thickness of the deformable material 30 initially applied to the wafer depending upon the type of material selected for such use, the dimensions of the surface irregularities, etc.
- a flexible resilient member 50 is placed under the wafer substrate 20 between the wafer substrate 20 and the substrate 60 on which the wafer substrate 20 is supported and an object 32 having a flat planar surface 34 thereon is forced under pressure into flat, planar surface 36 of the deformable material 30 to form a globally flat, planar surface 36 thereon and is kept in contact with the deformable material 30 while the deformable material 30 cures, hardens, or solidifies.
- the object 32 may be of any well known suitable material, such as an optical quartz glass disc shaped object having a flat, planar ground surface thereon which may be used to be pressed into the deformable material 30 to form a globally flat, planar surface 36 thereon. If desired, the object 32 may be tailored to meet process requirements of the desired range of pressure to be applied to the deformable material 30 and the method of curing, hardening or solidifying the deformable material 30 .
- the flat, planar surface 34 of the object 32 may have a shape other than a flat, planar surface 34 , such as either a concave surface, convex surface, or any desired surface. Additionally, the flat, planar surface 34 of the object 32 may be coated with a suitable release agent coating to facilitate its removal from the deformable material 30 after the curing, hardening or solidification thereof.
- the flexible resilient member 50 comprises a suitably shaped member compatible with the wafer substrate 20 formed of resilient material which will deform under an applied force to uniformly distribute the applied force from the object 32 to the deformable material 30 , even if the flat, planar surface 34 of object 32 , surfaces 52 and 54 of the flexible resilient member 50 and the flat, planar surface 36 of the deformable material 30 on wafer substrate 20 are not substantially parallel to each other or, alternately, when thickness variations locally exist within either the wafer substrate 20 , electrical circuit components 22 , insulating material 24 , object 32 , and/or flexible resilient member 50 .
- the flexible resilient member 50 is thermally stable and resistant to the temperature ranges of operation experienced during the pressing by object 32 and that the flexible resilient member 50 be formed from a low viscosity and low durometer hardness material. In this manner, the flexible resilient member 50 serves to compensate for the variations in the thickness of the wafer substrate 20 , electrical circuit components 22 , insulating material 24 , deformable material 30 , and object 32 as well as compensating for any nonparallel surfaces on the object 32 or the wafer substrate 20 or the substrate 60 on which the wafer substrate 20 is supported during the pressing of object 32 to form flat, planar surface 36 on the deformable material 30 prior to the beginning of the chemical mechanical planarization process thereafter.
- the preferable manner in which the insulating material 24 on a wafer substrate 20 is to be globally planarized to have a globally flat, planar surface 28 ′ to begin the chemical mechanical planarization process is to use the global planarization apparatus 100 hereinbefore described with respect to drawing FIG. 1, or its equivalent.
- FIGS. 9A and 9B the improved chemical mechanical planarization process of the present invention as described hereinbefore is illustrated in a series of process steps 202 through 218 .
- a wafer substrate 20 is provided having electrical circuitry components 22 formed thereon and an insulating material 24 covering the electrical circuitry components 22 and portions of the wafer substrate 20 .
- process step 204 a coating of deformable material 30 which is uncured, unhardened, or not solidified at the time of application is applied to the coating of insulating material 24 to cover the same.
- process step 206 an object 32 having a flat planar surface 34 thereon is provided for use.
- process step 208 the surface of deformable material 30 is contacted by the flat, planar surface 34 of the object 32 .
- a predetermined level of pressure is applied at a predetermined temperature level to the deformable material 30 .
- the pressure may be applied to either the object 32 , the wafer substrate 20 , or both, etc.
- flat, planar surface 34 of object 32 forms a flat, planar surface 36 on the deformable material 30 .
- process step 214 while the flat, planar surface 34 of the object 32 engages the deformable material 30 thereby forming the flat, planar surface 36 thereon, the deformable material 30 is cured, hardened, or solidified to cause the permanent formation and retention of the flat, planar surface 36 on the deformable material 30 .
- process step 216 the object 32 is removed from engagement with the deformable material 30 after the curing, hardening or solidification thereof to retain the flat, planar surface 36 thereon.
- process step 218 the wafer substrate 20 having electrical circuit components 22 , insulating material 24 , and cured, hardened, or solidified deformable material 30 thereon is subjected to a suitable chemical mechanical planarization process until the upper surfaces 26 of the electrical circuit components and flat, planar surface 28 ′ of the insulating material 24 are a concurrent common flat, planar surface extending across the wafer substrate 20 (see FIG. 7).
- a wafer substrate 20 is provided having electrical circuitry components 22 formed thereon and an insulating material 24 covering the electrical circuit components 22 and portions of the wafer substrate 20 .
- process step 304 a coating of deformable material 30 which is uncured, unhardened, or not solidified at the time of application is applied to the coating of insulating material 24 to cover the same.
- process step 306 an object 32 having a flat planar surface 34 thereon is provided for use.
- a flexible resilient member 50 is placed in contact with the bottom surface of the wafer substrate 20 .
- process step 310 the flat, planar surface 36 of the deformable material 30 is contacted with the flat, planar surface 34 of the object 32 .
- process step 312 flexible resilient member 50 remains contacting or engaging the bottom surface of the wafer substrate 20 .
- a predetermined level of pressure is applied at a predetermined temperature level to either the object 32 , or the wafer substrate 20 , or both, thereby causing the flat, planar surface 34 of the object 32 to transmit force to the deformable material 30 , thereby causing the flat, planar surface 36 of the deformable material 30 to form a flat planar surface 36 thereon substantially similar to the flat planar surface 34 of the object 32 .
- process step 316 while the flat, planar surface 34 of the object 32 engages the deformable material 30 , thereby forming the flat, planar surface 36 thereon, the deformable material 30 is cured, hardened or solidified to cause the permanent formation and retention of the flat, planar surface 36 on the deformable material 30 .
- process step 318 the object 32 is removed from engagement with the deformable material 30 after the curing, hardening or solidification thereof to retain the flat, planar surface 36 thereon.
- the flexible resilient member 50 is used on the bottom of the wafer substrate 20 , it may remain, or, if desired, a comparable flexible member may be provided during the chemical mechanical planarization process.
- process step 320 the wafer substrate 20 having electrical circuit components 22 , insulating material 24 , and cured, hardened, or solidified deformable coating 30 thereon is subjected to a suitable chemical mechanical planarization process until the upper surfaces 26 of the electrical circuit components and flat, planar surface 28 ′ of the insulating material 24 are a concurrent, common, unbroken flat, planar surface 40 extending across the wafer substrate 20 (see FIG. 7).
- the preferable manner in which the insulating material 24 on a wafer substrate 20 is to be globally planarized to have a globally flat, planar surface 28 to begin the chemical mechanical planarization process is to use the global planarization apparatus 100 hereinbefore described with respect to drawing FIG. 1, or its equivalent.
- the resulting planarized surface on the wafer substrate is globally planar or more planar since the process started from a globally flat, planar surface and the chemical mechanical planarization process reaches a successful conclusion more quickly because the surface being planarized does not deform the polishing pad unnecessarily as the surface remains substantially planar throughout the process.
- This is in clear contrast to the prior art conventional chemical mechanical planarization process which begins from an irregular nonplanar surface, thereby causing the deformation and deflection of the polishing pad, thereby, in turn, causing an irregular nonplanar surface in the surface being planarized.
- the improved chemical mechanical planarization process of the present invention offers advantages over a globally planarized surface which is subsequently dry resistant etched-back.
- globally planarized surfaces which are dry etched-back the dry etching process does not act uniformly on the materials being etched as they are subjected to the etching process at differing times and each material exhibits a differing etching rate, thereby causing irregularities to be present in the resulting final surface at the end of the dry etching process.
- the improved chemical mechanical planarization process begins from a globally flat planar surface, retains a globally flat, planar surface throughout the process, and results in a final globally flat planar surface at the end of the process.
Abstract
A method of manufacturing semiconductor devices using an improved chemical mechanical planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved chemical mechanical planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer filling in between the surface irregularities prior to the planarization of the surface through a chemical mechanical planarization process.
Description
- This application is a continuation of application Ser. No. 09/832,560, filed Apr. 11, 2001, pending, which is a continuation of application Ser. No. 08/862,752, filed May 23, 1997, now U.S. Pat. No. 6,331,488, issued Dec. 18, 2001.
- 1. Field of the Invention
- The present invention relates to the manufacturing of semiconductor devices. More particularly, the present invention relates to an improved chemical mechanical planarization process for the planarization of surfaces in the manufacturing of semiconductor devices.
- 2. State of the Art
- Typically, integrated circuits are manufactured by the deposition of layers of predetermined materials to form the desired circuit components on a silicon wafer semiconductor substrate. As the layers are deposited on the substrate wafer to form the desired circuit component, the planarity of each of the layers is an important consideration because the deposition of each layer produces a rough, or nonplanar topography initially on the surface of the wafer substrate and, subsequently, on any previously deposited layer of material.
- Typically, photolithographic processes are used to form the desired circuit components on the wafer substrate. When such photolithographic processes are pushed to their technological limits of circuit formation, the surface on which the processes are used must be as planar as possible to ensure success in circuit formation. This results from the requirement that the electromagnetic radiation used to create a mask, which is used in the formation of the circuits of the semiconductor devices in wafer form, must be accurately focused at a single level, resulting in the precise imaging over the entire surface of the wafer. If the wafer surface is not sufficiently planar, the resulting mask will be poorly defined, causing, in turn, a poorly defined circuit which may malfunction. Since several different masks are used to form the different layers of circuits of the semiconductor devices on the substrate wafer, any nonplanar areas of the wafer will be subsequently magnified in later deposited layers.
- After layer formation on the wafer substrate, either a chemical etch-back process of planarization, or a global press planarization process typically followed by a chemical etch-back process of planarization, or chemical mechanical planarization process may be used to planarize the layers before the subsequent deposition of a layer of material thereover. In this manner, the surface irregularities of a layer may be minimized so that subsequent layers deposited thereon do not substantially reflect the irregularities of the underlying layer.
- One type of chemical etch-back process of planarization, illustrated in EUROPEAN PATENT APPLICATION 0 683 511 A2, uses a coating technique in which an object having a flat surface is used to planarize a coating material applied to the wafer surface prior to a plasma reactive ion etching process being used to planarize the wafer surface. Often, however, the planarization surface will contain defects, such as pits or other surface irregularities. These may result from defects in the flat surface used for planarizing or from foreign material adhering to the flat surface. The etching of such a wafer surface having irregularities will, at best, translate those undesirable irregularities to the etched surface. Further, since some etching processes may not be fully anisotropic, etching such irregular surfaces may increase the size of the defects in the etched wafer surface.
- One type of global press planarization process, illustrated in U.S. Pat. No. 5,434,107, subjects a wafer with features formed thereon having been coated with an inter-level dielectric material to an elevated temperature while an elevated pressure is applied to the wafer using a press until the temperature and pressure conditions exceed the yield stress of the upper film on the wafer so that the film will attempt to be displaced into and fill both the microscopic and local depressions in the wafer surface. It should be noted that the film is only deformed locally on the wafer, not globally, during the application of elevated temperature and pressure since the object contacting the surface of the wafer will only contact the highest points or areas on the surface of the wafer to deform or displace such points or areas of material on the entire wafer surface. Other nonlocal depressions existing in the wafer are not affected by the pressing as sufficient material is not displaced thereinto. Subsequently, the temperature and pressure are reduced so that the film will become firm again thereby leaving localized areas having a partially planar upper surface on portions of the wafer while other portions of the wafer surface will remain nonplanar.
- In one instance, global planar surfaces are created on a semiconductor wafer using a press located in a chamber. Referring to drawing FIG. 1, a
global planarization apparatus 100 is illustrated. Theglobal planarization apparatus 100 serves to press the surface of asemiconductor wafer 120 having multiple layers including a deformableoutermost layer 122 against a fixedpressing surface 132. The surface of thedeformable layer 122 will assume the shape and surface characteristics of thepressing surface 132 under the application of force to thewafer 120. Theglobal planarization apparatus 100 includes a fully enclosed apparatus having a hollow cylindrical chamber body and having open top andbottom ends interior surface 116 and anevacuation port 111. Abase plate 118 having aninner surface 117 is attached to thebottom end 114 ofchamber body 112 bybolts 194. Apress plate 130 is removably mounted to thetop end 113 ofchamber body 112 withpressing surface 132 facingbase plate 118. Theinterior surface 116 ofchamber body 112, thepressing surface 132 ofpress plate 130 and theinner surface 117 ofbase plate 118 define a sealable chamber.Evacuation port 111 can be positioned through any surface, such as throughbase plate 118, and not solely throughchamber body 112. - The
press plate 130 has apressing surface 132 with dimensions greater than that ofwafer 120 and being thick enough to withstand applied pressure.Press plate 130 is formed from nonadhering material capable of being highly polished so thatpressing surface 132 will impart the desired smooth and flat surface quality to the surface of thedeformable layer 122 onwafer 120. Preferably, the press plate is a disc shaped quartz optical flat. - A
rigid plate 150 having top andbottom surfaces lift pin penetrations 156 therethrough is disposed withinchamber body 112 with thetop surface 152 substantially parallel to and facing thepressing surface 132. Therigid plate 150 is constructed of rigid material to transfer a load under an applied force with minimal deformation. - A uniform force is applied to the
bottom surface 154 ofrigid plate 150 through the use of abellows arrangement 140 and relatively pressurized gas to driverigid plate 150 towardpressing surface 132. Relative pressure can be achieved by supplying gas under pressure or, if thechamber body 112 is under vacuum, allowing atmospheric pressure intobellows arrangement 140 to drive the same. Thebellows arrangement 140 is attached at one end to thebottom surface 154 ofrigid plate 150 and to theinner surface 117 ofbase plate 118 with a boltedmounting plate 115 to form a pressure containment that is relatively pressurized throughport 119 inbase plate 118. One ormore brackets 142 are mounted to theinner surface 117 of thebase plate 118 to limit the motion towardbase plate 118 of therigid plate 150 whenbellows arrangement 140 is not relatively pressurized. The application of force through the use of a relatively pressurized gas ensures the uniform application of force to thebottom surface 154 ofrigid plate 150. The use ofrigid plate 150 will serve to propagate the uniform pressure field with minimal distortion. Alternately, thebellows arrangement 140 can be replaced by any suitable means for delivering a uniform force, such as a hydraulic means. - A flexible
pressing member 160 is provided having upper andlower surfaces top surface 152 ofrigid plate 150 and pressingsurface 132.Lift pin penetrations 166 are provided through flexible pressingmember 160. The flexiblepressing member 160 is positioned with itslower surface 164 in contact with thetop surface 152 ofrigid plate 150 andlift pin penetrations 166 aligned withlift pin penetrations 156 inrigid plate 150. Theupper surface 162 of the flexiblepressing member 160 is formed from a material having a low viscosity that will deform under an applied force to closelift pin penetrations 166 and uniformly distribute the applied force to the wafer, even when thetop surface 152, theupper surface 162 and/or thelower surface 164 is not completely parallel to thepressing surface 132 or when thickness variations exist in thewafer 120,rigid plate 150 or flexiblepressing member 160, as well as any other source of nonuniform applied force. -
Lift pins 170 are slidably disposable throughlift pin penetrations wafer 120 for lifting thewafer 120 off thetop surface 162 of flexiblepressing member 160. Movement of thelift pins 170 is controlled by liftpin drive assembly 172, which is mounted on theinner surface 117 of thebase plate 118. The lift pin drive assembly provides control of thelift pins 170 through conventional means.Lift pins 170 and liftpin drive assembly 172 are preferably positioned outside the pressure boundary defined by thebellows arrangement 140 to minimize the number of pressure boundary penetrations. However, they can be located within the pressure boundary, if desired, in a suitable manner. - A multi-piece assembly consisting of
lower lid 180,middle lid 182,top lid 184,gasket 186 andtop clamp ring 188 are used to secure thepress plate 130 to thetop end 113 ofchamber body 112. The ring-shapedlower lid 180 is mounted to thetop end 113 ofchamber body 112 and has a portion with an inner ring dimension smaller thanpress plate 130 so thatpress plate 130 is seated onlower lid 180.Middle lid 182 andtop lid 184 are ring-shaped members having an inner ring dimension greater thanpress plate 130 and are disposed aroundpress plate 130.Middle lid 182 is located betweenlower lid 180 andtop lid 184. Agasket 186 andtop clamp ring 188 are members having an inner ring dimension less than that ofpress plate 130 and are seated on the surface ofpress plate 130 external to the chamber.Bolts 194secure press plate 130 to thechamber body 112. -
Heating elements 190 andthermocouples 192 control the temperature of themember 160. - In operation, the
top clamp ring 188,gasket 186,top lid 184, andmiddle lid 182 are removed from thebody 112 and thepress plate 130 lifted fromlower lid 180. Thebellows arrangement 140 is deflated andrigid plate 150 is seated on stand offbrackets 142. Thewafer 120 is placed on the flexible pressingmember 160 with the side of thewafer 120 opposite thedeformable layer 122 in contact with flexible pressingmember 160. Thepress plate 130 is mounted on thelower lid 180 and themiddle lid 182 andupper lid 184 are installed and tightened usinggasket 186 andtop clamp ring 188 sealingpress plate 130 betweentop clamp ring 188 andlower lid 180. The temperature of flexiblepressing member 160,press plate 130, andrigid plate 150 are adjusted through the use ofheating elements 190 monitored bythermocouples 192 to vary the deformation characteristics of thedeformaable layer 122 ofwafer 120.Chamber body 112 is evacuated throughport 119 to a desired pressure. - A pressure differential is established between the interior and exterior of the
bellows arrangement 140, whether by pressurizing or by venting when thechamber body 112 having been evacuated thereby drivesrigid plate 150, flexible pressingmember 160, andwafer 120 towardpress plate 130 and bringsdeformable layer 122 ofwafer 120 into engagement withpressing surface 132 ofpress plate 130. Upon engagement ofwafer 120 withpress plate 130, the continued application of force will deform the flexible pressingmember 160 which, in turn, serves to closelift pin penetrations 166 and distribute the force to ensure thewafer 120 experiences uniform pressure on itsdeformable layer 122. After thewafer 120 has been in engagement withpressing surface 132 for a sufficient time to causedeformable layer 122 to globally correspond to thepressing surface 132, thedeformable layer 122 is hardened or cured. The pressure is released from thebellows arrangement 140, thereby retractingwafer 120, flexible pressingmember 160, andrigid plate 150 from thepress plate 130. The downward movement ofrigid plate 150 will be terminated by its engagement with stand off offsetbrackets 142. - Once the
rigid plate 150 is fully retracted, the vacuum is released inchamber body 112. Lift pins 170 are moved throughlift pin penetrations 156 in therigid plate 150 andlift pin penetrations 166 in the flexible pressingmember 160 to liftwafer 120 off the flexible pressingmember 160. Thetop clamp ring 188,gasket 186,top lid 184,middle lid 182, andpress plate 130 are removed and thewafer 120 is removed off lift pins 170 for further processing. - Once the wafer is removed, it will be subjected to an etch to establish the planar surface at the desired depth. A system used or depicted in FIG. 1 provides an optimal method of deforming a flowable, curable material to form a generally planarized surface. However, the method is still subject to yielding a wafer surface with irregularities therein, and the need for the subsequent etch to define the desired surface height will still result in undesirable transfer and possible enlargement of any such surface irregularities.
- Conventional chemical mechanical planarization processes are used to planarize layers formed on wafer substrates in the manufacture of integrated circuit semiconductor devices. Typically, a chemical mechanical planarization (CMP) process planarizes a nonplanar irregular surface of a wafer by pressing the wafer against a moving polishing surface that is wetted with a chemically reactive, abrasive slurry. The slurry is usually either basic or acidic and generally contains alumina or silica abrasive particles. The polishing surface is usually a planar pad made of a relatively soft, porous material, such as a blown polyurethane, mounted on a planar platen.
- Referring to drawing FIG. 2, a conventional chemical mechanical planarization apparatus is schematically illustrated. A
semiconductor wafer 1112 is held by awafer carrier 1111. A soft,resilient pad 1113 is positioned between thewafer carrier 1111 and thewafer 1112. Thewafer 1112 is held against thepad 1113 by a partial vacuum. Thewafer carrier 1111 is continuously rotated by adrive motor 1114 and is also designed for transverse movement as indicated by thearrows 1115. The rotational and transverse movement is intended to reduce variability in material removal rates over the surface of thewafer 1112. The apparatus further comprises arotating platen 1116 on which is mounted apolishing pad 1117. Theplaten 1116 is relatively large in comparison to thewafer 1112, so that during the chemical mechanical planarization process, thewafer 1112 may be moved across the surface of thepolishing pad 1117 by thewafer carrier 1111. A polishing slurry containing a chemically reactive solution, in which abrasive particles are suspended, is delivered through asupply tube 1121 onto the surface of thepolishing pad 1117. - Referring to drawing FIG. 3 a typical polishing table is illustrated in top view. The surface of the polishing table1 is precision machined to be flat and may have a polishing pad affixed thereto. The surface of the table rotates the polishing pad past one or
more wafers 3 to be polished. Thewafer 3 is held by a wafer holder, as illustrated hereinbefore, which exerts vertical pressure on the wafer against the polishing pad. The wafer holder may also rotate and/or orbit the wafer on the table during wafer polishing. - Alternately, the table1 may be stationary and serve as a supporting surface for
individual polishing platens 2, each having their own individual polishing pad. As illustrated in U.S. Pat. No. 5,232,875, each platen may have its own mechanism for rotating or orbiting theplaten 2. A wafer holder will bring a wafer in contact with theplaten 2 and an internal or external mechanism to the wafer holder may be used to also rotate the wafer during the polishing operation. In a polishing table having multiple individual platens, each platen must be precision machined. - The
wafers 3 are typically stored and transported in wafer cassettes which hold multiple wafers. Thewafers 3 or wafer holders are transported between the wafer cassettes and the polishing table 1 using the wafer transport arm 4. The wafer transport arm 4 will transport thewafers 3 between the polishing table and thestations 5, which may be wafer cassette stations or wafer monitoring stations. - The polishing characteristics of the polishing pad will change during use as
multiple wafers 3 are polished. The glazing or changing of the polishing characteristics will affect the planarization of the surface of thewafers 3 if the pads are not periodically conditioned and unglazed. Thepad conditioner 6 is used to periodically unglaze the surface of the polishing pad. Thepad conditioner 6 has a range of motion which allows it to come in contact with the individual pads and conduct the periodic unglazing and then to move to its rest position. - The pressure between the surface of the wafer to be polished and the moving polishing pad may be generated by either the force of gravity acting on the wafer and the wafer carrier or by mechanical force applied normal to the wafer surface. The slurry may be delivered or injected through the polishing pad onto its surface. The planar platens may be moved in a plane parallel to the pad surface with either an orbital, fixed-direction vibratory or random direction vibratory motion.
- While a chemical mechanical planarization process is an effective process to planarize the surface of a wafer, variations in height on the surface to be planarized by the chemical mechanical planarization process, although minimized through the chemical mechanical planarization process, will often not be completely removed to yield an optimally planar surface. As is well known in the art, the chemical mechanical planarization process polishing pad will deform, or “dish,” into recesses between structures of the surface of the wafer. The structure spacing on the wafer which will yield this “dishing” is clearly a function of various factors, such as the pad composition, the polishing pressure, etc. This pad “dishing” will clearly lead to less than optimal planarization of the surface of the wafer. Further, the surface irregularities extending into or down to the wafer surface being planarized tend to collect slurry, thereby causing such areas of the wafer to be subjected to the corrosive effects of the slurry longer than other areas of the wafer surface which do not collect the slurry.
- To help minimize polishing pad deformation (dishing) caused by surface irregularities formed by the integrated circuit components on the wafer surface, dummy structures have also been included on the wafer surface in an attempt to provide a more uniform spacing of structures on the wafer surface. While the use of such dummy structures will often be useful, the ultimate result is also highly dependent upon the later chemical mechanical planarization process conditions.
- Therefore, a need exists to reduce the surface irregularities on a wafer before the chemical mechanical planarization process to facilitate planarization of the wafer surface irregularities by such process and to facilitate planarization which provides greater latitude in the chemical mechanical planarization process parameters.
- The present invention relates to an improved chemical mechanical planarization process for the planarization of surfaces in the manufacturing of semiconductor devices. The improved chemical mechanical planarization process of the present invention includes the formation of a flat, planar surface from a deformable, planar coating on the surface of the wafer filling the areas between the surface irregularities prior to the planarization of the surface through a chemical mechanical planarization process.
- FIG. 1 is a side view of a global planarization apparatus;
- FIG. 2 is an illustration of a conventional rotational chemical mechanical planarization apparatus;
- FIG. 3 is an illustration of a top view of a polishing table of a conventional rotational chemical mechanical planarization apparatus;
- FIG. 4 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon with a coating thereover;
- FIG. 5 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon, a coating thereover, a deformable coating, and a portion of a flat pressing member used in the present invention;
- FIG. 6 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon, a coating thereover, and a deformable coating after the deformation thereof using a flat pressing member in the process of the present invention;
- FIG. 7 is a cross-sectional view of a portion of a wafer substrate having electrical circuit components formed thereon and a coating material between the electrical circuit components after the chemical mechanical planarization process of the present invention of the configuration illustrated in drawing FIG. 6;
- FIG. 8 is a cross-sectional view of a portion of a wafer substrate, a resilient member located below the wafer substrate, a support member located below the resilient member and electrical circuit components formed on the wafer substrate, a coating located over the electrical circuits, and a deformable coating located over the coating formed over the electrical circuits after the deformation thereof using a flat pressing member in the process of the present invention;
- FIGS. 9A and 9B are a process flow description of the improved chemical mechanical planarization process of the present invention as illustrated in FIG. 7; and
- FIGS. 10A and 10B are a process flow description of the improved chemical mechanical planarization process of the alternative embodiment of the present invention illustrated in drawing FIG. 8.
- Referring to drawing FIG. 4, a portion of a
wafer substrate 20 is illustrated having portions ofelectrical circuit components 22 formed thereon and a coating ofmaterial 24, typically a metallic material, a semiconductor material, or an insulatingmaterial 24, covering theelectrical circuit components 22 and portions of thewafer substrate 20 located between theelectrical circuit components 22. As illustrated, the portions of theelectrical circuit components 22 are formed havingupper surfaces 26 thereon while the coating of insulatingmaterial 24 is formed having an irregularnonplanar surface 28 extending over theupper surfaces 26 of theelectrical circuit components 22. The insulatingmaterial 24 typically comprises an insulating oxide or other dielectric material and may include a plurality of layers of such insulating or other types of material, as desired. In this instance, for convenience, the insulatingmaterial 24 is illustrated covering thewafer substrate 20 and theelectrical circuit components 22 thereon regardless of the number of layers thereof. - It can be easily seen that if only portions of the
nonplanar surface 28 of insulatingmaterial 24 are removed for the formation of additional electrical circuit components, the nonplanar surface of the insulatingmaterial 24 would cause masking and etching problems as the masking of the insulatingmaterial 24 as well as the etching thereof would not be uniform. Therefore, thenonplanar surface 28 must be globally planarized to facilitate further electrical circuit component formation. - At this juncture, if a conventional chemical mechanical planarization process is used on the
wafer substrate 20, the surface of the wafer will be subject to a reactive slurry and one or more polishing pads used in the process in an attempt to form a planar surface on the insulatingmaterial 24 covering theelectrical circuit components 22. Some of the problems associated with such a conventional chemical mechanical planarization process are that the reactive slurry is unevenly distributed about thewafer substrate 20 and the pad used in the process, that particulates removed from thewafer substrate 20 and insulatingmaterial 24 during the polishing process may become lodged in the polishing pad, forming a glaze thereon, thereby affecting the rate of removal by the pad and causing the polishing pad to unevenly remove material during the process, and that as the chemical mechanical planarization process begins by polishing an irregular surface on the wafer, such surface causes the deformation of the polishing pad (dishing), thereby further inducing irregularities not initially present in the surface being polished, the induced irregularities of the surface of the wafer during the chemical mechanical planarization of the wafer surface being caused by the dishing of the polishing pad from the force applied thereto and the deformation of the pad by surface areas of the wafer. Therefore, before starting the chemical mechanical planarization process of the surface of a wafer, it is desirable to have the surface to be planarized as nearly planar as possible to help ensure the even removal of material therefrom and to help eliminate the deformation of the polishing pad(s) being used to thereby, in turn, help minimize any surface irregularities being introduced into the surface being planarized by such pad deformation. - Referring to drawing FIG. 5, the improved chemical mechanical planarization process of the present invention is illustrated in relation to a
wafer substrate 20 havingelectrical circuit components 22 thereon and a coating of insulatingmaterial 24 thereover. In the improved chemical mechanical planarization process of the present invention, prior to the initiation of the chemical mechanical planarization of thewafer substrate 20,electrical circuit components 22 and insulatingmaterial 24, a layer ofdeformable material 30 is coated or deposited over the insulatingmaterial 24. Thedeformable material 30 may be of any suitable type material that readily flows over thenonplanar surface 28 of the insulatingmaterial 24 and that is subsequently solidified through curing or hardening or other type of solidification. Alternately, thedeformable material 30, in some instances, may be a readily deformable metal capable of being deformed under low temperature and low pressure which may be readily deposited over the insulatingmaterial 24 through well known techniques and processes. Whatever the type ofdeformable material 30, thedeformable material 30 is applied over the insulatingmaterial 24 to any desired depth but is typically applied in a thickness greater than the thickness of the surface topography of the wafer, the thickness of thedeformable material 30 initially applied to the wafer depending upon the type of material selected for such use, the dimensions of the surface irregularities, etc. After the application of the layer ofdeformable material 30 to the insulatingmaterial 24 and before thedeformable material 30 has cured, hardened, or solidified to the point which it is not capable of being deformed, anobject 32 having a flatplanar surface 34 thereon is forced under pressure into thedeformable material 30 to form a flat,planar surface 36 thereon and is kept in contact with thedeformable material 30 while thedeformable material 30 cures, hardens, or solidifies. Theobject 32 may be of any well known suitable material, such as an optical quartz glass disc shaped object, having a desired flat, planar ground surface thereon which may be used to be pressed into thedeformable material 30 to form a flat,planar surface 36 thereon. If desired, theobject 32 may be tailored to meet process requirements of the desired range of pressure to be applied to thedeformable material 30 and the method of curing, hardening or solidifying thedeformable material 30. Further, if desired, the flat,planar surface 34 on theobject 32 may have a shape other than a flat,planar surface 34, such as either a concave surface, convex surface, concave and convex surface, or any type desired surface suitable in a chemical mechanical planarization process. Additionally, the flat,planar surface 34 of theobject 32 may be coated with a suitable release agent coating to facilitate its removal from thedeformable material 30 after the curing, hardening or solidification thereof. - The
deformable material 30 may be any suitable well known organic type, such as monomers, monomer mixtures, oligomers, and oligomer mixtures that are solidified through curing. Alternately, thedeformable material 30 may be any suitable type epoxy resin which may be cured using an acid catalyst. - The
object 32 is kept through the application of suitable pressure thereto, or application of pressure to thewafer substrate 20, or the application of pressure to both theobject 32 and thewafer substrate 20 in engagement with thedeformable material 30 until such material has hardened or solidified to form a permanently flat,planar surface 36 thereon being the mirror image of the flat,planar surface 34 on theobject 32. At such time, theobject 32 is removed from engagement with thedeformable material 30. - Referring to drawing FIG. 6, before the chemical mechanical planarization process of the present invention commenced the
wafer substrate 20 havingelectrical circuit components 22 andinsulative material 24 thereon is illustrated having thedeformable material 30 having a flat,planar surface 36 thereon providing a global flat, planar surface on the wafer substrate. As illustrated, the flat,planar surface 36 on thedeformable material 30 is a flat, planar surface from which the chemical mechanical planarization process is to begin on thewafer substrate 20. In this manner, a conventional, well known chemical mechanical planarization process as described hereinbefore can be used to form flat planar surfaces on the insulatingmaterial 24. By starting with a globally flat,planar surface 36 on thedeformable material 30, any deformation of the pad 1117 (FIG. 2) is minimized. Also, any nonuniform planarization which may occur due to the uneven distribution of the chemical reactive solution and abrasives included therein or material particles from the surfaces being planarized being collected or present in thepolishing pad 1117 resulting from surface irregularities is minimized. In this manner, by starting the chemical mechanical planarization process from a globally flat,planar surface 36 of thedeformable material 30, as the chemical mechanical planarization process is carried out, the surfaces of the layers being planarized remain flat and planar because thepolishing pad 1117 is subjected to more uniform loading and operation during the process. This is in clear contrast to the use of a chemical mechanical planarization process beginning from an irregular nonplanar surface as is typically carried out in the prior art. - Referring to drawing FIG. 7, illustrated is a
wafer substrate 20,electrical circuit components 22 and insulatingmaterial 24 which have been planarized using the improved chemical mechanical planarization process of the present invention. As illustrated, a flat,planar surface 40 has been formed through the use of the chemical mechanical planarization process of the present invention as described hereinbefore with the flat,planar surface 40 including flatplanar surface 28′ of the insulatingmaterial 24. - Referring to drawing FIG. 8, an alternate apparatus and method of the improved chemical mechanical planarization process of the present invention is illustrated. The present invention is illustrated in relation to a
wafer substrate 20 havingelectrical circuit components 22 thereon and a coating of insulatingmaterial 24 thereover. In the improved chemical mechanical planarization process of the present invention, prior to the initiation of the chemical mechanical planarization of thewafer substrate 20,electrical circuit components 22 and insulatingmaterial 24, a layer ofdeformable material 30 is coated or deposited over the insulatingmaterial 24. Thedeformable material 30 may be of any suitable type material which readily flows over thenonplanar surface 28 of the insulatingmaterial 24 that is subsequently solidified through curing or hardening. Thedeformable material 30 is applied over the insulatingmaterial 24 to any desired depth but is typically applied in a thickness greater than the surface topography of the wafer, the thickness of thedeformable material 30 initially applied to the wafer depending upon the type of material selected for such use, the dimensions of the surface irregularities, etc. - After the application of the layer of
deformable material 30 to the insulatingmaterial 24 and before thedeformable material 30 has cured, hardened, or solidified to the point which it is not capable of being deformed, a flexibleresilient member 50 is placed under thewafer substrate 20 between thewafer substrate 20 and thesubstrate 60 on which thewafer substrate 20 is supported and anobject 32 having a flatplanar surface 34 thereon is forced under pressure into flat,planar surface 36 of thedeformable material 30 to form a globally flat,planar surface 36 thereon and is kept in contact with thedeformable material 30 while thedeformable material 30 cures, hardens, or solidifies. As previously illustrated, theobject 32 may be of any well known suitable material, such as an optical quartz glass disc shaped object having a flat, planar ground surface thereon which may be used to be pressed into thedeformable material 30 to form a globally flat,planar surface 36 thereon. If desired, theobject 32 may be tailored to meet process requirements of the desired range of pressure to be applied to thedeformable material 30 and the method of curing, hardening or solidifying thedeformable material 30. - Further, if desired, the flat,
planar surface 34 of theobject 32 may have a shape other than a flat,planar surface 34, such as either a concave surface, convex surface, or any desired surface. Additionally, the flat,planar surface 34 of theobject 32 may be coated with a suitable release agent coating to facilitate its removal from thedeformable material 30 after the curing, hardening or solidification thereof. The flexibleresilient member 50 comprises a suitably shaped member compatible with thewafer substrate 20 formed of resilient material which will deform under an applied force to uniformly distribute the applied force from theobject 32 to thedeformable material 30, even if the flat,planar surface 34 ofobject 32, surfaces 52 and 54 of the flexibleresilient member 50 and the flat,planar surface 36 of thedeformable material 30 onwafer substrate 20 are not substantially parallel to each other or, alternately, when thickness variations locally exist within either thewafer substrate 20,electrical circuit components 22, insulatingmaterial 24,object 32, and/or flexibleresilient member 50. It is preferred that the flexibleresilient member 50 is thermally stable and resistant to the temperature ranges of operation experienced during the pressing byobject 32 and that the flexibleresilient member 50 be formed from a low viscosity and low durometer hardness material. In this manner, the flexibleresilient member 50 serves to compensate for the variations in the thickness of thewafer substrate 20,electrical circuit components 22, insulatingmaterial 24,deformable material 30, and object 32 as well as compensating for any nonparallel surfaces on theobject 32 or thewafer substrate 20 or thesubstrate 60 on which thewafer substrate 20 is supported during the pressing ofobject 32 to form flat,planar surface 36 on thedeformable material 30 prior to the beginning of the chemical mechanical planarization process thereafter. The preferable manner in which the insulatingmaterial 24 on awafer substrate 20 is to be globally planarized to have a globally flat,planar surface 28′ to begin the chemical mechanical planarization process is to use theglobal planarization apparatus 100 hereinbefore described with respect to drawing FIG. 1, or its equivalent. - Referring to drawing FIGS. 9A and 9B, the improved chemical mechanical planarization process of the present invention as described hereinbefore is illustrated in a series of process steps202 through 218.
- In
process step 202, awafer substrate 20 is provided havingelectrical circuitry components 22 formed thereon and an insulatingmaterial 24 covering theelectrical circuitry components 22 and portions of thewafer substrate 20. - In
process step 204, a coating ofdeformable material 30 which is uncured, unhardened, or not solidified at the time of application is applied to the coating of insulatingmaterial 24 to cover the same. - Next, in
process step 206, anobject 32 having a flatplanar surface 34 thereon is provided for use. - In
process step 208, the surface ofdeformable material 30 is contacted by the flat,planar surface 34 of theobject 32. - In
process step 210, a predetermined level of pressure is applied at a predetermined temperature level to thedeformable material 30. The pressure may be applied to either theobject 32, thewafer substrate 20, or both, etc. - In
process step 212, flat,planar surface 34 ofobject 32 forms a flat,planar surface 36 on thedeformable material 30. - In
process step 214, while the flat,planar surface 34 of theobject 32 engages thedeformable material 30 thereby forming the flat,planar surface 36 thereon, thedeformable material 30 is cured, hardened, or solidified to cause the permanent formation and retention of the flat,planar surface 36 on thedeformable material 30. - In
process step 216, theobject 32 is removed from engagement with thedeformable material 30 after the curing, hardening or solidification thereof to retain the flat,planar surface 36 thereon. - In
process step 218, thewafer substrate 20 havingelectrical circuit components 22, insulatingmaterial 24, and cured, hardened, or solidifieddeformable material 30 thereon is subjected to a suitable chemical mechanical planarization process until theupper surfaces 26 of the electrical circuit components and flat,planar surface 28′ of the insulatingmaterial 24 are a concurrent common flat, planar surface extending across the wafer substrate 20 (see FIG. 7). - Referring to drawing FIGS. 10A and 10B, alternately, if the apparatus and method described with respect to drawing FIG. 8 are used, the process of such improved chemical mechanical planarization process is illustrated in process steps302 through 320.
- In
process step 302, awafer substrate 20 is provided havingelectrical circuitry components 22 formed thereon and an insulatingmaterial 24 covering theelectrical circuit components 22 and portions of thewafer substrate 20. - In
process step 304, a coating ofdeformable material 30 which is uncured, unhardened, or not solidified at the time of application is applied to the coating of insulatingmaterial 24 to cover the same. - Next, in
process step 306, anobject 32 having a flatplanar surface 34 thereon is provided for use. - In
process step 308, a flexibleresilient member 50 is placed in contact with the bottom surface of thewafer substrate 20. - In
process step 310, the flat,planar surface 36 of thedeformable material 30 is contacted with the flat,planar surface 34 of theobject 32. - In
process step 312, flexibleresilient member 50 remains contacting or engaging the bottom surface of thewafer substrate 20. - In
process step 314, a predetermined level of pressure is applied at a predetermined temperature level to either theobject 32, or thewafer substrate 20, or both, thereby causing the flat,planar surface 34 of theobject 32 to transmit force to thedeformable material 30, thereby causing the flat,planar surface 36 of thedeformable material 30 to form a flatplanar surface 36 thereon substantially similar to the flatplanar surface 34 of theobject 32. - In
process step 316, while the flat,planar surface 34 of theobject 32 engages thedeformable material 30, thereby forming the flat,planar surface 36 thereon, thedeformable material 30 is cured, hardened or solidified to cause the permanent formation and retention of the flat,planar surface 36 on thedeformable material 30. - In
process step 318, theobject 32 is removed from engagement with thedeformable material 30 after the curing, hardening or solidification thereof to retain the flat,planar surface 36 thereon. If the flexibleresilient member 50 is used on the bottom of thewafer substrate 20, it may remain, or, if desired, a comparable flexible member may be provided during the chemical mechanical planarization process. - In
process step 320, thewafer substrate 20 havingelectrical circuit components 22, insulatingmaterial 24, and cured, hardened, or solidifieddeformable coating 30 thereon is subjected to a suitable chemical mechanical planarization process until theupper surfaces 26 of the electrical circuit components and flat,planar surface 28′ of the insulatingmaterial 24 are a concurrent, common, unbroken flat,planar surface 40 extending across the wafer substrate 20 (see FIG. 7). The preferable manner in which the insulatingmaterial 24 on awafer substrate 20 is to be globally planarized to have a globally flat,planar surface 28 to begin the chemical mechanical planarization process is to use theglobal planarization apparatus 100 hereinbefore described with respect to drawing FIG. 1, or its equivalent. - In this manner, when the improved process of chemical mechanical planarization of the present invention is used, the resulting planarized surface on the wafer substrate is globally planar or more planar since the process started from a globally flat, planar surface and the chemical mechanical planarization process reaches a successful conclusion more quickly because the surface being planarized does not deform the polishing pad unnecessarily as the surface remains substantially planar throughout the process. This is in clear contrast to the prior art conventional chemical mechanical planarization process which begins from an irregular nonplanar surface, thereby causing the deformation and deflection of the polishing pad, thereby, in turn, causing an irregular nonplanar surface in the surface being planarized. Furthermore, the improved chemical mechanical planarization process of the present invention offers advantages over a globally planarized surface which is subsequently dry resistant etched-back. In globally planarized surfaces which are dry etched-back, the dry etching process does not act uniformly on the materials being etched as they are subjected to the etching process at differing times and each material exhibits a differing etching rate, thereby causing irregularities to be present in the resulting final surface at the end of the dry etching process. In contrast, the improved chemical mechanical planarization process begins from a globally flat planar surface, retains a globally flat, planar surface throughout the process, and results in a final globally flat planar surface at the end of the process.
- It will be understood that changes, additions, modifications, and deletions may be made to the improved chemical mechanical planarization process of the present invention which are clearly within the scope of the claimed invention.
Claims (126)
1. A method for planarizing a wafer comprising:
providing a wafer having a nonplanar film surface thereon;
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object having a substantially flat planar surface;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the substantially flat planar surface of the object;
curing the deformable material while the object contacts the deformable material;
removing the object from contacting the deformable material on the surface of the wafer; and
planarizing the wafer using a chemical mechanical planarization process.
2. A method for planarizing a wafer comprising:
providing a wafer having a nonplanar film surface thereon;
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object having a flat planar surface;
forming a substantially flat planar surface on the nonplanar film surface of the wafer by contacting the deformable material with the flat planar surface of the object;
hardening the deformable material while the object contacts the deformable material;
removing the object from contacting the deformable material of the wafer; and
planarizing the wafer using a chemical mechanical planarization process.
3. A method for planarizing a wafer comprising:
providing a wafer having a nonplanar film surface thereon;
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;
solidifying the deformable material while the object contacts the deformable material;
removing the object from contacting the deformable material on the surface of the wafer; and
planarizing the wafer using a chemical mechanical planarization process.
4. The method of claim 3 , further comprising:
applying pressure to the object while the object contacts the deformable material.
5. The method of claim 3 , further comprising: applying pressure to the coating of the deformable material on the nonplanar surface of the wafer while the object contacts the deformable material.
6. The method of claim 3 , wherein the object includes a substantially flat planar surface thereon contacting the deformable material.
7. A method for planarizing a wafer, the method comprising:
providing a wafer having a nonplanar film surface thereon;
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object, the object including a shaped surface thereon contacting the deformable material, the shaped surface including a convex surface portion;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the shaped surface of the object;
removing the shaped surface of the object from contacting the deformable material on the surface of the wafer; and
planarizing the wafer using a chemical mechanical planarization process.
8. A method for planarizing a wafer comprising:
providing a wafer having a nonplanar film surface thereon;
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object, the object including a shaped surface thereon contacting the deformable material, the shaped surface including a concave surface portion;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the concave surface portion of the shaped surface of the object;
removing the shaped surface of the object from contacting the deformable material on the surface of the wafer; and
planarizing the wafer using a chemical mechanical planarization process.
9. A method for planarizing a wafer comprising:
providing a wafer having a nonplanar film surface thereon;
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object, the object including a shaped surface thereon contacting the deformable material, the shaped surface including a convex surface portion and a concave surface portion;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the shaped surface of the object;
removing the shaped surface of the object from contacting the deformable material on the surface of the wafer; and
planarizing the wafer using a chemical mechanical planarization process.
10. A method for planarizing a wafer comprising:
providing a wafer having a nonplanar film surface thereon;
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object, the object including a shaped surface thereon contacting the deformable material, the object including a flat optical glass object;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the shaped surface of the object;
removing the shaped surface of the object from contact with the deformable material on the surface of the wafer; and
planarizing the wafer using a chemical mechanical planarization process.
11. A method for planarizing a wafer comprising:
providing a wafer having a nonplanar film surface thereon;
coating the nonplanar film surface of the wafer with a deformable material;
coating an object with a release agent prior to contacting the deformable material;
contacting the deformable material with the object, the object including a shaped surface thereon contacting the deformable material;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the shaped surface of the object;
removing the shaped surface of the object from contacting the deformable material on the surface of the wafer; and
planarizing the wafer using a chemical mechanical planarization process.
12. The method of claim 11 , wherein the object comprises a substantially inflexible object having a flat surface thereon.
13. The method of claim 11 , further comprising:
contacting the wafer with a resilient member.
14. The method of claims 13, wherein a back side of the wafer is contacted with the resilient member.
15. The method of claim 14 , further comprising: applying pressure to the resilient member to form a substantially flat planar surface on the deformable material by contacting the deformable material with the shaped surface of the object by applying the pressure to the wafer.
16. The method of claim 15 , further comprising:
contacting the resilient member with a substrate; and
applying pressure to the substrate thereby applying pressure to the resilient member thereby applying pressure to the wafer.
17. The method of claim 15 , further comprising:
applying pressure to the wafer through the resilient member thereby applying pressure to the object thereby deforming the coating of the deformable material on the wafer by the shaped surface of the object contacting the deformable material on the wafer.
18. The method of claim 11 , wherein the wafer comprises a wafer having electrical circuit components on a surface thereof.
19. The method of claim 11 , wherein the wafer comprises a wafer having a plurality of electrical circuit components on a surface thereof and a coating substantially covering the plurality of electrical circuit components.
20. The method of claim 11 , wherein the wafer comprises a wafer having a plurality of electrical components on a surface thereof and a coating substantially covering the plurality of electrical components and the wafer.
21. The method of claim 11 , further comprising:
applying a substantially uniform pressure to the object while the object is in contact with the deformable material for forming a substantially flat planar surface on the deformable material on the wafer.
22. The method of claim 11 , further comprising:
applying a substantially uniform pressure to the deformable material on the nonplanar film surface of the wafer to form a substantially flat planar surface on the deformable material.
23. A method for planarizing a nonplanar film surface of a wafer having at least one electrical circuit formed thereon comprising:
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;
curing the deformable material while the object contacts the deformable material;
removing the object from contacting the deformable material; and
planarizing the substantially flat planar surface on the wafer using a chemical mechanical planarization process.
24. A method for planarizing a nonplanar film surface of a wafer having at least one electrical circuit formed thereon comprising:
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;
hardening the deformable material while the object contacts the deformable material;
removing the object from contacting the deformable material; and
planarizing the substantially flat planar surface on the wafer using a chemical mechanical planarization process.
25. A method for planarizing a nonplanar film surface of a wafer having at least one electrical circuit formed thereon comprising:
coating the nonplanar film surface of the wafer with a deformable material;
contacting the deformable material with an object;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;
solidifying the deformable material while the object contacts the deformable material;
removing the object from contacting the deformable material; and
planarizing the substantially flat planar surface on the wafer using a chemical mechanical planarization process.
26. The method of claim 25 , further comprising:
applying pressure to the object contacting the deformable material while the object contacts the deformable material.
27. The method of claim 25 , further comprising:
applying pressure to the deformable material on the surface of the wafer while the object contacts the deformable material.
28. The method of claim 25 , wherein the object includes a substantially flat planar surface thereon contacting the deformable material.
29. The method of claim 25 , wherein the object includes a shaped surface thereon contacting the deformable material.
30. A method for planarizing a nonplanar film surface of a wafer having at least one electrical circuit formed thereon comprising:
providing an object;
coating the nonplanar film surface of the wafer with a deformable material;
coating the object with a release agent;
contacting the deformable material with the object;
forming a substantially flat planar surface on the nonplanar film surface of the wafer using the object;
removing the object from contacting the deformable material; and
planarizing the substantially flat planar surface on the wafer using a chemical mechanical planarization process.
31. The method of claim 30 , wherein the object includes a substantially inflexible object.
32. The method of claim 30 , further comprising:
contacting the wafer with a resilient member.
33. The method of claim 30 , wherein a back side of the wafer is contacted with a resilient member.
34. The method of claim 33 , further comprising:
applying pressure to the flexible resilient member to form a substantially flat planar surface on the deformable material.
35. The method of claim 33 , further comprising:
contacting the resilient member with a substrate; and
applying pressure to the substrate thereby applying pressure to the flexible resilient member.
36. The method of claim 33 , further comprising:
applying pressure to the wafer by applying pressure to the flexible resilient member thereby applying pressure to the object.
37. The method of claim 30 , wherein the wafer comprises a wafer having a plurality of electrical circuit components on a surface thereof.
38. The method of claim 30 , wherein the wafer comprises a wafer having a plurality of electrical components on a surface thereof and a coating substantially covering the plurality of electrical components.
39. The method of claim 30 , wherein the wafer comprises a wafer having a plurality of electrical circuits on a surface thereof and a coating substantially covering the plurality of electrical circuits and the wafer.
40. The method of claim 30 , further comprising: applying a substantially uniform pressure to the object while the object is in contact with the deformable material.
41. The method of claim 30 , further comprising:
applying a substantially uniform pressure to the deformable material on the surface of the wafer to form a substantially flat planar surface on the deformable material.
42. A wafer comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
43. A wafer comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
44. A wafer comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
45. The wafer of claim 44 , further comprising:
solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.
46. The wafer of claim 44 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.
47. A wafer in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
48. A wafer in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
49. A wafer in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
50. The wafer in a chemical mechanical planarization process of claim 49 , further comprising:
solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.
51. The wafer in a chemical mechanical planarization process of claim 49 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.
52. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
53. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
54. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
55. The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process of claim 54 , further comprising:
solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.
56. The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process of claim 54 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.
57. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
58. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
59. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
60. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 59 , further comprising:
solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.
61. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 59 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.
62. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
63. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
64. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
65. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 64 , further comprising:
solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.
66. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 64 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.
67. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during a planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
68. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during a planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
69. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a planarization process comprising:
a wafer substrate having a substantially planar surface thereon formed during a planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
70. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 69 , further comprising:
solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.
71. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 69 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.
72. A wafer comprising:
a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
73. A wafer comprising:
a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
74. A wafer comprising:
a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
75. The wafer of claim 74 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
76. The wafer of claim 74 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.
77. A wafer in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
78. A wafer in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
79. A wafer in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
80. The wafer in a chemical mechanical planarization process of claim 79 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
81. The wafer in a chemical mechanical planarization process of claim 79 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the deformable material.
82. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
83. A wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
84. A wafer having at least a portion of at least one integrated circuit formed theron in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
85. The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process of claim 84 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
86. The wafer having at least a portion of at least one integrated circuit formed thereon in a chemical mechanical planarization process of claim 84 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the deformable material.
87. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the deformable material using a chemical mechanical planarization process.
88. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the deformable material using a chemical mechanical planarization process.
89. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the deformable material using a chemical mechanical planarization process.
90. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 89 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
91. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 89 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.
92. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
93. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
94. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
95. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 94 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
96. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 94 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.
97. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during a planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
98. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during a planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
99. A wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process comprising:
a wafer having a surface thereon formed during a planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
100. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 99 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
101. The wafer having at least a portion of at least one integrated circuit formed thereon in at least a portion of a semiconductor device of a plurality of semiconductor devices being formed on the wafer, the wafer located in a chemical mechanical planarization process of claim 99 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.
102. A semiconductor device comprising:
a portion of a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material cured in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
103. A semiconductor device comprising:
a portion of a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material hardened in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
104. A semiconductor device comprising:
a portion of a wafer substrate having a substantially planar surface thereon formed during an initial planarization of a deformable material solidified in contact with a substantially flat planar surface of an object and a final planarization of the deformable material after curing using a chemical mechanical planarization process.
105. The semiconductor device of claim 104 , further comprising:
solidifying the deformable material while applying pressure to the object as the object contacts the deformable material.
106. The semiconductor device of claim 104 , wherein the object includes the substantially flat planar surface thereon contacting the deformable material.
107. A semiconductor device comprising:
a portion of a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
108. A semiconductor device comprising:
a portion of a wafer substrate having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
109. A semiconductor device comprising:
a portion of a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
110. The semiconductor device of claim 109 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
111. The semiconductor device claim 109 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.
112. An incomplete semiconductor device in wafer form comprising:
a portion of a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
113. An incomplete semiconductor device in wafer form comprising:
a portion of a wafer substrate having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
114. An incomplete semiconductor device comprising:
a portion of a wafer having a substantially planar surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
115. The incomplete semiconductor device of claim 114 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
116. The incomplete semiconductor device of claim 114 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.
117. A semiconductor device in a manufacturing process comprising:
a portion of a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a substantially flat planar surface of an object and a final planarization of the material using a chemical mechanical planarization process.
118. A semiconductor device in a manufacturing process comprising:
a portion of a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
119. A semiconductor device in a manufacturing process comprising:
a portion of a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
120. The semiconductor device in a manufacturing process of claim 119 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
121. The semiconductor device in a manufacturing process of claim 119 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.
122. An incomplete semiconductor device in a manufacturing process comprising:
a portion of a wafer having a surface thereon formed during an initial planarization of a material cured in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
123. An incomplete semiconductor device in a manufacturing process comprising:
a portion of a wafer having a surface thereon formed during an initial planarization of a material hardened in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
124. An incomplete semiconductor device in a manufacturing process comprising:
a portion of a wafer having a surface thereon formed during an initial planarization of a material solidified in contact with a surface of an object and a final planarization of the material using a chemical mechanical planarization process.
125. The incomplete semiconductor device in a manufacturing process of claim 124 , further comprising:
solidifying the material while applying pressure to the object as the object contacts the material.
126. The incomplete semiconductor device in a manufacturing process of claim 124 , wherein the surface of the object includes a substantially flat planar surface thereon contacting the material.
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US11/484,809 US20060249723A1 (en) | 1997-05-23 | 2006-07-11 | Planarization process for semiconductor substrates |
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Also Published As
Publication number | Publication date |
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US6743724B2 (en) | 2004-06-01 |
WO1998053487A1 (en) | 1998-11-26 |
KR100413139B1 (en) | 2003-12-31 |
EP1021824A4 (en) | 2000-07-26 |
US6331488B1 (en) | 2001-12-18 |
ATE256916T1 (en) | 2004-01-15 |
EP1021824A1 (en) | 2000-07-26 |
DE69820662D1 (en) | 2004-01-29 |
JP2001527699A (en) | 2001-12-25 |
DE69820662T2 (en) | 2004-10-07 |
EP1021824B1 (en) | 2003-12-17 |
US20060249723A1 (en) | 2006-11-09 |
KR20010012837A (en) | 2001-02-26 |
TW519702B (en) | 2003-02-01 |
US20010051430A1 (en) | 2001-12-13 |
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