US20050062124A1 - Thick field oxide termination for trench schottky device and process for manufacture - Google Patents
Thick field oxide termination for trench schottky device and process for manufacture Download PDFInfo
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- US20050062124A1 US20050062124A1 US10/936,162 US93616204A US2005062124A1 US 20050062124 A1 US20050062124 A1 US 20050062124A1 US 93616204 A US93616204 A US 93616204A US 2005062124 A1 US2005062124 A1 US 2005062124A1
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- 238000004519 manufacturing process Methods 0.000 title description 3
- 238000000034 method Methods 0.000 title description 2
- 238000009413 insulation Methods 0.000 claims abstract description 27
- 239000010410 layer Substances 0.000 claims description 52
- 239000011229 interlayer Substances 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 8
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 7
- 229920005591 polysilicon Polymers 0.000 claims description 7
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 6
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 4
- 229910052750 molybdenum Inorganic materials 0.000 claims description 4
- 239000011733 molybdenum Substances 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 15
- 230000015556 catabolic process Effects 0.000 description 5
- 150000004767 nitrides Chemical class 0.000 description 5
- 125000006850 spacer group Chemical group 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000001066 destructive effect Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000002028 premature Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0661—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
Definitions
- Trench schottky diodes are known.
- An example of a trench schottky diode is shown in the copending application Ser. No. 10/193,783, filed Jul. 11, 2002 and assigned to the assignee of the present invention.
- the device shown in application Ser. No. 10/193,783 includes an active region that includes a plurality of trenches, and a termination region which includes a termination trench.
- the sidewalls and the bottoms of the trenches in the active region, and the sidewalls and the bottom of the termination trench are lined with an oxide layer, which is formed simultaneously in the trenches of the active region and the termination trench.
- the thickness of the oxide layer in the active region is related to the breakdown voltage (BV) of the device.
- BV breakdown voltage
- the thickness of the oxide in the termination trench mainly affects reverse voltage stability and ruggedness.
- the thickness of the oxide in the active region and the thickness of the oxide in the termination region are about the same, there is a possibility that the termination will breakdown prior to the active region. This premature breakdown will reduce the overall efficiency of the device.
- the oxide in the termination region is made thicker than the oxide in the active region in order to overcome the drawback of the prior art devices.
- a thicker oxide in the termination region confines the avalanche breakdown in the active region. This improves the reverse avalanche absorption capability in a destructive avalanche test, because the entire active region, which is wider than the termination region, is invested by the avalanche energy, whereby higher energy can be dissipated before failure.
- a thicker termination oxide in the termination region will avoid “BV Walk-Out” by releasing the electric field under the tip of the field plate.
- the mechanical strength of the termination region is improved such that the device is less likely to fail during temperature cycles due to oxide repture under the tip of the metal field plate.
- FIG. 1 shows a top plan view of a schottky diode according to the present invention.
- FIG. 2 shows a cross-sectional view of the schottky diode illustrated in FIG. 1 along line 2 - 2 and viewed in the direction of the arrows.
- FIG. 3 shows a graphical comparison of the electrical characteristics of a device according to the present invention to a conventional planar device.
- FIGS. 4-8 illustrate selected steps in manufacturing a device according to the present invention.
- a semiconductor device is a trench type schottky diode 10 , which includes active region 12 and termination region 14 both formed in a semiconductor body.
- the semiconductor body may be a silicon die which includes an N ⁇ epitaxial silicon 16 formed over an N+ silicon substrate 19 .
- active region 12 includes a plurality of spaced trenches 18 each having opposing sidewalls 20 and a bottom 22 , a first insulation layer 24 formed over bottom 22 and sidewalls 20 of each trench 18 , and a conductive body 26 disposed withing each trench 18 over a respective insulation layer 24 .
- first insulation layer 24 may be silicon dioxide and conductive body 26 may be P type polysilicon.
- a schottky diode further includes a schottky metal layer 28 in schottky contact with mesa 30 regions between trenches 18 , an interlayer 32 formed over schottky metal layer 28 , and a contact layer 34 formed over interlayer 32 .
- schottky metal layer 28 may be composed of palladium
- interlayer 32 may be composed of molybdenum
- contact layer 34 may be composed of aluminum or aluminum silicon.
- Schottky diode 10 according to the present invention further includes cathode contact 36 formed over substrate 19 .
- Cathode contact 36 includes a solderable outer surface composed of a trimetal combination.
- Termination region 14 in the preferred embodiment of the present invention includes termination trench 38 which surrounds active region 12 .
- Termination trench 40 includes inner sidewall 43 (the sidewall that is adjacent active region 12 ), outer sidewall 44 , and bottom 46 .
- insulation layer 42 which is formed preferably from silicon dioxide is disposed on sidewalls 43 , 44 and bottom 46 of termination trench 40 , and conductive spacers 45 are formed on insulation layer 42 on sidewalls 43 , 44 .
- Termination region 14 further includes thick insulation 48 formed preferably of silicon dioxide and disposed over conductive spacers 45 and insulation 42 on bottom 46 of termination trench 40 .
- thick insulation 48 formed preferably of silicon dioxide and disposed over conductive spacers 45 and insulation 42 on bottom 46 of termination trench 40 .
- Schottky layer 28 , interlayer 32 and contact layer 34 extend from active region 12 along inner sidewall 43 of termination trench 40 over at least a portion of bottom 46 of trench 40 , and terminate before reaching outer sidewall 44 .
- thick insulation layer 48 is thicker than first insulation layer 24 in each trench 18 .
- insulation layer 24 in trenches 18 may be about 4000 ⁇ thick, while the total thickness of thick insulation 48 and insulation layer 42 in termination trench 40 may be about 10000 A (1 um) thick.
- Table 1 sets forth electrical characteristics of a 100V device according to the present invention and a 100V planar conventional Schottky diode with a guard ring termination.
- a schottky diode with a thick insulation 48 can have a leakage current that is three times lower than a conventional planar device with a guard ring termination.
- a schottky diode according to the present invention provides a 12% lower forward voltage drop at 25° C. despite being 20% smaller than a conventional planar device. It should also be noted that in a device according to the present invention, the same breakdown voltage as a planar device can be achieved with half the resistivity in epitaxial layer 16 (1.25 vs.2.45 Ohm-cm). Thus, a lower forward voltage drop can be achieved by using an epitaxial layer 16 of lower resistivity and thickness if a structure according to the present invention is used.
- FIG. 3 shows the ruggedness of the new termination design in a destructive avalanche test.
- a schottky diode according to the present invention is able to absorb 50% more current before failing than a planar schottky diode with 28% more silicon area.
- FIG. 4 there is shown a semiconductor body which includes N ⁇ epitaxial silicon 16 formed over N+ silicon substrate 19 .
- a nitride layer 50 is first deposited atop epitaxial silicon 16 to a preferred thickness of 600 ⁇ to 800 ⁇ .
- trenches 18 and termination trench 40 are defined in epitaxial silicon 16 to obtain the structure shown in FIG. 5 .
- Trenches 18 in the preferred embodiment are about 0.8 microns, while termination trench 40 is preferably 70 microns wide.
- preferably inner sidewall 43 of termination trench 40 is about two microns away from the closest trench 18 to termination trench 40 . It should be noted that trenches 18 may be either stripes or cellular in structure.
- sidewalls 20 and bottom 22 of trenches 18 , and sidewalls 43 , 44 and bottom 46 of termination trench 40 are oxidized in an oxidation step to form first insulation layers 24 and insulation layer 42 , thus obtaining the structure shown in FIG. 6 .
- first insulation layers 24 and insulation layer 42 are preferably 4000 ⁇ thick. It should be noted that areas covered by nitride layer 50 are not oxidized in that the nitride layer is an oxidation retardant.
- conductive bodies 26 are formed in trenches 18 by first depositing a layer of polysilicon over the structure shown in FIG. 5 , implanting and driving P type impurities such as boron atoms into the polysilicon, and then removing as much of the polysilicon as necessary to only leave polysilicon in trenches 18 to form conductive bodies 26 , and conductive spacers 45 in termination trench 40 . Thereafter, a layer of TEOS 52 is deposited. In the preferred embodiment, TEOS 52 is about 7000 ⁇ thick.
- TEOS 52 is removed from active region 12 and preferably any other region except for termination trench 40 , thereby defining thick insulation 48 in termination trench 40 .
- a wet nitride etch removes nitride layers 50 and Schottky barrier layer 28 is formed followed by interlayer 32 and contact layer 34 .
- schottky layer 28 is formed of palladium and is 30 ⁇ thick
- interlayer 32 is formed with molybdenum and is 3000 ⁇ thick
- contact layer 34 is formed from aluminum and is 4 micrometers thick.
- schottky layer 28 , interlayer 32 and contact layer 34 are removed from portions of termination region 14 to obtain the structure seen in FIG. 2 .
Abstract
Description
- This application is based on and claims benefit of U.S. Provisional Application No. 60/501,009, filed on Sep. 8, 2003, entitled Thick Field Oxide Termination For Trench Schottky Device and Process for Manufacture, to which a claim of priority is hereby made and the disclosure of which is incorporated herein by reference.
- Trench schottky diodes are known. An example of a trench schottky diode is shown in the copending application Ser. No. 10/193,783, filed Jul. 11, 2002 and assigned to the assignee of the present invention.
- The device shown in application Ser. No. 10/193,783 includes an active region that includes a plurality of trenches, and a termination region which includes a termination trench. In the device shown in application Ser. No. 10/193,783 the sidewalls and the bottoms of the trenches in the active region, and the sidewalls and the bottom of the termination trench are lined with an oxide layer, which is formed simultaneously in the trenches of the active region and the termination trench.
- The thickness of the oxide layer in the active region is related to the breakdown voltage (BV) of the device. Thus, for an epitaxial silicon of a given resistivity in which trenches are formed, there is an optimum oxide thickness that provides the maximum BV for the trenches. However, the thickness of the oxide in the termination trench mainly affects reverse voltage stability and ruggedness.
- Because the thickness of the oxide in the active region and the thickness of the oxide in the termination region are about the same, there is a possibility that the termination will breakdown prior to the active region. This premature breakdown will reduce the overall efficiency of the device.
- In a device according to the present invention the oxide in the termination region is made thicker than the oxide in the active region in order to overcome the drawback of the prior art devices.
- In addition, a thicker oxide in the termination region confines the avalanche breakdown in the active region. This improves the reverse avalanche absorption capability in a destructive avalanche test, because the entire active region, which is wider than the termination region, is invested by the avalanche energy, whereby higher energy can be dissipated before failure.
- Moreover, a thicker termination oxide in the termination region will avoid “BV Walk-Out” by releasing the electric field under the tip of the field plate.
- Finally, the mechanical strength of the termination region is improved such that the device is less likely to fail during temperature cycles due to oxide repture under the tip of the metal field plate.
- Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.
-
FIG. 1 shows a top plan view of a schottky diode according to the present invention. -
FIG. 2 shows a cross-sectional view of the schottky diode illustrated inFIG. 1 along line 2-2 and viewed in the direction of the arrows. -
FIG. 3 shows a graphical comparison of the electrical characteristics of a device according to the present invention to a conventional planar device. -
FIGS. 4-8 illustrate selected steps in manufacturing a device according to the present invention. - Referring now to
FIGS. 1 and 2 , a semiconductor device according to the preferred embodiment of the present invention is a trenchtype schottky diode 10, which includesactive region 12 andtermination region 14 both formed in a semiconductor body. The semiconductor body may be a silicon die which includes an N−epitaxial silicon 16 formed over anN+ silicon substrate 19. - In the preferred embodiment of the present invention,
active region 12 includes a plurality of spacedtrenches 18 each havingopposing sidewalls 20 and abottom 22, afirst insulation layer 24 formed overbottom 22 andsidewalls 20 of eachtrench 18, and aconductive body 26 disposed withing eachtrench 18 over arespective insulation layer 24. In the preferred embodiment,first insulation layer 24 may be silicon dioxide andconductive body 26 may be P type polysilicon. - A schottky diode according to the preferred embodiment further includes a
schottky metal layer 28 in schottky contact withmesa 30 regions betweentrenches 18, aninterlayer 32 formed overschottky metal layer 28, and acontact layer 34 formed overinterlayer 32. In the preferred embodiment,schottky metal layer 28 may be composed of palladium,interlayer 32 may be composed of molybdenum andcontact layer 34 may be composed of aluminum or aluminum silicon. Schottkydiode 10 according to the present invention further includescathode contact 36 formed oversubstrate 19.Cathode contact 36 includes a solderable outer surface composed of a trimetal combination. -
Termination region 14 in the preferred embodiment of the present invention includes termination trench 38 which surroundsactive region 12.Termination trench 40 includes inner sidewall 43 (the sidewall that is adjacent active region 12),outer sidewall 44, andbottom 46. In the preferred embodiment,insulation layer 42, which is formed preferably from silicon dioxide is disposed onsidewalls bottom 46 oftermination trench 40, andconductive spacers 45 are formed oninsulation layer 42 onsidewalls -
Termination region 14 further includesthick insulation 48 formed preferably of silicon dioxide and disposed overconductive spacers 45 andinsulation 42 onbottom 46 oftermination trench 40. In the preferred embodiment, Schottkylayer 28,interlayer 32 andcontact layer 34 extend fromactive region 12 alonginner sidewall 43 oftermination trench 40 over at least a portion ofbottom 46 oftrench 40, and terminate before reachingouter sidewall 44. - According to an aspect of the present invention,
thick insulation layer 48 is thicker thanfirst insulation layer 24 in eachtrench 18. - Thus, for example, in a mid-voltage Schottky diode rated at about 100V,
insulation layer 24 intrenches 18 may be about 4000 Å thick, while the total thickness ofthick insulation 48 andinsulation layer 42 intermination trench 40 may be about 10000 A (1 um) thick. - Table 1 sets forth electrical characteristics of a 100V device according to the present invention and a 100V planar conventional Schottky diode with a guard ring termination.
TABLE 1 Type Planar Trench Die Size [mls] 150x180 115X170 Guard Ring YES NO Epi res [Ohm-cm] 2.45 1.25 Epi thickness [um] 10 7.5 Package TO220 TO220 BV@20 mA [V] 117.3 118.8 Vf@25 A@25 C. [V] 0.757 0.663 Vf@25 A@125 C. [V] 0.623 0.607 Ir@100 V@25 C. [A] 1.69E−05 5.90E−06 Ir@100 V@125 C. [A] 1.43E−02 5.90E−03 - As seen in Table 1, a schottky diode with a
thick insulation 48 according to the present invention can have a leakage current that is three times lower than a conventional planar device with a guard ring termination. - Furthermore, a schottky diode according to the present invention provides a 12% lower forward voltage drop at 25° C. despite being 20% smaller than a conventional planar device. It should also be noted that in a device according to the present invention, the same breakdown voltage as a planar device can be achieved with half the resistivity in epitaxial layer 16 (1.25 vs.2.45 Ohm-cm). Thus, a lower forward voltage drop can be achieved by using an
epitaxial layer 16 of lower resistivity and thickness if a structure according to the present invention is used. -
FIG. 3 shows the ruggedness of the new termination design in a destructive avalanche test. As can be seen inFIG. 3 a schottky diode according to the present invention is able to absorb 50% more current before failing than a planar schottky diode with 28% more silicon area. - Referring now to
FIG. 4 , there is shown a semiconductor body which includes N−epitaxial silicon 16 formed overN+ silicon substrate 19. Anitride layer 50 is first deposited atopepitaxial silicon 16 to a preferred thickness of 600 Å to 800 Å. Thereafter, using photolithography andetching trenches 18 andtermination trench 40 are defined inepitaxial silicon 16 to obtain the structure shown inFIG. 5 .Trenches 18 in the preferred embodiment are about 0.8 microns, whiletermination trench 40 is preferably 70 microns wide. Also, preferablyinner sidewall 43 oftermination trench 40 is about two microns away from theclosest trench 18 totermination trench 40. It should be noted thattrenches 18 may be either stripes or cellular in structure. - After
trenches 18 andtrench 40 are defined,sidewalls 20 andbottom 22 oftrenches 18, andsidewalls bottom 46 oftermination trench 40 are oxidized in an oxidation step to formfirst insulation layers 24 andinsulation layer 42, thus obtaining the structure shown inFIG. 6 . - In the preferred embodiment,
first insulation layers 24 andinsulation layer 42 are preferably 4000 Å thick. It should be noted that areas covered bynitride layer 50 are not oxidized in that the nitride layer is an oxidation retardant. - Referring next to
FIG. 7 ,conductive bodies 26 are formed intrenches 18 by first depositing a layer of polysilicon over the structure shown inFIG. 5 , implanting and driving P type impurities such as boron atoms into the polysilicon, and then removing as much of the polysilicon as necessary to only leave polysilicon intrenches 18 to formconductive bodies 26, andconductive spacers 45 intermination trench 40. Thereafter, a layer of TEOS 52 is deposited. In the preferred embodiment, TEOS 52 is about 7000 Å thick. - Referring next to
FIG. 8 , in another mask step TEOS 52 is removed fromactive region 12 and preferably any other region except fortermination trench 40, thereby definingthick insulation 48 intermination trench 40. - Thereafter, a wet nitride etch removes
nitride layers 50 and Schottkybarrier layer 28 is formed followed byinterlayer 32 andcontact layer 34. In the preferredembodiment schottky layer 28 is formed of palladium and is 30 Å thick,interlayer 32 is formed with molybdenum and is 3000 Å thick, andcontact layer 34 is formed from aluminum and is 4 micrometers thick. - In another mask operation,
schottky layer 28,interlayer 32 andcontact layer 34 are removed from portions oftermination region 14 to obtain the structure seen inFIG. 2 . - Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein.
Claims (18)
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Cited By (40)
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US20050161758A1 (en) * | 2004-01-27 | 2005-07-28 | Davide Chiola | Schottky with thick trench bottom and termination oxide and process for manufacture |
US20050202637A1 (en) * | 2004-03-11 | 2005-09-15 | International Rectifier Corp. | Recessed termination for trench schottky device without junction curvature |
US20070252228A1 (en) * | 2006-04-07 | 2007-11-01 | Chaohua Cheng | Integrated circuit structure and manufacturing method thereof |
US20110084332A1 (en) * | 2009-10-08 | 2011-04-14 | Vishay General Semiconductor, Llc. | Trench termination structure |
US20110215338A1 (en) * | 2010-03-08 | 2011-09-08 | Qingchun Zhang | Semiconductor devices with heterojunction barrier regions and methods of fabricating same |
US20110215474A1 (en) * | 2010-03-04 | 2011-09-08 | United Microelectronics Corp. | Integrated circuit structure and method for manufacturing the same |
US20110227151A1 (en) * | 2010-03-16 | 2011-09-22 | Vishay General Semiconductor Llc | Trench dmos device with improved termination structure for high voltage applications |
US20110227152A1 (en) * | 2010-03-16 | 2011-09-22 | Vishay General Semiconductor Llc | Trench dmos device with improved termination structure for high voltage applications |
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