US20050078725A1 - Methods for angled ion implantation of semiconductor devices - Google Patents

Methods for angled ion implantation of semiconductor devices Download PDF

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US20050078725A1
US20050078725A1 US10/969,465 US96946504A US2005078725A1 US 20050078725 A1 US20050078725 A1 US 20050078725A1 US 96946504 A US96946504 A US 96946504A US 2005078725 A1 US2005078725 A1 US 2005078725A1
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ion beam
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Tzu-Yu Wang
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II VI Delaware Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface

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  • This invention relates to ion implantation of semiconductor devices. More particularly, this invention relates to ion implantation techniques that are suitable for ion implanting vertical cavity surface emitting lasers and that can result in novel implantation structures.
  • VCSELs Vertical cavity surface emitting lasers
  • VCSELs represent a relatively new class of semiconductor lasers. While there are many variations of VCSELs, one common characteristic is that they emit light perpendicular to a wafer's surface.
  • VCSELs can be formed from a wide range of material systems to produce specific characteristics. In particular, the various material systems can be tailored to emit different wavelengths, such as 1550 nm, 1310 nm, 850 nm, 670 nm, and so on.
  • VCSELs include semiconductor active regions, distributed Bragg reflector (DBR) mirrors, current confinement structures, substrates, and contacts. Because of their complicated structure, and because of their material requirements, VCSELs are usually grown using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
  • MOCVD metal-organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • FIG. 1 illustrates a typical VCSEL 10 .
  • an n-doped gallium arsenide (GaAs) substrate 12 has an n-type electrical contact 14 .
  • An n-doped lower mirror stack 16 (a DBR) is on the substrate 12 , and an n-type graded-index lower spacer 18 is disposed over the lower mirror stack 16 .
  • An active region 20 usually having a number of quantum wells, is formed over the lower spacer 18 .
  • a p-type graded-index top spacer 22 is disposed over the active region 20
  • a p-type top mirror stack 24 is disposed over the top spacer 22 .
  • the top mirror and graded-index region can consist of a tunnel junction structure. This comprises a short p-doped region nearest the active region junction. Beyond the p-doped region is a tunnel junction followed by an n-type DBR.
  • the lower spacer 18 and the top spacer 22 separate the lower mirror stack 16 from the top mirror stack 24 such that an optical cavity is formed.
  • the mirror separation is controlled so as to resonant at a predetermined wavelength (or at a multiple thereof).
  • At least part of the top mirror stack 24 includes an insulating region 40 formed by implanting ions (protons or certain other elements such as deuterium, helium, iron, etc.) that provides current confinement. Protons can be implanted, for example, in accordance with the teachings of U.S. Pat. No. 5,115,442, which is incorporated by reference.
  • the insulating region 40 can be formed using an oxide layer, for example, in accordance with the teachings of U.S. Pat. No. 5,903,588, which is incorporated by reference.
  • the principles of the present invention relate to insulating via an ion implanting process. In either event, the insulating region 40 defines a conductive circular central opening 42 that forms an electrically conductive path through the insulating region 40 .
  • an external bias causes an electrical current 21 to flow from the p-type (or n-type in the case of a tunnel junction device) electrical contact 26 toward the n-type electrical contact 14 .
  • the insulating region 40 and the conductive central opening 42 confine the current 21 such that it flows through the conductive central opening 42 to the active region 20 .
  • Some of the electrons in the current 21 are converted into photons in the active region 20 .
  • Those photons bounce back and forth (resonate) between the lower mirror stack 16 and the top mirror stack 24 .
  • the lower mirror stack 16 and the top mirror stack 24 are very high reflectivity mirrors, with the lower mirror being at least slightly higher reflectivity than the top mirror.
  • the light 23 passes through the p-type conduction layer 9 , through the p-type GaAs cap layer 8 , through an aperture 30 in the p-type electrical contact 26 , and out of the surface of the vertical cavity surface emitting laser 10 .
  • the light follows the same path but through the tunnel junction layer and the n-type top mirror.
  • FIG. 1 illustrates a common VCSEL structure, and that numerous variations are possible.
  • the dopings can be changed (say, by providing a p-type substrate 12 ), different material systems can be used, operational details can be tuned for maximum performance, and additional structures, such as tunnel junctions (briefly described above), can be added.
  • VCSELs can be formed on the same substrate, thus producing a VCSEL array.
  • Ion implanting provides a method of electrically isolating individual VCSEL elements. To do so, ions with certain insulating interaction characteristics such as protons are implanted between the individual VCSEL elements to produce high-resistance zones that electrically isolate the VCSEL elements.
  • ions with certain insulating interaction characteristics such as protons are implanted between the individual VCSEL elements to produce high-resistance zones that electrically isolate the VCSEL elements.
  • Prior art ion implantation techniques usually direct ions perpendicularly or nearly perpendicular onto the surface of a wafer being implanted. While generally successful, such prior art implantation techniques are less than optimal in some applications. For example, perpendicular implantation is not suitable for laterally implanting large vertical aspect ratio mesa structures. Another limitation is the difficulty of implementing desired gain guide isolation steps. Finally, prior art ion implantation techniques induce substantial lattice damage in a device's aperture or electrical contact region. Such lattice damage can be highly detrimental to electrical or optical performance.
  • a new ion implantation technique would be beneficial. Particularly beneficial would be an ion implantation technique that is suitable for use with devices having large vertical aspect ratio mesa structures. Also beneficial would be an ion implantation technique that avoids or reduces the problems related to obtaining required gain guide isolation steps. Also beneficial would be an ion implantation technique that reduces lattice damage in the aperture or electrical contact region near the aperture.
  • exemplary embodiments of the invention are concerned with methods for ion implantation of semiconductor devices such as VCSELs.
  • a surface of the semiconductor structure is disposed at a predetermined orientation.
  • the semiconductor structure is then rotated at a predetermined speed.
  • An ion beam of characteristic flux is generated and directed at the surface of the semiconductor structure so that the ion beam is incident on the surface at an incident flux angle. Because the ion beam is incident on the surface of the semiconductor device at a defined angle, an implant region having an approximately wedge shaped cross-section is formed in the semiconductor device.
  • FIG. 1 illustrates a typical vertical cavity surface-emitting laser
  • FIG. 2 illustrates ion implantation of a vertical cavity surface emitting laser wafer according to the principles of the present invention
  • FIG. 3 illustrates an ion implantation profile of a VCSEL wafer after implantation using an implant mask
  • FIG. 4 illustrates an ion implantation profile of a mesa-structured VCSEL wafer after implantation using an implant mask
  • FIG. 5 illustrates an ion implantation profile of a VCSEL wafer after implantation using an implant mask and multiple energy ion implantation beams that are directed at different angles
  • FIG. 6 illustrates an ion implantation profile of a VCSEL wafer after implantation using multiple implant masks and multiple energy ion implantation beams.
  • the principles of the present invention provide for ion implantation of a semiconductor wafer by mounting the semiconductor wafer on a rotating plate that is tilted at an angle relative to an oncoming ion implantation flux.
  • the rotation angle or angles and the implantation energy can be controlled to produce desired implantation profiles and depths.
  • one or more implantation masks can be used to provide specific tailoring schemes.
  • ion implantation can occur either through the semiconductor wafer below the mesa or through the mesa's wall.
  • FIG. 2 An apparatus 200 for ion implanting a semiconductor wafer, specifically a VCSEL wafer 209 , is illustrated in FIG. 2 .
  • the VCSEL wafer 209 is mounted on a rotating plate 211 .
  • the rotating plate 211 is set at a desired angle relative to an ion implantation flux 207 from an ion source 205 .
  • the angle of the rotating plate 211 is fixed by a tilt mechanism 215 .
  • a motor 213 provides rotational force for the rotating plate 211 .
  • the ion source 205 , the tilt mechanism 215 , the rotating plate 211 , the motor 213 , and the VCSEL wafer 209 are all located in an ion chamber 203 during ion implantation.
  • the VCSEL wafer 209 which may similar to those that are subsequently described, is mounted on the rotating plate 211 . That plate is set at the desired angle by the mechanism 215 .
  • the motor 213 then rotates the rotating plate 211 , beneficially at a constant, pre-determined rotational velocity.
  • the ion source 205 then emits the ion flux 207 onto the VCSEL wafer 209 such that ion implantation occurs.
  • the ion implantation energy, dose, and the tilt angle can be controlled to produce a desired implantation profile.
  • control of the incident ion flux angle is preferentially controlled by adjusting the angle of the plate that holds the sample.
  • it is also possible to control the incident flux angle by either controlling the ion source or controlling the ion beam.
  • the ion beam can be directed by use of magnets.
  • VCSELs can have ion implantation-induced apertures, and because such apertures can benefit from the principles of the present invention, various ion implantation schemes into VCSEL structures will be provided. However, it should be understood that other ion implantation schemes in VCSELs are possible.
  • FIG. 3 illustrates a planar VCSEL structure 300 having an implantation mask 311 .
  • the implantation mask 311 is beneficially formed lithographically.
  • a masking of an ion-flux resistant material is formed on the surface of the VCSEL wafer.
  • the mask is patterned lithographically, exposed, and developed.
  • the VCSEL wafer 209 (in FIG. 2, 300 in FIG. 3 ) is placed in the ion chamber 203 on the rotating plate 211 .
  • the tilt mechanism 215 is adjusted to set the desired angle between the rotating plate 211 and the implantation flux 207 .
  • the motor 213 is turned on and then ions 315 (see FIG. 3 ) are implanted into VCSEL wafer 300 .
  • the VCSEL wafer 300 is comprised of an upper device layer 307 (which may include a top DBR 24 as shown in FIG. 1 ), a lower device layer 305 (which may include an active layer 20 as shown in FIG. 1 ), and a substrate layer 303 (which may include a substrate 12 as shown in FIG. 1 ).
  • the oncoming ions implant into the VCSEL 300 to form an implant region 307 B.
  • the implantation mask 311 causes the implant region 307 B to have a pointed, wedge-shape cross-section. This is beneficial because the lattice damage in the aperture 307 A (the area between the wedge points in FIG. 3 ) of the upper device layer 307 consequently suffers only minimal ion implant damage.
  • the aperture 307 A of the VCSEL can be tailored by controlling the size of the implantation mask 311 , the angle between the surface of the VCSEL wafer 300 and the incoming ions 315 , and the implantation energy of the incoming ions 315 .
  • FIG. 4 illustrates a mesa-structured VCSEL wafer 400 having an implantation mask 411 .
  • the implantation mask 411 is beneficially formed lithographically.
  • a planarizing material 412 (shown in dotted lines because FIG. 4 illustrates the VCSEL wafer 400 after the planarizing material 412 has been removed) such as BCB, polyimide, photo resist, or spin-on glass, is coated over the VCSEL wafer 400 up to the top of the mesa-structure 407 .
  • the VCSEL wafer 400 is coated with a mask material comprised of an ion-flux resistant material.
  • the mask material is lithographically patterned, exposed, and developed to produce the implantation mask 411 .
  • the planarizing material 412 is removed. As shown, it can be beneficial for the implantation mask 411 to extend over the mesa structure 407 .
  • the VCSEL wafer 400 is placed in the chamber 203 on the tilt mechanism 215 .
  • the tilt mechanism 215 is then adjusted such that the desired angle between the rotating plate 211 and the ion flux 207 is achieved.
  • the motor 213 is then turned on while ions 415 (see FIG. 4 ) are implanted at the desired angle toward the VCSEL wafer 400 .
  • the VCSEL wafer 400 is comprised of a mesa upper device layer 407 (which may include a top DBR 24 as shown in FIG. 1 ), a lower device layer 405 (which may include an active layer 20 as shown in FIG. 1 ), and a substrate layer 403 (which may include a substrate 12 as shown in FIG. 1 ).
  • the incoming ions implant into the VCSEL 400 to form an isolation region 405 B that extends from the lower layer 405 into part of the upper layer 407 .
  • the non-implanted region 405 A of the lower device layer 405 , and the shaded area of the mesa upper device layer 407 include an aperture.
  • That aperture can be tailored by controlling the dimensions of the implantation mask, the size, height, and material composition of the mesa-structure 407 , the angle between the surface of the VCSEL structure 400 and the dose of the incoming ions 415 , and the energy of the incoming ions 415 .
  • FIG. 5 illustrates multiple ion irradiations of a planar VCSEL structure 500 .
  • the VCSEL structure 500 includes an implantation mask 511 that is beneficially formed lithographically.
  • the VCSEL structure 500 further includes at least an upper layer 505 (which may include a top DBR 24 as shown in FIG. 1 ) and a lower layer 503 (which may include an active layer 20 and a substrate 12 as shown in FIG. 1 ).
  • the VCSEL structure 500 is placed into the ion chamber 203 on the rotating plate 211 .
  • the tilt mechanism 215 is then adjusted to fix the rotating plate 211 at a desired first angle relative to the oncoming ion flux 207 (which is used for the ions 517 and 519 in FIG. 5 ), which is controlled to have a desired first ion implantation energy.
  • the motor 213 is then turned on and the ions 517 are directed toward the VCSEL structure 500 (see FIG. 5 ).
  • the result is an implant region 514 having a pointed, wedge-shaped implant cross-section.
  • the tilt mechanism 215 is sets the rotating plate 111 at a second angle relative to the ion flux 207 , which is now controlled to have a desired second ion implantation energy (which is greater than the first ion implantation energy).
  • the motor 213 is turned on and ions 519 are directed toward the VCSEL structure 500 (see FIG. 5 ).
  • the result is an implant region 509 having a pointed, wedge-shaped implant cross-section.
  • the VCSEL structure 500 then has two implant regions, both of which are wedge-shaped.
  • FIG. 6 illustrates the result of multiple ion irradiations of a planar VCSEL structure 650 .
  • the VCSEL structure 650 uses two implantation masks, a top implantation mask 651 and a lower implantation mask 657 .
  • the implantation masks are located on a VCSEL wafer that is comprised of at least an upper layer 655 (which may include a top DBR 24 as shown in FIG. 1 ) and of a lower layer 603 (which may include an active layer 20 and a substrate 12 as shown in FIG. 1 ).
  • the implantation masks 651 and 657 are beneficially formed lithographically.
  • the VCSEL structure 650 is placed in the ion chamber 203 on the rotating plate 211 .
  • the tilt mechanism 215 is then adjusted to fix the rotating plate 211 at a predetermined angle relative to the ion flux 207 , which is controlled to have a predetermined first ion implantation energy.
  • the motor 213 is turned on and ions 619 are directed toward the VCSEL structure 650 (see FIG. 6 ).
  • the result is a first implant region 659 having a pointed, wedge-shaped implant cross-section.
  • the VCSEL structure 650 is removed from the rotating plate 211 and the top implantation mask 651 is removed.
  • the VCSEL structure 650 is then returned to the rotating plate 211 and then ions 617 are directed toward the VCSEL structure 650 .
  • the result is a second implant region 660 having a pointed, wedge-shaped implant cross-section.
  • the principles of the present invention are highly useful. For example, those principles enable implantation of large vertical aspect ratio mesa structures. Additionally, it is possible to provide an angled current confinement region that is defined by isolation steps. Additionally, lattice damage in a device's aperture and electrical contact area caused by ion implantation can be reduced.

Abstract

This disclosure concerns methods for ion implantation of semiconductor devices such as VCSELs. In on example of such a method, a surface of the semiconductor structure is disposed at a predetermined orientation. The semiconductor structure is then rotated at a predetermined speed. An ion beam of characteristic flux is generated and directed at the surface of the semiconductor structure so that the ion beam is incident on the surface at an incident flux angle. Because the ion beam is incident on the surface at a defined angle, an implant region having an approximately wedge shaped cross-section is formed in the semiconductor device.

Description

    RELATED APPLICATIONS
  • This application is a division, and claims the benefit, of U.S. patent application Ser. No. 10/323,889, entitled ANGLED WAFER ROTATING ION IMPLANTATION, filed Dec. 20, 2002, incorporated herein in its entirety by this reference.
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • This invention relates to ion implantation of semiconductor devices. More particularly, this invention relates to ion implantation techniques that are suitable for ion implanting vertical cavity surface emitting lasers and that can result in novel implantation structures.
  • 2. Discussion of the Related Art
  • Vertical cavity surface emitting lasers (VCSELs) represent a relatively new class of semiconductor lasers. While there are many variations of VCSELs, one common characteristic is that they emit light perpendicular to a wafer's surface. Advantageously, VCSELs can be formed from a wide range of material systems to produce specific characteristics. In particular, the various material systems can be tailored to emit different wavelengths, such as 1550 nm, 1310 nm, 850 nm, 670 nm, and so on.
  • VCSELs include semiconductor active regions, distributed Bragg reflector (DBR) mirrors, current confinement structures, substrates, and contacts. Because of their complicated structure, and because of their material requirements, VCSELs are usually grown using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
  • FIG. 1 illustrates a typical VCSEL 10. As shown, an n-doped gallium arsenide (GaAs) substrate 12 has an n-type electrical contact 14. An n-doped lower mirror stack 16 (a DBR) is on the substrate 12, and an n-type graded-index lower spacer 18 is disposed over the lower mirror stack 16. An active region 20, usually having a number of quantum wells, is formed over the lower spacer 18. A p-type graded-index top spacer 22 (another confinement layer) is disposed over the active region 20, and a p-type top mirror stack 24 (another DBR) is disposed over the top spacer 22. Over the top mirror stack 24 is a p-type conduction layer 9, a p-type GaAs cap layer 8, and a p-type electrical contact 26. Alternately, the top mirror and graded-index region can consist of a tunnel junction structure. This comprises a short p-doped region nearest the active region junction. Beyond the p-doped region is a tunnel junction followed by an n-type DBR.
  • Still referring to FIG. 1, the lower spacer 18 and the top spacer 22 separate the lower mirror stack 16 from the top mirror stack 24 such that an optical cavity is formed. As the optical cavity is resonate at specific wavelengths, the mirror separation is controlled so as to resonant at a predetermined wavelength (or at a multiple thereof). At least part of the top mirror stack 24 includes an insulating region 40 formed by implanting ions (protons or certain other elements such as deuterium, helium, iron, etc.) that provides current confinement. Protons can be implanted, for example, in accordance with the teachings of U.S. Pat. No. 5,115,442, which is incorporated by reference. Alternatively, the insulating region 40 can be formed using an oxide layer, for example, in accordance with the teachings of U.S. Pat. No. 5,903,588, which is incorporated by reference. However, the principles of the present invention relate to insulating via an ion implanting process. In either event, the insulating region 40 defines a conductive circular central opening 42 that forms an electrically conductive path through the insulating region 40.
  • In operation, an external bias causes an electrical current 21 to flow from the p-type (or n-type in the case of a tunnel junction device) electrical contact 26 toward the n-type electrical contact 14. The insulating region 40 and the conductive central opening 42 confine the current 21 such that it flows through the conductive central opening 42 to the active region 20. Some of the electrons in the current 21 are converted into photons in the active region 20. Those photons bounce back and forth (resonate) between the lower mirror stack 16 and the top mirror stack 24. The lower mirror stack 16 and the top mirror stack 24 are very high reflectivity mirrors, with the lower mirror being at least slightly higher reflectivity than the top mirror. Due to this difference, some photons emerge as coherent light 23, i.e., laser. Still referring to FIG. 1, the light 23 passes through the p-type conduction layer 9, through the p-type GaAs cap layer 8, through an aperture 30 in the p-type electrical contact 26, and out of the surface of the vertical cavity surface emitting laser 10. In the tunnel junction device format, the light follows the same path but through the tunnel junction layer and the n-type top mirror.
  • It should be understood that FIG. 1 illustrates a common VCSEL structure, and that numerous variations are possible. For example, the dopings can be changed (say, by providing a p-type substrate 12), different material systems can be used, operational details can be tuned for maximum performance, and additional structures, such as tunnel junctions (briefly described above), can be added.
  • In addition, it should be noted that multiple VCSELs can be formed on the same substrate, thus producing a VCSEL array. Ion implanting provides a method of electrically isolating individual VCSEL elements. To do so, ions with certain insulating interaction characteristics such as protons are implanted between the individual VCSEL elements to produce high-resistance zones that electrically isolate the VCSEL elements. Thus, by controlling ion implantation locations and energies, electrical confinement within a VCSEL and electrical isolation between adjacent VCSELs on the same substrate can be implemented.
  • Prior art ion implantation techniques usually direct ions perpendicularly or nearly perpendicular onto the surface of a wafer being implanted. While generally successful, such prior art implantation techniques are less than optimal in some applications. For example, perpendicular implantation is not suitable for laterally implanting large vertical aspect ratio mesa structures. Another limitation is the difficulty of implementing desired gain guide isolation steps. Finally, prior art ion implantation techniques induce substantial lattice damage in a device's aperture or electrical contact region. Such lattice damage can be highly detrimental to electrical or optical performance.
  • Because of the foregoing problems, a new ion implantation technique would be beneficial. Particularly beneficial would be an ion implantation technique that is suitable for use with devices having large vertical aspect ratio mesa structures. Also beneficial would be an ion implantation technique that avoids or reduces the problems related to obtaining required gain guide isolation steps. Also beneficial would be an ion implantation technique that reduces lattice damage in the aperture or electrical contact region near the aperture.
  • BRIEF SUMMARY OF AN EXEMPLARY EMBODIMENT OF THE INVENTION
  • In general, exemplary embodiments of the invention are concerned with methods for ion implantation of semiconductor devices such as VCSELs. In one exemplary implementation of such a method, a surface of the semiconductor structure is disposed at a predetermined orientation. The semiconductor structure is then rotated at a predetermined speed. An ion beam of characteristic flux is generated and directed at the surface of the semiconductor structure so that the ion beam is incident on the surface at an incident flux angle. Because the ion beam is incident on the surface of the semiconductor device at a defined angle, an implant region having an approximately wedge shaped cross-section is formed in the semiconductor device.
  • BRIEF DESCRIPTION OF THE DRAWING
  • The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.
  • In the drawings:
  • FIG. 1 illustrates a typical vertical cavity surface-emitting laser;
  • FIG. 2 illustrates ion implantation of a vertical cavity surface emitting laser wafer according to the principles of the present invention;
  • FIG. 3 illustrates an ion implantation profile of a VCSEL wafer after implantation using an implant mask;
  • FIG. 4 illustrates an ion implantation profile of a mesa-structured VCSEL wafer after implantation using an implant mask;
  • FIG. 5 illustrates an ion implantation profile of a VCSEL wafer after implantation using an implant mask and multiple energy ion implantation beams that are directed at different angles; and
  • FIG. 6 illustrates an ion implantation profile of a VCSEL wafer after implantation using multiple implant masks and multiple energy ion implantation beams.
  • Note that in the drawings that like numbers designate like elements. Additionally, for explanatory convenience the descriptions use directional signals such as up and down, top and bottom, and lower and upper. Such signals, which are derived from the relative positions of the elements illustrated in the drawings, are meant to aid the understanding of the present invention, not to limit it.
  • DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENT
  • The principles of the present invention provide for ion implantation of a semiconductor wafer by mounting the semiconductor wafer on a rotating plate that is tilted at an angle relative to an oncoming ion implantation flux. The rotation angle or angles and the implantation energy can be controlled to produce desired implantation profiles and depths. Furthermore, one or more implantation masks can be used to provide specific tailoring schemes. Additionally, if the semiconductor wafer being implanted has a mesa structure, ion implantation can occur either through the semiconductor wafer below the mesa or through the mesa's wall.
  • An apparatus 200 for ion implanting a semiconductor wafer, specifically a VCSEL wafer 209, is illustrated in FIG. 2. As shown, the VCSEL wafer 209 is mounted on a rotating plate 211. The rotating plate 211 is set at a desired angle relative to an ion implantation flux 207 from an ion source 205. The angle of the rotating plate 211 is fixed by a tilt mechanism 215. A motor 213 provides rotational force for the rotating plate 211. As shown in FIG. 2, the ion source 205, the tilt mechanism 215, the rotating plate 211, the motor 213, and the VCSEL wafer 209 are all located in an ion chamber 203 during ion implantation.
  • In operation, the VCSEL wafer 209, which may similar to those that are subsequently described, is mounted on the rotating plate 211. That plate is set at the desired angle by the mechanism 215. The motor 213 then rotates the rotating plate 211, beneficially at a constant, pre-determined rotational velocity. The ion source 205 then emits the ion flux 207 onto the VCSEL wafer 209 such that ion implantation occurs. It should be understood that the ion implantation energy, dose, and the tilt angle can be controlled to produce a desired implantation profile. It should be further understood that control of the incident ion flux angle is preferentially controlled by adjusting the angle of the plate that holds the sample. However, it is also possible to control the incident flux angle by either controlling the ion source or controlling the ion beam. The ion beam can be directed by use of magnets.
  • While the foregoing has described ion implanting a VCSEL wafer 209, in practice, other types of semiconductor wafers can also benefit from angled ion implantation. However, because VCSELs can have ion implantation-induced apertures, and because such apertures can benefit from the principles of the present invention, various ion implantation schemes into VCSEL structures will be provided. However, it should be understood that other ion implantation schemes in VCSELs are possible.
  • FIG. 3 illustrates a planar VCSEL structure 300 having an implantation mask 311. The implantation mask 311 is beneficially formed lithographically. First, a masking of an ion-flux resistant material is formed on the surface of the VCSEL wafer. Then, the mask is patterned lithographically, exposed, and developed.
  • Referring now to both FIGS. 2 and 3, with the implantation mask 311 in place, the VCSEL wafer 209 (in FIG. 2, 300 in FIG. 3) is placed in the ion chamber 203 on the rotating plate 211. The tilt mechanism 215 is adjusted to set the desired angle between the rotating plate 211 and the implantation flux 207. The motor 213 is turned on and then ions 315 (see FIG. 3) are implanted into VCSEL wafer 300.
  • Turning back to FIG. 3, the VCSEL wafer 300 is comprised of an upper device layer 307 (which may include a top DBR 24 as shown in FIG. 1), a lower device layer 305 (which may include an active layer 20 as shown in FIG. 1), and a substrate layer 303 (which may include a substrate 12 as shown in FIG. 1). The oncoming ions implant into the VCSEL 300 to form an implant region 307B. As shown, the implantation mask 311 causes the implant region 307B to have a pointed, wedge-shape cross-section. This is beneficial because the lattice damage in the aperture 307A (the area between the wedge points in FIG. 3) of the upper device layer 307 consequently suffers only minimal ion implant damage. This is highly advantageous as the current guide nature of the aperture is enhanced, which improves performance, while the electrical contact and optical aperture are protected. Thus, the aperture 307A of the VCSEL can be tailored by controlling the size of the implantation mask 311, the angle between the surface of the VCSEL wafer 300 and the incoming ions 315, and the implantation energy of the incoming ions 315.
  • The principles of the present invention are also applicable to mesa-structured wafers. For example, FIG. 4 illustrates a mesa-structured VCSEL wafer 400 having an implantation mask 411. The implantation mask 411 is beneficially formed lithographically. First, a planarizing material 412 (shown in dotted lines because FIG. 4 illustrates the VCSEL wafer 400 after the planarizing material 412 has been removed) such as BCB, polyimide, photo resist, or spin-on glass, is coated over the VCSEL wafer 400 up to the top of the mesa-structure 407. Then, the VCSEL wafer 400 is coated with a mask material comprised of an ion-flux resistant material. Then, the mask material is lithographically patterned, exposed, and developed to produce the implantation mask 411. Then, the planarizing material 412 is removed. As shown, it can be beneficial for the implantation mask 411 to extend over the mesa structure 407.
  • Referring now to both FIGS. 2 and 4, with the implantation mask 411 in place, the VCSEL wafer 400 is placed in the chamber 203 on the tilt mechanism 215. The tilt mechanism 215 is then adjusted such that the desired angle between the rotating plate 211 and the ion flux 207 is achieved. The motor 213 is then turned on while ions 415 (see FIG. 4) are implanted at the desired angle toward the VCSEL wafer 400.
  • Turning back to FIG. 4, the VCSEL wafer 400 is comprised of a mesa upper device layer 407 (which may include a top DBR 24 as shown in FIG. 1), a lower device layer 405 (which may include an active layer 20 as shown in FIG. 1), and a substrate layer 403 (which may include a substrate 12 as shown in FIG. 1). The incoming ions implant into the VCSEL 400 to form an isolation region 405B that extends from the lower layer 405 into part of the upper layer 407. The non-implanted region 405A of the lower device layer 405, and the shaded area of the mesa upper device layer 407 include an aperture. That aperture can be tailored by controlling the dimensions of the implantation mask, the size, height, and material composition of the mesa-structure 407, the angle between the surface of the VCSEL structure 400 and the dose of the incoming ions 415, and the energy of the incoming ions 415.
  • The foregoing has described ion implantations of both planar and mesa-structured semiconductor wafers (specifically VCSELs) using only a single ion irradiation. However, the principles of the present invention include multiple ion irradiations. For example, FIG. 5 illustrates multiple ion irradiations of a planar VCSEL structure 500. As shown, the VCSEL structure 500 includes an implantation mask 511 that is beneficially formed lithographically. The VCSEL structure 500 further includes at least an upper layer 505 (which may include a top DBR 24 as shown in FIG. 1) and a lower layer 503 (which may include an active layer 20 and a substrate 12 as shown in FIG. 1).
  • Referring now to both FIGS. 2 and 5, with the implantation mask 511 in place, the VCSEL structure 500 is placed into the ion chamber 203 on the rotating plate 211. The tilt mechanism 215 is then adjusted to fix the rotating plate 211 at a desired first angle relative to the oncoming ion flux 207 (which is used for the ions 517 and 519 in FIG. 5), which is controlled to have a desired first ion implantation energy. The motor 213 is then turned on and the ions 517 are directed toward the VCSEL structure 500 (see FIG. 5). The result is an implant region 514 having a pointed, wedge-shaped implant cross-section.
  • Still referring to both FIGS. 2 and 5, after the implant region 514 is formed, the tilt mechanism 215 is sets the rotating plate 111 at a second angle relative to the ion flux 207, which is now controlled to have a desired second ion implantation energy (which is greater than the first ion implantation energy). The motor 213 is turned on and ions 519 are directed toward the VCSEL structure 500 (see FIG. 5). The result is an implant region 509 having a pointed, wedge-shaped implant cross-section. As shown, the VCSEL structure 500 then has two implant regions, both of which are wedge-shaped.
  • While FIG. 5 shows one method of obtaining multiple wedge-shaped implant regions, the principles of the present invention are broad enough to provide for another method of obtaining such implant regions. For example, FIG. 6 illustrates the result of multiple ion irradiations of a planar VCSEL structure 650. As shown, the VCSEL structure 650 uses two implantation masks, a top implantation mask 651 and a lower implantation mask 657. The implantation masks are located on a VCSEL wafer that is comprised of at least an upper layer 655 (which may include a top DBR 24 as shown in FIG. 1) and of a lower layer 603 (which may include an active layer 20 and a substrate 12 as shown in FIG. 1). The implantation masks 651 and 657 are beneficially formed lithographically.
  • Referring now to both FIGS. 2 and 6, with the implantation masks 651 and 657 in place, the VCSEL structure 650 is placed in the ion chamber 203 on the rotating plate 211. The tilt mechanism 215 is then adjusted to fix the rotating plate 211 at a predetermined angle relative to the ion flux 207, which is controlled to have a predetermined first ion implantation energy. The motor 213 is turned on and ions 619 are directed toward the VCSEL structure 650 (see FIG. 6). The result is a first implant region 659 having a pointed, wedge-shaped implant cross-section.
  • Still referring to both FIGS. 2 and 6, after the implant region 659 is formed, the VCSEL structure 650 is removed from the rotating plate 211 and the top implantation mask 651 is removed. The VCSEL structure 650 is then returned to the rotating plate 211 and then ions 617 are directed toward the VCSEL structure 650. The result is a second implant region 660 having a pointed, wedge-shaped implant cross-section.
  • As previously noted, the principles of the present invention are highly useful. For example, those principles enable implantation of large vertical aspect ratio mesa structures. Additionally, it is possible to provide an angled current confinement region that is defined by isolation steps. Additionally, lattice damage in a device's aperture and electrical contact area caused by ion implantation can be reduced.
  • The embodiments and examples set forth herein are presented to explain the present invention and its practical application and to thereby enable those skilled in the art to make and utilize the invention. Those skilled in the art, however, will recognize that the foregoing description and examples have been presented for the purpose of illustration and example only. Other variations and modifications of the present invention will be apparent to those of skill in the art, and it is the intent of the appended claims that such variations and modifications be covered. The description as set forth is not intended to be exhaustive or to limit the scope of the invention. Many modifications and variations are possible in light of the above teaching without departing from the spirit and scope of the following claims. It is contemplated that the use of the present invention can involve components having different characteristics. It is intended that the scope of the present invention be defined by the claims appended hereto, giving full cognizance to equivalents in all respects.

Claims (28)

1. A method for implanting a semiconductor structure, the method comprising:
disposing a surface of the semiconductor structure at a predetermined orientation;
rotating the semiconductor structure;
producing at least one ion beam having a characteristic flux; and
directing the at least one ion beam at the surface of the semiconductor structure so that the at least one ion beam is incident on the surface at an incident flux angle.
2. The method as recited in claim 1, wherein disposing the surface of the semiconductor structure at a predetermined orientation comprises tilting the surface of the semiconductor structure relative to a predetermined direction along which the at least one ion beam is directed.
3. The method as recited in claim 1, wherein the at least one ion beam is directed substantially along a predetermined direction that is tilted relative to the surface of the semiconductor structure such that the incident flux angle comprises an angle of tilt of the predetermined direction.
4. The method as recited in claim 1, wherein producing the at least one ion beam comprises producing at least one ion beam having a predetermined implant energy.
5. The method as recited in claim 1, wherein producing the at least one ion beam comprises producing a plurality of ion beams, each ion beam having a different implant energy level, flux and dose.
6. The method as recited in claim 1, wherein a rotational speed of the semiconductor structure is substantially constant.
7. The method as recited in claim 1, wherein the incident flux angle is controlled magnetically.
8. The method as recited in claim 1, wherein the incident flux angle is controlled by adjusting a tilt angle of the surface of the semiconductor structure.
9. The method as recited in claim 1, further comprising adjusting one or more of the following to achieve a desired implantation profile in the semiconductor structure: a tilt angle of the surface of the semiconductor structure; the incident flux angle; ion implant energy; and, dose.
10. The method as recited in claim 1, wherein the semiconductor structure comprises a semiconductor wafer that includes a semiconductor device, and incidence of the ion beam on the surface of the semiconductor structure facilitates production of one of: an ion implant in the semiconductor device; and, an ion implant adjacent the semiconductor device.
11. A method for implanting a semiconductor device, the method comprising:
disposing a surface of a vertical cavity surface emitting laser (VCSEL) structure at a predetermined orientation;
rotating the surface of the VCSEL structure;
producing at least one ion beam having a characteristic flux; and
directing the at least one ion beam at the surface of the VCSEL structure so that the at least one ion beam is incident on the surface at an incident flux angle.
12. The method as recited in claim 11, wherein disposing the surface of the VCSEL structure at a predetermined orientation comprises tilting the surface of the VCSEL structure relative to a predetermined direction along which the at least one ion beam is directed.
13. The method as recited in claim 11, wherein producing the at least one ion beam comprises producing at least one ion beam having a predetermined implant energy.
14. The method as recited in claim 11, wherein producing the at least one ion beam comprises producing a plurality of ion beams, each ion beam having a different implant energy level, flux and dose.
15. The method as recited in claim 14, wherein respective incident flux angles of the ion beams are substantially the same.
16. The method as recited in claim 14, wherein respective incident flux angles of the ion beams are different.
17. The method as recited in claim 11, wherein a rotational speed of the VCSEL structure is substantially constant.
18. The method as recited in claim 11, wherein the VCSEL structure includes a mesa, the at least one ion beam being directed to an area of the VCSEL structure located proximate the mesa.
19. A method for producing an implanted semiconductor structure, the method comprising:
depositing an ion resistant mask material proximate a surface of a semiconductor wafer;
etching away a selected portion of the ion resistant mask material to produce an ion implantation mask;
disposing the surface of the semiconductor wafer at a predetermined orientation;
rotating the semiconductor wafer;
producing an ion beam having a characteristic flux; and
directing the ion beam at the surface of the semiconductor wafer so that the ion beam is incident on the surface at an incident flux angle
20. The method as recited in claim 19, wherein the ion resistant mask material is lithographically defined and etched.
21. The method as recited in claim 19, further comprising coating the semiconductor wafer with a planarizing material such that the ion resistant mask material is deposited on top of the planarizing material.
22. The method as recited in claim 21, wherein the planarizing material comprises at least one of: BDB; polyimide; photo-resist; and, spin-on glass.
23. A method for implanting a semiconductor device, the method comprising:
disposing a surface of a vertical cavity surface emitting laser (VCSEL) structure at a predetermined orientation;
rotating the surface of the VCSEL structure;
producing a first ion beam;
directing the first ion beam at the surface of the VCSEL structure so that the first ion beam is incident on the surface at a first incident flux angle;
producing a second ion beam; and
directing the second ion beam at the surface of the VCSEL structure so that the second ion beam is incident on the surface at a second incident flux angle.
24. The method as recited in claim 23, wherein the first ion beam has an ion implant energy that is less than an ion implant energy of the second ion beam.
25. The method as recited in claim 23, wherein the first and second incident flux angles are different.
26. The method as recited in claim 23, further comprising:
forming top and lower ion implantation masks on the VCSEL structure;
removing the top implantation mask after direction of the first ion beam at the surface of the VCSEL structure; and
removing the lower implantation mask after direction of the second ion beam at the surface of the VCSEL structure.
27. The method as recited in claim 26, wherein the top and lower ion implantation masks are formed lithographically.
28. The method as recited in claim 26, wherein the first incident flux angle is substantially the same as the second incident flux angle.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080020556A1 (en) * 2006-07-21 2008-01-24 Dongbu Hitek Co., Ltd. Semiconductor device and method for fabricating the same
US20090104726A1 (en) * 2003-11-12 2009-04-23 Cree, Inc. LED Fabrication Via Ion Implant Isolation
US20090309124A1 (en) * 2004-05-06 2009-12-17 Cree, Inc. LED Fabrication via Ion Implant Isolation
US9627569B2 (en) 2013-04-19 2017-04-18 Lightspin Technologies, Inc. Integrated Avalanche Photodiode arrays
US10529884B2 (en) 2017-11-09 2020-01-07 LightSpin Technologies Inc. Virtual negative bevel and methods of isolating adjacent devices

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080258150A1 (en) * 2007-03-09 2008-10-23 The Regents Of The University Of California Method to fabricate iii-n field effect transistors using ion implantation with reduced dopant activation and damage recovery temperature
CN104797980A (en) * 2012-09-20 2015-07-22 英特斯特公司 Apparatus and method for irradiating
US9018064B2 (en) * 2013-07-10 2015-04-28 Varian Semiconductor Equipment Associates, Inc. Method of doping a polycrystalline transistor channel for vertical NAND devices
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5245622A (en) * 1992-05-07 1993-09-14 Bandgap Technology Corporation Vertical-cavity surface-emitting lasers with intra-cavity structures
US5328854A (en) * 1993-03-31 1994-07-12 At&T Bell Laboratories Fabrication of electronic devices with an internal window
US5637511A (en) * 1993-02-01 1997-06-10 Kurihara; Kaori Vertical-to-surface transmission electro-photonic device and method for fabricating the same
US5914499A (en) * 1995-01-18 1999-06-22 Abb Research Ltd. High voltage silicon carbide semiconductor device with bended edge

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5245622A (en) * 1992-05-07 1993-09-14 Bandgap Technology Corporation Vertical-cavity surface-emitting lasers with intra-cavity structures
US5637511A (en) * 1993-02-01 1997-06-10 Kurihara; Kaori Vertical-to-surface transmission electro-photonic device and method for fabricating the same
US5328854A (en) * 1993-03-31 1994-07-12 At&T Bell Laboratories Fabrication of electronic devices with an internal window
US5914499A (en) * 1995-01-18 1999-06-22 Abb Research Ltd. High voltage silicon carbide semiconductor device with bended edge

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090104726A1 (en) * 2003-11-12 2009-04-23 Cree, Inc. LED Fabrication Via Ion Implant Isolation
US7943406B2 (en) * 2003-11-12 2011-05-17 Cree, Inc. LED fabrication via ion implant isolation
US20090309124A1 (en) * 2004-05-06 2009-12-17 Cree, Inc. LED Fabrication via Ion Implant Isolation
US7943954B2 (en) 2004-05-06 2011-05-17 Cree, Inc. LED fabrication via ion implant isolation
US20080020556A1 (en) * 2006-07-21 2008-01-24 Dongbu Hitek Co., Ltd. Semiconductor device and method for fabricating the same
US7687384B2 (en) * 2006-07-21 2010-03-30 Dongbu Hitek Co., Ltd. Semiconductor device and method for fabricating the same that includes angled implantation of poly layer
US9627569B2 (en) 2013-04-19 2017-04-18 Lightspin Technologies, Inc. Integrated Avalanche Photodiode arrays
US10529884B2 (en) 2017-11-09 2020-01-07 LightSpin Technologies Inc. Virtual negative bevel and methods of isolating adjacent devices
US10720544B2 (en) 2017-11-09 2020-07-21 LightSpin Technologies Inc. Virtual negative bevel and methods of isolating adjacent devices
US10944021B2 (en) 2017-11-09 2021-03-09 LightSpin Technologies Inc. Virtual negative bevel and methods of isolating adjacent devices

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