US20050169017A1 - Methods for digital regulation of power converters using primary-only feedback - Google Patents
Methods for digital regulation of power converters using primary-only feedback Download PDFInfo
- Publication number
- US20050169017A1 US20050169017A1 US11/099,281 US9928105A US2005169017A1 US 20050169017 A1 US20050169017 A1 US 20050169017A1 US 9928105 A US9928105 A US 9928105A US 2005169017 A1 US2005169017 A1 US 2005169017A1
- Authority
- US
- United States
- Prior art keywords
- switch
- output
- output voltage
- feedback signal
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33515—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with digital control
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0041—Control circuits in which a clock signal is selectively enabled or disabled
Definitions
- the invention pertains generally to the field of power conversion and more particularly to methods of controlling power converters.
- Switching power converters offer both compactness and efficiency in a number of different topologies that can be placed in two main categories: isolated (or transformer-coupled) and non-isolated (or direct-coupled).
- non-isolated switching power converters such as a buck (reducing voltage) or boost (increasing voltage) converter
- the power output is directly coupled to the power input through the power switch element.
- isolated power converters such as flyback or forward converters
- the power output is isolated from the power input through a transformer, with the power switch element located on the primary (input) side of the transformer.
- the regulation of the output voltage of switching power converters is generally accomplished by sensing the difference between an output voltage feedback signal approximating the output voltage at the load, and a reference, and using this difference, or error voltage, to determine how to cycle the switch so as to minimize the difference between the output voltage feedback signal and the reference.
- regulation schemes can be divided into two classes: pulse modulating schemes and pulse gating schemes.
- the error voltage is used to form a pulse which will cycle the switch in such a way as to drive the output voltage signal onto the reference; whereas with pulse gating schemes, the error voltage is not used to form a specific pulse, but instead is used to gate pre-formed pulses (from a pulse generator) to the switch to drive the output voltage feedback signal toward the reference.
- Pulse width modulation PWM
- PFM pulse frequency modulation
- combinations of PWM and PFM form the basis of most pulse modulating schemes.
- the converter 10 includes a power switch Q 1 (typically a field effect transistor (FET)) coupled to an input voltage, V in , via a primary winding 20 of a power transformer T 1 .
- a rectifying diode D 1 and filter capacitor C 1 are coupled to a secondary winding 22 of the transformer T 1 .
- the converter 10 includes a pulse modulating controller 25 that outputs a drive signal 61 to turn ON the power switch Q 1 in order to control an output voltage, V out , across a load 24 .
- a primary/secondary isolation circuit 30 provides an output voltage feedback signal that approximates the output voltage across load 24 .
- An error voltage sense circuit 31 generates an error voltage from inputs that include a reference voltage, V REF , as well as the output voltage feedback signal from primary/secondary isolation circuit 30 . This error voltage is used by the controller 25 for regulating the ON time of the power switch Q 1 .
- FIG. 2 illustrates a flyback converter 15 , which is similar to converter 10 of FIG. 1 , except that the reflected output voltage feedback signal is obtained from a primary-side an auxiliary winding 40 , instead of from the primary/secondary isolation circuit 30 .
- the voltage, V AUX across the auxiliary winding 40 is proportional to the output voltage V out across the load 24 minus a voltage drop produced by resistive and other losses in the secondary circuit, including losses across the rectifying diode D 1 . These losses will vary, depending upon the current drawn by the load and other factors.
- a method for regulating voltage at an output of a switching power converter includes sensing an output voltage feedback signal; comparing the sensed feedback signal to a reference at a determined time during a cycling of the switch, and regulating the output voltage by controlling the turn-ON and turn-OFF times of a switch in response to an output of the comparison.
- the comparison may be accomplished by one of binary comparison logic, ternary comparison logic and signed digital comparison logic.
- the determined time is determined for each cycling of the switch.
- the methods may be used in conjunctions with both transformer-coupled and direct-coupled power converters.
- the power converter is a transformer-coupled power converter having its output coupled through a rectifying element, with the feedback signal originating from the primary side of the converter.
- the determined time is an instant at which the feedback signal corresponds to the output voltage at the load plus a small, substantially constant voltage drop measured from cycle to cycle of the switch.
- the determined time is an instant at which current flowing through a secondary rectifying element is small and substantially constant from cycle to cycle of the switch.
- the converter is a flyback converter
- the feedback signal is a reflected flyback voltage signal
- the determined time is a fixed backward offset time from the transformer flux reset point.
- the method includes determining the transformer flux reset point using a measured or calculated value of the period of resonant oscillation of the reflected flyback voltage signal.
- the method includes determining the transformer flux reset point based on a point at which voltage across an auxiliary transformer winding is approximately zero.
- the method includes determining the transformer flux reset point based on a point at which voltage across the primary winding of the power transformer is approximately zero.
- the converter is a forward converter
- the output voltage feedback signal is a reflected voltage across an auxiliary winding coupled to the output inductor
- the determined time is at a fixed backward offset time from a point of output inductor flux reset.
- the converter is a direct-coupled boost converter
- the output voltage feedback signal corresponds to a voltage across the switch during its off time
- the determined time is at an instant at which current through a rectifying element is small and substantially constant from cycle to cycle.
- the converter is a direct-coupled buck converter
- the output voltage feedback signal corresponds to a differential voltage across an output inductor during the off time of the high-side switch
- the determined time is at an instant at which current through a rectifying element is small and substantially constant from cycle to cycle.
- the pulse modulating controller takes into account comparisons from one or more previous switch cycles in determining the turn ON and turn OFF times of a switch in response to the present comparison output.
- FIG. 1 is a flyback converter with a pulse modulating controller having prior art secondary-side feedback.
- FIG. 2 is a flyback converter with a pulse modulating controller having prior art primary-side feedback.
- FIG. 3 is a flyback converter with a pulse modulating controller having primary-only feedback according to one embodiment of the invention.
- FIGS. 4 and 5 are timing diagrams illustrating a primary-only feedback sampling technique according to embodiments of the invention.
- FIGS. 5A and 5B provide greater detail of aspects demonstrated in the timing diagrams in FIGS. 4 and 5 .
- FIG. 6 is a flyback converter with a pulse modulating controller having primary-only feedback according to another embodiment of the invention.
- FIG. 7 is a forward converter with a pulse modulating controller having primary-only feedback according to yet another embodiment of the invention.
- FIG. 8 is a non-isolated boost converter with a pulse modulating controller using primary-only feedback according to still another embodiment of the invention.
- FIG. 9 is a buck converter with a pulse modulating controller using primary-only feedback according to yet another embodiment of the invention.
- FIG. 10 is a logical flowchart of a signed digital comparator employed in embodiments of the invention.
- FIG. 11 is a logical flowchart of a signed digital early/late detector employed in embodiments of the invention.
- FIGS. 12 A-B describe the operation of a pulse modulating controller implementing a high/low detector according to one embodiment of the invention.
- FIGS. 13 A-B describe the operation of a pulse modulating controller implementing a ternary early/late detector according to another embodiment of the invention.
- FIGS. 14 A-B describe the operation of a pulse modulating controller implementing a signed digital early/late detector according to yet another embodiment of the invention.
- transformer-coupled switching converters such as a flyback, forward, fly-forward, push-pull, or bridge-type power converters.
- direct-coupled switching power converters such as buck, boost, buck/boost or SEPIC power converters may also benefit from these control methodologies and embodiments.
- pulse rate regulation in itself, controls neither the ON TME nor the OFF TIME of the power switch in order to regulate the output voltage.
- output regulation may be accomplished by controlling the rate of independently specified activation pulses presented to the power switch. If the load requires more power, pulses from a pulse generator are allowed to cycle the power switch. Otherwise, pulses from the pulse generator are inhibited from cycling the power switch.
- Control circuitry for and methods for obtaining accurate, real-time primary-only feedback are disclosed and described in the above-incorporated U.S. patents and applications, and are further refined upon herein. These primary-only circuits and methods may also be applied to power converters regulated using PWM and PFM controllers, as disclosed and described below.
- PWM and PFM controllers endeavor to construct pulses that will drive the output voltage onto the reference.
- the output voltage will “ripple” about the reference.
- pulse rate control parameters i.e., phase, width, and frequency
- pulse rate regulation presents the opportunity to realize numerous power stage optimizations obtained at the price of exchanging “ripples” for “limit cycles.”
- secondary feedback with its costly opto-isolator circuit and attendant demands on circuit board layout, primary-only feedback offers the potential of cheaper, slimmer power supplies for applications such as consumer electronics.
- FIG. 3 illustrates a flyback power converter 100 employing primary-only feedback for regulation purposes.
- the converter 100 includes a power stage 35 , which comprises a transformer T 1 having a primary winding 20 and secondary winding 22 , rectifying diode D 1 and filter capacitor C 1 .
- Power stage 35 receives an input voltage, V in , produced by a rectifier 92 operating on an AC line input.
- a capacitor 93 helps smooth voltage ripple on V in .
- a pulse modulating controller 70 produces a power pulse drive signal 71 that cycles switch Q 1 based on an output voltage feedback signal 150 .
- switch Q 1 may be a power MOSFET. Alternatively, switch Q 1 may comprise multiple transistors or other suitable means.
- pulse modulating controller 70 controls the ON TIME (the time between switch ON and switch OFF) and the OFF TIME (the time between switch OFF and switch ON) through drive signal 71 that cycles switch Q 1 .
- Driver 96 amplifies drive signal 71 to effect the turn ON and turn OFF of switch Q 1 .
- controller 70 implements fixed frequency pulse width modulation (PWM)
- PWM pulse width modulation
- the switch ON TIME will vary between a minimum power pulse width (corresponding to the minimum duty cycle) and a maximum power pulse width (corresponding to the maximum duty cycle).
- the switch OFF TIME will be the difference between the switch cycle period and the ON TIME.
- controller 70 implements fixed ON TIME pulse frequency modulation (PFM)
- the switch OFF TIME will vary between a minimum value (corresponding to the maximum duty cycle) and a maximum value (corresponding to the minimum duty cycle).
- controller 70 implements some combination of PWM and PFM
- the switch ON TIME and OFF TIME may be determined, in part, by operating conditions, such as the power being transferred to load 24 .
- the pulse modulating controller 70 may or may not keep history; that is it may or may not remember the results of previous comparisons. If controller 70 keeps history, it may reference said history in the process of determining the ON TIME and OFF TIME of switch Q 1 . Moreover, the precise instants in time when transistor Q 1 switches ON and OFF may further be controlled by a pulse optimizer 85 , as disclosed and described in the above-incorporated patents and applications, and described further herein.
- the flyback power converter 100 implements a method of primary-only feedback in the following fashion.
- switch Q 1 When switch Q 1 is switched OFF following the ON time of a power pulse, the voltage on the secondary winding 22 will be “reflected” back onto the primary winding 20 scaled by the turns ratio, N P /N S , where N P is the number of turns on the primary winding 20 and N S is the number or turns on the secondary winding 22 .
- V AUX ( V out + ⁇ V ) N AUX /N S (1) where ⁇ V is the voltage drop caused by resistive and other losses in the secondary circuit. This voltage drop includes, in particular, losses across rectifying diode D 1 .
- One aspect of the present invention leverages the notion that by sampling V AUX at precisely determined instants for which the term ⁇ V is small and approximately constant from sample to sample, real-time output voltage feedback can be obtained, where “real-time” output voltage feedback denotes an unfiltered output voltage measurement taken after each power pulse and available to the control logic for the selection of the succeeding drive signal.
- a comparator 151 produces an output voltage feedback signal 150 by comparing the V AUX waveform to a reference voltage, V REF , calibrated to compensate for the average value of ⁇ V at those precisely determined instants when ⁇ V is small and substantially constant from cycle to cycle.
- V REF a reference voltage
- the reference may be derived from a bandgap voltage reference or other suitable means, such as a compensated zener diode to provide a reliably stable reference voltage.
- Comparator 151 employed to generate feedback signal 150 can be more or less sophisticated, depending on the amount of information required to insure acceptable regulation. Perhaps the simplest of comparators is the binary comparator, with or without hysteresis, which indicates V AUX is high or low, relative to V REF . Slightly more sophisticated is the ternary comparator, which indicates high or low or neither, when the magnitude of the difference between V AUX and V REF is less than some fixed voltage.
- a still more sophisticated comparator is a signed digital comparator, which provides a high or low indication and, in addition, the magnitude of the difference expressed digitally.
- FIG. 10 details one embodiment of a signed digital comparator implemented with binary comparators, counters, a digital-to-analog converter, a subtractor, and a minimal amount of control logic, obviating the need for an error amplifier and the sample and hold circuitry characteristic of prior art analog systems.
- the comparator may indicate “high” by zero units of voltage.
- binary comparators without hysteresis are assumed.
- the sampling timing diagrams of FIG. 4 and FIG. 5 illustrate timing for both a “maximum” power pulse 106 and a “minimum” power pulse 107 generated by the pulse modulating controller 70 in converter 100 . Shown are the following waveforms: a) the drive signal 71 to transistor switch Q 1 , b) the auxiliary voltage waveform 102 , and c) the secondary current I SEC waveform 103 through the rectifying diode D 1 .
- the reflected auxiliary voltage waveform 102 swings high when drive signal 101 switches transistor Q 1 from ON to OFF.
- I SEC 103 will also jump from a substantially zero current to a relatively high current value, I PEAK , when drive signal 101 switches transistor Q 1 from ON to OFF.
- the ⁇ V term in equation (1) is maintained at a small and approximately constant value regardless of line or load conditions, enabling the potential for precise output regulation.
- An alternative to direct sensing of the secondary current is the sensing of the transformer reset condition directly or indirectly.
- I SEC 103 When I SEC 103 reaches zero the transformer T 1 may be denoted to be in a reset condition. This reset condition occurs when the energy in the primary winding 20 has been completely transferred to the secondary winding 22 . At such a point in time, the voltage across primary winding 20 will proceed to drop rapidly to zero.
- V AUX across the auxiliary winding 105 will also drop rapidly to (and through) zero volts, oscillating around zero until switch ON occurs.
- a zero crossing comparator (not illustrated) could monitor V AUX and detect when it first equals zero following switch OFF.
- another comparator (not illustrated) could detect when V IN first equals the drain voltage on transistor Q 1 , V DRN , which occurs when V AUX first equals zero. Because the time at which V AUX first equals zero (T AUXO ) lags transformer reset by a fixed amount of time, and it is more easily detected, it provides attractive means for indirectly measuring transformer reset time.
- reflected auxiliary voltage waveform 102 will have a plateau period during the OFF TIME following a power pulse. A condition in which reflected auxiliary voltage 102 equals zero will occur following this plateau period at time 110 .
- time difference between the first zero crossing point of V AUX 110 following the turn OFF of switch Q 1 , and the second zero crossing point of V AUX 111 it is possible to empirically derive the period of resonant oscillation following flux reset. This empirically derived value of the resonant oscillation period is useful in fixing the setback from T AUXO to the transformer reset point (see below).
- the reflected auxiliary voltage 102 achieves its first minimum at a time T 3 , which occurs midway between times 110 and 111 .
- This first minimum voltage point, or a subsequent minimum, may be advantageously used as the point when the ON period for the next pulse begins. Because the voltage at the drain of transistor Q 1 is also a minimum at time T 3 , the switching stresses and losses are minimized.
- the drain voltage is non-zero at time T 3 , it may be denoted as the zero-voltage switching time because this is as close to zero as the drain voltage will get.
- the pulse optimizer 85 accepts a variety of optimizer inputs, including V AUX , and applies these inputs to derive the timing, etc., of power pulses, in order to realize optimizations such as zero-voltage switching.
- an effective and easily-mechanized method for implementing zero-voltage switching is first, to detect the first and second zero-crossings of V AUX following the turn off of switch Q 1 ; second, to derive the period of resonant oscillation; and third, to adjust power pulses to turn on at the first zero-crossing of V AUX (T AUXO ), plus 1 ⁇ 4 of the resonant oscillation period, or T AUXO plus 1 ⁇ 4 of the resonant oscillation period plus an integral multiple of resonant oscillation periods.
- T SAMPLE could, for example, be determined from T AUXO by first subtracting 1 ⁇ 4 of the resonant oscillation period (to “locate” the transformer reset point), and then subtracting ⁇ T. Having determined the sampling time, T SAMPLE , controller 70 need only evaluate the binary output signal 150 of comparator 151 to determine whether at that instant V AUX is higher or lower than the expected value, V REF .
- control strategies may be employed to modulate pulse width or frequency based on binary output signal 150 at time T SAMPLE . These control strategies have as their primary objective, the determination of the duty cycle required to regulate the output voltage. Accordingly, they may be viewed as search strategies, exemplified by linear search, binary search, Newton-Raphson search, etc.
- FIGS. 12 A-B illustrate a linear search strategy; the ON TIME of the nth pulse is denoted by T ON (n).
- pulse modulating controller 70 narrows the next power pulse (relative to the previous power pulse) so as to reduce the power transferred to the load 24 to maintain regulation.
- the narrowing procedure amounts to decreasing the pulse width (relative to the width of the previous pulse) by a fixed increment, T DELTA , subject to the minimum pulse width constraint.
- pulse modulating controller 70 widens the next power pulse (relative to the previous power pulse) so as to increase the power transferred to load 24 to maintain regulation.
- the widening procedure in this case, amounts to increasing the pulse width (relative to the width of the previous pulse) by a fixed increment, T DELTA , subject to the maximum pulse width constraint.
- T DELTA a fixed increment
- the search converges on the value of T ON required for regulation, and the output voltage V out , across load 24 will be determined through the value of V REF .
- An alternative to sampling the binary output signal 150 at time T SAMPLE is to sample signal 150 periodically to detect the high to low transitions or state changes of said signal, and classify them as “early” or “late” relative to T SAMPLE , where an “early” transition is one that occurs before T SAMPLE , and a “late” transition is one that occurs after T SAMPLE .
- T SAMPLE is, by definition, the expected crossover point of V AUX with V REF , and therefore the expected transition point of binary output signal 150 .
- a high to low transition of output signal 150 corresponds to V AUX crossing V REF from above.
- FIGS. 5 A-B a high to low transition of output signal 150 corresponds to V AUX crossing V REF from above.
- FIG. 5 A-B illustrate the “equivalence” between the condition in which V AUX crosses V REF “early” (relative to T SAMPLE ) and the condition in which binary output signal 150 is “low” at T SAMPLE .
- the condition in which V AUX crosses V REF “late” (or not at all) corresponds to the condition in which binary output signal 150 is “high” at T SAMPLE .
- An early/late detector can be more or less sophisticated, depending on the amount of information required to insure acceptable regulation. Perhaps the simplest of early/late detectors is the binary detector, which indicates early or late, relative to T SAMPLE . Slightly more sophisticated is the ternary detector, which indicates early or late or neither, when the magnitude of the earliness or lateness is less than some fixed interval of time. A still more sophisticated early/late detector is a signed digital detector, which provides an early or late indication and, in addition, the magnitude of the earliness or lateness expressed digitally. FIG.
- FIG. 11 details one embodiment of a signed digital early/late detector implemented with binary comparators, counters, a subtractor, and a minimal amount of control logic, obviating the need for an error amplifier and the sample and hold circuitry characteristic of prior art analog systems.
- a transition of binary output signal 150 that occurs at precisely T SAMPLE will be classified (by the detector) as “early” by zero units of time.
- control strategies may be employed to modulate pulse width or frequency based on early/late detection of transitions of binary output signal 150 (relative to T SAMPLE ). These control strategies have as their primary objective, the determination of the duty cycle required to regulate the output voltage. Accordingly, they may be viewed as search strategies, exemplified by linear search, binary search, Newton-Raphson search, etc.
- FIGS. 13 A-B illustrate a fixed step linear search strategy, implemented with a ternary early/late detector.
- the ON TIME of the nth pulse is denoted by T ON (n).
- pulse modulating controller 70 widens the next power pulse (relative to the previous power pulse) so as to increase the power transferred to the load 24 to maintain regulation.
- the widening procedure amounts to increasing the pulse width (relative to the width of the previous pulse) by a fixed increment, T DELTA , subject to the maximum pulse width constraint.
- pulse modulating controller 70 narrows the next power pulse (relative to the previous power pulse) so as to reduce the power transferred to load 24 to maintain regulation.
- the narrowing procedure in this case, amounts to decreasing the pulse width (relative to the width of the previous pulse) by a fixed increment, T DELTA , subject to the minimum pulse width constraint.
- pulse modulating controller 70 leaves the width of the next power pulse unchanged (relative to the previous power pulse). In this fashion, the search converges on the value of T ON required for regulation, and the output voltage V out across load 24 will be determined through the value of V REF .
- FIGS. 14 A-B illustrate a proportional step search strategy implemented with a signed digital early/late detector.
- pulse modulating controller 70 increases or decreases the power pulse width (relative to the previous power pulse) by an amount proportional (through the scale factor, k) to the earliness or lateness, denoted by T E/L .
- T E/L the scale factor
- Minimum power pulses play an important role in the output voltage regulation scheme. Since output voltage feedback is based on the reflected voltage across the transformer T 1 , a power pulse (of some size) must be sent in order for a sample of the output voltage to be obtained. The more frequently the output is sampled, the better the regulation and the better the response to step changes in load. Accordingly, the minimum pulse and minimum duty cycle constraints of PWM and PFM controls support the objectives of tight regulation and rapid step response.
- controller 70 When load 24 becomes very light or is removed from flyback converter 100 of FIG. 3 , the pulse modulating controller 70 would be expected to command a continuous train of minimum power pulses 107 for transmission through power stage 35 . Although the energy content of minimum pulses 107 is small, in the absence of load 24 it is possible that the output voltage V out will rise to a level above the desired regulation set point. To maintain good regulation under low-load or no-load conditions, controller 70 may incorporate a “skip mode” of operation, wherein controller 70 inhibits pulsing for short periods.
- Controller 70 may detect that a low-load or no-load condition is true by measuring the frequency of minimum power pulses 107 transferred through power stage 35 . Alternatively, it may utilize the magnitude information provided by a signed digital comparator or signed digital early/late detector to detect the disappearance (or reappearance) of the load. Once in skip mode, the digital logic in controller 70 intersperses minimum pulses with no pulses, to maintain good regulation with an appropriate level of response to step changes in load without creating excessive audible noise. The process of interspersing minimum pulses could be pseudo-random (e.g., employing a linear feedback shift register).
- the pulse optimizer 85 and pulse modulating controller 70 may be implemented as software on a programmable processor, or may be formed by a single component.
- the flyback converter 300 illustrated in FIG. 6 has the functions of pulse optimization and pulse modulating controller formed by a state machine 170 fed by one or more binary comparators.
- the state machine 170 may contain a pulse generator (not illustrated) for generating a power pulse drive signal. Pulse timing may be supplied by pulse optimizer logic, and ON TIME and OFF TIME by pulse modulating controller logic. Moreover, should a skip mode be desired, state machine 170 could simply command its pulse generator to not generate a power pulse drive signal.
- flyback converter 100 Although the above discussion has been with respect to a flyback converter 100 , it will be appreciated that primary-only feedback methods of the present invention may be implemented in other isolated power converters such as a forward converter.
- FIG. 7 illustrates a forward converter 180 with a pulse modulating controller 70 using primary-only feedback to control a forward power stage 37 .
- Pulse optimizer 85 , comparator 151 , pulse modulating controller 70 , and driver 96 serve the same functions described previously with respect to the flyback converters of FIGS. 3 and 6 .
- the output voltage of forward converter 180 is not reflected across the power transformer T 1 (as in flyback converters). Instead, the reflected voltage of the output may be sensed via an auxiliary winding 105 coupled to the output inductor L 1 .
- the reflected voltage across the auxiliary winding 105 V AUX
- the pulse optimizer 85 and pulse modulating controller 70 may be implemented as software on a programmable processor, or may be formed by a single component.
- FIG. 8 illustrates a non-isolated boost converter 280 with a pulse modulating controller 70 using primary-only feedback to control a forward power stage 55 . While the logic of the pulse optimizer 85 and the pulse modulating controller 70 in converter 280 may be different from that employed in transformer-coupled flyback and forward converters, a primary-only feedback circuits and methods of the present invention may be nevertheless be implemented as shown.
- the voltage across the switch Q 1 during its OFF time provides a suitable approximation to the output voltage when sampled at those precisely determined instants for which the current through the rectifier diode D 1 is small and approximately constant, sample to sample (i.e., from switch cycle to switch cycle). While shown separately in FIG. 8 , it will be appreciated that the pulse optimizer 85 and pulse modulating controller 70 may be implemented as software on a programmable processor, or may be formed by a single component.
- FIG. 9 illustrates a buck converter 250 with a pulse modulating controller 70 using primary-only feedback to control a forward power stage 57 .
- the logic of the pulse optimizer 85 and the pulse modulating controller 70 in converter 250 may be different from that employed in transformer-coupled forward and flyback converters, a primary-only feedback method of the present invention may nevertheless be implemented as shown.
- the differential voltage across the output inductor during the OFF time of the switch Q 1 provides a suitable approximation to the output voltage when sampled at those precisely determined instants for which the current through the rectifier diode D 1 is small and approximately constant, sample to sample (i.e., switch cycle to switch cycle).
- the pulse optimizer 85 and pulse modulating controller 70 may be implemented as software on a programmable processor, or may be formed by a single component.
Abstract
A method of regulating voltage at an output of a switching power converter includes sensing an output voltage feedback signal; comparing the sensed feedback signal to a reference at a determined time during a cycling of the switch; and regulating the output voltage by either enabling or inhibiting cycling of a switch by a cycle of a drive signal produced by pulse generation circuitry in response to an output of the comparison.
Description
- This application claims priority to provisional application Ser. No. 60/335,723, filed Nov. 29, 2001, which is fully incorporated herein by reference.
- The invention pertains generally to the field of power conversion and more particularly to methods of controlling power converters.
- Switching power converters offer both compactness and efficiency in a number of different topologies that can be placed in two main categories: isolated (or transformer-coupled) and non-isolated (or direct-coupled). In non-isolated switching power converters, such as a buck (reducing voltage) or boost (increasing voltage) converter, the power output is directly coupled to the power input through the power switch element. In contrast, in isolated power converters, such as flyback or forward converters, the power output is isolated from the power input through a transformer, with the power switch element located on the primary (input) side of the transformer.
- The regulation of the output voltage of switching power converters (whether isolated or non-isolated) is generally accomplished by sensing the difference between an output voltage feedback signal approximating the output voltage at the load, and a reference, and using this difference, or error voltage, to determine how to cycle the switch so as to minimize the difference between the output voltage feedback signal and the reference. In this context, regulation schemes can be divided into two classes: pulse modulating schemes and pulse gating schemes.
- With pulse modulating schemes, the error voltage is used to form a pulse which will cycle the switch in such a way as to drive the output voltage signal onto the reference; whereas with pulse gating schemes, the error voltage is not used to form a specific pulse, but instead is used to gate pre-formed pulses (from a pulse generator) to the switch to drive the output voltage feedback signal toward the reference.
- Examples of pulse gating schemes are disclosed and described in application Ser. No. 09/970,849, filed Oct. 3, 2001, which is a continuation-in-part of application Ser. No. 09/279,949, filed Oct. 4, 2000, now U.S. Pat. No. 6,304,473, which is a continuation-in-part of application Ser. No. 09/585,928, filed Jun. 2, 2000, now U.S. Pat. No. 6,275,018, each of which is fully incorporated herein by reference. Pulse width modulation (PWM), pulse frequency modulation (PFM), or combinations of PWM and PFM form the basis of most pulse modulating schemes.
- Consider, for example, the
flyback converter 10 ofFIG. 1 . Theconverter 10 includes a power switch Q1 (typically a field effect transistor (FET)) coupled to an input voltage, Vin, via aprimary winding 20 of a power transformer T1. A rectifying diode D1 and filter capacitor C1 are coupled to asecondary winding 22 of the transformer T1. Theconverter 10 includes apulse modulating controller 25 that outputs a drive signal 61 to turn ON the power switch Q1 in order to control an output voltage, Vout, across aload 24. A primary/secondary isolation circuit 30 provides an output voltage feedback signal that approximates the output voltage acrossload 24. An errorvoltage sense circuit 31 generates an error voltage from inputs that include a reference voltage, VREF, as well as the output voltage feedback signal from primary/secondary isolation circuit 30. This error voltage is used by thecontroller 25 for regulating the ON time of the power switch Q1. - Obtaining the output voltage feedback signal from the secondary side of the converter, as shown in
FIG. 1 , offers the potential of accurate regulation performance, but necessarily increases the complexity and cost of the control system. If a primary-side feedback system were used instead, the output voltage feedback signal would be obtained from the primary side of power transformer T1, reducing cost and complexity of the control system, but introducing difficulties with regulation accuracy. - In a primary-side feedback system, the output voltage feedback signal would be obtained from the primary side of power transformer T1, preferably via an auxiliary winding, as shown in
FIG. 2 .FIG. 2 illustrates aflyback converter 15, which is similar toconverter 10 ofFIG. 1 , except that the reflected output voltage feedback signal is obtained from a primary-side anauxiliary winding 40, instead of from the primary/secondary isolation circuit 30. In particular, the voltage, VAUX, across theauxiliary winding 40 is proportional to the output voltage Vout across theload 24 minus a voltage drop produced by resistive and other losses in the secondary circuit, including losses across the rectifying diode D1. These losses will vary, depending upon the current drawn by the load and other factors. Hence, measuring the output voltage Vout through the reflected flyback voltage is problematic, as parasitic losses act as a corrupting signal that cannot be removed by filtering. As such, prior art primary-side feedback systems, such as that disclosed in U.S. Pat. No. 5,438,499, which depends upon the reflected voltage, are challenged to provide good voltage regulation. - Accordingly, there is a need in the art for power converters having primary-only feedback that achieves regulation performance traditionally obtainable with secondary feedback, while preserving the intended simplicity and cost benefits of primary-only feedback.
- In accordance with one aspect of the invention, a method for regulating voltage at an output of a switching power converter is provided. In one implementation, the method includes sensing an output voltage feedback signal; comparing the sensed feedback signal to a reference at a determined time during a cycling of the switch, and regulating the output voltage by controlling the turn-ON and turn-OFF times of a switch in response to an output of the comparison. In exemplary implementations, the comparison may be accomplished by one of binary comparison logic, ternary comparison logic and signed digital comparison logic. In one implementation, the determined time is determined for each cycling of the switch.
- The methods may be used in conjunctions with both transformer-coupled and direct-coupled power converters. By way of example, in one implementation, the power converter is a transformer-coupled power converter having its output coupled through a rectifying element, with the feedback signal originating from the primary side of the converter. In one embodiment of this implementation, the determined time is an instant at which the feedback signal corresponds to the output voltage at the load plus a small, substantially constant voltage drop measured from cycle to cycle of the switch. In another embodiment of this implementation, the determined time is an instant at which current flowing through a secondary rectifying element is small and substantially constant from cycle to cycle of the switch.
- In one implementation, the converter is a flyback converter, the feedback signal is a reflected flyback voltage signal, and the determined time is a fixed backward offset time from the transformer flux reset point. In one embodiment, the method includes determining the transformer flux reset point using a measured or calculated value of the period of resonant oscillation of the reflected flyback voltage signal. In one embodiment, the method includes determining the transformer flux reset point based on a point at which voltage across an auxiliary transformer winding is approximately zero. In another embodiment, the method includes determining the transformer flux reset point based on a point at which voltage across the primary winding of the power transformer is approximately zero.
- In one implementation, the converter is a forward converter, the output voltage feedback signal is a reflected voltage across an auxiliary winding coupled to the output inductor, and the determined time is at a fixed backward offset time from a point of output inductor flux reset.
- In one implementation, the converter is a direct-coupled boost converter, the output voltage feedback signal corresponds to a voltage across the switch during its off time, and the determined time is at an instant at which current through a rectifying element is small and substantially constant from cycle to cycle.
- In one implementation, the converter is a direct-coupled buck converter, the output voltage feedback signal corresponds to a differential voltage across an output inductor during the off time of the high-side switch, and the determined time is at an instant at which current through a rectifying element is small and substantially constant from cycle to cycle.
- In one implementation, the pulse modulating controller takes into account comparisons from one or more previous switch cycles in determining the turn ON and turn OFF times of a switch in response to the present comparison output.
- Other and further aspects and embodiments of the invention will become apparent upon review of the accompanying figures and the following detailed description.
- The various aspects and features of the invention will be better understood by examining the figures, in which similar elements in different embodiments are given the same reference numbers for ease in illustration, and in which:
-
FIG. 1 is a flyback converter with a pulse modulating controller having prior art secondary-side feedback. -
FIG. 2 is a flyback converter with a pulse modulating controller having prior art primary-side feedback. -
FIG. 3 is a flyback converter with a pulse modulating controller having primary-only feedback according to one embodiment of the invention. -
FIGS. 4 and 5 are timing diagrams illustrating a primary-only feedback sampling technique according to embodiments of the invention. -
FIGS. 5A and 5B provide greater detail of aspects demonstrated in the timing diagrams inFIGS. 4 and 5 . -
FIG. 6 is a flyback converter with a pulse modulating controller having primary-only feedback according to another embodiment of the invention. -
FIG. 7 is a forward converter with a pulse modulating controller having primary-only feedback according to yet another embodiment of the invention. -
FIG. 8 is a non-isolated boost converter with a pulse modulating controller using primary-only feedback according to still another embodiment of the invention. -
FIG. 9 is a buck converter with a pulse modulating controller using primary-only feedback according to yet another embodiment of the invention. -
FIG. 10 is a logical flowchart of a signed digital comparator employed in embodiments of the invention. -
FIG. 11 is a logical flowchart of a signed digital early/late detector employed in embodiments of the invention. - FIGS. 12A-B describe the operation of a pulse modulating controller implementing a high/low detector according to one embodiment of the invention.
- FIGS. 13A-B describe the operation of a pulse modulating controller implementing a ternary early/late detector according to another embodiment of the invention.
- FIGS. 14A-B describe the operation of a pulse modulating controller implementing a signed digital early/late detector according to yet another embodiment of the invention.
- It will be apparent to those skilled in the art that the power converter control system methodologies and embodiments disclosed and described herein may be applied to transformer-coupled switching converters, such as a flyback, forward, fly-forward, push-pull, or bridge-type power converters. In addition, as will be explained herein, direct-coupled switching power converters such as buck, boost, buck/boost or SEPIC power converters may also benefit from these control methodologies and embodiments.
- The above-incorporated U.S. Pat. No. 6,275,018 discloses and describes various embodiments of a “pulse rate” (also referred to as “pulse train”) method of power converter regulation. Notably, pulse rate regulation, in itself, controls neither the ON TME nor the OFF TIME of the power switch in order to regulate the output voltage. Instead, output regulation may be accomplished by controlling the rate of independently specified activation pulses presented to the power switch. If the load requires more power, pulses from a pulse generator are allowed to cycle the power switch. Otherwise, pulses from the pulse generator are inhibited from cycling the power switch.
- Control circuitry for and methods for obtaining accurate, real-time primary-only feedback are disclosed and described in the above-incorporated U.S. patents and applications, and are further refined upon herein. These primary-only circuits and methods may also be applied to power converters regulated using PWM and PFM controllers, as disclosed and described below.
- More particularly, prior art PWM and PFM controllers endeavor to construct pulses that will drive the output voltage onto the reference. In this case, owing to practical limits on the width and frequency of pulses, in the presence of a fixed load, the output voltage will “ripple” about the reference. Because pulse rate control parameters (i.e., phase, width, and frequency) are specified independently of regulation, pulse rate regulation presents the opportunity to realize numerous power stage optimizations obtained at the price of exchanging “ripples” for “limit cycles.” Compared to secondary feedback, with its costly opto-isolator circuit and attendant demands on circuit board layout, primary-only feedback offers the potential of cheaper, slimmer power supplies for applications such as consumer electronics.
-
FIG. 3 illustrates aflyback power converter 100 employing primary-only feedback for regulation purposes. Theconverter 100 includes apower stage 35, which comprises a transformer T1 having a primary winding 20 and secondary winding 22, rectifying diode D1 and filter capacitorC1. Power stage 35 receives an input voltage, Vin, produced by arectifier 92 operating on an AC line input. Acapacitor 93 helps smooth voltage ripple on Vin. Apulse modulating controller 70 produces a powerpulse drive signal 71 that cycles switch Q1 based on an outputvoltage feedback signal 150. As illustrated, switch Q1 may be a power MOSFET. Alternatively, switch Q1 may comprise multiple transistors or other suitable means. - To regulate Vout,
pulse modulating controller 70 controls the ON TIME (the time between switch ON and switch OFF) and the OFF TIME (the time between switch OFF and switch ON) throughdrive signal 71 that cycles switch Q1. (Driver 96 amplifies drivesignal 71 to effect the turn ON and turn OFF of switch Q1.) Wherecontroller 70 implements fixed frequency pulse width modulation (PWM), the switch ON TIME will vary between a minimum power pulse width (corresponding to the minimum duty cycle) and a maximum power pulse width (corresponding to the maximum duty cycle). - The switch OFF TIME will be the difference between the switch cycle period and the ON TIME. Where
controller 70 implements fixed ON TIME pulse frequency modulation (PFM), the switch OFF TIME will vary between a minimum value (corresponding to the maximum duty cycle) and a maximum value (corresponding to the minimum duty cycle). Wherecontroller 70 implements some combination of PWM and PFM, the switch ON TIME and OFF TIME may be determined, in part, by operating conditions, such as the power being transferred to load 24. - The
pulse modulating controller 70 may or may not keep history; that is it may or may not remember the results of previous comparisons. Ifcontroller 70 keeps history, it may reference said history in the process of determining the ON TIME and OFF TIME of switch Q1. Moreover, the precise instants in time when transistor Q1 switches ON and OFF may further be controlled by apulse optimizer 85, as disclosed and described in the above-incorporated patents and applications, and described further herein. - The
flyback power converter 100 implements a method of primary-only feedback in the following fashion. When switch Q1 is switched OFF following the ON time of a power pulse, the voltage on the secondary winding 22 will be “reflected” back onto the primary winding 20 scaled by the turns ratio, NP/NS, where NP is the number of turns on the primary winding 20 and NS is the number or turns on the secondary winding 22. - Although the voltage across the primary winding 20 could be sensed to perform primary-only feedback control, a more suitable signal for sensing may be provided through the use of an auxiliary winding 105, as the voltage on this winding 105 is ground referenced. The reflected voltage, VAUX, on auxiliary winding 105 will be NAUX/NS times the voltage on secondary winding 22, where NAUX is the number of turns on auxiliary winding 105, and NS is the turns on secondary winding 22. The relationship between VAUX and Vout is given by the expression
V AUX=(V out +ΔV)N AUX /N S (1)
where ΔV is the voltage drop caused by resistive and other losses in the secondary circuit. This voltage drop includes, in particular, losses across rectifying diode D1. - One aspect of the present invention leverages the notion that by sampling VAUX at precisely determined instants for which the term ΔV is small and approximately constant from sample to sample, real-time output voltage feedback can be obtained, where “real-time” output voltage feedback denotes an unfiltered output voltage measurement taken after each power pulse and available to the control logic for the selection of the succeeding drive signal.
- A
comparator 151 produces an outputvoltage feedback signal 150 by comparing the VAUX waveform to a reference voltage, VREF, calibrated to compensate for the average value of ΔV at those precisely determined instants when ΔV is small and substantially constant from cycle to cycle. For example, the reference may be derived from a bandgap voltage reference or other suitable means, such as a compensated zener diode to provide a reliably stable reference voltage. By this calibration of VREF, those precisely determined instants define not only the instants at which accurate, real-time output voltage feedback is available, but also the instants at which VAUX and VREF are expected to crossover, resulting in a transition or state change in the outputvoltage feedback signal 150. -
Comparator 151 employed to generate feedback signal 150 can be more or less sophisticated, depending on the amount of information required to insure acceptable regulation. Perhaps the simplest of comparators is the binary comparator, with or without hysteresis, which indicates VAUX is high or low, relative to VREF. Slightly more sophisticated is the ternary comparator, which indicates high or low or neither, when the magnitude of the difference between VAUX and VREF is less than some fixed voltage. - A still more sophisticated comparator is a signed digital comparator, which provides a high or low indication and, in addition, the magnitude of the difference expressed digitally.
FIG. 10 details one embodiment of a signed digital comparator implemented with binary comparators, counters, a digital-to-analog converter, a subtractor, and a minimal amount of control logic, obviating the need for an error amplifier and the sample and hold circuitry characteristic of prior art analog systems. In the example ofFIG. 10 , under the condition in which VAUX equals VREF at precisely TSAMPLE, the comparator may indicate “high” by zero units of voltage. In the embodiments discussed herein, binary comparators without hysteresis are assumed. - The sampling timing diagrams of
FIG. 4 andFIG. 5 illustrate timing for both a “maximum”power pulse 106 and a “minimum”power pulse 107 generated by thepulse modulating controller 70 inconverter 100. Shown are the following waveforms: a) thedrive signal 71 to transistor switch Q1, b) theauxiliary voltage waveform 102, and c) the secondary current ISEC waveform 103 through the rectifying diode D1. - For both the
maximum pulse 106 andminimum pulse 107, the reflectedauxiliary voltage waveform 102 swings high whendrive signal 101 switches transistor Q1 from ON to OFF. Similarly, ISEC 103 will also jump from a substantially zero current to a relatively high current value, IPEAK, whendrive signal 101 switches transistor Q1 from ON to OFF. Duringdrive signal 101 OFF TIME, ISEC 103 will ramp down from this relatively high current value back to a substantially zero current value, assuming discontinuous or critically discontinuous operation. Sampling thebinary output signal 150 at times when ISEC=K Amps, where K=a small and constant value, will insure that the ΔV term in Equation (1) remains small and approximately constant from sample to sample. - To implement the foregoing, it suffices to sample
binary output signal 150 at time TSAMPLE, where TSAMPLE occurs at a fixed backward offset ΔT from the zero points of the secondary current ISEC. This is because the current ISEC decays at the same rate regardless of the width of the preceding power pulse. Note that reflectedvoltage waveform 102 forms a “plateau” period of relatively constant voltage while ISEC 103 ramps down to zero current. As ISEC 103 reaches zero current, this plateau voltage drops off steeply. To get a good reading of the output voltage onload 24 by way of VAUX, TSAMPLE should occur within the plateau period, as close to the drop off as possible. Hence ΔT cannot be made too small or sampling will be complicated by the collapse of the plateau, preventing a proper sensing of the output voltage. - To summarize, by sampling ΔT time ahead of the zero points of the secondary current, the ΔV term in equation (1) is maintained at a small and approximately constant value regardless of line or load conditions, enabling the potential for precise output regulation.
- An alternative to direct sensing of the secondary current (an appropriate methodology for single-output converters) is the sensing of the transformer reset condition directly or indirectly. When ISEC 103 reaches zero the transformer T1 may be denoted to be in a reset condition. This reset condition occurs when the energy in the primary winding 20 has been completely transferred to the secondary winding 22. At such a point in time, the voltage across primary winding 20 will proceed to drop rapidly to zero.
- Referring to
FIG. 5 , it can be seen that at reset, the voltage VAUX across the auxiliary winding 105 will also drop rapidly to (and through) zero volts, oscillating around zero until switch ON occurs. Thus, to detect a reset condition, a zero crossing comparator (not illustrated) could monitor VAUX and detect when it first equals zero following switch OFF. Alternatively, another comparator (not illustrated) could detect when VIN first equals the drain voltage on transistor Q1, VDRN, which occurs when VAUX first equals zero. Because the time at which VAUX first equals zero (TAUXO) lags transformer reset by a fixed amount of time, and it is more easily detected, it provides attractive means for indirectly measuring transformer reset time. - After the transformer has reached reset, there is still energy stored in the drain-source capacitance of transistor Q1. Assuming that transistor Q1 is not immediately cycled ON at this point, this energy then resonantly oscillates with the magnetizing inductance of the primary winding 22 at a resonant frequency determined by the capacitance and inductance values. The frequency (or period) of this resonance is substantially the same regardless of the width of the preceding power pulse.
- The resonant oscillation of VAUX is illustrated in
FIG. 4 andFIG. 5 . With specific reference toFIG. 5 , reflectedauxiliary voltage waveform 102 will have a plateau period during the OFF TIME following a power pulse. A condition in which reflectedauxiliary voltage 102 equals zero will occur following this plateau period attime 110. By measuring the time difference between the first zero crossing point ofV AUX 110 following the turn OFF of switch Q1, and the second zero crossing point ofV AUX 111, it is possible to empirically derive the period of resonant oscillation following flux reset. This empirically derived value of the resonant oscillation period is useful in fixing the setback from TAUXO to the transformer reset point (see below). - The reflected
auxiliary voltage 102 achieves its first minimum at a time T3, which occurs midway betweentimes - As disclosed and discussed in the above-incorporated patents and applications, the
pulse optimizer 85 accepts a variety of optimizer inputs, including VAUX, and applies these inputs to derive the timing, etc., of power pulses, in order to realize optimizations such as zero-voltage switching. As the foregoing paragraphs suggest, an effective and easily-mechanized method for implementing zero-voltage switching is first, to detect the first and second zero-crossings of VAUX following the turn off of switch Q1; second, to derive the period of resonant oscillation; and third, to adjust power pulses to turn on at the first zero-crossing of VAUX (TAUXO), plus ¼ of the resonant oscillation period, or TAUXO plus ¼ of the resonant oscillation period plus an integral multiple of resonant oscillation periods. - Where the foregoing method is used to implement zero-voltage switching, the time TAUXO and the period of resonant oscillation generated by
pulse optimizer 85 can both be made available topulse modulating controller 70 for use in the determination of TSAMPLE. TSAMPLE could, for example, be determined from TAUXO by first subtracting ¼ of the resonant oscillation period (to “locate” the transformer reset point), and then subtracting ΔT. Having determined the sampling time, TSAMPLE,controller 70 need only evaluate thebinary output signal 150 ofcomparator 151 to determine whether at that instant VAUX is higher or lower than the expected value, VREF. - If VAUX is greater than the reference voltage at the sample time TSAMPLE,
binary output signal 150 will be high; if VAUX is less than the reference voltage at TSAMPLE, signal 150 will be low. A variety of control strategies may be employed to modulate pulse width or frequency based onbinary output signal 150 at time TSAMPLE. These control strategies have as their primary objective, the determination of the duty cycle required to regulate the output voltage. Accordingly, they may be viewed as search strategies, exemplified by linear search, binary search, Newton-Raphson search, etc. - FIGS. 12A-B illustrate a linear search strategy; the ON TIME of the nth pulse is denoted by TON(n). In response to sampling a high
binary output signal 150 at TSAMPLE,pulse modulating controller 70 narrows the next power pulse (relative to the previous power pulse) so as to reduce the power transferred to theload 24 to maintain regulation. The narrowing procedure amounts to decreasing the pulse width (relative to the width of the previous pulse) by a fixed increment, TDELTA, subject to the minimum pulse width constraint. In response to sampling a lowbinary output signal 150 at TSAMPLE,pulse modulating controller 70 widens the next power pulse (relative to the previous power pulse) so as to increase the power transferred to load 24 to maintain regulation. The widening procedure, in this case, amounts to increasing the pulse width (relative to the width of the previous pulse) by a fixed increment, TDELTA, subject to the maximum pulse width constraint. In this fashion, the search converges on the value of TON required for regulation, and the output voltage Vout, acrossload 24 will be determined through the value of VREF. - An alternative to sampling the
binary output signal 150 at time TSAMPLE is to sample signal 150 periodically to detect the high to low transitions or state changes of said signal, and classify them as “early” or “late” relative to TSAMPLE, where an “early” transition is one that occurs before TSAMPLE, and a “late” transition is one that occurs after TSAMPLE. This follows from the fact that TSAMPLE is, by definition, the expected crossover point of VAUX with VREF, and therefore the expected transition point ofbinary output signal 150. As illustrated in FIGS. 5A-B, a high to low transition ofoutput signal 150 corresponds to VAUX crossing VREF from above. FIGS. 5A-B illustrate the “equivalence” between the condition in which VAUX crosses VREF “early” (relative to TSAMPLE) and the condition in whichbinary output signal 150 is “low” at TSAMPLE. Similarly, the condition in which VAUX crosses VREF “late” (or not at all) corresponds to the condition in whichbinary output signal 150 is “high” at TSAMPLE. - An early/late detector can be more or less sophisticated, depending on the amount of information required to insure acceptable regulation. Perhaps the simplest of early/late detectors is the binary detector, which indicates early or late, relative to TSAMPLE. Slightly more sophisticated is the ternary detector, which indicates early or late or neither, when the magnitude of the earliness or lateness is less than some fixed interval of time. A still more sophisticated early/late detector is a signed digital detector, which provides an early or late indication and, in addition, the magnitude of the earliness or lateness expressed digitally.
FIG. 11 details one embodiment of a signed digital early/late detector implemented with binary comparators, counters, a subtractor, and a minimal amount of control logic, obviating the need for an error amplifier and the sample and hold circuitry characteristic of prior art analog systems. In the embodiment ofFIG. 11 , a transition ofbinary output signal 150 that occurs at precisely TSAMPLE will be classified (by the detector) as “early” by zero units of time. - A variety of control strategies may be employed to modulate pulse width or frequency based on early/late detection of transitions of binary output signal 150 (relative to TSAMPLE). These control strategies have as their primary objective, the determination of the duty cycle required to regulate the output voltage. Accordingly, they may be viewed as search strategies, exemplified by linear search, binary search, Newton-Raphson search, etc.
- FIGS. 13A-B illustrate a fixed step linear search strategy, implemented with a ternary early/late detector. The ON TIME of the nth pulse is denoted by TON(n). In response to an early indication from the ternary detector,
pulse modulating controller 70 widens the next power pulse (relative to the previous power pulse) so as to increase the power transferred to theload 24 to maintain regulation. The widening procedure amounts to increasing the pulse width (relative to the width of the previous pulse) by a fixed increment, TDELTA, subject to the maximum pulse width constraint. In response to a late indication from the ternary detector,pulse modulating controller 70 narrows the next power pulse (relative to the previous power pulse) so as to reduce the power transferred to load 24 to maintain regulation. - The narrowing procedure, in this case, amounts to decreasing the pulse width (relative to the width of the previous pulse) by a fixed increment, TDELTA, subject to the minimum pulse width constraint. When the indication from the ternary detector is neither,
pulse modulating controller 70 leaves the width of the next power pulse unchanged (relative to the previous power pulse). In this fashion, the search converges on the value of TON required for regulation, and the output voltage Vout acrossload 24 will be determined through the value of VREF. - FIGS. 14A-B illustrate a proportional step search strategy implemented with a signed digital early/late detector. In this case,
pulse modulating controller 70 increases or decreases the power pulse width (relative to the previous power pulse) by an amount proportional (through the scale factor, k) to the earliness or lateness, denoted by TE/L. The foregoing strategies are non-limiting examples of the invention disclosed herein. - Minimum power pulses play an important role in the output voltage regulation scheme. Since output voltage feedback is based on the reflected voltage across the transformer T1, a power pulse (of some size) must be sent in order for a sample of the output voltage to be obtained. The more frequently the output is sampled, the better the regulation and the better the response to step changes in load. Accordingly, the minimum pulse and minimum duty cycle constraints of PWM and PFM controls support the objectives of tight regulation and rapid step response.
- When
load 24 becomes very light or is removed fromflyback converter 100 ofFIG. 3 , thepulse modulating controller 70 would be expected to command a continuous train ofminimum power pulses 107 for transmission throughpower stage 35. Although the energy content ofminimum pulses 107 is small, in the absence ofload 24 it is possible that the output voltage Vout will rise to a level above the desired regulation set point. To maintain good regulation under low-load or no-load conditions,controller 70 may incorporate a “skip mode” of operation, whereincontroller 70 inhibits pulsing for short periods. -
Controller 70 may detect that a low-load or no-load condition is true by measuring the frequency ofminimum power pulses 107 transferred throughpower stage 35. Alternatively, it may utilize the magnitude information provided by a signed digital comparator or signed digital early/late detector to detect the disappearance (or reappearance) of the load. Once in skip mode, the digital logic incontroller 70 intersperses minimum pulses with no pulses, to maintain good regulation with an appropriate level of response to step changes in load without creating excessive audible noise. The process of interspersing minimum pulses could be pseudo-random (e.g., employing a linear feedback shift register). - Although shown separately in
FIG. 3 , it will be appreciated that thepulse optimizer 85 andpulse modulating controller 70 may be implemented as software on a programmable processor, or may be formed by a single component. For example, theflyback converter 300 illustrated inFIG. 6 , has the functions of pulse optimization and pulse modulating controller formed by astate machine 170 fed by one or more binary comparators. Thestate machine 170 may contain a pulse generator (not illustrated) for generating a power pulse drive signal. Pulse timing may be supplied by pulse optimizer logic, and ON TIME and OFF TIME by pulse modulating controller logic. Moreover, should a skip mode be desired,state machine 170 could simply command its pulse generator to not generate a power pulse drive signal. - Although the above discussion has been with respect to a
flyback converter 100, it will be appreciated that primary-only feedback methods of the present invention may be implemented in other isolated power converters such as a forward converter. - By way of example,
FIG. 7 illustrates aforward converter 180 with apulse modulating controller 70 using primary-only feedback to control aforward power stage 37.Pulse optimizer 85,comparator 151,pulse modulating controller 70, anddriver 96 serve the same functions described previously with respect to the flyback converters ofFIGS. 3 and 6 . However, the output voltage offorward converter 180 is not reflected across the power transformer T1 (as in flyback converters). Instead, the reflected voltage of the output may be sensed via an auxiliary winding 105 coupled to the output inductor L1. Hence, the reflected voltage across the auxiliary winding 105 (VAUX) provides an output voltage feedback signal for input tocomparator 151. In this case (as before), the sampling of VAUX would occur at times when the current through the flyback diode is small and constant, sample to sample. - Although shown separately in
FIG. 7 , it will be appreciated that thepulse optimizer 85 andpulse modulating controller 70 may be implemented as software on a programmable processor, or may be formed by a single component. - The primary-only feedback method disclosed herein may also be extended to direct-coupled switching power converters as well. By way of example,
FIG. 8 illustrates anon-isolated boost converter 280 with apulse modulating controller 70 using primary-only feedback to control aforward power stage 55. While the logic of thepulse optimizer 85 and thepulse modulating controller 70 inconverter 280 may be different from that employed in transformer-coupled flyback and forward converters, a primary-only feedback circuits and methods of the present invention may be nevertheless be implemented as shown. Inconverter 280, the voltage across the switch Q1 during its OFF time provides a suitable approximation to the output voltage when sampled at those precisely determined instants for which the current through the rectifier diode D1 is small and approximately constant, sample to sample (i.e., from switch cycle to switch cycle). While shown separately inFIG. 8 , it will be appreciated that thepulse optimizer 85 andpulse modulating controller 70 may be implemented as software on a programmable processor, or may be formed by a single component. - By way of another example,
FIG. 9 illustrates abuck converter 250 with apulse modulating controller 70 using primary-only feedback to control aforward power stage 57. While the logic of thepulse optimizer 85 and thepulse modulating controller 70 inconverter 250 may be different from that employed in transformer-coupled forward and flyback converters, a primary-only feedback method of the present invention may nevertheless be implemented as shown. Inconverter 250, the differential voltage across the output inductor during the OFF time of the switch Q1 provides a suitable approximation to the output voltage when sampled at those precisely determined instants for which the current through the rectifier diode D1 is small and approximately constant, sample to sample (i.e., switch cycle to switch cycle). Again, while shown separately inFIG. 9 , it will be appreciated that thepulse optimizer 85 andpulse modulating controller 70 may be implemented as software on a programmable processor, or may be formed by a single component. - Specific embodiments illustrating various aspects and features of the invention have been shown by way of example in the drawings and are herein described in detail. However, it is to be understood that the invention is not to be limited to the particular embodiments or methods shown or described, but to the contrary, the invention broadly covers all modifications, equivalents, and alternatives encompassed by the scope of the appended claims and their equivalents.
Claims (16)
1. A method of regulating power between a source and a load, comprising:
providing a power converter, the converter comprising a switch and pulse modulating control circuitry, the pulse modulating control circuitry producing power pulses for cycling the switch ON and OFF, wherein if the switch is cycled ON and OFF according to a power pulse cycle, power is transferred from the source to the load;
sensing an output voltage feedback signal originating from a primary side of the converter, the sensed feedback signal approximating an output voltage at the load;
using a comparator to compare the sensed feedback signal to a reference at an instant at which the sensed feedback signal corresponds to the output voltage at the load plus a small, substantially constant voltage drop measured from cycle to cycle of the switch; and
regulating the output voltage by controlling turn ON and turn OFF times of the switch in response to an output of the comparator, wherein comparator outputs from one or more previous switch cycles are used in determining the turn ON and turn OFF times of the switch in response to a present comparator output.
2. A method of regulating voltage at an output of a switching power converter, comprising:
sensing an output voltage feedback signal;
using a comparator to compare the sensed feedback signal to a reference;
using an early/late detector to detect transitions of an output of the comparator relative to an expected transition time within a switching cycle; and
regulating the output voltage by controlling turn ON and turn OFF times of a switch in response to an output of the early/late detector.
3. The method of claim 2 , wherein the expected transition time is determined at each cycling of the switch.
4. The method of claim 2 , wherein the expected transition time is an instant at which the output voltage feedback signal corresponds to the output voltage at a load plus a small, substantially constant voltage drop measured from cycle to cycle of the switch.
5. The method of claim 2 , wherein the expected transition time is an instant at which current flowing through a secondary rectifying element is small and substantially constant from cycle to cycle of the switch.
6. The method of claim 2 , wherein the converted is a flyback converter having a transformer flux reset point, the output voltage feedback signal is a reflected flyback voltage signal, and the expected transition time is at a fixed backward offset time from the transformer flux reset point.
7. The method of claim 2 , wherein early/late detector outputs from one or more previous switch cycles are used in determining the turn ON and turn OFF times of the switch in response to a present early/late detector output.
8. The method of claim 2 , wherein the converter is a forward converter having an output inductor, the output voltage feedback signal is a reflected voltage across an auxiliary winding coupled to the output inductor, and the expected transition time is a fixed backward offset time from a point of output inductor flux reset.
9. The method of claim 2 , wherein the converter is a direct-coupled boost converter, the output voltage feedback signal corresponds to a voltage across the switch during its OFF time, and the expected transition time in an instant at which current through a rectifying element is small and substantially constant from cycle to cycle of the switch.
10. The method of claim 2 , wherein the converter is a direct-coupled buck converter, the output voltage feedback signal corresponds to a differential voltage across an output inductor during the OFF time of the switch, and the expected transition time is at an instant at which current through a rectifying element is small and substantially constant from cycle to cycle of the switch.
11. The method of claim 2 , wherein the turn ON times are controlled to coincide with instants at which voltage across the switch is a minimum.
12. A method of regulating voltage at an output of a switching power converter, the converter comprising a switch and pulse modulating control circuitry, the pulse modulating control circuitry producing power pulses for cycling the switch ON and OFF, wherein if the switch is cycled ON and OFF according to a power pulse cycle, power is transferred from a source to a load, the method comprising:
sensing an output voltage feedback signal originating from a primary side of the converter, the sensed feedback signal approximating an output voltage at the load;
using a comparator to compare the sensed feedback signal to a reference;
using an early/late detector to detect transitions of an output of the comparator relative to an instant at which the sensed feedback signal corresponds to the output voltage at the load plus a small, substantially constant voltage drop measured from cycle to cycle of the switch; and
regulating the output voltage by controlling turn ON and turn OFF times of the switch in response to an output of the early/late detector.
13. The method of claim 12 , wherein early/late detector outputs from one or more previous switch cycles are used in determining one or both of the turn ON time and turn OFF time of the switch in response to a present early/late detector output.
14. The method of claim 12 , wherein the early/late detector is one of a binary detector, a ternary detector, and a signed digital detector.
15. The method of claim 12 , wherein the early/late detector is a binary detector, wherein crossover of the output voltage feedback signal with the reference is signaled by a transition of a binary comparator, and monitoring whether the comparator transition occurs within a specified period of time.
16. The method of claim 12 , the early/late detector comprising a ternary detector wherein crossover of the output voltage feedback signal with the reference is signaled by a transition of a binary comparator, the method further comprising:
starting a timer at an earlier of a comparator transition time or an expected transition time, and
terminating the timer upon later of the comparator transition time, the expected transition time, or a timeout of the timer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/099,281 US20050169017A1 (en) | 2001-11-29 | 2005-04-04 | Methods for digital regulation of power converters using primary-only feedback |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US33572301P | 2001-11-29 | 2001-11-29 | |
US10/306,719 US6900995B2 (en) | 2001-11-29 | 2002-11-27 | PWM power converter controlled by transistion detection of a comparator error signal |
US11/099,281 US20050169017A1 (en) | 2001-11-29 | 2005-04-04 | Methods for digital regulation of power converters using primary-only feedback |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/306,719 Continuation US6900995B2 (en) | 2001-11-29 | 2002-11-27 | PWM power converter controlled by transistion detection of a comparator error signal |
Publications (1)
Publication Number | Publication Date |
---|---|
US20050169017A1 true US20050169017A1 (en) | 2005-08-04 |
Family
ID=23312994
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/306,719 Expired - Lifetime US6900995B2 (en) | 2001-11-29 | 2002-11-27 | PWM power converter controlled by transistion detection of a comparator error signal |
US10/306,728 Expired - Fee Related US6862198B2 (en) | 2001-11-29 | 2002-11-27 | PWM power converter with digital sampling control circuitry |
US11/099,281 Abandoned US20050169017A1 (en) | 2001-11-29 | 2005-04-04 | Methods for digital regulation of power converters using primary-only feedback |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/306,719 Expired - Lifetime US6900995B2 (en) | 2001-11-29 | 2002-11-27 | PWM power converter controlled by transistion detection of a comparator error signal |
US10/306,728 Expired - Fee Related US6862198B2 (en) | 2001-11-29 | 2002-11-27 | PWM power converter with digital sampling control circuitry |
Country Status (3)
Country | Link |
---|---|
US (3) | US6900995B2 (en) |
AU (1) | AU2002354249A1 (en) |
WO (1) | WO2003047079A2 (en) |
Cited By (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070019445A1 (en) * | 2005-07-21 | 2007-01-25 | Matthew Blaha | Switch with fully isolated power sourcing equipment control |
US7248487B1 (en) | 2006-06-01 | 2007-07-24 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US20070274106A1 (en) * | 2006-05-23 | 2007-11-29 | David Robert Coulson | Switch mode power supply controllers |
US20070274107A1 (en) * | 2006-05-23 | 2007-11-29 | Garner David M | Switch mode power supply controllers |
WO2007135452A1 (en) * | 2006-05-23 | 2007-11-29 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US7310244B2 (en) * | 2006-01-25 | 2007-12-18 | System General Corp. | Primary side controlled switching regulator |
US20080007977A1 (en) * | 2006-07-07 | 2008-01-10 | Johan Piper | Switch mode power supply systems |
US20080007982A1 (en) * | 2006-07-07 | 2008-01-10 | Johan Piper | Switch mode power supply systems |
US20080037294A1 (en) * | 2006-05-23 | 2008-02-14 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US20080080105A1 (en) * | 2006-09-29 | 2008-04-03 | Agere Systems Inc. | Isolated switched maintain power signature (mps) and fault monitoring for power over ethernet |
US20090073734A1 (en) * | 2006-08-22 | 2009-03-19 | Mathew Blaha | Programmable feedback voltage pulse sampling for switched power supplies |
US7551460B2 (en) | 2006-05-23 | 2009-06-23 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US7643320B2 (en) | 2007-03-28 | 2010-01-05 | Agere Systems Inc. | Isolated resistive signature detection for powered devices |
US7738271B1 (en) | 2007-06-08 | 2010-06-15 | Science Applications International Corporation | Controlled resonant charge transfer device |
US20100218003A1 (en) * | 2005-06-16 | 2010-08-26 | Agere Systems Inc. | Transformerless power over ethernet system |
US20100246216A1 (en) * | 2006-05-23 | 2010-09-30 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US20110063879A1 (en) * | 2009-09-11 | 2011-03-17 | Panasonic Corporation | Switching power supply device and semiconductor device |
US7996166B2 (en) | 2007-03-26 | 2011-08-09 | Agere Systems Inc. | Isolated capacitive signature detection for powered devices |
CN103780093A (en) * | 2012-10-19 | 2014-05-07 | 光宝科技股份有限公司 | Switching-type power supply unit |
US20150204923A1 (en) * | 2014-01-17 | 2015-07-23 | Fairchild Korea Semiconductor Ltd. | Output current estimating method and power supply device using the same |
US9444331B2 (en) | 2013-07-29 | 2016-09-13 | Infineon Technologies Ag | System and method for a converter circuit |
US9941797B2 (en) | 2014-01-17 | 2018-04-10 | Semiconductor Components Industries, Llc | Switch control circuit and power supply device including the same |
Families Citing this family (72)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7269034B2 (en) | 1997-01-24 | 2007-09-11 | Synqor, Inc. | High efficiency power converter |
US6876181B1 (en) * | 1998-02-27 | 2005-04-05 | Power Integrations, Inc. | Off-line converter with digital control |
US7153312B1 (en) | 1999-12-02 | 2006-12-26 | Smith & Nephew Inc. | Closure device and method for tissue repair |
US7887551B2 (en) | 1999-12-02 | 2011-02-15 | Smith & Nephew, Inc. | Soft tissue attachment and repair |
US6525514B1 (en) * | 2000-08-08 | 2003-02-25 | Power Integrations, Inc. | Method and apparatus for reducing audio noise in a switching regulator |
US7697591B2 (en) * | 2002-08-26 | 2010-04-13 | Texas Instruments Incorporated | Crest factor reduction processor for wireless communications |
US9314235B2 (en) * | 2003-02-05 | 2016-04-19 | Smith & Nephew, Inc. | Tissue anchor and insertion tool |
US6927663B2 (en) * | 2003-07-23 | 2005-08-09 | Cardiac Pacemakers, Inc. | Flyback transformer wire attach method to printed circuit board |
US7064492B1 (en) * | 2003-10-10 | 2006-06-20 | National Semiconductor Corporation | Automatic ambient light compensation for display backlighting |
EP1695596A1 (en) * | 2003-12-11 | 2006-08-30 | Koninklijke Philips Electronics N.V. | Electronic ballast with open circuit voltage regulation |
TWI318038B (en) * | 2004-03-05 | 2009-12-01 | Wistron Corp | Booster |
TWI256759B (en) * | 2004-04-16 | 2006-06-11 | Yu-Lin Chi | Digitalized power control system |
KR101117419B1 (en) | 2004-06-14 | 2012-04-16 | 최재철 | A power supply device which uses an input power to the feedback |
US7142140B2 (en) * | 2004-07-27 | 2006-11-28 | Silicon Laboratories Inc. | Auto scanning ADC for DPWM |
JP4498851B2 (en) * | 2004-08-11 | 2010-07-07 | ローム株式会社 | Power supply |
US6972969B1 (en) * | 2004-08-19 | 2005-12-06 | Iwatt, Inc. | System and method for controlling current limit with primary side sensing |
US7449869B2 (en) * | 2004-09-01 | 2008-11-11 | Artesyn Technologies, Inc. | Digital current mode controller with low frequency current sampling |
FR2875653B1 (en) * | 2004-09-20 | 2006-10-20 | Excem Sa | TRANSMISSION DEVICE FOR OPTICAL TRANSMISSION IN FREE SPACE |
GB2421595A (en) | 2004-12-21 | 2006-06-28 | Cambridge Semiconductor Ltd | Switched mode power supply control system |
US20060133115A1 (en) * | 2004-12-22 | 2006-06-22 | Phadke Vijay G | Adaptive blanking of transformer primary-side feedback winding signals |
WO2006137948A2 (en) * | 2004-12-29 | 2006-12-28 | Isg Technologies Llc | Efficiency booster circuit and technique for maximizing power point tracking |
US20090306777A1 (en) * | 2005-03-31 | 2009-12-10 | Bachler Feintech Ag | Apparatus for fixing a ligament |
US20060293709A1 (en) | 2005-06-24 | 2006-12-28 | Bojarski Raymond A | Tissue repair device |
EP1900087A2 (en) * | 2005-07-06 | 2008-03-19 | Cambridge Semiconductor Limited | Switch mode power supply control systems |
US7233504B2 (en) | 2005-08-26 | 2007-06-19 | Power Integration, Inc. | Method and apparatus for digital control of a switching regulator |
WO2007041896A1 (en) * | 2005-10-09 | 2007-04-19 | System General Corp. | Switching control circuit with variable switching frequency for primary-side-controlled power converters |
US7710098B2 (en) * | 2005-12-16 | 2010-05-04 | Cambridge Semiconductor Limited | Power supply driver circuit |
GB0615029D0 (en) * | 2005-12-22 | 2006-09-06 | Cambridge Semiconductor Ltd | Switch mode power supply controllers |
US7733098B2 (en) * | 2005-12-22 | 2010-06-08 | Cambridge Semiconductor Limited | Saturation detection circuits |
US7557552B2 (en) * | 2006-04-10 | 2009-07-07 | Hai Huu Vo | Adaptive DC to DC converter system using a combination of duty cycle and slew rate modulations |
KR101248605B1 (en) * | 2006-10-13 | 2013-03-28 | 페어차일드코리아반도체 주식회사 | Switching mode power supply and the driving method thereof |
CA2567462A1 (en) * | 2006-11-08 | 2008-05-08 | Ivan Meszlenyi | Spike converter |
GB0622898D0 (en) * | 2006-11-16 | 2006-12-27 | Liquavista Bv | Driving of electrowetting displays |
US8213193B2 (en) * | 2006-12-01 | 2012-07-03 | O2Micro Inc | Flyback DC-DC converter with feedback control |
KR101345363B1 (en) * | 2007-01-26 | 2013-12-24 | 페어차일드코리아반도체 주식회사 | Converterand the driving method thereof |
US7746050B2 (en) | 2007-04-06 | 2010-06-29 | Power Integrations, Inc. | Method and apparatus for controlling the maximum output power of a power converter |
US7764520B2 (en) * | 2007-04-06 | 2010-07-27 | Power Integrations, Inc. | Method and apparatus for on/off control of a power converter |
US8035254B2 (en) | 2007-04-06 | 2011-10-11 | Power Integrations, Inc. | Method and apparatus for integrated cable drop compensation of a power converter |
US8077486B2 (en) | 2007-04-06 | 2011-12-13 | Power Integrations, Inc. | Method and apparatus for power converter fault condition detection |
US8077483B2 (en) | 2007-04-06 | 2011-12-13 | Power Integrations, Inc. | Method and apparatus for sensing multiple voltage values from a single terminal of a power converter controller |
US7990127B2 (en) * | 2008-03-14 | 2011-08-02 | Power Integrations, Inc. | Method and apparatus for AC to DC power conversion with reduced harmonic current |
GB2460266A (en) * | 2008-05-23 | 2009-11-25 | Cambridge Semiconductor Ltd | Estimating conduction times of a switch mode power supply transformer |
KR101445842B1 (en) * | 2008-05-29 | 2014-10-01 | 페어차일드코리아반도체 주식회사 | A converter |
US7876583B2 (en) * | 2008-12-22 | 2011-01-25 | Power Integrations, Inc. | Flyback power supply with forced primary regulation |
US8149600B2 (en) * | 2009-05-22 | 2012-04-03 | Infineon Technologies Ag | System and method for ringing suppression in a switched mode power supply |
US8098506B2 (en) | 2009-06-02 | 2012-01-17 | Power Integrations, Inc. | Single-stage power supply with power factor correction and constant current output |
US8213187B2 (en) * | 2009-10-14 | 2012-07-03 | Power Integrations, Inc. | Method and apparatus for high-side input winding regulation |
US9178415B1 (en) | 2009-10-15 | 2015-11-03 | Cirrus Logic, Inc. | Inductor over-current protection using a volt-second value representing an input voltage to a switching power converter |
JP2011091925A (en) * | 2009-10-21 | 2011-05-06 | Panasonic Corp | Switching power supply unit |
US8213192B2 (en) * | 2009-12-30 | 2012-07-03 | Silicon Laboratories Inc. | Primary side sensing for isolated fly-back converters |
US8299730B2 (en) | 2010-02-09 | 2012-10-30 | Power Integrations, Inc. | Integrated on-time extension for non-dissipative bleeding in a power supply |
US8553439B2 (en) | 2010-02-09 | 2013-10-08 | Power Integrations, Inc. | Method and apparatus for determining zero-crossing of an AC input voltage to a power supply |
US9330826B1 (en) | 2010-02-12 | 2016-05-03 | The Board Of Trustees Of The University Of Alabama For And On Behalf Of The University Of Alabama | Integrated architecture for power converters |
CN101841250B (en) * | 2010-04-27 | 2012-08-15 | 上海新进半导体制造有限公司 | Switching power supply control circuit and primary winding-controlled flyback switching power supply |
US9263950B2 (en) | 2010-04-30 | 2016-02-16 | The Board Of Trustees Of The University Of Alabama | Coupled inductors for improved power converter |
US9510401B1 (en) | 2010-08-24 | 2016-11-29 | Cirrus Logic, Inc. | Reduced standby power in an electronic power control system |
WO2012062802A2 (en) | 2010-11-09 | 2012-05-18 | Zentrum Mikroelektronik Dresden Ag | Method and for generating pwm signals and a pulse width modulation power converter |
CN103636109B (en) * | 2011-06-03 | 2016-08-17 | 塞瑞斯逻辑公司 | For operating method and apparatus and the electric power distribution system of switched power transducer |
EP2573921B1 (en) | 2011-09-22 | 2020-05-06 | Nxp B.V. | A controller for a switched mode power supply |
US9420645B2 (en) | 2012-05-17 | 2016-08-16 | Dialog Semiconductor Inc. | Constant current control buck converter without current sense |
US8975887B2 (en) | 2012-07-08 | 2015-03-10 | R2 Semiconductor, Inc. | Suppressing oscillations in an output of a switched power converter |
US10199950B1 (en) | 2013-07-02 | 2019-02-05 | Vlt, Inc. | Power distribution architecture with series-connected bus converter |
US10958176B2 (en) * | 2013-10-14 | 2021-03-23 | Texas Instruments Incorporated | Systems and methods of CCM primary-side regulation |
US20150214843A1 (en) * | 2014-01-28 | 2015-07-30 | Chicony Power Technology Co., Ltd. | Reboost power conversion apparatus having flyback mode |
US9312765B2 (en) * | 2014-02-12 | 2016-04-12 | Qualcomm, Incorporated | Switch mode power supply including binary pulse skipping |
DE102014204127A1 (en) * | 2014-03-06 | 2015-09-10 | Tridonic Gmbh & Co Kg | LED driver |
EP3010151B1 (en) * | 2014-10-14 | 2020-09-02 | Apple Inc. | Method and apparatus for a buck converter with pulse width modulation and pulse frequency modulation mode |
EP3512087B1 (en) | 2018-01-12 | 2023-01-25 | STMicroelectronics S.r.l. | A galvanically isolated dc-dc converter circuit with data communication, corresponding system and corresponding method |
IT201800004174A1 (en) * | 2018-04-03 | 2019-10-03 | GALVANIC INSULATION CIRCUIT AND SYSTEM, CORRESPONDING PROCEDURE | |
WO2021020392A1 (en) * | 2019-07-31 | 2021-02-04 | 株式会社デンソー | Signal transmission device |
US11689101B2 (en) * | 2020-11-12 | 2023-06-27 | Psemi Corporation | Mixed-mode power converter control |
US11594965B2 (en) | 2020-12-14 | 2023-02-28 | Psemi Corporation | Power converter counter circuit with under-regulation detector |
Family Cites Families (46)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4589051A (en) * | 1983-12-22 | 1986-05-13 | General Electric Company | Second breakdown protection circuit for X-ray generator inverter |
US4597026A (en) * | 1983-12-22 | 1986-06-24 | General Electric Company | Inverter variable dead time for X-ray generator |
JPS6439268A (en) * | 1987-07-31 | 1989-02-09 | Toko Inc | Switching power circuit |
US5028861A (en) * | 1989-05-24 | 1991-07-02 | Motorola, Inc. | Strobed DC-DC converter with current regulation |
US4975820A (en) * | 1989-09-01 | 1990-12-04 | National Semiconductor Corporation | Adaptive compensating ramp generator for current-mode DC/DC converters |
DE4122945A1 (en) * | 1991-07-11 | 1993-01-14 | Philips Patentverwaltung | MICROPROCESSOR CONTROLLED DC CONVERTER |
US5189599A (en) * | 1991-08-14 | 1993-02-23 | Zenith Electronics Corporation | High voltage regulator for an integrated horizontal sweep system |
US5146398A (en) * | 1991-08-20 | 1992-09-08 | Led Corporation N.V. | Power factor correction device provided with a frequency and amplitude modulated boost converter |
US5305192A (en) | 1991-11-01 | 1994-04-19 | Linear Technology Corporation | Switching regulator circuit using magnetic flux-sensing |
US5313381A (en) * | 1992-09-01 | 1994-05-17 | Power Integrations, Inc. | Three-terminal switched mode power supply integrated circuit |
US5285366A (en) * | 1992-09-24 | 1994-02-08 | Northern Telecom Limited | Current limit circuit in current mode power supplies |
GB9302942D0 (en) * | 1993-02-13 | 1993-03-31 | Attwood Brian E | Low cost,low current power supply |
US5570276A (en) * | 1993-11-15 | 1996-10-29 | Optimun Power Conversion, Inc. | Switching converter with open-loop input voltage regulation on primary side and closed-loop load regulation on secondary side |
US5815380A (en) * | 1993-11-16 | 1998-09-29 | Optimum Power Conversion, Inc. | Switching converter with open-loop primary side regulation |
US5479090A (en) * | 1993-11-24 | 1995-12-26 | Raytheon Company | Power converter having optimal dynamic operation |
US5565761A (en) * | 1994-09-02 | 1996-10-15 | Micro Linear Corp | Synchronous switching cascade connected offline PFC-PWM combination power converter controller |
US5909106A (en) | 1994-11-06 | 1999-06-01 | U.S. Philips Corporation | Control signal for a voltage generator for an LCD screen control circuit |
US5747977A (en) * | 1995-03-30 | 1998-05-05 | Micro Linear Corporation | Switching regulator having low power mode responsive to load power consumption |
US5680034A (en) * | 1995-09-22 | 1997-10-21 | Toko, Inc. | PWM controller for resonant converters |
JPH09140145A (en) * | 1995-11-15 | 1997-05-27 | Samsung Electron Co Ltd | Boosting converter provided with power-factor compensating circuit |
JP3307814B2 (en) * | 1995-12-15 | 2002-07-24 | 株式会社日立製作所 | DC power supply |
US5804950A (en) * | 1996-06-20 | 1998-09-08 | Micro Linear Corporation | Input current modulation for power factor correction |
KR100206143B1 (en) * | 1996-08-28 | 1999-07-01 | 윤종용 | A power factor correction circuit |
US5886586A (en) * | 1996-09-06 | 1999-03-23 | The Regents Of The University Of California | General constant frequency pulse-width modulators |
US5831418A (en) * | 1996-12-03 | 1998-11-03 | Fujitsu Ltd. | Step-up/down DC-to-DC converter |
US5892355A (en) * | 1997-03-21 | 1999-04-06 | Pansier; Frans | Current and voltage-sensing |
EP0922323B1 (en) | 1997-03-27 | 2002-10-30 | Koninklijke Philips Electronics N.V. | Digitally controlled switched-mode voltage converter |
US5822200A (en) * | 1997-04-21 | 1998-10-13 | Nt International, Inc. | Low level, high efficiency DC/DC converter |
US5841643A (en) * | 1997-10-01 | 1998-11-24 | Linear Technology Corporation | Method and apparatus for isolated flyback regulator control and load compensation |
JP3688448B2 (en) * | 1997-10-02 | 2005-08-31 | 富士通株式会社 | Switching power supply |
US6020729A (en) * | 1997-12-16 | 2000-02-01 | Volterra Semiconductor Corporation | Discrete-time sampling of data for use in switching regulators |
US5828558A (en) * | 1998-02-11 | 1998-10-27 | Powerdsine, Ltd. | PWN controller use with open loop flyback type DC to AC converter |
US6049471A (en) * | 1998-02-11 | 2000-04-11 | Powerdsine Ltd. | Controller for pulse width modulation circuit using AC sine wave from DC input signal |
JP2000116027A (en) | 1998-03-10 | 2000-04-21 | Fiderikkusu:Kk | Power supply device |
US5862045A (en) * | 1998-04-16 | 1999-01-19 | Motorola, Inc. | Switched mode power supply controller and method |
US6222437B1 (en) * | 1998-05-11 | 2001-04-24 | Nidec America Corporation | Surface mounted magnetic components having sheet material windings and a power supply including such components |
US6307356B1 (en) * | 1998-06-18 | 2001-10-23 | Linear Technology Corporation | Voltage mode feedback burst mode circuit |
EP1022844A3 (en) * | 1999-01-19 | 2002-04-17 | Matsushita Electric Industrial Co., Ltd. | Power supply device and air conditioner using the same |
US6115274A (en) * | 1999-06-01 | 2000-09-05 | Lucent Technologies Inc. | Frequency modulation controller for single-switch, polyphase, DCM boost converter and method of operation thereof |
US6087816A (en) * | 1999-06-29 | 2000-07-11 | Maxim Integrated Products, Inc. | Step-up/step-down switching regulators and pulse width modulation control therefor |
US6246220B1 (en) * | 1999-09-01 | 2001-06-12 | Intersil Corporation | Synchronous-rectified DC to DC converter with improved current sensing |
DE60032722T2 (en) * | 2000-02-11 | 2007-11-15 | Semiconductor Components Industries, LLC, Phoenix | Switch mode power supply with programmable pulse suppression mode |
US6275018B1 (en) * | 2000-06-02 | 2001-08-14 | Iwatt | Switching power converter with gated oscillator controller |
US6304473B1 (en) * | 2000-06-02 | 2001-10-16 | Iwatt | Operating a power converter at optimal efficiency |
US6396250B1 (en) * | 2000-08-31 | 2002-05-28 | Texas Instruments Incorporated | Control method to reduce body diode conduction and reverse recovery losses |
US6597159B2 (en) * | 2001-08-15 | 2003-07-22 | System General Corp. | Pulse width modulation controller having frequency modulation for power converter |
-
2002
- 2002-11-27 US US10/306,719 patent/US6900995B2/en not_active Expired - Lifetime
- 2002-11-27 AU AU2002354249A patent/AU2002354249A1/en not_active Abandoned
- 2002-11-27 US US10/306,728 patent/US6862198B2/en not_active Expired - Fee Related
- 2002-11-27 WO PCT/US2002/038255 patent/WO2003047079A2/en not_active Application Discontinuation
-
2005
- 2005-04-04 US US11/099,281 patent/US20050169017A1/en not_active Abandoned
Cited By (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100218003A1 (en) * | 2005-06-16 | 2010-08-26 | Agere Systems Inc. | Transformerless power over ethernet system |
US8132027B2 (en) | 2005-06-16 | 2012-03-06 | Agere Systems Inc. | Transformerless power over ethernet system |
US7685440B2 (en) | 2005-07-21 | 2010-03-23 | Agere Systems Inc. | Switch with fully isolated power sourcing equipment control |
US20070019445A1 (en) * | 2005-07-21 | 2007-01-25 | Matthew Blaha | Switch with fully isolated power sourcing equipment control |
US7310244B2 (en) * | 2006-01-25 | 2007-12-18 | System General Corp. | Primary side controlled switching regulator |
US20080037294A1 (en) * | 2006-05-23 | 2008-02-14 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US8446746B2 (en) | 2006-05-23 | 2013-05-21 | Cambridge Semiconductor Limited | Switch mode power supply controller with feedback signal decay sensing |
WO2007135452A1 (en) * | 2006-05-23 | 2007-11-29 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US20070274107A1 (en) * | 2006-05-23 | 2007-11-29 | Garner David M | Switch mode power supply controllers |
US7944722B2 (en) | 2006-05-23 | 2011-05-17 | Cambridge Semiconductor Limited | Switch mode power supply controller with feedback signal decay sensing |
US20100246216A1 (en) * | 2006-05-23 | 2010-09-30 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US20070274106A1 (en) * | 2006-05-23 | 2007-11-29 | David Robert Coulson | Switch mode power supply controllers |
US7447049B2 (en) | 2006-05-23 | 2008-11-04 | Cambridge Semiconductor Limited | Single ended flyback power supply controllers with integrator to integrate the difference between feedback signal a reference signal |
US7499295B2 (en) | 2006-05-23 | 2009-03-03 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US20090237960A1 (en) * | 2006-05-23 | 2009-09-24 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US7551460B2 (en) | 2006-05-23 | 2009-06-23 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US7567445B2 (en) | 2006-05-23 | 2009-07-28 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US7248487B1 (en) | 2006-06-01 | 2007-07-24 | Cambridge Semiconductor Limited | Switch mode power supply controllers |
US7583519B2 (en) | 2006-07-07 | 2009-09-01 | Cambridge Semiconductor Limited | Switch mode power supply systems |
US20080007982A1 (en) * | 2006-07-07 | 2008-01-10 | Johan Piper | Switch mode power supply systems |
US7525823B2 (en) | 2006-07-07 | 2009-04-28 | Cambridge Semiconductor Limited | Switch mode power supply systems |
US20080137380A1 (en) * | 2006-07-07 | 2008-06-12 | Cambridge Semiconductor Limited | Switch mode power supply systems |
US20080007977A1 (en) * | 2006-07-07 | 2008-01-10 | Johan Piper | Switch mode power supply systems |
US7342812B2 (en) | 2006-07-07 | 2008-03-11 | Cambridge Semiconductor Limited | Switch mode power supply systems |
US7643315B2 (en) | 2006-08-22 | 2010-01-05 | Agere Systems, Inc. | Programmable feedback voltage pulse sampling for switched power supplies |
US20090073734A1 (en) * | 2006-08-22 | 2009-03-19 | Mathew Blaha | Programmable feedback voltage pulse sampling for switched power supplies |
US20080080105A1 (en) * | 2006-09-29 | 2008-04-03 | Agere Systems Inc. | Isolated switched maintain power signature (mps) and fault monitoring for power over ethernet |
US7843670B2 (en) | 2006-09-29 | 2010-11-30 | Agere Systems Inc. | Isolated switched maintain power signature (MPS) and fault monitoring for power over Ethernet |
US7996166B2 (en) | 2007-03-26 | 2011-08-09 | Agere Systems Inc. | Isolated capacitive signature detection for powered devices |
US7643320B2 (en) | 2007-03-28 | 2010-01-05 | Agere Systems Inc. | Isolated resistive signature detection for powered devices |
US7738271B1 (en) | 2007-06-08 | 2010-06-15 | Science Applications International Corporation | Controlled resonant charge transfer device |
US20110063879A1 (en) * | 2009-09-11 | 2011-03-17 | Panasonic Corporation | Switching power supply device and semiconductor device |
US8451635B2 (en) * | 2009-09-11 | 2013-05-28 | Panasonic Corporation | Switching power supply device having a constant voltage characteristic and semiconductor device |
CN103780093A (en) * | 2012-10-19 | 2014-05-07 | 光宝科技股份有限公司 | Switching-type power supply unit |
US9444331B2 (en) | 2013-07-29 | 2016-09-13 | Infineon Technologies Ag | System and method for a converter circuit |
US20150204923A1 (en) * | 2014-01-17 | 2015-07-23 | Fairchild Korea Semiconductor Ltd. | Output current estimating method and power supply device using the same |
US9825541B2 (en) * | 2014-01-17 | 2017-11-21 | Fairchild Korea Semiconductor Ltd. | Output current estimating method and power supply device using the same |
US9941797B2 (en) | 2014-01-17 | 2018-04-10 | Semiconductor Components Industries, Llc | Switch control circuit and power supply device including the same |
Also Published As
Publication number | Publication date |
---|---|
US6862198B2 (en) | 2005-03-01 |
US20040052095A1 (en) | 2004-03-18 |
WO2003047079A2 (en) | 2003-06-05 |
AU2002354249A1 (en) | 2003-06-10 |
US20040037094A1 (en) | 2004-02-26 |
US6900995B2 (en) | 2005-05-31 |
AU2002354249A8 (en) | 2003-06-10 |
WO2003047079A3 (en) | 2004-01-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6900995B2 (en) | PWM power converter controlled by transistion detection of a comparator error signal | |
US6882552B2 (en) | Power converter driven by power pulse and sense pulse | |
US6894911B2 (en) | Method of driving a power converter by using a power pulse and a sense pulse | |
WO2004051834A1 (en) | Digital regulation of power converters using primary-only feedback | |
US10284096B2 (en) | Current converter with control on the primary winding side and compensation of the propagation delay | |
US6304473B1 (en) | Operating a power converter at optimal efficiency | |
US7499295B2 (en) | Switch mode power supply controllers | |
US8970198B2 (en) | Switch-mode power supply having reduced audible noise | |
CN103036438B (en) | Peak current regulation system and method used in power conversion system | |
CN102341762B (en) | Power control for transition between multiple modulation modes | |
US7817447B2 (en) | Accurate voltage regulation of a primary-side regulation power supply in continuous conduction mode operation | |
US7551460B2 (en) | Switch mode power supply controllers | |
CN102801325B (en) | System and method for regulating switching frequency and peak current of power converter | |
US8238123B2 (en) | Frequency limitation method with time hysteresis used in quasi-resonant control | |
US7248487B1 (en) | Switch mode power supply controllers | |
CN108377092B (en) | Isolated power converter and control method thereof | |
US20050024898A1 (en) | Primary-side controlled flyback power converter | |
JP2003169469A (en) | Dc-dc converter | |
US10978956B2 (en) | Apparatus and method for a dual output resonant converter to ensure full power range for both outputs | |
US11601044B2 (en) | Method for driving an electronic switch in a power converter circuit and control circuit | |
US11165353B2 (en) | Apparatus and method for adaptively setting the proper range for the VCM control variable based upon clipping of the main regulation loop | |
US6977830B2 (en) | Power supply apparatus | |
WO2007135454A1 (en) | Switch mode power supply controllers | |
GB2438462A (en) | Regulating the output of a switch mode power supply | |
CN103986336A (en) | Peak current regulating system and method used in source transformation system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |
|
AS | Assignment |
Owner name: DIALOG SEMICONDUCTOR, INC., CALIFORNIA Free format text: CHANGE OF NAME;ASSIGNOR:IWATT INC.;REEL/FRAME:032391/0234 Effective date: 20140217 |
|
AS | Assignment |
Owner name: DIALOG SEMICONDUCTOR INC., CALIFORNIA Free format text: CHANGE OF NAME;ASSIGNOR:DIALOG SEMICONDUCTOR, INC.;REEL/FRAME:032427/0733 Effective date: 20140219 |