US20060033112A1 - Substrate for light emitting diodes - Google Patents

Substrate for light emitting diodes Download PDF

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Publication number
US20060033112A1
US20060033112A1 US11/234,201 US23420105A US2006033112A1 US 20060033112 A1 US20060033112 A1 US 20060033112A1 US 23420105 A US23420105 A US 23420105A US 2006033112 A1 US2006033112 A1 US 2006033112A1
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Prior art keywords
substrate
metal bases
insulation layer
led
circuit patterns
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Abandoned
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US11/234,201
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Hiroto Isoda
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Individual
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/642—Heat extraction or cooling elements characterized by the shape

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)
  • Structure Of Printed Boards (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

A substrate has a pair of metal bases, and a first heat insulation layer disposed between the metal bases. A second heat insulation layer is securely mounted on the metal bases, and a pair of circuit patterns are securely mounted on the second heat insulation layer for mounting an LED.

Description

  • This application is a continuation of Ser. No. 10/823,594 filed Apr. 21, 2004, which is a continuation of Ser. No. 10/411,134, filed Apr. 11, 2003, now U.S. Pat. No. 6,740,903.
    • BACKGROUND OF THE INVENTION
  • The present invention relates to a substrate for a light emitting diode (LED) used in an electronic instrument such as a portable telephone.
  • In recent years, it is required that the substrate for the LED has a high heat radiation property, heat-resistant property and high mechanical strength in accordance with the tendencies of a high performance, multifunction, small size of the electronic instrument.
  • FIG. 15 is a perspective view showing a conventional substrate for an LED. The substrate comprises a metal base 51 made of copper or aluminum, an insulation layer of prepreg adhered on the metal base 51, circuit patterns 53 and 54 made of copper foil on which gold is plated. An LED 70 is mounted on the circuit pattern 53 and connected to the circuit pattern 54 by a wire 71.
  • The metal base 51 has a high heat radiation property.
  • FIG. 16 is another conventional perspective view of a double face substrate. The substrate comprises a pair of metal bases 61 made of copper, an insulation member 63 between the metal bases 61, insulation layers 62 of prepreg adhered to both sides of the metal bases 61, circuit patterns 64 a and 64 b made of copper foil on which gold is plated. An LED 72 is mounted on the circuit pattern 64 a and connected to the circuit pattern 64 b by a wire.
  • In the substrate of FIG. 15, circuit patterns can not be provided on the underside of the metal base 51. In the substrate of FIG. 16, since the insulation layer 62 is provided on the underside of the metal bases 61, the heat radiation property is insufficient.
    • SUMMARY OF THE INVENTION
  • An object of the present invention is to provide a substrate having a high heat radiation property.
  • According to the present invention, there is provided a substrate comprising a pair of metal bases, a first heat insulation layer disposed between the metal bases, a second heat insulation layer securely mounted on the metal bases, and mounting means for mounting an LED on the substrate.
  • The mounting means comprises a pair of circuit patterns securely mounted on the second heat insulation layer, the LED is securely mounted on both the circuit patterns.
  • In another aspect, the mounting means comprises a hole formed in the second heat insulation layer to expose surfaces of metal bases, the LED is securely mounted on both the metal bases.
  • The substrate further comprises upper and lower electrodes provided on an upper surface of the circuit patterns and on undersides of the metal bases.
  • One of the metal bases is different from the other metal base in size of a sectional shape.
  • These and other objects and features of the present invention will become more apparent from the following detailed description with reference to the accompanying drawings.
    • BRIEF DESCRIPTION OF DRAWINGS
  • FIG. 1 is a perspective view of a substrate according to a first embodiment of the present invention;
  • FIGS. 2 and 3 are perspective views showing a preparation of metal bases;
  • FIGS. 4 through 9 are perspective views showing a method for manufacturing the substrate;
  • FIG. 10 is a perspective view showing a substrate according to a second embodiment;
  • FIGS. 11 through 13 are perspective views showing a manufacturing method of the substrate of the second embodiment;
  • FIG. 14 is a perspective view showing a substrate according to a third embodiment;
  • FIG. 15 is a perspective view showing a conventional substrate for an LED; and
  • FIG. 16 is a perspective view showing another substrate.
    • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
  • FIG. 1 is a perspective view of a substrate according to a first embodiment of the present invention.
  • The substrate comprises a pair of metal bases 1 a and 1 b made of copper, each having a cubic shape, a first electrical insulation layer 2 of prepreg between the metal bases 1 a and 1 b, a second electrical insulation layer 3 of prepreg adhered to the metal bases 1 a and 1 b, a pair of circuit patterns 4 a and 4 b made of copper foil provided on the second insulation layer 3. On the circuit patterns 4 a and 4 b, electrodes 6 a are formed by gold plating, and terminal electrodes 6 b are formed on the underside of metal bases. An LED 40 is securely mounted on both the circuit patterns 4 a and 4 b.
  • The LED 40 on the circuit patterns 4 a and 4 b is connected to the terminal electrodes 6 a and 6 b by through holes 5 passing through the metal bases 1 a and 1 b.
  • Dimensions of the substrate, for example, are as shown in FIG. 1.
  • Since the metal base is made of copper having a high heat conductivity, and there is not provided a heat insulation layer on the underside of the metal base, the substrate is excellent in heat radiation property. Therefore, an LED device using the substrate is properly used in the LED requiring a high current.
  • FIGS. 2 and 3 are perspective views showing a preparation of metal bases. A plurality of metal base aggregations 101 and first heat insulation layer aggregations 102 are prepared. As shown in FIG. 3, a pair of metal base aggregations 101 and the insulation layer aggregation are adhered by heat compression, thereby providing a set plate 105.
  • Referring to FIG. 4, a plurality of set plates 105 are arranged between guide plates 106, interposing a gap 105 a between adjacent set plates 105. Next, the set plates 105 and guide plates 106 are cut along cutting lines 107, so that a set plate aggregation 108 is provided as shown in FIG. 5.
  • Referring to FIG. 6, a second heat insulation layer aggregation 103 and a circuit pattern layer aggregation 104 are mounted on the set plate aggregation 108 and adhered by heat compression to form an aggregation 109.
  • Next, as shown in FIG. 7, the circuit pattern layer aggregation 104 is cut by etching to form a plurality of grooves 104 a, thereby separating the aggregation 104 into first and second circuit pattern aggregations 104F and 104S. Further, the aggregation 104 is cut to form grooves 104 b corresponding to the gaps 105 a. In addition, a plurality of through holes 5 are formed in both aggregations 104F and 104S.
  • As shown in FIG. 8, the substrate of the aggregation 109 is covered by gold plating to form electrodes 6 a and 6 b. At that time, the gold enters through holes to connect the upper and lower electrodes 6 a and 6 b.
  • Finally, as shown in FIG. 9, the guide plates 106 are cut off, and the aggregation 109 is separated into unit substrates.
  • FIG. 10 is a perspective view showing a substrate according to a second embodiment.
  • The substrate comprises a pair of metal bases 11 a and 11 b made of copper, a first electrical insulation layer 12 of prepreg between the metal bases 11 a and 11 b, a second electrical insulation layer 13 of prepreg adhered to the metal bases 11 a and 11 b. The insulation layer 13 has a central hole 13 a. An LED 20 is mounted on both the metal bases 11 a and 11 b in the central hole 13 a.
  • Since the LED 20 is directly mounted on the metal bases 11 a and 11 b, the heat radiation property is high.
  • The manufacturing method is the same as the steps of FIGS. 2 through 5 of the first embodiment.
  • Referring to FIG. 11, a second electrical insulation layer aggregation 203 having a plurality of central holes 13 a is mounted on the set plate aggregation 108 and adhered by heat compression to form an aggregation 209.
  • Next, as shown in FIG. 12, the second heat insulation layer aggregation 203 is cut at the gap 105 a by cutting to form a plurality of grooves, thereby separating the aggregation 203.
  • As shown in FIG. 13, the guide plates 106 are cut off, and the aggregation 209 is separated into unit substrates.
  • FIG. 14 is a perspective view showing a substrate according to a third embodiment of the present invention.
  • The substrate comprises a pair of metal bases 30 a and 30 b made of copper, a first electrical insulation layer 31 of prepreg between the metal bases 30 a and 30 b, a second electrical insulation layer 32 of prepreg adhered to the metal bases 30 a and 30 b, a pair of circuit patterns 33 a and 33 b made of copper foil provided on the second insulation layer 32. An LED 35 is mounted on both the circuit patterns 33 a and 33 b.
  • The LED 35 on the circuit patterns 33 a and 33 b is connected to the metal bases 30 a and 30 b by through holes 36.
  • In the substrate of the third embodiment, the sizes of the metal bases 30 a and 30 b are different in sectional shape, thereby deflecting the position of the first electrical insulation layer from the center line.
  • The coefficient of the thermal expansion of the first electrical insulation layer 31 in the thickness direction is high, so that the positions of the metal bases 30 a and 30 b are deflected, which may generate stress in the LED 35.
  • However, since the thermal expansion coefficient of the second electrical insulation layer 32 in the plane direction is small, the metal bases are prevented from deflecting, thereby preventing the generation of the stress in the LED.
  • Furthermore, since the first heat insulation layer 31 is eccentric, the influence of thermal expansion of the first electrical insulation layer is reduced.
  • In accordance with the present invention, a substrate is excellent in heat radiation performance, heat insulation performance and rely can by obtained.
  • While the invention has been described in conjunction with preferred specific embodiment thereof, it will be understood that this description is intended to illustrate and not limit the scope of the invention, which is defined by the following claims.

Claims (5)

1. A substrate comprising:
a pair of metal bases;
a first electrical insulation layer disposed between the metal bases;
a second electrical insulation layer securely mounted on the metal bases; and
mounting means for mounting an LED on the substrate.
2. The substrate according to claim 1 wherein the mounting means comprises a pair of circuit patterns securely mounted on the second electrical insulation layer, the LED is securely mounted on both the circuit patterns.
3. The substrate according to claim 1 wherein the mounting means comprises a hole formed in the second electrical insulation layer to expose surfaces of metal bases, the LED is securely mounted on the metal bases.
4. The substrate according to claim 2 further comprising upper and lower electrodes provided on an upper surface of the circuit patterns and on undersides of the metal bases.
5. The substrate according to claim 2 wherein one of the metal bases is different from the other metal base in size of sectional shape.
US11/234,201 2002-04-15 2005-09-26 Substrate for light emitting diodes Abandoned US20060033112A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/234,201 US20060033112A1 (en) 2002-04-15 2005-09-26 Substrate for light emitting diodes

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2002-112645 2002-04-15
JP2002112645A JP2003309292A (en) 2002-04-15 2002-04-15 Metal core substrate of surface mounting light emitting diode and its manufacturing method
US10/411,134 US6740903B2 (en) 2002-04-15 2003-04-11 Substrate for light emitting diodes
US10/823,594 US20040195581A1 (en) 2002-04-15 2004-04-14 Substrate for light emitting diodes
US11/234,201 US20060033112A1 (en) 2002-04-15 2005-09-26 Substrate for light emitting diodes

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US10/823,594 Continuation US20040195581A1 (en) 2002-04-15 2004-04-14 Substrate for light emitting diodes

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US20060033112A1 true US20060033112A1 (en) 2006-02-16

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US10/411,134 Expired - Fee Related US6740903B2 (en) 2002-04-15 2003-04-11 Substrate for light emitting diodes
US10/823,594 Abandoned US20040195581A1 (en) 2002-04-15 2004-04-14 Substrate for light emitting diodes
US11/234,201 Abandoned US20060033112A1 (en) 2002-04-15 2005-09-26 Substrate for light emitting diodes

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US10/411,134 Expired - Fee Related US6740903B2 (en) 2002-04-15 2003-04-11 Substrate for light emitting diodes
US10/823,594 Abandoned US20040195581A1 (en) 2002-04-15 2004-04-14 Substrate for light emitting diodes

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JP (1) JP2003309292A (en)
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Cited By (5)

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US20070096129A1 (en) * 2005-10-27 2007-05-03 Lg Innotek Co., Ltd Light emitting diode package and method of manufacturing the same
KR101192183B1 (en) 2010-11-26 2012-10-17 (주)포인트엔지니어링 LED pakage, metal submount for LED package and fabricating method thereof
US9018651B2 (en) 2011-12-15 2015-04-28 Point Engineering Co., Ltd. Optical device integrated with driving circuit and power supply circuit, method for manufacturing optical device substrate used therein, and substrate thereof
US9666558B2 (en) 2015-06-29 2017-05-30 Point Engineering Co., Ltd. Substrate for mounting a chip and chip package using the substrate
US9847462B2 (en) 2013-10-29 2017-12-19 Point Engineering Co., Ltd. Array substrate for mounting chip and method for manufacturing the same

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JP2003309292A (en) * 2002-04-15 2003-10-31 Citizen Electronics Co Ltd Metal core substrate of surface mounting light emitting diode and its manufacturing method
US7264378B2 (en) * 2002-09-04 2007-09-04 Cree, Inc. Power surface mount light emitting die package
US7775685B2 (en) * 2003-05-27 2010-08-17 Cree, Inc. Power surface mount light emitting die package
US7244965B2 (en) * 2002-09-04 2007-07-17 Cree Inc, Power surface mount light emitting die package
JP4925296B2 (en) * 2004-12-28 2012-04-25 パナソニック株式会社 Method for manufacturing high thermal conductivity circuit module and high thermal conductivity circuit module
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US7980743B2 (en) 2005-06-14 2011-07-19 Cree, Inc. LED backlighting for displays
US7339196B2 (en) * 2005-06-25 2008-03-04 Industrial Technology Research Institute Packaging of SMD light emitting diodes
US20080151562A1 (en) * 2005-11-02 2008-06-26 Hwa Su Fabrication structure for light emitting diode component
KR101171186B1 (en) * 2005-11-10 2012-08-06 삼성전자주식회사 High luminance light emitting diode and liquid crystal display panel of using the same
US7791096B2 (en) * 2007-06-08 2010-09-07 Koninklijke Philips Electronics N.V. Mount for a semiconductor light emitting device
DE102007052821B4 (en) * 2007-11-06 2012-10-04 Osram Opto Semiconductors Gmbh Method for producing a subcarrier and an optoelectronic component
JP5408583B2 (en) * 2008-06-30 2014-02-05 Ｎｅｃライティング株式会社 LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE MANUFACTURING METHOD
KR101067822B1 (en) * 2009-03-13 2011-09-27 안복만 Light emitting device package and manufacturing method the same
US8860043B2 (en) * 2009-06-05 2014-10-14 Cree, Inc. Light emitting device packages, systems and methods
JP5485642B2 (en) * 2009-10-06 2014-05-07 シチズン電子株式会社 Light emitting diode and manufacturing method thereof
KR101192181B1 (en) 2010-03-31 2012-10-17 (주)포인트엔지니어링 Optical Element Device and Fabricating Method Thereof
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DE10317328B4 (en) 2009-08-06
US20040195581A1 (en) 2004-10-07
US6740903B2 (en) 2004-05-25
CN1242496C (en) 2006-02-15
CN1452255A (en) 2003-10-29

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