US20060055080A1 - Semiconductor package having flash-free contacts and techniques for manufacturing the same - Google Patents
Semiconductor package having flash-free contacts and techniques for manufacturing the same Download PDFInfo
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- US20060055080A1 US20060055080A1 US11/267,719 US26771905A US2006055080A1 US 20060055080 A1 US20060055080 A1 US 20060055080A1 US 26771905 A US26771905 A US 26771905A US 2006055080 A1 US2006055080 A1 US 2006055080A1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/17—Component parts, details or accessories; Auxiliary operations
- B29C45/26—Moulds
- B29C45/37—Mould cavity walls, i.e. the inner surface forming the mould cavity, e.g. linings
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- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C2045/1486—Details, accessories and auxiliary operations
- B29C2045/14934—Preventing penetration of injected material between insert and adjacent mould wall
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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Abstract
Techniques for forming packaged semiconductor devices having top surfaces with flash-free electrical contact surfaces are described. According to one aspect, a molding cavity is provided which has a molding surface that is sufficiently smooth such that when placed in contact with an electrically conductive contact, gaps between the conductive contact and the mold cavity surface do not form.
Description
- This is a Divisional application of co-pending prior U.S. application Ser. No. 10/274,056 (Atty. Dkt. No. NSC1P245/P05326), entitled “TECHINIQUES FOR MANUFACTURING FLASH-FREE CONTACTS ON A SEMICONDUCTOR PACKAGE”, filed on Oct. 17, 2002, which is incorporated herein by reference and from which priority under 35 U.S.C. § 120 is claimed.
- This application is related to U.S. Pat. No. 6,364,542, filed May, 9, 2000, entitled “Device and Method for Providing a True Semiconductor to External Fiber Optic Cable Connection,” to U.S. patent application Ser. No. 09/922,598 (Attorney Docket No. NSC1P205), filed Jul. 11, 2001, entitled “Techniques for Joining an Optoelectronic Module to a Semiconductor Package”, to U.S. patent application Ser. No. 09/822,601 (Attorney Docket No. NSC1P212), filed Aug. 14, 2001, entitled “Optical Sub-Assembly for Opto-Electronic Modules”, to U.S. patent application Ser. No. 09/963,039 (Attorney Docket No. NSC1P215), filed Sep. 18, 2001, entitled “Techniques for Attaching Rotated Photonic Devices to an Optical Sub-Assembly in an Optoelectronic Package”, and to U.S. patent application Ser. No. 10/165,711 (Attorney Docket No. NSC1P212X1), filed Jun. 6, 2002, entitled “Ceramic Optical Sub-Assembly for Opto-Electronic Modules,” the content of each of which are hereby incorporated by reference.
- The present invention relates generally to semiconductor packaging processes, and more specifically to manufacturing semiconductor packages having flash-free electrical contact surfaces.
- In conventional semiconductor packaging processes, a resin material is used to encapsulate the semiconductor die. Since these packages need to be connected to printed circuit boards or other devices, it is necessary to avoid depositing the resin on the electrical contact leads. The typical mold cavity does not form a perfect seal with the surfaces and edges of the device enclosed by the cavity. Wherever gaps exist between the mold cavity and the device, there is a potential for resin material to be deposited in unwanted areas. This unwanted layer of mold compound resin, or resin and fillers is called flash. The thickness of the flash can vary from a thickness of a few microns up to a thickness of tens of microns and depends on the composition of the mold compound (e.g. epoxy resin and filler distribution and size), the mold press clamping tonnage, the mold pressure used, and the design of the tool cavity. When flash forms on electrical contact leads, for instance, post-plating operations cannot proceed since metal cannot be deposited on the insulating layer. Typically, flash can be removed by a number of operations such as, but not limited to, sandblasting, wet chemical exposure, and flame-off.
- Flash is especially troubling when implementing the solder uplink concept disclosed in U.S. Pat. No. 6,364,542, “Device and method for providing a true semiconductor die to external fiber optic cable connection”, which is hereby incorporated in its entirety by reference.
FIG. 1 illustrates a cross-sectional view of a stacked molded package as constructed according to current manufacturing techniques. The solder uplink concept, illustrated inFIG. 1 , involves the fabrication of a stacked moldedpackage 100 by connecting amother package 105 to adaughter package 155 throughsolder bump pads 115. The problem is that it has been found that the typical transfer molding operation with standard mold tooling creates a thin flash layer covering some or all of the top surfaces of thesolder bump pads 115 that are intended to be exposed through themolding material 135 on themother package 105.FIG. 2A illustrates an isometric view of the injection molding process. InFIG. 2A , themolding compound 135 is shown flowing across the mother integrated circuit die 110. Note that the insidebottom surface 210 of themold cavity 215 makes contact with the top surface of thesolder balls 115. Note further the formation offlash 200 on the top surface of thesolder balls 115. Specifically,flash 200 is represented wheremolding material 135 flows onto the top surfaces ofsolder balls 115. This occurs because a standard mold chamber has surfaces that are not completely smooth. Typically, a mold chamber surface will have a roughness of approximately 1.2 RA (micron average roughness) or more. The roughness of the mold chamber surface allowsgaps 205 to form between theinside surface 210 of the mold chamber and the top surface of thesolder balls 115. Molding resin and/or fillers seep between insidebottom surface 210 ofmold cavity 215 and the tops of thesolder bump pads 115.FIG. 2B illustrates a magnified view of howmolding material 135 flows intogaps 205 left between insidebottom surface 210 and the surface ofsolder bump pads 115, causingflash 200. In this case, flash is catastrophic since the resin layer prevents good mechanical and electrical contact betweensolder balls 115 onmother package 100 andsolder balls 150 ondaughter package 155. - Unfortunately, conventional means of removing flash are not desirable since they are slow and require additional equipment. It is desirable to develop techniques for creating flash free solder bump contacts on the top surface of semiconductor packages without the use of additional equipment or processing steps. Eliminating flash in the production of the
mother package 100 will simplify the manufacturing steps, reduce costs, and enhance the reliability of the resulting module. - The present invention is directed to an apparatus that satisfies the need to create flash free electrical contacts on the top surface of semiconductor packages without the need for additional equipment or processing steps after the injection molding step. The apparatus includes a molding chamber with a top molding cavity that has an exceptionally smooth inside surface. The smooth surface allows for better contact between the top molding cavity and the tops of the electrical contacts on the top surface of a given semiconductor package, which in turn prevents molding material from flowing between the surface of the molding cavity and the tops of the electrical contacts. The result is that the electrical contacts are substantially flash free after the injection molding step.
- As an apparatus, one embodiment of the present invention includes at least a molding chamber including a bottom molding cavity to support a semiconductor die and a top molding cavity with an inside surface having a surface roughness of approximately less than 1.2 RA.
- As a method, one embodiment of the present invention includes at least providing the apparatus described above, placing a semiconductor device with an array of electrical connectors on its top surface in the apparatus, lowering the top molding cavity onto the semiconductor device such that the molding cavity comes into direct contact with the array of electrical connectors, and injecting molding compound into the molding cavity such that there is no flash formation on the top surfaces of the electrical connectors.
- These and other features and advantages of the present invention will be presented in more detail in the following specification of the invention and the accompanying figures, which illustrate by way of example the principles of the invention.
- The invention, together with further advantages thereof, may best be understood by reference to the following description taken in conjunction with the accompanying drawings in which:
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FIG. 1 illustrates a cross-sectional view of a stacked molded package as constructed according to current manufacturing techniques. -
FIG. 2A illustrates an isometric view of the injection molding process. -
FIG. 2B illustrates a magnified view of how molding material flows into gaps formed between the molding cavity surface and the solder bumps. -
FIG. 3A illustrates a side plan, cross-sectional view of a semiconductor die that is positioned within a molding chamber. -
FIG. 3B illustrates a side-plan, cross-sectional view of semiconductor die that is enclosed within molding chamber. -
FIG. 3C illustrates a magnified view of one of the electrically conductive contacts ofFIG. 3B . -
FIG. 4 illustrates a perspective view of a mother semiconductor package formed after the molding process described inFIGS. 3A and 3B . - While the present invention will be described with reference to a few specific embodiments, the description is illustrative of the invention and not to be construed as limiting the invention. Various modifications to the present invention can be made to the preferred embodiments by those skilled in the art without departing from the true spirit and scope of the invention as defined by the appended claims. It will be noted here that for a better understanding, like components are designated by like reference numerals throughout the various figures.
- The present invention pertains to techniques for forming packaged semiconductor devices having top surfaces with flash-free electrical contact surfaces. The techniques involve using a molding cavity having a surface that is sufficiently smooth such that when placed in contact with an electrically conductive contact, gaps between the conductive contact and the mold cavity surface do not form. Molding material typically seeps into these gaps during molding processes and then cures into flash formations. The present invention prevents flash from forming on contact surfaces by substantially eliminating the gaps between a molding cavity surface and the contact surface.
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FIGS. 3A, 3B and 4 illustrate the process for forming packaged semiconductor devices according to one embodiment of the present invention. First,FIG. 3A illustrates a side plan, cross-sectional view of asemiconductor die 300 that is positioned within amolding chamber 302. Semiconductor die 300 has atop surface 304 that contains contact pads upon which are formed electricallyconductive contacts 306. InFIG. 3A , semiconductor die 300 is mounted onto a die attachpad 308, however, die attachpad 308 is not required in alternative implementations of the present invention.Molding chamber 302 is formed by atop molding cavity 310 and abottom molding cavity 312. - After semiconductor die 300 is placed into
molding chamber 302,top molding cavity 310 is lowered ontobottom molding cavity 312.FIG. 3B illustrates a side-plan, cross-sectional view of semiconductor die 300 that is enclosed withinmolding chamber 302. Astop molding cavity 310 is lowered ontobottom molding cavity 312, topmolding cavity surface 314 comes into contact with electricallyconductive contacts 306 and causescontacts 306 to deform. The substantially flat topmolding cavity surface 314 deforms the top portions of electricallyconductive contacts 306 so that they also have substantially flat surfaces. Electricallyconductive contacts 306 deform because they are typically made of a malleable material. In the embodiment shown, electricallyconductive contacts 306 are solder bumps. - In alternate embodiments, electrically
conductive contacts 306 are already flat prior to contact with topmolding cavity surface 314 oftop molding cavity 312. Furthermore, such electrically conductive contacts need not be malleable. - Top
molding cavity surface 314 oftop molding cavity 310 has a surface roughness of approximately less than 1.2 RA. This extremely smooth surface forms an intimate contact with the tops of the electricallyconductive contacts 306, substantially minimizing the formation of gaps between the topmolding cavity surface 314 of thetop molding cavity 310 and the tops of the electricallyconductive contacts 306. In some embodiments of the invention, RA is approximately equal to or less than 0.5. Further, in some embodiments of the invention, RA is approximately equal to or less than 0.1. Generally, as RA decreases, fewer gaps are formed between topmolding cavity surface 314 and electricallyconductive contacts 306 since topmolding cavity surface 314 will contain fewer surface imperfections such as recesses. Some embodiments of the present invention will employ atop molding cavity 310 having topmolding cavity surface 314 that has been made smooth by the use of standard machine tools. Other embodiments will achieve the same effect by applying a surface coating over topmolding cavity surface 314 that substantially smoothens the surface imperfections. In yet other embodiments, topmolding cavity surface 314 is manufactured to have an average surface roughness of less than 1.2 RA and additionally provided with a surface coating for increased smoothness. Various materials, including metallic materials such as nickel, can be used as a surface coating material. Those skilled in the art will recognize that other means of smoothing topmolding cavity surface 314 oftop molding cavity 310 are also possible. - After semiconductor die 300 and electrically
conductive contacts 306 are enclosed inmolding chamber 302, amolding compound 316 is injected intomolding chamber 302. Because of the intimate contact between insidetop surface 314 and electricallyconductive contacts 306, substantially no molding compound seeps in between topmolding cavity surface 314 andcontacts 306. This is because the intimate contactforces molding compound 316 to preferentially flow around the sides ofcontacts 306 rather than over the top ofcontacts 306. Thus, there is substantially no flash formation on the top surface of the electricallyconductive contacts 306. See magnified view,FIG. 3C , showing a single electricallyconductive contact 306 with substantially no molding compound deposited between topmolding cavity surface 314 and electricallyconductive contacts 306. -
FIG. 4 illustrates a perspective view of amother semiconductor package 400 formed after the molding process described inFIGS. 3A-3C . The curedmolding compound 316 ofsemiconductor package 400 contains integrated circuit die 300, die attachpad 308 and electricallyconductive contacts 306. Due to the constraints of topcavity molding surface 314, electricallyconductive contacts 306 are exposed through the top surface ofmolding material 316. The top surfaces ofcontacts 306 are also flat and coplanar with the top surface of the curedmolding compound 316. Advantageously, the top surfaces of electricallyconductive contacts 306 are substantially flash-free since themolding compound 316 did not flow betweentop cavity surface 314 ofmolding chamber 302 and the top surfaces ofcontacts 306 during the molding process (seeFIG. 3C ). - The advantage of electrically
conductive contacts 306 having substantially flash-free top surfaces of is that the process of attaching a daughter package 155 (as shown inFIG. 1 ) is simplified. This is because it is not necessary to perform post-molding process operations such as sanding, buffering, or cleaning to remove flash from the top surfaces of electricallyconductive contacts 306 before attaching thedaughter package 155. Therefore, processes for attaching a daughter package can begin immediately after the molding process shown inFIG. 3B . - In one embodiment of the present invention, a Towa Model M60 Mold Press (referred to as “Towa press”) is used to carry out the injection molding process. When using the Towa press, it has been found that the settings in Table 1, Operational Settings for Towa Model M60 Mold Press in the Context of the Current Invention, provide acceptable results.
TABLE 1 Operational Settings for Towa Model M60 Mold Press in the Context of the Current Invention. Mold Setting Injection Setting Clamp Pressure Cure Time: 80 sec. Transfer Pressure: Chase Pressure: 0.18 ton 2 tons Mold Temperature: Transfer Speed 1.8 170° C. to 2.0 m/s Clamp Pressure: 18-20 tons - Note that the above settings may vary by as much as ±20% and continue to provide acceptable results. It will be understood by those familiar with the art that the injection molding process described in this application can be carried out by using other mold presses or devices that use different molding compound temperatures, pressures, and flow rates and that the above operational settings are specific to the Towa Model M60 Machine Press.
- The cure time of 80 seconds is mold compound and temperature-dependent. Initiators and catalysts can be added in a number of combinations so to either speed up, or slow down, the reaction time to reach a B-stage state, which is sufficiently rigid to allow for mold removal without damaging the parts for post mold cure. Typically, reaction speed needs to be balanced with the injection speed. A slow injection speed combined with fast reaction will lead to a rapid increase in the compound viscosity, which may lead to a host of flow-induced problems such as wire sweep, voiding, and incomplete fill.
- Mold temperature represents the temperature of the mold compound upon injection into the molding chamber. This is the general mold setting, although some applications may call for settings as low as 150° C. and as high as 200° C. With the latter setting, the mold compound can reach a sufficiently advanced cured state such that post curing is no longer needed.
- Clamp pressure refers to the machine setting to keep the two mold halves clamped shut. This value will be machine and mold-dependent. A production mold will be larger and heavier and will therefore require more clamping tonnage.
- Transfer pressure refers to the hydraulic force applied to the transfer plunger, which presses the molding material into the molding chamber. The plunger typically presses on the molding material, which is held within a chute. The Towa Model M60 uses a cylindrical mold compound pellet that is 14 mm in diameter and which weighs 3.8 gm. This translates into a machine-independent transfer pressure of 1,690 psi (or 1.16 kg/mm2).
- The transfer speed is the speed at which the molding material is transferred into the molding chamber from the chute. Transfer speed controls the shear rate imparted to the mold compound as it flows into the mold cavities. Shear rate is the ratio of flow front velocity over the gap that the front has to flow through. Its unit is inverse sec (s−1). For the same transfer speed, the shear rate will vary as the gap is increased or decreased. In a mold cavity, the key gaps are the cross-section of the runner (from the pot containing the pellet), the gate (opening into the mold cavity), and the cavity upper and lower gaps (delineated by the leadframe or substrate). For a leadless leadframe panel (LLP) mold setting, the shear rates are estimated to be about 380 s−1, 8,100 s−1, 430 s−1 for the runner, gate, and cavity, respectively. Such numbers are based on the flow front velocity estimated at each one of those locations. It is important to maintain those (machine-independent) settings to ensure that the proper filling of the mold cavity can be achieved. Again, variations within 20% of these machine-independent values are acceptable.
- Some mold presses have a two-stage clamping process. Large (global) clamping to provide rough clamping of large platens and small (local) clamping on the chase area. The small (local) pressure is also referred to as chase pressure. Chase pressure ensures that the large pressure does not all come down on the leadframe or substrate and crush the material. The small local clamping allows more flexibility in fine-tuning the local pressure on certain areas of the mold and substrate or leadframe. Older presses have only one clamp pressure setting.
- Note that the transfer pressure and speeds in Table 1 describe the settings for the Towa Model M60 Mold Press. Also provided above, are the machine-independent pressure and speed values. The machine-independent values describe the transfer pressure and speed within the molding chamber regardless of the specific mold press dimensions and characteristics. The machine-independent values of the molding process are set so that injected molding material does not force its way between the top cavity surface of a molding cavity and the conductive contact such that flash would form. The machine-independent pressure and speed of the molding material within a molding chamber should be approximately the same regardless of the specific molding press used.
- In some embodiments,
mother package 400 will be manufactured according to specific form factors. Form factors represent standard configurations and dimensions for the die, die attach pad, wire leads, molding material, etc. of semiconductor packages. Some exemplary form factors offered in the portfolio of the National Semiconductor Corporation (NSC) include SOP (Small Outline Package), DIP (Dual In-Line Package), PGA (Pin Grid Array), LCC (Leaded Chip Carrier), QFP (Quad Flatpack), BGA (Ball Grid Array), and CSP (Chip Sized Package). It should be noted that form factors not provided by NSC may also be suitable for this invention. - Furthermore, in some embodiments, a daughter package that is attached to
mother package 400 can be an integrated circuit package, an optical submodule such as an optoelectronic transceiver, transmitter or receiver, or any other device suitable for connection to package 400 via electrically conductive contacts. - While this invention has been described in terms of several preferred embodiments, there are alterations, permutations, and equivalents, which fall within the scope of this invention. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations, and equivalents as fall within the true spirit and scope of the present invention.
Claims (13)
1. A semiconductor molding chamber comprising:
a top molding cavity having a molding surface that has a surface roughness of less than 1.2 Ra; and
a bottom molding cavity configured to support a semiconductor die, whereby the top and bottom molding cavity enclose the semiconductor within the molding chamber.
2. A semiconductor molding chamber as recited in claim 1 wherein the molding surface has a surface roughness of approximately equal to or less than 0.5 Ra.
3. A semiconductor molding chamber as recited in claim 1 wherein the molding surface has a surface roughness of approximately equal to or less than 0.1 Ra.
4. A semiconductor molding chamber as recited in claim 1 wherein the molding surface of the top molding cavity contains surface imperfections, the molding chamber further comprising:
a surface coating formed over the molding surface of the top molding cavity that substantially smoothens the surface imperfections.
5. A semiconductor molding system comprising:
a semiconductor die having a top surface and a bottom surface, at least one deformable electrically conductive contact on the top surface;
a top molding cavity having a molding surface that has a surface roughness of approximately equal to or less than 1.2 Ra, wherein the molding surface is in contact with the deformable electrically conductive contact; and
a bottom molding cavity that supports the semiconductor die.
6. A semiconductor molding system as recited in claim 5 wherein the molding surface has a surface roughness of approximately equal to or less than 0.5 Ra.
7. A semiconductor molding system as recited in claim 5 wherein the molding surface has a surface roughness of approximately equal to or less than 0.1 Ra.
8. A semiconductor molding system as recited in claim 5 wherein the molding surface of the top molding cavity contains surface imperfections, the molding system further comprising:
a surface coating formed over the molding surface of the top molding cavity that substantially smoothens the surface imperfections.
9. A semiconductor molding system as recited in claim 5 wherein the deformable electrically conductive contact is a solder ball.
10. A method of packaging a semiconductor die comprising:
providing a top molding cavity that has a top molding surface with a surface roughness of less than 1.2 Ra;
providing a bottom molding cavity that has a bottom molding surface, wherein the top and the bottom molding cavity form a molding chamber;
placing the semiconductor die having one or more deformable electrically conductive contacts on a top surface of the die into the molding chamber;
lowering the top molding cavity onto the deformable electrically conductive contacts such that the top molding surface deforms the contacts and creates an empty space between the top surface of the semiconductor die and the top molding surface; and
injecting a molding compound into the molding chamber such that the molding compound surrounds the deformable electrically conductive contacts and fills the empty space between the top surface of the semiconductor die and the top molding surface in a way that no flash forms on a top surface of each of the deformable electrically conductive contacts.
11. A method as recited in claim 10 wherein the molding compound is injected into the molding chamber such that the molding compound flows through the molding chamber at 1.16 kg/mm2.
12. A method as recited in claim 10 wherein the deformable electrically conductive contacts are solder balls.
13. A method as recited in claim 10 wherein the packaged semiconductor die is formed after the injecting operation, the method further comprising:
attaching a secondary device to a top surface of the packaged semiconductor die such that electrical contacts of the secondary device make contact with the top surface of each of the deformable electrically conductive contacts, wherein the attaching operation is the next operation after the injecting operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US11/267,719 US20060055080A1 (en) | 2002-10-17 | 2005-11-03 | Semiconductor package having flash-free contacts and techniques for manufacturing the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US10/274,056 US6989122B1 (en) | 2002-10-17 | 2002-10-17 | Techniques for manufacturing flash-free contacts on a semiconductor package |
US11/267,719 US20060055080A1 (en) | 2002-10-17 | 2005-11-03 | Semiconductor package having flash-free contacts and techniques for manufacturing the same |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US10/274,056 Division US6989122B1 (en) | 2002-10-17 | 2002-10-17 | Techniques for manufacturing flash-free contacts on a semiconductor package |
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US20060055080A1 true US20060055080A1 (en) | 2006-03-16 |
Family
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Family Applications (2)
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US10/274,056 Expired - Lifetime US6989122B1 (en) | 2002-10-17 | 2002-10-17 | Techniques for manufacturing flash-free contacts on a semiconductor package |
US11/267,719 Abandoned US20060055080A1 (en) | 2002-10-17 | 2005-11-03 | Semiconductor package having flash-free contacts and techniques for manufacturing the same |
Family Applications Before (1)
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US10/274,056 Expired - Lifetime US6989122B1 (en) | 2002-10-17 | 2002-10-17 | Techniques for manufacturing flash-free contacts on a semiconductor package |
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TW (1) | TWI272702B (en) |
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Also Published As
Publication number | Publication date |
---|---|
TW200406898A (en) | 2004-05-01 |
US6989122B1 (en) | 2006-01-24 |
TWI272702B (en) | 2007-02-01 |
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