US20070224830A1 - Low temperature etchant for treatment of silicon-containing surfaces - Google Patents
Low temperature etchant for treatment of silicon-containing surfaces Download PDFInfo
- Publication number
- US20070224830A1 US20070224830A1 US11/752,477 US75247707A US2007224830A1 US 20070224830 A1 US20070224830 A1 US 20070224830A1 US 75247707 A US75247707 A US 75247707A US 2007224830 A1 US2007224830 A1 US 2007224830A1
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- US
- United States
- Prior art keywords
- silicon
- substrate
- gas
- chlorine
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 154
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 154
- 239000010703 silicon Substances 0.000 title claims abstract description 154
- 238000000034 method Methods 0.000 claims abstract description 252
- 230000008569 process Effects 0.000 claims abstract description 209
- 239000000758 substrate Substances 0.000 claims abstract description 138
- 238000005530 etching Methods 0.000 claims abstract description 87
- 239000000460 chlorine Substances 0.000 claims abstract description 25
- 229910052801 chlorine Inorganic materials 0.000 claims abstract description 25
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims abstract description 24
- 239000000356 contaminant Substances 0.000 claims abstract description 22
- 239000002210 silicon-based material Substances 0.000 claims abstract description 13
- 230000003746 surface roughness Effects 0.000 claims abstract description 11
- 238000009499 grossing Methods 0.000 claims abstract description 8
- 238000010438 heat treatment Methods 0.000 claims abstract description 5
- 239000000463 material Substances 0.000 claims description 75
- 239000007789 gas Substances 0.000 claims description 64
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 56
- 239000012159 carrier gas Substances 0.000 claims description 40
- 229910052757 nitrogen Inorganic materials 0.000 claims description 27
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 claims description 26
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 23
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 20
- 229910000077 silane Inorganic materials 0.000 claims description 17
- 238000004140 cleaning Methods 0.000 claims description 15
- 238000000151 deposition Methods 0.000 claims description 15
- 238000005137 deposition process Methods 0.000 claims description 15
- 229910052786 argon Inorganic materials 0.000 claims description 10
- 238000000407 epitaxy Methods 0.000 claims description 10
- 239000001307 helium Substances 0.000 claims description 10
- 229910052734 helium Inorganic materials 0.000 claims description 10
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 10
- FDNAPBUWERUEDA-UHFFFAOYSA-N silicon tetrachloride Chemical compound Cl[Si](Cl)(Cl)Cl FDNAPBUWERUEDA-UHFFFAOYSA-N 0.000 claims description 10
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 9
- 229910052799 carbon Inorganic materials 0.000 claims description 9
- 230000008021 deposition Effects 0.000 claims description 8
- JOHWNGGYGAVMGU-UHFFFAOYSA-N trifluorochlorine Chemical compound FCl(F)F JOHWNGGYGAVMGU-UHFFFAOYSA-N 0.000 claims description 6
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 claims description 5
- UIUXUFNYAYAMOE-UHFFFAOYSA-N methylsilane Chemical compound [SiH3]C UIUXUFNYAYAMOE-UHFFFAOYSA-N 0.000 claims description 5
- 150000004767 nitrides Chemical class 0.000 claims description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 claims description 3
- -1 organic residue Chemical compound 0.000 claims description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- 238000005229 chemical vapour deposition Methods 0.000 description 10
- 229910052581 Si3N4 Inorganic materials 0.000 description 9
- 229910052814 silicon oxide Inorganic materials 0.000 description 8
- 238000006243 chemical reaction Methods 0.000 description 7
- 239000001257 hydrogen Substances 0.000 description 7
- 229910052739 hydrogen Inorganic materials 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 7
- 150000004756 silanes Chemical class 0.000 description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 7
- 150000001875 compounds Chemical class 0.000 description 6
- 229910052732 germanium Inorganic materials 0.000 description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 6
- 238000002203 pretreatment Methods 0.000 description 6
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 5
- 235000012431 wafers Nutrition 0.000 description 5
- 150000002431 hydrogen Chemical class 0.000 description 4
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 3
- 239000002253 acid Substances 0.000 description 3
- 229910052785 arsenic Inorganic materials 0.000 description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 3
- 238000003877 atomic layer epitaxy Methods 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 238000011109 contamination Methods 0.000 description 3
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 3
- 150000001282 organosilanes Chemical class 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000002243 precursor Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 125000006850 spacer group Chemical group 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 229910003811 SiGeC Inorganic materials 0.000 description 2
- 229910003828 SiH3 Inorganic materials 0.000 description 2
- AXQKVSDUCKWEKE-UHFFFAOYSA-N [C].[Ge].[Si] Chemical compound [C].[Ge].[Si] AXQKVSDUCKWEKE-UHFFFAOYSA-N 0.000 description 2
- 238000000277 atomic layer chemical vapour deposition Methods 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 239000012707 chemical precursor Substances 0.000 description 2
- 150000001805 chlorine compounds Chemical class 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 125000001495 ethyl group Chemical group [H]C([H])([H])C([H])([H])* 0.000 description 2
- 150000002222 fluorine compounds Chemical class 0.000 description 2
- 150000004820 halides Chemical class 0.000 description 2
- NEXSMEBSBIABKL-UHFFFAOYSA-N hexamethyldisilane Chemical compound C[Si](C)(C)[Si](C)(C)C NEXSMEBSBIABKL-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000001182 laser chemical vapour deposition Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical class [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- OLRJXMHANKMLTD-UHFFFAOYSA-N silyl Chemical compound [SiH3] OLRJXMHANKMLTD-UHFFFAOYSA-N 0.000 description 2
- LXEXBJXDGVGRAR-UHFFFAOYSA-N trichloro(trichlorosilyl)silane Chemical compound Cl[Si](Cl)(Cl)[Si](Cl)(Cl)Cl LXEXBJXDGVGRAR-UHFFFAOYSA-N 0.000 description 2
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 description 2
- 238000000038 ultrahigh vacuum chemical vapour deposition Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910020308 Cl3SiH Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000676 Si alloy Inorganic materials 0.000 description 1
- 229910007258 Si2H4 Inorganic materials 0.000 description 1
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000012080 ambient air Substances 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 1
- 229910052794 bromium Inorganic materials 0.000 description 1
- 125000000484 butyl group Chemical group [H]C([*])([H])C([H])([H])C([H])([H])C([H])([H])[H] 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- UCMVNBCLTOOHMN-UHFFFAOYSA-N dimethyl(silyl)silane Chemical compound C[SiH](C)[SiH3] UCMVNBCLTOOHMN-UHFFFAOYSA-N 0.000 description 1
- UBHZUDXTHNMNLD-UHFFFAOYSA-N dimethylsilane Chemical compound C[SiH2]C UBHZUDXTHNMNLD-UHFFFAOYSA-N 0.000 description 1
- JZZIHCLFHIXETF-UHFFFAOYSA-N dimethylsilicon Chemical compound C[Si]C JZZIHCLFHIXETF-UHFFFAOYSA-N 0.000 description 1
- 125000000047 disilanyl group Chemical group [H][Si]([*])([H])[Si]([H])([H])[H] 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- KCWYOFZQRFCIIE-UHFFFAOYSA-N ethylsilane Chemical compound CC[SiH3] KCWYOFZQRFCIIE-UHFFFAOYSA-N 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910000078 germane Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 238000004050 hot filament vapor deposition Methods 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- IQCYANORSDPPDT-UHFFFAOYSA-N methyl(silyl)silane Chemical compound C[SiH2][SiH3] IQCYANORSDPPDT-UHFFFAOYSA-N 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 125000001436 propyl group Chemical group [H]C([*])([H])C([H])([H])C([H])([H])[H] 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- ABTOQLMXBSRXSM-UHFFFAOYSA-N silicon tetrafluoride Chemical compound F[Si](F)(F)F ABTOQLMXBSRXSM-UHFFFAOYSA-N 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
- 239000005052 trichlorosilane Substances 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- VEDJZFSRVVQBIL-UHFFFAOYSA-N trisilane Chemical compound [SiH3][SiH2][SiH3] VEDJZFSRVVQBIL-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02019—Chemical etching
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B08—CLEANING
- B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
- B08B7/00—Cleaning by methods not provided for in a single other subclass or a single group in this subclass
- B08B7/0035—Cleaning by methods not provided for in a single other subclass or a single group in this subclass by radiant energy, e.g. UV, laser, light beam or the like
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02046—Dry cleaning only
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02381—Silicon, silicon germanium, germanium
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
Definitions
- Embodiments of the invention generally relate to the field of electronic manufacturing processes and devices, more particular, to methods of etching and depositing silicon-containing materials while forming electronic devices.
- Electronic devices such as semiconductor devices are fabricated by an assortment of steps including the deposition and removal of silicon-containing material. These deposition and removal steps as well as other process steps can cause the substrate surface containing a silicon-containing material to become rough and/or bare contaminant. Rough or contaminated substrate surfaces generally lead to poor quality interfaces which provide poor device performance and reliability.
- Etching processes have been developed to combat contamination and roughness on substrate surfaces.
- these traditional etching processes have some draw backs.
- etchants such as hydrogen chloride (HCl)
- HCl hydrogen chloride
- etching processes are often conducted at temperatures of 1,000° C. or higher.
- Such high temperatures are not desirable during a fabrication process due to thermal budget considerations, possible uncontrolled nitridation reactions to the substrate surface and loss of economically efficiencies.
- Chlorine (Cl 2 ) has been used to remove silicon-containing materials during etch processes at lower temperatures than processes that utilize hydrogen chloride etchants.
- chlorine reacts very quickly with silicon-containing materials and thus the etch rate is not easily controlled. Therefore, silicon-containing materials are usually over etched by processes using chlorine gas.
- etching processes generally are conducted in an etching chamber or a thermal processing chamber. Once the etching of the silicon-containing material is complete, the substrate is transferred into a secondary chamber to for a subsequent deposition process. Often, the substrate is exposed to the ambient environment between the etching process and the deposition process. The ambient environment may introduce the substrate surface to water and/or oxygen and form an oxide layer.
- substrates are usually exposed to a pre-treatment process that may include a wet clean process, such as a HF-last process, a plasma clean or an acid wash process.
- a pre-treatment process such as a HF-last process, a plasma clean or an acid wash process.
- the substrate may have to reside outside the process chamber or controlled environment for a period of time called the queue time (Q-time).
- Q-time the queue time
- the substrate is exposed to ambient environmental conditions that include an oxygen and water at atmospheric pressure and room temperature.
- the ambient exposure forms an oxide layer on the substrate surface, such as silicon oxide.
- longer Q-times form thicker oxide layers and therefore more extreme etching processes must be conducted at higher temperatures and pressures.
- a method of etching a silicon-containing material on a substrate surface includes positioning a substrate containing a contaminant into a process chamber, exposing the substrate surface to an etching gas that contains chlorine gas, a silicon source and a carrier gas and removing a first layer of the substrate surface and the contaminant.
- the process may remove the first layer at a rate in a range from about 2 ⁇ per minute to about 20 ⁇ per minute.
- the carrier gas is nitrogen
- the silicon source is silane
- the process chamber is maintained at a temperature in a range from about 500° C. to about 700° C.
- a method of smoothing a silicon-containing material on a substrate surface which includes positioning a substrate into a process chamber, wherein the substrate contains a silicon-containing material with a first surface roughness of about 1 nm RMS or greater, exposing the silicon-containing material to an etching gas that contains an etchant, a silicon source and a carrier gas and redistributing the silicon-containing material to form a second surface roughness of less than about 1 nm RMS.
- the carrier gas is nitrogen
- the silicon source is silane
- the etchant is chlorine gas.
- a method of etching a silicon-containing material on a substrate that contains a monocrystalline surface and at least a second material selected from a nitride surface, an oxide surface or combinations thereof includes positioning the substrate into a process chamber and exposing the substrate surface to an etching gas that contains chlorine gas and a carrier gas. The method further includes removing a first layer of the monocrystalline surface to form an exposed monocrystalline surface and depositing an epitaxy layer on the exposed monocrystalline surface in the same process chamber as used during the removing step.
- the etching gas also contains a silicon source.
- a method of forming a silicon-containing monocrystalline material on a substrate includes exposing a substrate to a HF-last wet clean process, positioning the substrate into a process chamber and exposing the substrate to an etching gas containing chlorine gas and a carrier gas. A predetermined thickness of the silicon-containing monocrystalline material is removed to form an exposed monocrystalline surface. The method further includes depositing an epitaxy layer on the exposed monocrystalline surface in the process chamber and subsequently cleaning the process chamber with the chlorine gas to remove silicon-containing contaminant adhered thereon.
- FIG. 1 is a flow chart describing a process to treat silicon-containing materials in one embodiment described herein;
- FIGS. 2A-2C show schematic illustrations of layers treated by processes described in FIG. 1 ;
- FIG. 3 is a flow chart describing a process to treat silicon-containing materials in another embodiment described herein;
- FIGS. 4A-4C show schematic illustrations of layers treated by processes described in FIG. 3 ;
- FIG. 5 is a flow chart describing a method to process a substrate and thereafter clean the process chamber by one embodiment described herein.
- Embodiments of the invention disclose processes to etch and deposit silicon-containing materials on substrate surfaces.
- the etching processes include a slow etch process (e.g., ⁇ 100 ⁇ /min) that utilizes an etching gas that contains an etchant and a silicon source as well as a fast etch process (e.g., >100 ⁇ /min).
- a method for finishing or treating a silicon-containing surface which includes smoothing the surface and/or removing contaminants contained on the surface.
- a substrate having a silicon-containing surface is placed into a process chamber and heated to a temperature in a range from about 500° C. to about 700° C. While the substrate is heated, the silicon-containing surface is exposed to an etching gas that contains an etchant, a silicon source and a carrier gas.
- An etchant such as chlorine gas (Cl 2 ) may be selected so that a relatively low temperature is used during the etching process.
- a silicon source is provided simultaneously with the etchant in order to counter act any over etching caused by the etchant.
- the silicon source is used to deposit silicon on the silicon-containing layer while the etchant removes the silicon.
- the rates at which the etchant and the silicon source are introduced to the substrate are adjusted so that the overall reaction favors material removal and/or redistribution. Therefore, in one example, the overall reaction removes silicon-containing material while the etch rate is finely controlled to several angstroms or less per minute.
- the surface is smoothed as material is removed from higher portions of the surface (i.e., peaks) while material is added to the lower portions of the surface (i.e., troughs).
- Embodiments of the invention can transform a silicon-containing surface with a surface roughness of about 6 nm root mean square (RMS) or more into a much smoother surface with a surface roughness of less than about 0.1 nm RMS.
- RMS root mean square
- a method for etching a silicon-containing surface which includes removing silicon-containing material at a fast rate in order to form a recess in a source/drain (S/D) area on the substrate.
- a substrate having a silicon-containing surface is placed into a process chamber and heated to a temperature in a range from about 500° C. to about 700° C. While the substrate is heated, the silicon-containing surface is exposed to an etching gas that contains an etchant and a carrier gas.
- the etchant such as chlorine gas, may be selected so that a relatively low temperature is used during the etching process while maintaining a fast etch rate.
- a silicon source may be added to the etching gas to have more control of the removal rate.
- a slow etch process (e.g., ⁇ 100 ⁇ /min) is conducted to remove contaminants and/or surface irregularities, such as roughness, from a substrate surface.
- the substrate surface is etched to expose an underlayer free of the contaminants and/or material of the substrate surface is redistributed to minimize peaks and troughs that attribute to surface irregularities.
- the substrate is exposed to an etching gas containing an etchant, a silicon source and a carrier gas.
- the overall reaction is controlled in part by the relative flow rates of the etchant and the silicon source, the specific etchant and silicon source, and the temperature and the pressure that the process is conducted.
- a substrate Prior to starting an etching process, a substrate may be exposed to a pre-treatment process to prepare the surface for the subsequent etching.
- a pre-treatment process may include a wet clean process, such as a HF-last process, a plasma clean, an acid wash process and combinations thereof.
- the substrate is treated to a HF-last wet clean process by exposing the surface to a hydrofluoric acid solution for about 2 minutes.
- FIG. 1 depicts process 100 conducted to remove contaminants and/or rough areas on substrate 200 , as depicted in FIGS. 2A-2C .
- substrate 200 contains contaminants and/or rough areas on surface 210 .
- a pre-determined thickness 220 of the substrate 200 including surface 210 is removed during the etching process to reveal exposed surface 230 .
- a layer 240 is optionally deposited on exposed surface 230 .
- layer 240 is a silicon-containing material deposited by an epitaxy deposition process.
- Embodiments of the processes described herein etch and deposit silicon-containing materials on various substrates surfaces and substrates.
- a “substrate” or “substrate surface” as used herein refers to any substrate or material surface formed on a substrate upon which film processing is performed.
- a substrate surface on which processing may be performed include materials such as silicon, silicon-containing materials, silicon oxide, strained silicon, silicon on insulator (SOI), carbon doped silicon oxides, silicon nitride, doped silicon, silicon germanium, silicon germanium carbon, germanium, gallium arsenide, glass, sapphire, and other materials depending on the application.
- a substrate surface may also include dielectric materials such as silicon dioxide, silicon nitride, silicon oxynitride, and/or carbon doped silicon oxides.
- Substrates may have various dimensions, such as 200 mm or 300 mm diameter round wafers, as well as, rectangular or square panes. Embodiments of the processes described herein etch and deposit on many substrates and surfaces, especially, silicon and silicon-containing materials.
- Substrates on which embodiments of the invention may be useful include, but are not limited to semiconductor wafers, such as crystalline silicon (e.g., Si ⁇ 100>or Si ⁇ 111>), silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers silicon nitride and patterned or non-patterned wafers.
- semiconductor wafers such as crystalline silicon (e.g., Si ⁇ 100>or Si ⁇ 111>), silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers silicon nitride and patterned or non-patterned wafers.
- silicon-containing materials, compounds, films or layers should be construed to include a composition containing at least silicon and may contain germanium, carbon, boron, arsenic, phosphorous gallium and/or aluminum. Other elements, such as metals, halogens or hydrogen may be incorporated within a silicon-containing material, compound, film or layer, usually in part per million (ppm) concentrations.
- Compounds or alloys of silicon-containing materials may be represented by an abbreviation, such as Si for silicon, SiGe, for silicon germanium, SiC for silicon carbon, and SiGeC for silicon germanium carbon. The abbreviations do not represent chemical equations with stoichiometrical relationships, nor represent any particular reduction/oxidation state of the silicon-containing materials. Silicon-containing materials, compounds, films, or layers may include substrates or substrate surfaces.
- Contaminants left on the surface 210 from a previous process may include organic residues, carbon, oxides, nitrides, halides (e.g., fluorides or chlorides) and combinations thereof.
- surface 210 may contain a layer of silicon oxide after being exposed to the ambient air or may contain a layer of silicon fluoride after being treated with a HF-last wet clean process.
- Surface 210 may also contain irregularities, such as regional areas of roughness that include troughs and peaks.
- substrate 200 is positioned into a process chamber and heated to a predetermined temperature.
- the substrate and/or the process chamber is maintained at temperature in a range from about 400° C. to about 800° C., preferably from about 500° C. to about 700° C.
- the process chamber is maintained at a pressure in a range from about 0.1 Torr to about 750 Torr, preferably, from about 1 Torr to about 100 Torr, and more preferably, from about 10 Torr to about 40 Torr.
- the etching gas used during the slow etch process in step 120 contains an etchant, a silicon source and a carrier gas.
- the etchant is chlorine gas (Cl 2 ).
- Cl 2 chlorine gas
- the silicon source is provided simultaneously with the etchant in order to counter act any over etching of the substrate 200 .
- the silicon source is used to deposit silicon on the silicon-containing layer while the etchant removes the silicon-containing material.
- the rates at which the etchant and the silicon source are introduced to the substrate are adjusted so that the overall reaction favors material removal and/or material redistribution. Therefore, the overall reaction is removing or redistributing silicon-containing material and the etch rate may be finely controlled to several angstroms per minute.
- the etchant is provided into the process chamber in the etching gas at a rate in a range from about 1 standard cubic centimeters per minute (sccm) to about 100 sccm, preferably, from about 5 sccm to about 50 sccm, and more preferably, from about 10 sccm to about 30 sccm, for example, about 20 sccm. While chlorine is the preferred etchant, other etchants that may be used solely or in combination include chlorine trifluoride (ClF 3 ), tetrachlorosilane (SiCl 4 ), and derivatives thereof.
- sccm standard cubic centimeters per minute
- the silicon source is usually provided into the process chamber in the etching gas for slow etch processes at a rate in a range from about 5 sccm to about 500 sccm, preferably from about 10 sccm to about 100 sccm, and more preferably from about 20 sccm to about 80 sccm, for example, about 50 sccm.
- Silicon sources that may be used in the etching include silanes, halogenated silanes, organosilanes and derivatives thereof.
- Silanes include silane (SiH 4 ) and higher silanes with the empirical formula Si x H (2x+2) , such as disilane (Si 2 H 6 ), trisilane (Si 3 H 8 ), and tetrasilane (Si 4 H 10 ), as well as others.
- Halogenated silanes include compounds with the empirical formula X′ y Si x H (2x+2 ⁇ y) , where X′ is independently selected from F, Cl, Br, or I, such as hexachlorodisilane (Si 2 Cl 6 ), tetrachlorosilane (SiCl 4 ), dichlorosilane (Cl 2 SiH 2 ), and trichlorosilane (Cl 3 SiH).
- Organosilanes include compounds with the empirical formula R y Si x H (2x+2 ⁇ y) , where R is independently selected from methyl, ethyl, propyl or butyl, such as methylsilane ((CH 3 )SiH 3 ), dimethylsilane ((CH 3 ) 2 SiH 2 ), ethylsilane ((CH 3 CH 2 )SiH 3 ), methyldisilane ((CH 3 )Si 2 H 5 ), dimethyldisilane ((CH 3 ) 2 Si 2 H 4 ), and hexamethyldisilane ((CH 3 ) 6 Si 2 ).
- the preferred silicon sources include silane, dichlorosilane, and disilane.
- the carrier gas is usually provided into the process chamber in the etching gas at a flow rate in a range from about 1 slm (standard liters per minute) to about 100 slm, preferably, from about 5 slm to about 80 slm, and more preferably, from about 10 slm to about 40 slm, for example, about 20 slm.
- Carrier gases may include nitrogen (N 2 ), hydrogen (H 2 ), argon, helium, or combinations thereof.
- An inert carrier gas is preferred and includes nitrogen, argon, helium, or combinations thereof.
- a carrier gas may be selected based on the precursor(s) used and/or the process temperature during the etching process in step 120 .
- nitrogen is utilized as a carrier gas in embodiments featuring low temperature (e.g., ⁇ 800° C.) processes.
- Low temperature processes are accessible due in part to the use of chlorine gas in the etching process.
- Nitrogen remains inert during low temperature etching processes. Therefore, nitrogen is not incorporated into silicon-containing materials on the substrate during low temperature processes.
- a nitrogen carrier gas does not form hydrogen-terminated surfaces as does a hydrogen carrier gas. The hydrogen-terminated surfaces formed by the adsorption of hydrogen carrier gas on the substrate surface inhibit the growth rate of subsequently deposited silicon-containing layers.
- the low temperature processes may take economic advantage of nitrogen as a carrier gas, since nitrogen is far less expensive than hydrogen, argon or helium.
- chlorine is the etchant
- silane is the silicon source
- nitrogen is the carrier gas.
- substrate 200 and surface 210 are exposed to an etching gas to remove a predetermined thickness 220 of substrate 200 .
- Surface 210 is also etched during the removal of the predetermined thickness 220 .
- the etching gas is exposed to substrate 200 for a period of time from about 5 seconds to about 5 minutes, preferably from about 30 seconds to about 2 minutes. The amount of time is adjusted relative to the etch rate used in a particular process.
- the etch rate of a slow etch process is usually less than about 100 ⁇ /min, preferably less than about 50 ⁇ /min.
- the slow etch rate is in a range from about 2 ⁇ /min to about 20 ⁇ /min, preferably from about 5 ⁇ /min to about 15 ⁇ /min, for example, about 10 ⁇ /min. In another embodiment, the etch rate is less than about 2 ⁇ /min, preferably less than about 1 ⁇ /min, and more preferably approaches a redistribution of material on the substrate such that the net removal rate is non-measurable relative to the thickness of the layer. As the etch process is slowed to a redistribution reaction, material is removed from the peaks thereon the surface and material is added to troughs thereon the surface. The troughs may be filled by the material derived from the peaks and/or virgin material being produced by the introduction of precursors (e.g., silicon source) in the etching gas.
- precursors e.g., silicon source
- Surface 210 may have had a surface roughness of about 6 nm root mean square (RMS) or more. However, once the predetermined thickness 220 is removed, the exposed surface 230 is much smoother than surface 210 .
- the exposed surface may have a surface roughness of about 1 nm RMS or less, preferably about 0.1 nm RMS or less and more preferably about 0.07 nm RMS. Contaminants previously disposed on surface 210 are removed.
- the exposed surface 230 is free or substantially free of contaminants that include organic residues, carbon, oxides, nitrides, halides (e.g., fluorides or chlorides), or combinations thereof.
- layer 240 may be deposited during step 130 .
- layer 240 is a silicon-containing material that may be selectively and epitaxially deposited on the exposed surface 230 a chemical vapor deposition (CVD) process.
- CVD chemical vapor deposition
- Chemical vapor deposition described herein includes the use of many techniques, such as atomic layer epitaxy (ALE), atomic layer deposition (ALD), plasma-assisted CVD (PA-CVD), atomic layer CVD (ALCVD), organometallic or metalorganic CVD (OMCVD or MOCVD), laser-assisted CVD (LA-CVD), ultraviolet CVD (UV-CVD), hot-wire (HWCVD), reduced-pressure CVD (RP-CVD), ultra-high vacuum CVD (UHV-CVD), and others.
- ALE atomic layer epitaxy
- ALD atomic layer deposition
- PA-CVD plasma-assisted CVD
- ACVD atomic layer CVD
- OMCVD or MOCVD organometallic or metalorganic CVD
- LA-CVD laser-assisted CVD
- UV-CVD ultraviolet CVD
- HWCVD hot-wire
- RP-CVD reduced-pressure CVD
- UHV-CVD ultra-high vacuum CV
- the deposition gas used during step 130 may also contain at least one secondary elemental source, such as a germanium source and/or a carbon source.
- the germanium source may be added to the process chamber with the silicon source, etchant and carrier gas to form a silicon-containing compound. Therefore, the silicon-containing compound may include silicon, SiGe, SiC, SiGeC, doped variants thereof, and combinations thereof.
- Germanium and/or carbon may be added to the silicon-containing material by including germanium source (e.g., germane) or a carbon source (e.g., methylsilane) during the deposition process.
- Dopants may also be included by including a boron source (e.g., diborane), an arsenic source (e.g., arsine), or a phosphorous source (e.g., phosphine) during or after the deposition process.
- a boron source e.g., diborane
- an arsenic source e.g., arsine
- a phosphorous source e.g., phosphine
- a preferred process is to use the CVD process called alternating gas supply (APG) to epitaxially grow or deposit a silicon-containing compound as layer 240 on exposed surface 230 .
- the APG deposition process includes a cycle of alternating exposures of silicon-sources and etchants to the substrate surface.
- An APG deposition is further disclosed in commonly assigned U.S. Ser. No. 11/001,774, filed Dec. 1, 2004, and published as US 2006-0115934, which is incorporated herein by reference in its entirety for the purpose of describing the APG deposition process.
- Process 100 may be used to etch and deposit silicon-containing materials in the same process chamber.
- the slow etch process and the subsequent deposition process are performed in the same process chamber to improve throughput, be more efficient, decrease probability of contamination and benefit process synergies, such as common chemical precursors.
- both the slow etch process and the selective, epitaxial deposition process of a silicon-containing compound use chlorine as an etchant and nitrogen as a carrier gas.
- a fast etch process (e.g., >100 ⁇ /min) is performed to selectively remove silicon-containing material from the substrate surface.
- the fast etch process is a selective etch process to remove silicon-containing material while leaving barrier material unscathed.
- Barrier materials may include silicon nitride, silicon oxide, or silicon oxynitride used as spacers, capping layers and mask.
- process 300 is initiated by positioning the substrate into a process chamber and adjusting the process parameters during step 310 .
- the substrate and/or the process chamber is heated at a temperature in a range from about 400° C. to about 800° C., preferably from about 500° C. to about 700° C.
- the process chamber is maintained at a pressure in a range from about 1 Torr to about 750 Torr, preferably, from about 100 Torr to about 700 Torr, and more preferably, from about 400 Torr to about 600 Torr.
- the etching gas used during the fast etch process in step 320 contains an etchant, a carrier gas and an optional silicon source.
- the etchant is chlorine gas
- the carrier gas is nitrogen
- the silicon source is silane.
- the etchant is provided into the process chamber in the etching gas at a rate in a range from about 1 sccm to about 100 sccm, preferably from about 5 sccm to about 50 sccm, and more preferably from about 10 sccm to about 30 sccm, for example, about 20 sccm.
- chlorine is the preferred etchant in the fast etch process
- other etchants that may be used solely or in combination include chlorine trifluoride (ClF 3 ), tetrachlorosilane (SiCl 4 ), and derivatives thereof.
- the carrier gas is usually provided into the process chamber in the etching gas at a flow rate in a range from about 1 slm to about 100 slm, preferably from about 5 slm to about 80 slm, and more preferably from about 10 slm to about 40 slm, for example, about 20 slm.
- Carrier gases may include nitrogen (N 2 ), hydrogen (H 2 ), argon, helium, or combinations thereof.
- An inert carrier gas is preferred and includes nitrogen, argon, helium, or combinations thereof.
- a carrier gas may be selected based on the precursor(s) used and/or the process temperature during the etching process in step 320 .
- nitrogen is utilized as a carrier gas in embodiments featuring low temperature (e.g., ⁇ 800° C.) processes.
- chlorine is the etchant and nitrogen is the carrier gas.
- the silicon source is optionally included in the etching gas to provide additional control of the etch rate during fast etch processes.
- the silicon source is delivered into the process chamber at a rate in a range from about 5 sccm to about 500 sccm, preferably from about 10 sccm to about 100 sccm, and more preferably from about 20 sccm to about 80 sccm, for example, about 50 sccm.
- Silicon sources that may be used in the etching include silanes, halogenated silanes, organosilanes, and derivatives thereof, as discussed above.
- At least one source/drain feature 410 is disposed on substrate 400 .
- Substrate 400 may be doped or undoped, bare silicon substrate or include a silicon-containing layer disposed thereon.
- Feature 410 includes gate layer 412 on gate oxide layer 414 surrounded by spacers 416 and protective capping layer 418 .
- gate layer 412 is composed of a polysilicon.
- Gate oxide layer 414 is composed of silicon dioxide, silicon oxynitride or hafnium oxide.
- a spacer 416 which is usually an isolation material such as a nitride/oxide stack (e.g., Si 3 N 4 /SiO 2 /Si 3 N 4 ).
- Gate layer 412 may optionally have a protective capping layer 418 adhered thereon.
- step 320 substrate 400 is exposed to an etching gas to remove a predetermined thickness 425 of substrate 400 and form a recess 430 , as depicted in FIG. 4B .
- the etching gas is exposed to substrate 400 for a period of time from about 10 seconds to about 5 minutes, preferably from about 1 minute to about 3 minutes.
- the amount of time is adjusted relative to the etch rate used in a particular process.
- the etch rate of a fast etch process is usually more than about 100 ⁇ /min, preferably more than about 200 ⁇ /min, such as at rate in a range from about 200 ⁇ /min to about 1,500 ⁇ /min, preferably, from about 200 ⁇ /min to about 1,000 ⁇ /min, for example about 600 ⁇ /min.
- the etching process may be kept at a fast rate to remove the predetermined thickness 425 , and then reduced to a slow rate process to smooth the remaining surface.
- the reduced etching rate may be controlled by an etching process described by process 100 .
- layer 440 may be deposited during step 330 .
- layer 440 is a silicon-containing material that may be selectively and epitaxially deposited on the exposed surface of recess 430 a CVD process.
- the CVD process includes an AGS deposition technique.
- recess 430 may be exposed to another fabrication process prior to the deposition of layer 440 , such as a doping process.
- a doping process includes ion implantation, in which a dopant (e.g., boron, phosphorous or arsenic) may be implanted into the surface of the recess 430 .
- Process 300 may be used to etch and deposit silicon-containing materials in the same process chamber.
- the fast etch process and the subsequent deposition is performed in the same process chamber to improve throughput, be more efficient, decrease probability of contamination and benefit process synergies, such as common chemical precursors.
- both the fast etch process and the selective, epitaxial deposition process of a silicon-containing compound use chlorine as an etchant and nitrogen as a carrier gas.
- FIG. 5 illustrates an alternative embodiment of the invention that includes cleaning the process chamber after finishing a fabrication techniques using process 500 .
- the substrate is exposed to a pre-treatment process that may include a wet clean process, a HF-last process, a plasma clean, an acid wash process, and combinations thereof.
- a pre-treatment process may include a wet clean process, a HF-last process, a plasma clean, an acid wash process, and combinations thereof.
- the substrate may have to remain outside the controlled environment of the process chamber for a period of time called queue time (Q-time).
- the Q-time in an ambient environment may last about 2 hours or more, usually, the Q-time last much longer, such as from about 6 hours to about 24 hours or longer, such as about 36 hours.
- a silicon oxide layer usually forms on the substrate surface during the Q-time due to the substrate being exposed to ambient water and oxygen.
- the substrate is positioned into a process chamber and exposed to an etching process as described herein.
- the etching process may be a slow etch process as described in step 120 or a fast etch process as described in step 320 .
- the etching process removes a pre-determined thickness of silicon-containing layer thereon the substrate to form an exposed silicon-containing layer.
- a secondary material is deposited on the exposed silicon-containing layer during step 520 .
- the secondary material is in a selective, epitaxially deposited silicon-containing compound.
- the deposition process may include the processes as described in steps 130 and 330 . In one aspect of the embodiment, processes 100 or 300 may each be independently used during steps 520 and 530 .
- a cleaning process is conducted inside the process chamber to remove various contaminants therein during step 540 .
- Etch processes and/or deposition processes may form or deposit contaminants on surfaces within the process chamber.
- the contaminants include silicon-containing materials adhered to the walls and other inner surfaces of the process chamber.
- the cleaning process includes heating the process chamber to a temperature in a range from about 600° C. to about 900° C., preferably from about 650° C. to about 800° C.
- the cleaning process is conducted for a period of time in a range from about 30 seconds to about 3 minutes, preferably, from about 1 minute to about 2 minutes.
- a cleaning gas contains an etchant and a carrier gas.
- the etchant and the carrier gas are the same gases used during step 520 .
- the etchant is provided into the process chamber within the cleaning gas at a rate in a range from about 10 sccm to about 5,000 sccm, preferably from about 100 sccm to about 3,000 sccm, and more preferably from about 500 sccm to about 2,000 sccm, for example, about 1,000 sccm.
- Etchants that may be used within the cleaning gas include chlorine, chlorine trifluoride, tetrachlorosilane, and derivatives thereof.
- the carrier is usually provided into the process chamber within the cleaning gas at a flow rate in a range from about 1 slm to about 100 slm, preferably from about 5 slm to about 80 slm, and more preferably from about 10 slm to about 40 slm, for example, about 20 slm.
- Carrier gases may include nitrogen, hydrogen, argon, helium, or combinations thereof.
- An inert carrier gas is preferred and includes nitrogen, argon, helium, or combinations thereof.
- chlorine is used as an etchant and nitrogen is used as a carrier gas in embodiments of the cleaning processes.
- a cleaning process that may be used within embodiments of the invention described herein is further disclosed in commonly assigned U.S. Pat. No. 6,042,654, which is incorporated herein by reference in its entirety.
- the cleaning process may be repeated after processing each individual substrate or after multiple substrates. In one example, the cleaning process is conducted after processing every 25 substrates.
- the substrate is first exposed to a HF-last process.
- the substrate is placed into a process chamber and exposed to an etch process that contains chlorine and nitrogen at about 600° C.
- a silicon-containing layer is epitaxially deposited on the substrate by a deposition process utilizing chlorine and nitrogen at about 625° C.
- the process chamber is heated to about 675° C. and exposed to a cleaning gas containing chlorine and nitrogen.
- Embodiments of the etching and depositing processes of silicon-containing compounds described herein may be utilized for fabricating Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and bipolar transistors, such as Bipolar device fabrication (e.g., base, emitter, collector, emitter contact), BiCMOS device fabrication (e.g., base, emitter, collector, emitter contact) and CMOS device fabrication (e.g., channel, source/drain, source/drain extension, elevated source/drain, substrate, strained silicon, silicon on insulator, and contact plug).
- Bipolar device fabrication e.g., base, emitter, collector, emitter contact
- BiCMOS device fabrication e.g., base, emitter, collector, emitter contact
- CMOS device fabrication e.g., channel, source/drain, source/drain extension, elevated source/drain, substrate, strained silicon, silicon on insulator, and contact plug.
- Other embodiments of processes teach the etching and growing of silicon-containing layers
- the processes of the invention can be carried out in equipment known in the art of CVD or ALE.
- Hardware that can be used to etch and/or deposit silicon-containing films includes the Epi CENTURA® system and the POLYGENTM system available from Applied Materials, Inc., located in Santa Clara, Calif.
- a process chamber useful to etch and deposit as described herein is further disclosed in commonly assigned U.S. Pat. No. 6,562,720, which is incorporated herein by reference in its entirety for the purpose of describing the apparatus.
- Other enabling apparatuses include batch, high-temperature furnaces, as known in the art.
- the following hypothetical examples were conducted in an Epi CENTURA® system available from Applied Materials, Inc., located in Santa Clara, Calif.
- the substrates were 300 mm silicon wafers.
- a substrate was exposed to an HF-last process to form a fluoride terminated surface.
- the substrate was placed in the process chamber and heated to about 600° C. while the atmosphere was maintained at about 20 Torr.
- the substrate was exposed to an etching gas containing N 2 at a flow rate of about 20 slm and Cl 2 at flow rate of about 120 sccm.
- the surface was etched at a rate of about 500 ⁇ /min.
- a substrate was exposed to an HF-last process to form a fluoride terminated surface.
- the substrate was placed in the process chamber and heated to about 600° C. while the atmosphere was maintained at about 20 Torr.
- the substrate was exposed to an etching gas containing N 2 at a flow rate of about 20 slm, Cl 2 at flow rate of about 20 sccm and SiH 4 at a flow rate of about 50 sccm.
- the surface was etched at a rate of about 10 ⁇ /min. Therefore, the addition of a silicon source, such as silane in Example 2, reduced the etch rate of the silicon-containing layer by about 50 times as compared to the etch rate in Example 1.
- a substrate surface containing a silicon-containing layer was cleaved forming a surface with a roughness of about 5.5 nm root mean square (RMS).
- the substrate was placed in the process chamber and heated to about 650° C. while the atmosphere was maintained at about 200 Torr.
- the substrate was exposed to an etching gas containing N 2 at a flow rate of about 20 slm and Cl 2 at flow rate of about 20 sccm.
- the surface was etched at a rate of about 200 ⁇ /min.
- a substrate surface containing a silicon-containing layer was cleaved forming a surface with a roughness of about 5.5 nm root mean square.
- the substrate was placed in the process chamber and heated to about 650° C. while the atmosphere was maintained at about 200 Torr.
- the substrate was exposed to an etching gas containing N 2 at a flow rate of about 20 slm, Cl 2 at flow rate of about 20 sccm and SiH 4 at a flow rate of about 50 sccm.
- the surface was etched at a rate of about 20 ⁇ /min.
- the surface roughness was reduced to about 0.1 nm RMS. Therefore, the addition of a silicon source, such as silane used in Example 4, reduced the etch rate of the silicon-containing layer by about 10 times as compared to the etch rate in Example 3.
- a silicon substrate contained a series of silicon nitride line features that are about 90 nm tall, about 100 nm wide and about 150 nm apart, baring the silicon surface.
- the substrate was placed in the process chamber and heated to about 600° C. while the atmosphere was maintained at about 40 Torr.
- the substrate was exposed to an etching gas containing N 2 at a flow rate of about 20 slm and Cl 2 at flow rate of about 80 sccm.
- the surface was etched at a rate of about 750 ⁇ /min. After about 30 seconds, about 35 nm of the silicon surface was etched.
- the silicon nitride features remain inert to the etching process.
- the pressure was increased to about 200 Torr and SiH 4 was added to the etching gas at a flow rate of about 50 sccm.
- the etch rate was reduced to about 18 ⁇ /min to smooth the freshly etched silicon surface.
- the smooth surface is exposed to a selective epitaxy deposition process by increasing the flow of SiH 4 to about 100 sccm and maintaining the flow of N 2 and Cl 2 unchanged.
- a silicon-containing material was deposited on the silicon surface at a rate of about 25 ⁇ /min.
- a silicon substrate contained a series of silicon nitride line features that are about 90 nm tall, about 100 nm wide and about 150 nm apart, baring the silicon surface.
- the substrate was placed in the process chamber and heated to about 600° C. while the atmosphere was maintained at about 40 Torr.
- the substrate was exposed to an etching gas containing N 2 at a flow rate of about 20 slm, Cl 2 at flow rate of about 80 sccm and SiH 4 at flow rate of about 40 sccm.
- the surface was etched at a rate of about 400 ⁇ /min.
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Abstract
Embodiments provide a method for etching or smoothing a silicon material on a substrate. In one example, the method provides positioning a substrate containing a contaminant disposed on a silicon material within a process chamber, heating the substrate to a temperature of less than 800° C., and exposing the silicon material to an etching gas that contains a chlorine-containing gas and a silicon source gas. The contaminant and a predetermined thickness of the silicon material are removed during the etching process. In another example, the method provides that the substrate contains a first silicon surface having a surface roughness of about 1 nm RMS or greater, exposing the substrate to the etching gas to form a second silicon surface from the first silicon surface during a smoothing process, wherein the second silicon surface has a surface roughness of less than 1 nm RMS.
Description
- This application is a continuation of U.S. Ser. No. 11/047,323 (APPM/009793), filed Jan. 31, 2005, which is herein incorporated by reference.
- 1. Field of the Invention
- Embodiments of the invention generally relate to the field of electronic manufacturing processes and devices, more particular, to methods of etching and depositing silicon-containing materials while forming electronic devices.
- 2. Description of the Related Art
- Electronic devices such as semiconductor devices are fabricated by an assortment of steps including the deposition and removal of silicon-containing material. These deposition and removal steps as well as other process steps can cause the substrate surface containing a silicon-containing material to become rough and/or bare contaminant. Rough or contaminated substrate surfaces generally lead to poor quality interfaces which provide poor device performance and reliability.
- Etching processes have been developed to combat contamination and roughness on substrate surfaces. However, these traditional etching processes have some draw backs. Usually, etchants, such as hydrogen chloride (HCl), require a high activation temperature in order to remove silicon-containing materials. Therefore, etching processes are often conducted at temperatures of 1,000° C. or higher. Such high temperatures are not desirable during a fabrication process due to thermal budget considerations, possible uncontrolled nitridation reactions to the substrate surface and loss of economically efficiencies. Chlorine (Cl2) has been used to remove silicon-containing materials during etch processes at lower temperatures than processes that utilize hydrogen chloride etchants. However, chlorine reacts very quickly with silicon-containing materials and thus the etch rate is not easily controlled. Therefore, silicon-containing materials are usually over etched by processes using chlorine gas.
- Also, traditional etching processes generally are conducted in an etching chamber or a thermal processing chamber. Once the etching of the silicon-containing material is complete, the substrate is transferred into a secondary chamber to for a subsequent deposition process. Often, the substrate is exposed to the ambient environment between the etching process and the deposition process. The ambient environment may introduce the substrate surface to water and/or oxygen and form an oxide layer.
- Even before the etching processor depositing process is conducted, substrates are usually exposed to a pre-treatment process that may include a wet clean process, such as a HF-last process, a plasma clean or an acid wash process. After a pre-treatment process and prior to starting an etching process, the substrate may have to reside outside the process chamber or controlled environment for a period of time called the queue time (Q-time). During the Q-time, the substrate is exposed to ambient environmental conditions that include an oxygen and water at atmospheric pressure and room temperature. The ambient exposure forms an oxide layer on the substrate surface, such as silicon oxide. Generally, longer Q-times form thicker oxide layers and therefore more extreme etching processes must be conducted at higher temperatures and pressures.
- Therefore, there is a need to have an etching process for treating a silicon-containing material on a substrate surface to remove any surface contaminants contained thereon and/or to smooth the substrate surface. There is also a need to be able to treat the substrate surface in a process chamber which could subsequently be used during the next process step, such as to deposit an epitaxy layer. Furthermore, there is a need to maintain the process temperature at a low temperature, such as below 1,000° C., and preferably below 800° C., even on substrates that have endured long Q-times (e.g., about 10 hours).
- In one embodiment of the invention, a method of etching a silicon-containing material on a substrate surface is provided which includes positioning a substrate containing a contaminant into a process chamber, exposing the substrate surface to an etching gas that contains chlorine gas, a silicon source and a carrier gas and removing a first layer of the substrate surface and the contaminant. In one example, the process may remove the first layer at a rate in a range from about 2 Å per minute to about 20 Å per minute. In another example, the carrier gas is nitrogen, the silicon source is silane and the process chamber is maintained at a temperature in a range from about 500° C. to about 700° C.
- In another embodiment of the invention, a method of smoothing a silicon-containing material on a substrate surface is provided which includes positioning a substrate into a process chamber, wherein the substrate contains a silicon-containing material with a first surface roughness of about 1 nm RMS or greater, exposing the silicon-containing material to an etching gas that contains an etchant, a silicon source and a carrier gas and redistributing the silicon-containing material to form a second surface roughness of less than about 1 nm RMS. In one example, the carrier gas is nitrogen, the silicon source is silane and the etchant is chlorine gas.
- In another embodiment of the invention, a method of etching a silicon-containing material on a substrate that contains a monocrystalline surface and at least a second material selected from a nitride surface, an oxide surface or combinations thereof is provided which includes positioning the substrate into a process chamber and exposing the substrate surface to an etching gas that contains chlorine gas and a carrier gas. The method further includes removing a first layer of the monocrystalline surface to form an exposed monocrystalline surface and depositing an epitaxy layer on the exposed monocrystalline surface in the same process chamber as used during the removing step. In one example, the etching gas also contains a silicon source.
- In another embodiment of the invention, a method of forming a silicon-containing monocrystalline material on a substrate is provided which includes exposing a substrate to a HF-last wet clean process, positioning the substrate into a process chamber and exposing the substrate to an etching gas containing chlorine gas and a carrier gas. A predetermined thickness of the silicon-containing monocrystalline material is removed to form an exposed monocrystalline surface. The method further includes depositing an epitaxy layer on the exposed monocrystalline surface in the process chamber and subsequently cleaning the process chamber with the chlorine gas to remove silicon-containing contaminant adhered thereon.
- So that the manner in which the above recited features of the invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
-
FIG. 1 is a flow chart describing a process to treat silicon-containing materials in one embodiment described herein; -
FIGS. 2A-2C show schematic illustrations of layers treated by processes described inFIG. 1 ; -
FIG. 3 is a flow chart describing a process to treat silicon-containing materials in another embodiment described herein; -
FIGS. 4A-4C show schematic illustrations of layers treated by processes described inFIG. 3 ; and -
FIG. 5 is a flow chart describing a method to process a substrate and thereafter clean the process chamber by one embodiment described herein. - Embodiments of the invention disclose processes to etch and deposit silicon-containing materials on substrate surfaces. The etching processes include a slow etch process (e.g., <100 Å/min) that utilizes an etching gas that contains an etchant and a silicon source as well as a fast etch process (e.g., >100 Å/min).
- In one embodiment of the invention, a method for finishing or treating a silicon-containing surface is provided which includes smoothing the surface and/or removing contaminants contained on the surface. According to one example, a substrate having a silicon-containing surface is placed into a process chamber and heated to a temperature in a range from about 500° C. to about 700° C. While the substrate is heated, the silicon-containing surface is exposed to an etching gas that contains an etchant, a silicon source and a carrier gas. An etchant, such as chlorine gas (Cl2) may be selected so that a relatively low temperature is used during the etching process. A silicon source is provided simultaneously with the etchant in order to counter act any over etching caused by the etchant. That is, the silicon source is used to deposit silicon on the silicon-containing layer while the etchant removes the silicon. The rates at which the etchant and the silicon source are introduced to the substrate are adjusted so that the overall reaction favors material removal and/or redistribution. Therefore, in one example, the overall reaction removes silicon-containing material while the etch rate is finely controlled to several angstroms or less per minute. During an example of a process to redistribute silicon-containing material, the surface is smoothed as material is removed from higher portions of the surface (i.e., peaks) while material is added to the lower portions of the surface (i.e., troughs). Embodiments of the invention can transform a silicon-containing surface with a surface roughness of about 6 nm root mean square (RMS) or more into a much smoother surface with a surface roughness of less than about 0.1 nm RMS.
- In another embodiment of the invention, a method for etching a silicon-containing surface is provided which includes removing silicon-containing material at a fast rate in order to form a recess in a source/drain (S/D) area on the substrate. According to one example of the fast etch process, a substrate having a silicon-containing surface is placed into a process chamber and heated to a temperature in a range from about 500° C. to about 700° C. While the substrate is heated, the silicon-containing surface is exposed to an etching gas that contains an etchant and a carrier gas. The etchant, such as chlorine gas, may be selected so that a relatively low temperature is used during the etching process while maintaining a fast etch rate. A silicon source may be added to the etching gas to have more control of the removal rate.
- Slow Etch (Pre-Clean and Smooth)
- In one embodiment, a slow etch process (e.g., <100 Å/min) is conducted to remove contaminants and/or surface irregularities, such as roughness, from a substrate surface. The substrate surface is etched to expose an underlayer free of the contaminants and/or material of the substrate surface is redistributed to minimize peaks and troughs that attribute to surface irregularities. During the slow etch process, the substrate is exposed to an etching gas containing an etchant, a silicon source and a carrier gas. The overall reaction is controlled in part by the relative flow rates of the etchant and the silicon source, the specific etchant and silicon source, and the temperature and the pressure that the process is conducted.
- Prior to starting an etching process, a substrate may be exposed to a pre-treatment process to prepare the surface for the subsequent etching. A pre-treatment process may include a wet clean process, such as a HF-last process, a plasma clean, an acid wash process and combinations thereof. In one example, the substrate is treated to a HF-last wet clean process by exposing the surface to a hydrofluoric acid solution for about 2 minutes.
-
FIG. 1 depictsprocess 100 conducted to remove contaminants and/or rough areas onsubstrate 200, as depicted inFIGS. 2A-2C . InFIG. 2A ,substrate 200 contains contaminants and/or rough areas onsurface 210. Apre-determined thickness 220 of thesubstrate 200 includingsurface 210 is removed during the etching process to reveal exposedsurface 230. Alayer 240 is optionally deposited on exposedsurface 230. Usually,layer 240 is a silicon-containing material deposited by an epitaxy deposition process. - Embodiments of the processes described herein etch and deposit silicon-containing materials on various substrates surfaces and substrates. A “substrate” or “substrate surface” as used herein refers to any substrate or material surface formed on a substrate upon which film processing is performed. For example, a substrate surface on which processing may be performed include materials such as silicon, silicon-containing materials, silicon oxide, strained silicon, silicon on insulator (SOI), carbon doped silicon oxides, silicon nitride, doped silicon, silicon germanium, silicon germanium carbon, germanium, gallium arsenide, glass, sapphire, and other materials depending on the application. A substrate surface may also include dielectric materials such as silicon dioxide, silicon nitride, silicon oxynitride, and/or carbon doped silicon oxides. Substrates may have various dimensions, such as 200 mm or 300 mm diameter round wafers, as well as, rectangular or square panes. Embodiments of the processes described herein etch and deposit on many substrates and surfaces, especially, silicon and silicon-containing materials. Substrates on which embodiments of the invention may be useful include, but are not limited to semiconductor wafers, such as crystalline silicon (e.g., Si<100>or Si<111>), silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers silicon nitride and patterned or non-patterned wafers.
- Throughout the application, the terms “silicon-containing” materials, compounds, films or layers should be construed to include a composition containing at least silicon and may contain germanium, carbon, boron, arsenic, phosphorous gallium and/or aluminum. Other elements, such as metals, halogens or hydrogen may be incorporated within a silicon-containing material, compound, film or layer, usually in part per million (ppm) concentrations. Compounds or alloys of silicon-containing materials may be represented by an abbreviation, such as Si for silicon, SiGe, for silicon germanium, SiC for silicon carbon, and SiGeC for silicon germanium carbon. The abbreviations do not represent chemical equations with stoichiometrical relationships, nor represent any particular reduction/oxidation state of the silicon-containing materials. Silicon-containing materials, compounds, films, or layers may include substrates or substrate surfaces.
- Contaminants left on the
surface 210 from a previous process may include organic residues, carbon, oxides, nitrides, halides (e.g., fluorides or chlorides) and combinations thereof. For example,surface 210 may contain a layer of silicon oxide after being exposed to the ambient air or may contain a layer of silicon fluoride after being treated with a HF-last wet clean process.Surface 210 may also contain irregularities, such as regional areas of roughness that include troughs and peaks. - During
step 110,substrate 200 is positioned into a process chamber and heated to a predetermined temperature. The substrate and/or the process chamber is maintained at temperature in a range from about 400° C. to about 800° C., preferably from about 500° C. to about 700° C. The process chamber is maintained at a pressure in a range from about 0.1 Torr to about 750 Torr, preferably, from about 1 Torr to about 100 Torr, and more preferably, from about 10 Torr to about 40 Torr. - The etching gas used during the slow etch process in
step 120 contains an etchant, a silicon source and a carrier gas. Preferably, the etchant is chlorine gas (Cl2). In one example, it has been found that chlorine works exceptionally well as an etchant for silicon-containing materials at temperatures lower than processes using more common etchants. Therefore, an etching process utilizing chlorine may be conducted at a lower process temperature. The silicon source is provided simultaneously with the etchant in order to counter act any over etching of thesubstrate 200. The silicon source is used to deposit silicon on the silicon-containing layer while the etchant removes the silicon-containing material. The rates at which the etchant and the silicon source are introduced to the substrate are adjusted so that the overall reaction favors material removal and/or material redistribution. Therefore, the overall reaction is removing or redistributing silicon-containing material and the etch rate may be finely controlled to several angstroms per minute. - The etchant is provided into the process chamber in the etching gas at a rate in a range from about 1 standard cubic centimeters per minute (sccm) to about 100 sccm, preferably, from about 5 sccm to about 50 sccm, and more preferably, from about 10 sccm to about 30 sccm, for example, about 20 sccm. While chlorine is the preferred etchant, other etchants that may be used solely or in combination include chlorine trifluoride (ClF3), tetrachlorosilane (SiCl4), and derivatives thereof.
- The silicon source is usually provided into the process chamber in the etching gas for slow etch processes at a rate in a range from about 5 sccm to about 500 sccm, preferably from about 10 sccm to about 100 sccm, and more preferably from about 20 sccm to about 80 sccm, for example, about 50 sccm. Silicon sources that may be used in the etching include silanes, halogenated silanes, organosilanes and derivatives thereof. Silanes include silane (SiH4) and higher silanes with the empirical formula SixH(2x+2), such as disilane (Si2H6), trisilane (Si3H8), and tetrasilane (Si4H10), as well as others. Halogenated silanes include compounds with the empirical formula X′ySixH(2x+2−y), where X′ is independently selected from F, Cl, Br, or I, such as hexachlorodisilane (Si2Cl6), tetrachlorosilane (SiCl4), dichlorosilane (Cl2SiH2), and trichlorosilane (Cl3SiH). Organosilanes include compounds with the empirical formula RySixH(2x+2−y), where R is independently selected from methyl, ethyl, propyl or butyl, such as methylsilane ((CH3)SiH3), dimethylsilane ((CH3)2SiH2), ethylsilane ((CH3CH2)SiH3), methyldisilane ((CH3)Si2H5), dimethyldisilane ((CH3)2Si2H4), and hexamethyldisilane ((CH3)6Si2). The preferred silicon sources include silane, dichlorosilane, and disilane.
- The carrier gas is usually provided into the process chamber in the etching gas at a flow rate in a range from about 1 slm (standard liters per minute) to about 100 slm, preferably, from about 5 slm to about 80 slm, and more preferably, from about 10 slm to about 40 slm, for example, about 20 slm. Carrier gases may include nitrogen (N2), hydrogen (H2), argon, helium, or combinations thereof. An inert carrier gas is preferred and includes nitrogen, argon, helium, or combinations thereof. A carrier gas may be selected based on the precursor(s) used and/or the process temperature during the etching process in
step 120. - Preferably, nitrogen is utilized as a carrier gas in embodiments featuring low temperature (e.g., <800° C.) processes. Low temperature processes are accessible due in part to the use of chlorine gas in the etching process. Nitrogen remains inert during low temperature etching processes. Therefore, nitrogen is not incorporated into silicon-containing materials on the substrate during low temperature processes. Also, a nitrogen carrier gas does not form hydrogen-terminated surfaces as does a hydrogen carrier gas. The hydrogen-terminated surfaces formed by the adsorption of hydrogen carrier gas on the substrate surface inhibit the growth rate of subsequently deposited silicon-containing layers. Finally, the low temperature processes may take economic advantage of nitrogen as a carrier gas, since nitrogen is far less expensive than hydrogen, argon or helium. In one example of an etching gas, chlorine is the etchant, silane is the silicon source and nitrogen is the carrier gas.
- During
step 120,substrate 200 andsurface 210 are exposed to an etching gas to remove apredetermined thickness 220 ofsubstrate 200.Surface 210 is also etched during the removal of thepredetermined thickness 220. The etching gas is exposed tosubstrate 200 for a period of time from about 5 seconds to about 5 minutes, preferably from about 30 seconds to about 2 minutes. The amount of time is adjusted relative to the etch rate used in a particular process. The etch rate of a slow etch process is usually less than about 100 Å/min, preferably less than about 50 Å/min. In one embodiment, the slow etch rate is in a range from about 2 Å/min to about 20 Å/min, preferably from about 5 Å/min to about 15 Å/min, for example, about 10 Å/min. In another embodiment, the etch rate is less than about 2 Å/min, preferably less than about 1 Å/min, and more preferably approaches a redistribution of material on the substrate such that the net removal rate is non-measurable relative to the thickness of the layer. As the etch process is slowed to a redistribution reaction, material is removed from the peaks thereon the surface and material is added to troughs thereon the surface. The troughs may be filled by the material derived from the peaks and/or virgin material being produced by the introduction of precursors (e.g., silicon source) in the etching gas. -
Surface 210 may have had a surface roughness of about 6 nm root mean square (RMS) or more. However, once thepredetermined thickness 220 is removed, the exposedsurface 230 is much smoother thansurface 210. The exposed surface may have a surface roughness of about 1 nm RMS or less, preferably about 0.1 nm RMS or less and more preferably about 0.07 nm RMS. Contaminants previously disposed onsurface 210 are removed. The exposedsurface 230 is free or substantially free of contaminants that include organic residues, carbon, oxides, nitrides, halides (e.g., fluorides or chlorides), or combinations thereof. - Once the
predetermined thickness 220 andsurface 210 ofsubstrate 200 are removed,layer 240 may be deposited duringstep 130. Preferably,layer 240 is a silicon-containing material that may be selectively and epitaxially deposited on the exposed surface 230 a chemical vapor deposition (CVD) process. Chemical vapor deposition described herein includes the use of many techniques, such as atomic layer epitaxy (ALE), atomic layer deposition (ALD), plasma-assisted CVD (PA-CVD), atomic layer CVD (ALCVD), organometallic or metalorganic CVD (OMCVD or MOCVD), laser-assisted CVD (LA-CVD), ultraviolet CVD (UV-CVD), hot-wire (HWCVD), reduced-pressure CVD (RP-CVD), ultra-high vacuum CVD (UHV-CVD), and others. In one example, a preferred process is to use thermal CVD to epitaxially grow or deposit a silicon-containing compound aslayer 240 on exposedsurface 230. The deposition gas used duringstep 130 may also contain at least one secondary elemental source, such as a germanium source and/or a carbon source. The germanium source may be added to the process chamber with the silicon source, etchant and carrier gas to form a silicon-containing compound. Therefore, the silicon-containing compound may include silicon, SiGe, SiC, SiGeC, doped variants thereof, and combinations thereof. Germanium and/or carbon may be added to the silicon-containing material by including germanium source (e.g., germane) or a carbon source (e.g., methylsilane) during the deposition process. Dopants may also be included by including a boron source (e.g., diborane), an arsenic source (e.g., arsine), or a phosphorous source (e.g., phosphine) during or after the deposition process. - In another example, a preferred process is to use the CVD process called alternating gas supply (APG) to epitaxially grow or deposit a silicon-containing compound as
layer 240 on exposedsurface 230. The APG deposition process includes a cycle of alternating exposures of silicon-sources and etchants to the substrate surface. An APG deposition is further disclosed in commonly assigned U.S. Ser. No. 11/001,774, filed Dec. 1, 2004, and published as US 2006-0115934, which is incorporated herein by reference in its entirety for the purpose of describing the APG deposition process. -
Process 100 may be used to etch and deposit silicon-containing materials in the same process chamber. Preferably, the slow etch process and the subsequent deposition process are performed in the same process chamber to improve throughput, be more efficient, decrease probability of contamination and benefit process synergies, such as common chemical precursors. In one example, both the slow etch process and the selective, epitaxial deposition process of a silicon-containing compound use chlorine as an etchant and nitrogen as a carrier gas. - Fast Etch
- In another embodiment, a fast etch process (e.g., >100 Å/min) is performed to selectively remove silicon-containing material from the substrate surface. The fast etch process is a selective etch process to remove silicon-containing material while leaving barrier material unscathed. Barrier materials may include silicon nitride, silicon oxide, or silicon oxynitride used as spacers, capping layers and mask.
- In
FIG. 3 ,process 300 is initiated by positioning the substrate into a process chamber and adjusting the process parameters duringstep 310. The substrate and/or the process chamber is heated at a temperature in a range from about 400° C. to about 800° C., preferably from about 500° C. to about 700° C. The process chamber is maintained at a pressure in a range from about 1 Torr to about 750 Torr, preferably, from about 100 Torr to about 700 Torr, and more preferably, from about 400 Torr to about 600 Torr. - The etching gas used during the fast etch process in
step 320 contains an etchant, a carrier gas and an optional silicon source. Preferably, the etchant is chlorine gas, the carrier gas is nitrogen and the silicon source is silane. The etchant is provided into the process chamber in the etching gas at a rate in a range from about 1 sccm to about 100 sccm, preferably from about 5 sccm to about 50 sccm, and more preferably from about 10 sccm to about 30 sccm, for example, about 20 sccm. While chlorine is the preferred etchant in the fast etch process, other etchants that may be used solely or in combination include chlorine trifluoride (ClF3), tetrachlorosilane (SiCl4), and derivatives thereof. - The carrier gas is usually provided into the process chamber in the etching gas at a flow rate in a range from about 1 slm to about 100 slm, preferably from about 5 slm to about 80 slm, and more preferably from about 10 slm to about 40 slm, for example, about 20 slm. Carrier gases may include nitrogen (N2), hydrogen (H2), argon, helium, or combinations thereof. An inert carrier gas is preferred and includes nitrogen, argon, helium, or combinations thereof. A carrier gas may be selected based on the precursor(s) used and/or the process temperature during the etching process in
step 320. Preferably, nitrogen is utilized as a carrier gas in embodiments featuring low temperature (e.g., <800° C.) processes. In one example of an etching gas, chlorine is the etchant and nitrogen is the carrier gas. - In some embodiments, the silicon source is optionally included in the etching gas to provide additional control of the etch rate during fast etch processes. The silicon source is delivered into the process chamber at a rate in a range from about 5 sccm to about 500 sccm, preferably from about 10 sccm to about 100 sccm, and more preferably from about 20 sccm to about 80 sccm, for example, about 50 sccm. Silicon sources that may be used in the etching include silanes, halogenated silanes, organosilanes, and derivatives thereof, as discussed above.
- In
FIG. 4A , at least one source/drain feature 410 is disposed onsubstrate 400.Substrate 400 may be doped or undoped, bare silicon substrate or include a silicon-containing layer disposed thereon.Feature 410 includesgate layer 412 ongate oxide layer 414 surrounded byspacers 416 andprotective capping layer 418. Generally,gate layer 412 is composed of a polysilicon.Gate oxide layer 414 is composed of silicon dioxide, silicon oxynitride or hafnium oxide. Partially encompassing thegate oxide layer 414 is aspacer 416, which is usually an isolation material such as a nitride/oxide stack (e.g., Si3N4/SiO2/Si3N4).Gate layer 412 may optionally have aprotective capping layer 418 adhered thereon. - During
step 320,substrate 400 is exposed to an etching gas to remove apredetermined thickness 425 ofsubstrate 400 and form arecess 430, as depicted inFIG. 4B . The etching gas is exposed tosubstrate 400 for a period of time from about 10 seconds to about 5 minutes, preferably from about 1 minute to about 3 minutes. The amount of time is adjusted relative to the etch rate used in a particular process. The etch rate of a fast etch process is usually more than about 100 Å/min, preferably more than about 200 Å/min, such as at rate in a range from about 200 Å/min to about 1,500 Å/min, preferably, from about 200 Å/min to about 1,000 Å/min, for example about 600 Å/min. - In one example, the etching process may be kept at a fast rate to remove the
predetermined thickness 425, and then reduced to a slow rate process to smooth the remaining surface. The reduced etching rate may be controlled by an etching process described byprocess 100. - Once the
predetermined thickness 425 ofsubstrate 400 is removed,layer 440 may be deposited duringstep 330. Preferably,layer 440 is a silicon-containing material that may be selectively and epitaxially deposited on the exposed surface of recess 430 a CVD process. In one example, the CVD process includes an AGS deposition technique. Alternatively,recess 430 may be exposed to another fabrication process prior to the deposition oflayer 440, such as a doping process. One example of a doping process includes ion implantation, in which a dopant (e.g., boron, phosphorous or arsenic) may be implanted into the surface of therecess 430. -
Process 300 may be used to etch and deposit silicon-containing materials in the same process chamber. Preferably, the fast etch process and the subsequent deposition is performed in the same process chamber to improve throughput, be more efficient, decrease probability of contamination and benefit process synergies, such as common chemical precursors. In one example, both the fast etch process and the selective, epitaxial deposition process of a silicon-containing compound use chlorine as an etchant and nitrogen as a carrier gas. -
FIG. 5 illustrates an alternative embodiment of the invention that includes cleaning the process chamber after finishing a fabricationtechniques using process 500. Duringstep 510, the substrate is exposed to a pre-treatment process that may include a wet clean process, a HF-last process, a plasma clean, an acid wash process, and combinations thereof. After a pre-treatment process and prior to starting an etching process described herein, the substrate may have to remain outside the controlled environment of the process chamber for a period of time called queue time (Q-time). The Q-time in an ambient environment may last about 2 hours or more, usually, the Q-time last much longer, such as from about 6 hours to about 24 hours or longer, such as about 36 hours. A silicon oxide layer usually forms on the substrate surface during the Q-time due to the substrate being exposed to ambient water and oxygen. - During
step 520, the substrate is positioned into a process chamber and exposed to an etching process as described herein. The etching process may be a slow etch process as described instep 120 or a fast etch process as described instep 320. The etching process removes a pre-determined thickness of silicon-containing layer thereon the substrate to form an exposed silicon-containing layer. Thereafter, a secondary material is deposited on the exposed silicon-containing layer duringstep 520. Usually, the secondary material is in a selective, epitaxially deposited silicon-containing compound. The deposition process may include the processes as described insteps steps - A cleaning process is conducted inside the process chamber to remove various contaminants therein during
step 540. Etch processes and/or deposition processes may form or deposit contaminants on surfaces within the process chamber. Usually, the contaminants include silicon-containing materials adhered to the walls and other inner surfaces of the process chamber. - The cleaning process includes heating the process chamber to a temperature in a range from about 600° C. to about 900° C., preferably from about 650° C. to about 800° C. The cleaning process is conducted for a period of time in a range from about 30 seconds to about 3 minutes, preferably, from about 1 minute to about 2 minutes. A cleaning gas contains an etchant and a carrier gas. Preferably, the etchant and the carrier gas are the same gases used during
step 520. The etchant is provided into the process chamber within the cleaning gas at a rate in a range from about 10 sccm to about 5,000 sccm, preferably from about 100 sccm to about 3,000 sccm, and more preferably from about 500 sccm to about 2,000 sccm, for example, about 1,000 sccm. Etchants that may be used within the cleaning gas include chlorine, chlorine trifluoride, tetrachlorosilane, and derivatives thereof. - The carrier is usually provided into the process chamber within the cleaning gas at a flow rate in a range from about 1 slm to about 100 slm, preferably from about 5 slm to about 80 slm, and more preferably from about 10 slm to about 40 slm, for example, about 20 slm. Carrier gases may include nitrogen, hydrogen, argon, helium, or combinations thereof. An inert carrier gas is preferred and includes nitrogen, argon, helium, or combinations thereof. Preferably, chlorine is used as an etchant and nitrogen is used as a carrier gas in embodiments of the cleaning processes. A cleaning process that may be used within embodiments of the invention described herein is further disclosed in commonly assigned U.S. Pat. No. 6,042,654, which is incorporated herein by reference in its entirety. The cleaning process may be repeated after processing each individual substrate or after multiple substrates. In one example, the cleaning process is conducted after processing every 25 substrates.
- In one example of
process 500, the substrate is first exposed to a HF-last process. The substrate is placed into a process chamber and exposed to an etch process that contains chlorine and nitrogen at about 600° C. Within the same process chamber, a silicon-containing layer is epitaxially deposited on the substrate by a deposition process utilizing chlorine and nitrogen at about 625° C. Subsequent the removal of the substrate, the process chamber is heated to about 675° C. and exposed to a cleaning gas containing chlorine and nitrogen. - Embodiments of the etching and depositing processes of silicon-containing compounds described herein may be utilized for fabricating Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and bipolar transistors, such as Bipolar device fabrication (e.g., base, emitter, collector, emitter contact), BiCMOS device fabrication (e.g., base, emitter, collector, emitter contact) and CMOS device fabrication (e.g., channel, source/drain, source/drain extension, elevated source/drain, substrate, strained silicon, silicon on insulator, and contact plug). Other embodiments of processes teach the etching and growing of silicon-containing layers that can be used as gate, base contact, collector contact, emitter contact, elevated source/drain, and other uses.
- The processes of the invention can be carried out in equipment known in the art of CVD or ALE. Hardware that can be used to etch and/or deposit silicon-containing films includes the Epi CENTURA® system and the POLYGEN™ system available from Applied Materials, Inc., located in Santa Clara, Calif. A process chamber useful to etch and deposit as described herein is further disclosed in commonly assigned U.S. Pat. No. 6,562,720, which is incorporated herein by reference in its entirety for the purpose of describing the apparatus. Other enabling apparatuses include batch, high-temperature furnaces, as known in the art.
- The following hypothetical examples were conducted in an Epi CENTURA® system available from Applied Materials, Inc., located in Santa Clara, Calif. The substrates were 300 mm silicon wafers.
- A substrate was exposed to an HF-last process to form a fluoride terminated surface. The substrate was placed in the process chamber and heated to about 600° C. while the atmosphere was maintained at about 20 Torr. The substrate was exposed to an etching gas containing N2 at a flow rate of about 20 slm and Cl2 at flow rate of about 120 sccm. The surface was etched at a rate of about 500 Å/min.
- A substrate was exposed to an HF-last process to form a fluoride terminated surface. The substrate was placed in the process chamber and heated to about 600° C. while the atmosphere was maintained at about 20 Torr. The substrate was exposed to an etching gas containing N2 at a flow rate of about 20 slm, Cl2 at flow rate of about 20 sccm and SiH4 at a flow rate of about 50 sccm. The surface was etched at a rate of about 10 Å/min. Therefore, the addition of a silicon source, such as silane in Example 2, reduced the etch rate of the silicon-containing layer by about 50 times as compared to the etch rate in Example 1.
- A substrate surface containing a silicon-containing layer was cleaved forming a surface with a roughness of about 5.5 nm root mean square (RMS). The substrate was placed in the process chamber and heated to about 650° C. while the atmosphere was maintained at about 200 Torr. The substrate was exposed to an etching gas containing N2 at a flow rate of about 20 slm and Cl2 at flow rate of about 20 sccm. The surface was etched at a rate of about 200 Å/min.
- A substrate surface containing a silicon-containing layer was cleaved forming a surface with a roughness of about 5.5 nm root mean square. The substrate was placed in the process chamber and heated to about 650° C. while the atmosphere was maintained at about 200 Torr. The substrate was exposed to an etching gas containing N2 at a flow rate of about 20 slm, Cl2 at flow rate of about 20 sccm and SiH4 at a flow rate of about 50 sccm. The surface was etched at a rate of about 20 Å/min. The surface roughness was reduced to about 0.1 nm RMS. Therefore, the addition of a silicon source, such as silane used in Example 4, reduced the etch rate of the silicon-containing layer by about 10 times as compared to the etch rate in Example 3.
- A silicon substrate contained a series of silicon nitride line features that are about 90 nm tall, about 100 nm wide and about 150 nm apart, baring the silicon surface. The substrate was placed in the process chamber and heated to about 600° C. while the atmosphere was maintained at about 40 Torr. The substrate was exposed to an etching gas containing N2 at a flow rate of about 20 slm and Cl2 at flow rate of about 80 sccm. The surface was etched at a rate of about 750 Å/min. After about 30 seconds, about 35 nm of the silicon surface was etched. The silicon nitride features remain inert to the etching process. The pressure was increased to about 200 Torr and SiH4 was added to the etching gas at a flow rate of about 50 sccm. The etch rate was reduced to about 18 Å/min to smooth the freshly etched silicon surface. After about 1 minute, the smooth surface is exposed to a selective epitaxy deposition process by increasing the flow of SiH4 to about 100 sccm and maintaining the flow of N2 and Cl2 unchanged. A silicon-containing material was deposited on the silicon surface at a rate of about 25 Å/min.
- A silicon substrate contained a series of silicon nitride line features that are about 90 nm tall, about 100 nm wide and about 150 nm apart, baring the silicon surface. The substrate was placed in the process chamber and heated to about 600° C. while the atmosphere was maintained at about 40 Torr. The substrate was exposed to an etching gas containing N2 at a flow rate of about 20 slm, Cl2 at flow rate of about 80 sccm and SiH4 at flow rate of about 40 sccm. The surface was etched at a rate of about 400 Å/min.
- While the foregoing is directed to embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Claims (26)
1. A method for etching a silicon material on a substrate surface, comprising:
positioning a substrate comprising a silicon-containing material within a process chamber, wherein a contaminant is disposed on the silicon-containing material;
heating the substrate to a temperature of less than 800° C.; and
exposing the silicon-containing material to an etching gas comprising a chlorine-containing gas and a silicon source gas to remove the contaminant and a predetermined thickness of the silicon-containing material during an etching process.
2. The method of claim 1 , wherein the chlorine-containing gas comprises a source gas selected from the group consisting of chlorine gas, chlorine trifluoride, tetrachlorosilane, derivatives thereof, and combinations thereof.
3. The method of claim 1 , wherein the silicon-containing material is removed at a rate within a range from about 2 Å per minute to about 20 Å per minute.
4. The method of claim 3 , wherein the temperature of the substrate is within a range from about 500° C. to about 700° C.
5. The method of claim 1 , wherein the etching gas comprises a carrier gas selected from the group consisting of nitrogen, argon, helium, and combinations thereof.
6. The method of claim 5 , wherein the silicon source gas is selected from the group consisting of silane, disilane, methylsilane, derivatives thereof, and combinations thereof.
7. The method of claim 6 , wherein the carrier gas comprises nitrogen and the silicon source gas comprises silane.
8. The method of claim 1 , wherein an epitaxy deposition process is conducted within the process chamber subsequent the etching process.
9. The method of claim 1 , wherein the contaminant comprises a species selected from the group consisting of oxide, fluoride, chloride, nitride, organic residue, carbon, derivatives thereof, and combinations thereof.
10. The method of claim 9 , wherein the substrate is exposed to a wet clean process prior to positioning the substrate within the process chamber.
11. The method of claim 10 , wherein the substrate is exposed to ambient conditions for a time period within a range from about 6 hours to about 24 hours subsequent the wet clean process and prior to positioning the substrate within the process chamber.
12. The method of claim 9 , wherein the silicon-containing material further comprises a rough surface that is removed during the etching process.
13. A method for smoothing a silicon-containing material on a substrate surface, comprising:
positioning a substrate comprising a first silicon-containing surface within a process chamber, wherein the first silicon-containing surface comprises a surface roughness of about 1 nm RMS or greater;
heating the substrate to a temperature of less than 800° C.; and
exposing the substrate to an etching gas comprising a chlorine-containing gas and a silicon source gas to form a second silicon-containing surface from the first silicon-containing surface during a smoothing process, wherein the second silicon-containing surface comprises a surface roughness of less than 1 nm RMS.
14. The method of claim 13 , wherein the chlorine-containing gas comprises a source gas selected from the group consisting of chlorine gas, chlorine trifluoride, tetrachlorosilane, derivatives thereof, and combinations thereof.
15. The method of claim 13 , wherein a predetermined thickness of the first silicon-containing surface is removed at a rate within a range from about 2 Å per minute to about 20 Å per minute.
16. The method of claim 15 , wherein the temperature of the substrate is within a range from about 500° C. to about 700° C.
17. The method of claim 13 , wherein the etching gas comprises a carrier gas selected from the group consisting of nitrogen, argon, helium, and combinations thereof.
18. The method of claim 17 , wherein the silicon source gas is selected from the group consisting of silane, disilane, methylsilane, derivatives thereof, and combinations thereof.
19. A method for forming a silicon-containing monocrystalline material on a substrate, comprising:
exposing a substrate to a HF-last wet clean solution during a preclean process;
positioning the substrate within a process chamber, wherein the substrate comprises a silicon-containing monocrystalline surface;
heating the substrate to a temperature of less than 800° C.;
exposing the substrate to an etching gas comprising a chlorine-containing gas and a silicon source gas to remove a predetermined thickness of the silicon-containing monocrystalline surface while forming an exposed monocrystalline surface; and
depositing an epitaxy layer on the exposed monocrystalline surface within the process chamber.
20. The method of claim 19 , wherein the chlorine-containing gas comprises a source gas selected from the group consisting of chlorine gas, chlorine trifluoride, tetrachlorosilane, derivatives thereof, and combinations thereof.
21. The method of claim 20 , wherein the silicon source gas is selected from the group consisting of silane, disilane, methylsilane, derivatives thereof, and combinations thereof.
22. The method of claim 21 , wherein the etching gas comprises a carrier gas selected from the group consisting of nitrogen, argon, helium, and combinations thereof.
23. The method of claim 19 , wherein the epitaxy layer is deposited by a deposition gas containing chlorine gas.
24. The method of claim 19 , further comprising cleaning the process chamber with the etching gas to remove a silicon-containing contaminant adhered on an inner surface of the process chamber during a post-clean process subsequent to the deposition of the epitaxy layer.
25. The method of claim 24 , wherein the process chamber is heated to a temperature within a range from about 500° C. to about 700° C. during the post-clean process.
26. The method of claim 24 , wherein nitrogen is co-flowed with chlorine gas during the post-clean process.
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US20060169669A1 (en) | 2006-08-03 |
US8093154B2 (en) | 2012-01-10 |
CN101155648A (en) | 2008-04-02 |
US20120108039A1 (en) | 2012-05-03 |
EP2023377A3 (en) | 2010-03-17 |
US8492284B2 (en) | 2013-07-23 |
US20120070961A1 (en) | 2012-03-22 |
EP2023376A2 (en) | 2009-02-11 |
EP2023377A2 (en) | 2009-02-11 |
CN101155648B (en) | 2016-08-03 |
EP2023376A3 (en) | 2010-03-17 |
US20060169668A1 (en) | 2006-08-03 |
US7235492B2 (en) | 2007-06-26 |
US8445389B2 (en) | 2013-05-21 |
JP5329094B2 (en) | 2013-10-30 |
JP2008529306A (en) | 2008-07-31 |
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