US20080003916A1 - Field emission device - Google Patents
Field emission device Download PDFInfo
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- US20080003916A1 US20080003916A1 US11/798,481 US79848107A US2008003916A1 US 20080003916 A1 US20080003916 A1 US 20080003916A1 US 79848107 A US79848107 A US 79848107A US 2008003916 A1 US2008003916 A1 US 2008003916A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
- H01J1/02—Main electrodes
- H01J1/30—Cold cathodes, e.g. field-emissive cathode
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
- H01J9/02—Manufacture of electrodes or electrode systems
- H01J9/022—Manufacture of electrodes or electrode systems of cold cathodes
- H01J9/025—Manufacture of electrodes or electrode systems of cold cathodes of field emission cathodes
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- C—CHEMISTRY; METALLURGY
- C01—INORGANIC CHEMISTRY
- C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
- C01B32/00—Carbon; Compounds thereof
- C01B32/05—Preparation or purification of carbon not covered by groups C01B32/15, C01B32/20, C01B32/25, C01B32/30
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J3/00—Details of electron-optical or ion-optical arrangements or of ion traps common to two or more basic types of discharge tubes or lamps
- H01J3/02—Electron guns
- H01J3/021—Electron guns using a field emission, photo emission, or secondary emission electron source
- H01J3/022—Electron guns using a field emission, photo emission, or secondary emission electron source with microengineered cathode, e.g. Spindt-type
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
Definitions
- the present invention relates to a field emission device, and more particularly, to a field emission device having improved electron emission efficiency, brightness, color purity, and durability due to a focusing electric field.
- a cathode 2 is formed on a substrate 1 , and a gate insulating layer 3 is formed on the cathode 2 .
- the gate insulating layer 3 has a well 3 a that exposes a portion of the cathode 2 .
- An electron emitter 4 is formed of carbon nanotubes on the exposed portion of the cathode 2 .
- a gate electrode 5 with a gate hole 5 a corresponding to the well 3 a is formed on the gate insulating layer 3 .
- a cathode 2 is formed of a transparent conductive material such as ITO on a substrate 1 made of glass. Actually, a plurality of cathodes 2 are formed in parallel strips. To form the cathode 2 , a process of depositing ITO on the entire surface of the substrate 1 and patterning the ITO is performed.
- a first insulator 3 ′ is coated on the cathode 2 , and then heated. Thereafter, a second insulator 3 ′′ having a lower etching rate to an etchant than the first insulator 3 ′ is coated on the first insulator 3 ′, and then heated. As a result, a gate insulating layer 3 having a thickness of about 10 microns is completed.
- chromium (Cr) is deposited on the gate insulating layer 3 to form a gate electrode 5 .
- a photoresist layer 6 is coated on the gate electrode 5 .
- the photoresist layer 6 is patterned to form a window 6 a corresponding to a gate hole 5 a and a well 3 a in the photoresist layer 6 .
- a portion of the gate electrode 5 exposed by the window 6 a is dry etched.
- an etchant is supplied through the window 6 a to etch the gate insulating layer 3 .
- the first insulator 3 ′ of the gate insulating layer 3 has a higher etching rate than the second insulator 3 ′′ of the gate insulating layer 3 , the well 3 a shown in FIG. 2F is formed.
- the gate electrode 5 is patterned to broaden the gate hole 5 a . Due to patterning of the gate electrode 5 , the gate electrode 5 on the gate insulating layer 3 is divided into a plurality of gate electrodes which are arranged in parallel strips.
- a photoresist 7 is properly coated on the gate electrode 5 , and then patterned so that a portion of the cathode 2 in the center of the floor of the well 3 a is exposed.
- a CNT paste 4 a containing photoresist is coated on the photoresist 7 .
- the CNT paste 4 a fills the well 3 a .
- an exposure and development process is performed using a pattern mask (not shown) so that the CNT paste 4 a remains in the center of the floor of the well 3 a .
- an electron emitter 4 is formed on the cathode 2 .
- a lower substrate including an electron gun structure having a cathode, a gate electrode, and so forth is completed.
- the lower substrate is heated, and then sealed to a front substrate, which is coated with R, G, and B fluorescent materials, with a predetermined gap between the two substrates.
- an electron beam emitted from the electron emitter 4 diverges due to mutual repulsion of electrons in the electron beam and a strong electric field is formed by applying a positive voltage to the gate electrode 5 .
- the electron beam is defocused, which increases the size of a spot formed on the fluorescent material.
- the electron beam lands on other regions adjacent to its intended target fluorescent material.
- color purity is degraded, which results in poor image quality.
- the positive voltage of the gate electrode 5 increases, the electron beam further diverges after exiting the gate hole 5 a .
- most of the intensity of the electron beam radiated onto a fluorescent material is at the periphery of a corresponding pixel. If divergence of the electron beam is not minimized, load on the electron emitter 4 increases during high current driving or a long driving period, thereby reducing the life span of the electron gun structure.
- spint type FED using metal micro tips as an electron emitter.
- a method of forming a double gate was introduced in order to reduce divergence of the electron beam.
- the spint type FED has a complicated structure, is not suitable as a wide-screen FED, and is expensive.
- the present invention provides an FED capable of effectively focusing an electron beam emitted from an electron emitter.
- the present invention provides a FED having improved color purity and clearness due to effective focusing of an electron beam.
- a field emission device including a substrate, a cathode, a gate insulating layer, an electron emitter, and a gate electrode.
- the cathode is formed on the substrate.
- the gate insulating layer is formed on the cathode and has a well exposing a portion of the cathode.
- the electron emitter is formed on the exposed portion of the cathode.
- the gate electrode is formed on the gate insulating layer and has a gate hole corresponding to the well.
- the gate electrode further includes a cylindrical electrode part that forms a focusing electric field from the gate hole toward a proceeding path of an electron beam.
- the cylindrical electrode part is a Bellmouse type electrode part that broadens in the direction of propagation of the electron beam.
- the electron emitter is micro tips or carbon nanotubes.
- a method of manufacturing a field emission device A first insulating layer and a second insulating layer having a higher etching rate than the first insulating layer are sequentially coated on a substrate on which a cathode is formed, to form a gate insulating layer.
- a first mask having a window with a predetermined diameter is formed on the gate insulating layer to form a well in the gate insulating layer.
- An etchant is supplied through the window to form a well that broadens upward in the gate insulating layer beneath the window of the first mask and exposes a portion of the cathode.
- a gate electrode is deposited on the gate insulating layer. A portion of the gate electrode on the bottom and lower inner wall of the well is removed to form a gate hole corresponding to the cathode in the gate electrode.
- An electron emitter is formed on the exposed portion of the cathode.
- the first mask is removed.
- a second mask having a window corresponding to the gate hole is formed, etched, and removed so as to form the gate hole.
- a third mask is formed on the gate electrode to expose only a portion of the cathode and cover the remaining area of the cathode so as to form the electron emitter.
- a carbon nanotube paste containing photoresist is coated, and then patterned by photolithography so as to form the electron emitter.
- FIG. 1 is a schematic cross-sectional view of a conventional FED
- FIGS. 2A through 2J are cross-sectional views for explaining a process of manufacturing the conventional FED shown in FIG. 1 ;
- FIG. 3A is a schematic cross-sectional view of a single gate type FED according to an embodiment of the present invention.
- FIG. 3B is a schematic cross-sectional view of a single gate type FED according to another embodiment of the present invention.
- FIG. 4A is a schematic cross-sectional view of a double gate type FED according to an embodiment of the present invention.
- FIG. 4B is a schematic cross-sectional view of a double gate type FED according to another embodiment of the present invention.
- FIG. 5 is a view for explaining the principle of focusing an electron beam by a Bellmouse type electrode part of a gate electrode according to the present invention
- FIGS. 6A through 6L are cross-sectional views for explaining a process of manufacturing the single gate type FED shown in FIG. 3 ;
- FIGS. 7A through 7D are views illustrating results of a simulation carried out for the conventional FED.
- FIGS. 8A through 8D are views illustrating results of a simulation carried out for an FED according to the present invention.
- the FED of the present invention will be described as having a single gate structure. However, the FED may have a double gate structure without departing from the scope of the present invention.
- FIG. 3A is a schematic cross-sectional view of a single gate type FED using micro tips as an electron emitter according to an embodiment of the present invention.
- a cathode 21 is formed on a substrate 20 .
- a gate insulating layer 22 is formed on the cathode 21 .
- the gate insulating layer 22 has a well 22 a which exposes a portion of the cathode 21 .
- An electron emitter 23 is formed of micro tips on the exposed portion of the cathode 21 .
- a gate electrode 24 which has a gate hole 24 a corresponding to the well 22 a , is formed on the gate insulating layer 22 .
- a characteristic part of the present invention is a Bellmouse type cylindrical electrode part 24 b that forms a focusing electric field around an electron beam passed through the gate hole 24 a of the gate electrode part 24 .
- the cylindrical electrode part 24 b preferably has a Bellmouse shape which gradually broadens in the direction of electron beam propagation.
- the cylindrical electrode part 24 b forms an electric field that converges or focuses the electron beam emitted from the electron emitter, i.e., the micro tips.
- FIG. 5 is a view for explaining the principle of forming an electric field using the cylindrical electrode part 24 b and focusing an electron beam by the electric field. As shown in FIG.
- a positive electric lens L much like an optical convex lens, is formed by the cylindrical electrode part 24 b (electric lens forming part).
- the positive electric lens L serves as a focusing lens that focuses a passing electron beam toward the central beam axis using an electric field.
- the theory behind the positive electric lens L is general electrodynamics, and thus will not be further described.
- FIG. 3B is a schematic cross-sectional view of a single gate type FED using CNTs as an electron emitter.
- a cathode 21 is formed on a substrate 20 .
- a gate insulating layer 22 is formed on the cathode 21 .
- the gate insulating layer 22 has a well 22 a which exposes a portion of the cathode 21 .
- An electron emitter 23 a is formed of CNTs on the exposed portion of the cathode 21 .
- a gate electrode 24 which has a gate hole 24 a corresponding to the well 22 a , is formed on the gate insulating layer 22 .
- FIG. 4A is a schematic cross-sectional view of a double gate type FED using micro tips as an electron emitter according to an embodiment of the present invention.
- a cathode 31 is formed on a substrate 30 .
- Micro tips, i.e., an electron emitter 35 is formed on the cathode 31 .
- a first gate insulating layer 32 and a second gate insulating layer 33 which form a well 36 enclosing the electron emitter 35 , are sequentially stacked on the cathode 31 .
- a first gate electrode 32 a is interposed between the first and second gate insulating layers 32 and 33 .
- a second gate electrode 34 having a gate hole 34 a corresponding to the well 36 is formed on the second gate insulating layer 33 .
- a cylindrical electrode part characterizing the present invention preferably a Bellmouse type electrode part 34 b , is formed at the second gate electrode 34 .
- a double gate type FED shown in FIG. 4B has an electron emitter 35 a formed of CNTs instead of the electron emitter 35 formed of the micro tips shown FIG. 4A .
- the remaining elements of the double gate type FED shown FIG. 4B are the same as those of the double gate type FED shown in FIG. 4A .
- an FED according to the present invention is characterized in that a cylindrical electrode part for forming a focusing electric field, preferably a Bellmouse type electrode part, is formed at a gate electrode.
- the Bellmouse type electrode part is most effective in a single gate type FED using CNTs as an electron emitter as shown in FIG. 3B .
- a double gate type FED can effectively focus an electron beam without a cylindrical or Bellmouse type electrode part.
- a cylindrical or Bellmouse type electrode part characterizing the present invention can be formed at a second gate electrode. Thus, an electron beam can be further effectively focused.
- ITO is deposited on a substrate 20 , and then patterned, thereby forming a cathode 21 .
- a gate insulating layer 22 is formed on the cathode 21 .
- the gate insulating layer 22 includes first and second gate insulating layers 22 ′ and 22 ′′ having different etching rates.
- the second gate insulating layer 22 ′′ has a higher etching rate to an etchant than the first gate insulating layer 22 ′.
- Each of the first and second gate insulating layers 22 ′ and 22 ′′ undergoes coating and heating processes.
- the first gate insulating layer 22 ′ is formed of 7870K of Noritake Co. to a thickness of about 5 microns
- the second gate insulating layer 22 ′′ is formed of 7972C of Noritake Co. to a thickness of about 1 microns.
- a photoresist mask 41 having a window 41 a necessary for forming a well of a gate is coated on the gate insulating layer 22 .
- a Bellmouse-shaped well 26 is formed by supplying an etchant through the window 41 a of the photoresist mask 41 .
- the Bellmouse-shaped well 26 broadens upward due to a difference between the etching rates of the first and second gate insulating layers 22 ′ and 22 ′′.
- the photoresist mask 41 is stripped by ashing.
- a gate electrode 24 is formed on the gate insulating layer 22 using a sputtering method.
- a photoresist mask 42 is formed on the gate electrode 24 , and then patterned, thereby forming a window 42 a that is opened to expose the floor and lower inner wall of the Bellmouse-shaped well 26 .
- the photoresist mask 42 has a pattern necessary for forming the window 42 a and the gate electrode 24 .
- the first gate insulating layer 22 ′ and the window 42 are further formed.
- the gate electrode 24 is patterned by wet or dry etching using the photoresist mask 42 to form a gate hole 24 a corresponding to the window 42 a in the gate electrode 24 .
- the gate electrode 24 is divided into a plurality of patterns as in a general patterning process.
- the photoresist mask 42 is stripped by ashing. Thereafter, as shown in FIG. 6J , a photoresist mask 43 is formed.
- the photoresist mask 43 is spin coated and patterned to form a well-shaped window 43 a exposing the floor of the Bellmouse-shaped well 26 .
- a CNT paste 23 containing photoresist is coated on the photoresist mask 43 using a printing method.
- the well-shaped window 43 a is filled with the CNT paste 23 .
- the CNT paste 23 is patterned by exposure and development processes to remove a portion of the CNT paste 23 at the edge of the well-shaped window 43 a , thereby forming an electron emitter 23 a in the center of the inside of the well-shape window 43 a .
- a portion of the CNT paste 23 remaining on the photoresist mask 43 is removed by lifting up the photoresist mask 43 .
- An FED having a desired structure can be manufactured through the above-described processes.
- FIGS. 7B and 8B each illustrate enlarged portions around gate electrodes of the FEDs shown in FIGS. 7A and 8A
- FIGS. 7C and 8C each illustrate trajectories of divergent electron beams around the gate electrodes of the FEDs shown in FIGS. 7A and 8A
- the electron beam is focused at a narrower angle due to the gate electrode than in the conventional FED shown in FIG. 7C .
- the electron beam diverges in the conventional FED shown in FIG. 7C part of the electron beam is intercepted by the edge of the gate hole, which causes a leakage current from the gate electrode.
- FIGS. 7D and 8D each illustrate trajectories of electron beams emitted from the FEDs shown in FIGS. 7A and 8A .
- a radius of an electron beam emitted from the FED of the present invention shown in FIG. 8A is narrower than that of an electron beam emitted from the conventional FED shown FIG. 7A .
- the simulations showed that in the present invention, electron beams reaching a front substrate on which an anode and a fluorescent material are formed are focused with an approximately 10% smaller width than in the conventional FED.
- the width of a well of a gate insulating layer was limited to 30 microns due to the height of the gate insulating layer.
- the width of a well of the first gate insulating layer 22 ′ of a gate insulating layer can be adjusted by adjusting an area of the gate insulating layer to be etched.
- the well can be minutely formed to a width of 30 microns or less.
- an FED having high color purity and brightness can be manufactured. Since the FED according to the present invention can form electron beams having a desired width using a single gate electrode, the FED of the present invention does not need a complicated double gate electrode. However, if the FED is desired to have higher color purity, brightness, and performance than existing double gate electrode type FEDs, a cylindrical electrode part, preferably a Bellmouse type electrode part, can be formed at a final gate electrode, i.e., a second gate electrode.
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Abstract
Provided is a field emission device using carbon nanotubes. The field emission device includes a substrate, a cathode, a gate insulating layer, an electron emitter, and a gate electrode. The cathode is formed on the substrate. The gate insulating layer is formed on the cathode and has a well exposing a portion of the cathode. The electron emitter is formed on the exposed portion of the cathode. The gate electrode is formed on the gate insulating layer and has a gate hole corresponding to the well. The gate electrode further includes a cylindrical electrode part that forms a focusing electric field from the gate hole toward a proceeding path of an electron beam. Accordingly, a focusing electric field can be formed around an electron beam emitted from the electron emitter so as to converge and focus the electron beam passing through the focusing electric field. As a result, color purity, brightness, and durability can be improved.
Description
- This application claims the priority of Korean Patent Application No. 2002-64345, filed on Oct. 21, 2002, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
- 1. Field of the Invention
- The present invention relates to a field emission device, and more particularly, to a field emission device having improved electron emission efficiency, brightness, color purity, and durability due to a focusing electric field.
- 2. Description of the Related Art
- As shown in
FIG. 1 , in a field emission device (FED) using carbon nanotubes (CNTs), acathode 2 is formed on asubstrate 1, and agate insulating layer 3 is formed on thecathode 2. Thegate insulating layer 3 has awell 3 a that exposes a portion of thecathode 2. Anelectron emitter 4 is formed of carbon nanotubes on the exposed portion of thecathode 2. Agate electrode 5 with agate hole 5 a corresponding to thewell 3 a is formed on thegate insulating layer 3. - A process of manufacturing a conventional FED having the above-described structure will be described in brief with reference to
FIGS. 2A through 2J . - As shown in
FIG. 2A , acathode 2 is formed of a transparent conductive material such as ITO on asubstrate 1 made of glass. Actually, a plurality ofcathodes 2 are formed in parallel strips. To form thecathode 2, a process of depositing ITO on the entire surface of thesubstrate 1 and patterning the ITO is performed. - Referring to
FIG. 2B , afirst insulator 3′ is coated on thecathode 2, and then heated. Thereafter, asecond insulator 3″ having a lower etching rate to an etchant than thefirst insulator 3′ is coated on thefirst insulator 3′, and then heated. As a result, agate insulating layer 3 having a thickness of about 10 microns is completed. - As shown in
FIG. 2C , chromium (Cr) is deposited on thegate insulating layer 3 to form agate electrode 5. - As shown in
FIG. 2D , aphotoresist layer 6 is coated on thegate electrode 5. Thereafter, as shown inFIG. 2E , thephotoresist layer 6 is patterned to form awindow 6 a corresponding to agate hole 5 a and a well 3 a in thephotoresist layer 6. Next, a portion of thegate electrode 5 exposed by thewindow 6 a is dry etched. - Referring to
FIG. 2F , an etchant is supplied through thewindow 6 a to etch thegate insulating layer 3. Here, since thefirst insulator 3′ of thegate insulating layer 3 has a higher etching rate than thesecond insulator 3″ of thegate insulating layer 3, thewell 3 a shown inFIG. 2F is formed. - As shown in
FIG. 2G , thegate electrode 5 is patterned to broaden thegate hole 5 a. Due to patterning of thegate electrode 5, thegate electrode 5 on thegate insulating layer 3 is divided into a plurality of gate electrodes which are arranged in parallel strips. - Referring to
FIG. 2H , aphotoresist 7 is properly coated on thegate electrode 5, and then patterned so that a portion of thecathode 2 in the center of the floor of thewell 3 a is exposed. - As shown in
FIG. 2I , aCNT paste 4 a containing photoresist is coated on thephotoresist 7. Here, the CNT paste 4 a fills the well 3 a. - Referring to
FIG. 2J , an exposure and development process is performed using a pattern mask (not shown) so that the CNT paste 4 a remains in the center of the floor of the well 3 a. As a result, anelectron emitter 4 is formed on thecathode 2. - Through the above-described process, a lower substrate including an electron gun structure having a cathode, a gate electrode, and so forth is completed. Next, the lower substrate is heated, and then sealed to a front substrate, which is coated with R, G, and B fluorescent materials, with a predetermined gap between the two substrates.
- In the electron gun structure shown in
FIG. 1 orFIG. 2J , an electron beam emitted from theelectron emitter 4 diverges due to mutual repulsion of electrons in the electron beam and a strong electric field is formed by applying a positive voltage to thegate electrode 5. As a result, the electron beam is defocused, which increases the size of a spot formed on the fluorescent material. Then, the electron beam lands on other regions adjacent to its intended target fluorescent material. Thus, color purity is degraded, which results in poor image quality. Also, as the positive voltage of thegate electrode 5 increases, the electron beam further diverges after exiting thegate hole 5 a. Thus, most of the intensity of the electron beam radiated onto a fluorescent material is at the periphery of a corresponding pixel. If divergence of the electron beam is not minimized, load on theelectron emitter 4 increases during high current driving or a long driving period, thereby reducing the life span of the electron gun structure. - These problems occur in a spint type FED using metal micro tips as an electron emitter. Thus, for the spint type FED, a method of forming a double gate was introduced in order to reduce divergence of the electron beam. However, as is known, the spint type FED has a complicated structure, is not suitable as a wide-screen FED, and is expensive.
- Accordingly, the present invention provides an FED capable of effectively focusing an electron beam emitted from an electron emitter.
- The present invention provides a FED having improved color purity and clearness due to effective focusing of an electron beam.
- According to an aspect of the present invention, there is provided a field emission device including a substrate, a cathode, a gate insulating layer, an electron emitter, and a gate electrode. The cathode is formed on the substrate. The gate insulating layer is formed on the cathode and has a well exposing a portion of the cathode. The electron emitter is formed on the exposed portion of the cathode. The gate electrode is formed on the gate insulating layer and has a gate hole corresponding to the well. The gate electrode further includes a cylindrical electrode part that forms a focusing electric field from the gate hole toward a proceeding path of an electron beam.
- It is preferable that the cylindrical electrode part is a Bellmouse type electrode part that broadens in the direction of propagation of the electron beam.
- The electron emitter is micro tips or carbon nanotubes.
- According to another aspect of the present invention, there is also provided a method of manufacturing a field emission device. A first insulating layer and a second insulating layer having a higher etching rate than the first insulating layer are sequentially coated on a substrate on which a cathode is formed, to form a gate insulating layer. A first mask having a window with a predetermined diameter is formed on the gate insulating layer to form a well in the gate insulating layer. An etchant is supplied through the window to form a well that broadens upward in the gate insulating layer beneath the window of the first mask and exposes a portion of the cathode. A gate electrode is deposited on the gate insulating layer. A portion of the gate electrode on the bottom and lower inner wall of the well is removed to form a gate hole corresponding to the cathode in the gate electrode. An electron emitter is formed on the exposed portion of the cathode.
- It is preferable that after forming the well, the first mask is removed. Preferably, when removing the portion of the gate electrode, a second mask having a window corresponding to the gate hole is formed, etched, and removed so as to form the gate hole.
- It is preferable that a third mask is formed on the gate electrode to expose only a portion of the cathode and cover the remaining area of the cathode so as to form the electron emitter.
- It is preferable that after forming the third mask, a carbon nanotube paste containing photoresist is coated, and then patterned by photolithography so as to form the electron emitter.
- The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings in which:
-
FIG. 1 is a schematic cross-sectional view of a conventional FED; -
FIGS. 2A through 2J are cross-sectional views for explaining a process of manufacturing the conventional FED shown inFIG. 1 ; and -
FIG. 3A is a schematic cross-sectional view of a single gate type FED according to an embodiment of the present invention; -
FIG. 3B is a schematic cross-sectional view of a single gate type FED according to another embodiment of the present invention; -
FIG. 4A is a schematic cross-sectional view of a double gate type FED according to an embodiment of the present invention; -
FIG. 4B is a schematic cross-sectional view of a double gate type FED according to another embodiment of the present invention; -
FIG. 5 is a view for explaining the principle of focusing an electron beam by a Bellmouse type electrode part of a gate electrode according to the present invention; -
FIGS. 6A through 6L are cross-sectional views for explaining a process of manufacturing the single gate type FED shown inFIG. 3 ; -
FIGS. 7A through 7D are views illustrating results of a simulation carried out for the conventional FED; and -
FIGS. 8A through 8D are views illustrating results of a simulation carried out for an FED according to the present invention. - Hereinafter, an FED and a method of manufacturing the FED according to the present invention will be described in detail with reference to the attached drawings. The FED of the present invention will be described as having a single gate structure. However, the FED may have a double gate structure without departing from the scope of the present invention.
-
FIG. 3A is a schematic cross-sectional view of a single gate type FED using micro tips as an electron emitter according to an embodiment of the present invention. Referring toFIG. 3A , acathode 21 is formed on asubstrate 20. Agate insulating layer 22 is formed on thecathode 21. Thegate insulating layer 22 has a well 22 a which exposes a portion of thecathode 21. Anelectron emitter 23 is formed of micro tips on the exposed portion of thecathode 21. Agate electrode 24, which has agate hole 24 a corresponding to the well 22 a, is formed on thegate insulating layer 22. - In the above structure, a characteristic part of the present invention is a Bellmouse type
cylindrical electrode part 24 b that forms a focusing electric field around an electron beam passed through thegate hole 24 a of thegate electrode part 24. As shown inFIG. 3A , thecylindrical electrode part 24 b preferably has a Bellmouse shape which gradually broadens in the direction of electron beam propagation. Thecylindrical electrode part 24 b forms an electric field that converges or focuses the electron beam emitted from the electron emitter, i.e., the micro tips.FIG. 5 is a view for explaining the principle of forming an electric field using thecylindrical electrode part 24 b and focusing an electron beam by the electric field. As shown inFIG. 5 , a positive electric lens L, much like an optical convex lens, is formed by thecylindrical electrode part 24 b (electric lens forming part). The positive electric lens L serves as a focusing lens that focuses a passing electron beam toward the central beam axis using an electric field. The theory behind the positive electric lens L is general electrodynamics, and thus will not be further described. -
FIG. 3B is a schematic cross-sectional view of a single gate type FED using CNTs as an electron emitter. Referring toFIG. 3B , acathode 21 is formed on asubstrate 20. Agate insulating layer 22 is formed on thecathode 21. Thegate insulating layer 22 has a well 22 a which exposes a portion of thecathode 21. Anelectron emitter 23 a is formed of CNTs on the exposed portion of thecathode 21. Agate electrode 24, which has agate hole 24 a corresponding to the well 22 a, is formed on thegate insulating layer 22. -
FIG. 4A is a schematic cross-sectional view of a double gate type FED using micro tips as an electron emitter according to an embodiment of the present invention. As shown inFIG. 4A , acathode 31 is formed on asubstrate 30. Micro tips, i.e., anelectron emitter 35, is formed on thecathode 31. A firstgate insulating layer 32 and a secondgate insulating layer 33, which form a well 36 enclosing theelectron emitter 35, are sequentially stacked on thecathode 31. Afirst gate electrode 32 a is interposed between the first and secondgate insulating layers second gate electrode 34 having agate hole 34 a corresponding to the well 36 is formed on the secondgate insulating layer 33. As described previously, a cylindrical electrode part characterizing the present invention, preferably a Bellmousetype electrode part 34 b, is formed at thesecond gate electrode 34. - A double gate type FED shown in
FIG. 4B has anelectron emitter 35 a formed of CNTs instead of theelectron emitter 35 formed of the micro tips shownFIG. 4A . The remaining elements of the double gate type FED shownFIG. 4B are the same as those of the double gate type FED shown inFIG. 4A . - As described above, an FED according to the present invention is characterized in that a cylindrical electrode part for forming a focusing electric field, preferably a Bellmouse type electrode part, is formed at a gate electrode. The Bellmouse type electrode part is most effective in a single gate type FED using CNTs as an electron emitter as shown in
FIG. 3B . A double gate type FED can effectively focus an electron beam without a cylindrical or Bellmouse type electrode part. However, also in the double gate type FED, a cylindrical or Bellmouse type electrode part characterizing the present invention can be formed at a second gate electrode. Thus, an electron beam can be further effectively focused. - Hereinafter, a method of manufacturing the single gate type FED shown in
FIG. 3B will be described. Methods of manufacturing FEDs according to other embodiments of the present invention can be easily understood through this description. - As shown in
FIG. 6A , ITO is deposited on asubstrate 20, and then patterned, thereby forming acathode 21. - As shown in
FIG. 6B , agate insulating layer 22 is formed on thecathode 21. Here, thegate insulating layer 22 includes first and secondgate insulating layers 22′ and 22″ having different etching rates. The secondgate insulating layer 22″ has a higher etching rate to an etchant than the firstgate insulating layer 22′. Each of the first and secondgate insulating layers 22′ and 22″ undergoes coating and heating processes. For example, the firstgate insulating layer 22′ is formed of 7870K of Noritake Co. to a thickness of about 5 microns, and the secondgate insulating layer 22″ is formed of 7972C of Noritake Co. to a thickness of about 1 microns. - As shown in
FIG. 6C , aphotoresist mask 41 having awindow 41 a necessary for forming a well of a gate is coated on thegate insulating layer 22. - As shown in
FIG. 6D , a Bellmouse-shaped well 26 is formed by supplying an etchant through thewindow 41 a of thephotoresist mask 41. The Bellmouse-shaped well 26 broadens upward due to a difference between the etching rates of the first and secondgate insulating layers 22′ and 22″. - As shown in
FIG. 6E , thephotoresist mask 41 is stripped by ashing. Next, as shown inFIG. 6F , agate electrode 24 is formed on thegate insulating layer 22 using a sputtering method. - As shown in
FIG. 6G , aphotoresist mask 42 is formed on thegate electrode 24, and then patterned, thereby forming awindow 42 a that is opened to expose the floor and lower inner wall of the Bellmouse-shapedwell 26. Here, thephotoresist mask 42 has a pattern necessary for forming thewindow 42 a and thegate electrode 24. In the present embodiment, the firstgate insulating layer 22′ and thewindow 42 are further formed. - As shown in
FIG. 6H , thegate electrode 24 is patterned by wet or dry etching using thephotoresist mask 42 to form agate hole 24 a corresponding to thewindow 42 a in thegate electrode 24. During this patterning process, thegate electrode 24 is divided into a plurality of patterns as in a general patterning process. - As shown in
FIG. 6I , thephotoresist mask 42 is stripped by ashing. Thereafter, as shown inFIG. 6J , aphotoresist mask 43 is formed. Thephotoresist mask 43 is spin coated and patterned to form a well-shapedwindow 43 a exposing the floor of the Bellmouse-shapedwell 26. - As shown in
FIG. 6K , aCNT paste 23 containing photoresist is coated on thephotoresist mask 43 using a printing method. As a result, the well-shapedwindow 43 a is filled with theCNT paste 23. - As shown in
FIG. 6L , theCNT paste 23 is patterned by exposure and development processes to remove a portion of theCNT paste 23 at the edge of the well-shapedwindow 43 a, thereby forming anelectron emitter 23 a in the center of the inside of the well-shape window 43 a. A portion of theCNT paste 23 remaining on thephotoresist mask 43 is removed by lifting up thephotoresist mask 43. - An FED having a desired structure can be manufactured through the above-described processes.
- In order to observe effects of an FED having the above-described structure according to the present invention, simulations were carried out for a conventional FED shown in
FIG. 7A and an FED of the present invention shown in 8A. -
FIGS. 7B and 8B each illustrate enlarged portions around gate electrodes of the FEDs shown inFIGS. 7A and 8A , andFIGS. 7C and 8C each illustrate trajectories of divergent electron beams around the gate electrodes of the FEDs shown inFIGS. 7A and 8A . As can be seen inFIGS. 7C and 8C , in the FED of the present invention shown inFIG. 8C , the electron beam is focused at a narrower angle due to the gate electrode than in the conventional FED shown inFIG. 7C . When the electron beam diverges in the conventional FED shown inFIG. 7C , part of the electron beam is intercepted by the edge of the gate hole, which causes a leakage current from the gate electrode. -
FIGS. 7D and 8D each illustrate trajectories of electron beams emitted from the FEDs shown inFIGS. 7A and 8A . As can be seen inFIGS. 7D and 8D , a radius of an electron beam emitted from the FED of the present invention shown inFIG. 8A is narrower than that of an electron beam emitted from the conventional FED shownFIG. 7A . According to calculation, the simulations showed that in the present invention, electron beams reaching a front substrate on which an anode and a fluorescent material are formed are focused with an approximately 10% smaller width than in the conventional FED. Also, in the conventional FED, the width of a well of a gate insulating layer was limited to 30 microns due to the height of the gate insulating layer. However, in the FED according to the present invention, the width of a well of the firstgate insulating layer 22′ of a gate insulating layer can be adjusted by adjusting an area of the gate insulating layer to be etched. Thus, the well can be minutely formed to a width of 30 microns or less. - As described above, according to the present invention, since electron beams can be effectively focused, an FED having high color purity and brightness can be manufactured. Since the FED according to the present invention can form electron beams having a desired width using a single gate electrode, the FED of the present invention does not need a complicated double gate electrode. However, if the FED is desired to have higher color purity, brightness, and performance than existing double gate electrode type FEDs, a cylindrical electrode part, preferably a Bellmouse type electrode part, can be formed at a final gate electrode, i.e., a second gate electrode.
- While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.
Claims (10)
1-6. (canceled)
7. A method of manufacturing a field emission device, the method comprising:
(a) sequentially coating a first insulating layer and a second insulating layer having a higher etching rate than the first insulating layer on a substrate on which a cathode is formed, to form a gate insulating layer;
(b) forming a first mask having a window with a predetermined diameter on the gate insulating layer to form a well in the gate insulating layer;
(c) supplying an etchant through the window to form a well that broadens upward in the gate insulating layer beneath the window of the first mask, the well exposing a portion of the cathode;
(d) depositing a gate electrode on the gate insulating layer;
(e) removing a portion of the gate electrode on the bottom and lower inner wall of the well to form a gate hole corresponding to the cathode in the gate electrode; and
(f) forming an electron emitter on the exposed portion of the cathode.
8. The method of claim 7 , after step (c), further comprising removing the first mask.
9. The method of claim 7 , wherein in step (e), a second mask having a window corresponding to the gate hole is formed, etched, and removed so as to form the gate hole.
10. The method of claim 8 , wherein in step (e), a second mask having a window corresponding to the gate hole is formed, etched, and removed so as to form the gate hole.
11. The method of claim 7 , wherein step (f) comprises forming a third mask on the gate electrode to expose only a portion of the cathode and cover the remaining area of the cathode so as to form the electron emitter.
12. The method of claim 8 , wherein step (f) comprises forming a third mask on the gate electrode to expose only a portion of the cathode and cover the remaining area of the cathode so as to form the electron emitter.
13. The method of claim 9 , wherein step (f) comprises forming a third mask on the gate electrode to expose only a portion of the cathode and cover the remaining area of the cathode so as to form the electron emitter.
14. The method of claim 11 , wherein in step (f), after forming the third mask, a carbon nanotube paste containing photoresist is coated, and then patterned by photolithography so as to form the electron emitter.
15. The method of claim 13 , wherein in step (f), after forming the third mask, a carbon nanotube paste containing photoresist is coated, and then patterned by photolithography so as to form the electron emitter.
Priority Applications (1)
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US11/798,481 US20080003916A1 (en) | 2002-10-21 | 2007-05-14 | Field emission device |
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KR10-2002-0064345 | 2002-10-21 | ||
KR1020020064345A KR20040034251A (en) | 2002-10-21 | 2002-10-21 | Field emission device |
US10/686,678 US7233102B2 (en) | 2002-10-21 | 2003-10-17 | Field emission device with gate having cylindrical part |
US11/798,481 US20080003916A1 (en) | 2002-10-21 | 2007-05-14 | Field emission device |
Related Parent Applications (1)
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US10/686,678 Division US7233102B2 (en) | 2002-10-21 | 2003-10-17 | Field emission device with gate having cylindrical part |
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US20080003916A1 true US20080003916A1 (en) | 2008-01-03 |
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US10/686,678 Expired - Fee Related US7233102B2 (en) | 2002-10-21 | 2003-10-17 | Field emission device with gate having cylindrical part |
US11/798,481 Abandoned US20080003916A1 (en) | 2002-10-21 | 2007-05-14 | Field emission device |
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US10/686,678 Expired - Fee Related US7233102B2 (en) | 2002-10-21 | 2003-10-17 | Field emission device with gate having cylindrical part |
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KR20060012782A (en) * | 2004-08-04 | 2006-02-09 | 삼성에스디아이 주식회사 | Field emission device and display adopting the same |
JP2006073516A (en) * | 2004-08-30 | 2006-03-16 | Samsung Sdi Co Ltd | Electron emitting element and manufacturing method of the same |
KR20060019845A (en) * | 2004-08-30 | 2006-03-06 | 삼성에스디아이 주식회사 | Electron emission device |
KR20060024565A (en) * | 2004-09-14 | 2006-03-17 | 삼성에스디아이 주식회사 | Field emission device and method for manufacturing the same |
KR100601990B1 (en) * | 2005-02-07 | 2006-07-18 | 삼성에스디아이 주식회사 | Field emission display device and manufacturing method thereof |
KR100723393B1 (en) * | 2006-02-02 | 2007-05-30 | 삼성에스디아이 주식회사 | Method of manufacturing field emission device |
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JP2007311329A (en) | 2006-05-19 | 2007-11-29 | Samsung Sdi Co Ltd | Light emission device, method of manufacturing electron emission unit therefor, and display device |
KR100811266B1 (en) * | 2006-09-01 | 2008-03-07 | 주식회사 하이닉스반도체 | Method of selective etch by using hard mask and method of forming isolation of memory device by using the same |
KR100785028B1 (en) * | 2006-11-06 | 2007-12-12 | 삼성전자주식회사 | Method of manufacturing field emission device |
US9058954B2 (en) * | 2012-02-20 | 2015-06-16 | Georgia Tech Research Corporation | Carbon nanotube field emission devices and methods of making same |
CN105244246B (en) * | 2014-07-10 | 2017-06-06 | 清华大学 | Field-transmitting cathode and field emission apparatus |
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US20040080260A1 (en) | 2004-04-29 |
KR20040034251A (en) | 2004-04-28 |
JP2004146376A (en) | 2004-05-20 |
US7233102B2 (en) | 2007-06-19 |
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