US20080178723A1 - Semiconductor device manufacturing method and manufacturing apparatus - Google Patents

Semiconductor device manufacturing method and manufacturing apparatus Download PDF

Info

Publication number
US20080178723A1
US20080178723A1 US11/986,643 US98664307A US2008178723A1 US 20080178723 A1 US20080178723 A1 US 20080178723A1 US 98664307 A US98664307 A US 98664307A US 2008178723 A1 US2008178723 A1 US 2008178723A1
Authority
US
United States
Prior art keywords
region
terminals
cutting
wiring substrate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/986,643
Inventor
Munehide Saimen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US11/986,643 priority Critical patent/US20080178723A1/en
Publication of US20080178723A1 publication Critical patent/US20080178723A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/118Printed elements for providing electric connections to or between printed circuits specially for flexible printed circuits, e.g. using folded portions
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10681Tape Carrier Package [TCP]; Flexible sheet connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2009Reinforced areas, e.g. for a specific part of a flexible printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1545Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/005Punching of holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0058Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0064Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a polymeric substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T83/00Cutting
    • Y10T83/869Means to drive or to guide tool

Definitions

  • the present invention relates to semiconductor device manufacturing methods and manufacturing apparatuses.
  • a reinforcing member is adhered to a wiring substrate in a COF (Chip On Film) device that is one form of a semiconductor device.
  • the reinforcing member is to reinforce terminals of a wiring pattern, whereby the terminals can be inserted in a connector.
  • the reinforcing member is attached to a wiring substrate, and then cut together with the wiring substrate in a predetermined shape.
  • the cutting step is conducted in a single process from one surface side of the wiring substrate. According to this, when a region of the terminals on the wiring substrate is cut, burs may be generated in a direction in which the terminals can be peeled. Or, when the reinforcing member is continuously cut from the inside thereof to the outside, cracks or indents may be generated in a region of the semiconductor device that becomes a final product. It has conventionally been difficult to solve these problems simultaneously.
  • a method for manufacturing a semiconductor device in accordance with the present invention includes the steps of
  • the step of cutting along the boundary between the first region and the second region is divided into the step of cutting the terminals and the step of continuously cutting the reinforcing member from the inside thereof to the outside, and then conducted. Accordingly, a process to prevent the terminals from peeling off and a process to prevent the first region from developing cracks can both be realized, and therefore the reliability of the semiconductor device can be improved.
  • step (b) may be conducted by punching through from a surface side having the terminals in the wiring substrate; and step (c) may be conducted by punching through from the surface side having the terminals in the wiring substrate.
  • the punching direction is the same in steps (b) and (c).
  • step (c) may be conducted after conducting step (b).
  • the terminals may be cut by punching through the second region in a state in which the first region is pressed to be fixed.
  • the terminals may be cut by forming a slit along the boundary between the first region and the second region.
  • the later step (c) can be conducted without changing the external shape of the wiring substrate.
  • the slit may include a first portion extending inside the reinforcing member in a widthwise direction of the terminals, and a second portion extending inside the reinforcing member in a lengthwise direction of the terminals.
  • the cutting distance in the later step (c) can be shortened, and therefore the cutting can be stably conducted.
  • the slit may further include a third portion disposed outside the reinforcing member opposite to the second portion. Accordingly, for example, a portion between the second portion and the third portion may be cut in the later step (c), and therefore the cutting can be stably conducted.
  • the reinforcing member in step (c), may be continuously cut from the inside thereof to the outside by punching through the first region in a state in which the second region is pressed to be fixed.
  • the first region is punched through, and cracks are not generated or restrained from being generated in the first region, and therefore the reliability of the semiconductor device can be improved.
  • step (c) the cutting may be conducted without tearing a portion between the second portion and the third portion.
  • the cutting may be conducted along the entire boundary between the first region and the second region.
  • the first region is cut into an individual piece.
  • the cutting may be conducted along a part of the boundary between the first region and the second region.
  • the wiring substrate may have a plurality of first regions, the wiring substrate may span between a pair of first and second reels, and at least one of steps (b) and (c) may be conducted while the wiring substrate is fed out from the first reel and wound by the second reel.
  • the punching direction is the same in steps (b) and (c), the front and back of the wiring substrate do not have to be reversed, and for example, the cutting steps can be conducted in a single transfer.
  • the wiring substrate may be transferred in a direction in which the cut faces of the terminals in step (b) are disposed in a downstream side.
  • the first region when the slit is formed in a U-shape, the first region can be prevented from being pulled up.
  • the reinforcing member may be adhered to the wiring substrate through adhesive material.
  • the adhesive material may be an energy setting type adhesive material, and the step of applying energy to harden the adhesive material may be included before steps (b) and (c).
  • the adhesive material existing between the wiring substrate and the reinforcing member can be prevented from adhering to a cutting tool. Also, when the adhesive material has hardened, peeling of the reinforcing member from the wiring substrate can be prevented after the cutting steps.
  • an apparatus for manufacturing a semiconductor device that includes a wiring substrate having a first region where a semiconductor chip is mounted and a second region around the first region and terminals extending from the first region to the second region formed on one surface thereof includes:
  • a cutting section that cuts the wiring substrate, wherein a reinforcing member is provided on another surface of the wiring substrate in a manner that the reinforcing member overlaps the terminals and a part thereof protrudes from the first region to the second region, and
  • the cutting section includes a first cutting section for cutting the terminals along a boundary between the first region and the second region, and a second cutting section for continuously cutting the reinforcing member from inside thereof to the outside along the boundary between the first region and the second region.
  • the cutting section for cutting along the boundary between the first region and the second region is divided into the first cutting section for cutting the terminals and the second cutting section for continuously cutting the reinforcing member from inside thereof to its outside. Accordingly, a process to prevent the terminals from peeling off and a process to prevent the first region from developing cracks can both be realized, and therefore the reliability of the semiconductor device can be improved.
  • the first cutting section may punch through from a surface side having the terminals in the wiring substrate; and the second cutting section may punch through from the surface side having the terminals in the wiring substrate.
  • the punching direction is the same in the first and second cutting sections.
  • the first cutting section may be disposed on an upstream side in a transfer direction of the wiring substrate with respect to the second cutting section.
  • the cutting by the first cutting section can be conducted prior to the cutting by the second cutting section.
  • the first cutting section may include a die for pressing the first region to be fixed, and a punch to punch through the second region.
  • the second cutting section may include a die for pressing the second region to be fixed, and a punch to punch through the first region.
  • the first region is punched through, and cracks are not generated or restrained from being generated in the first region, and therefore the reliability of the semiconductor device can be improved.
  • FIG. 1 is a view for describing a semiconductor device manufacturing method in accordance with a first embodiment of the present invention.
  • FIG. 2 is a view for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with the first embodiment of the present invention.
  • FIG. 3(A)-FIG . 3 (C) are views for describing the semiconductor device manufacturing method and manufacturing apparatus in accordance with the first embodiment of the present invention.
  • FIG. 4 is a cross-sectional view taken along a line IV-IV of FIG. 3(A) .
  • FIG. 5 is a view for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with a second embodiment of the present invention.
  • FIG. 6 is a cross-sectional view taken along a line VI-VI of FIG. 5 .
  • FIG. 7(A)-FIG . 7 (C) are views for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with a third embodiment of the present invention.
  • FIG. 8 is a view showing an electro-optic device in accordance with an embodiment of the present invention.
  • FIG. 9 is a view showing an electronic device in accordance with an embodiment of the present invention.
  • FIG. 10 is a view showing an electronic device in accordance with an embodiment of the present invention.
  • FIG. 1-FIG . 4 are views for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with an embodiment of the present invention.
  • FIG. 1 is a plan view of a wiring substrate used in the present embodiment, wherein a semiconductor chip is mounted on the wiring substrate.
  • FIG. 2 is a diagram for describing the steps of cutting in a reel-to-reel transfer, wherein a cross-sectional view of the wiring substrate is shown.
  • FIG. 3(A)-FIG . 3 (C), and FIG. 4 are views for describing the steps of cutting the wiring substrate.
  • the wiring substrate 10 includes a first region 12 (a region surrounded by a two-dot and dash line), and a second region 14 around the first region 12 .
  • the first region 12 has a plane configuration of a final product, and may be a region that cannot be visually recognized during the semiconductor device manufacturing stage.
  • the wiring substrate 10 includes a plurality of first regions 12 .
  • the plural first regions 12 may be arranged in a single column (in the up-down direction in FIG. 1 , although omitted), or may be arranged in a plurality of rows and a plurality of columns.
  • a COF (chip on film) type semiconductor device is manufactured.
  • the wiring substrate 10 includes a base substrate 20 and a wiring pattern 30 .
  • the base substrate 20 is a film composed of insulation material, and supports the wiring pattern 30 .
  • the base substrate 20 may be a flexible substrate formed from an organic material (for example, resin).
  • the base substrate 20 is in an elongated shape, and includes a plurality of holes 22 along side sections thereof. The holes 22 can also be used for positioning.
  • the wiring pattern 30 is formed on one surface of the base substrate 20 , and formed in the first region 12 .
  • the wiring pattern 30 can be formed in each of a plurality of the first regions 12 .
  • a part of the wiring pattern 30 (for instance, a part of first terminals 40 and a part of second terminals 42 to be described later) may be formed in the second region 14 .
  • the wiring pattern 30 is composed of an electroconductive material (for example, copper (Cu) or gold (Au)), and includes a plurality of wirings 32 , 34 , 36 and 38 .
  • the wirings 32 - 38 have one terminal ends that extend to a region for mounting a semiconductor chip 50 as terminals for connecting to the semiconductor chip.
  • the wiring 32 - 38 define terminals of the semiconductor device for external connection (first and second terminals 40 and 42 ).
  • the wiring 32 has first terminals (for example, input terminals) 40
  • the wirings 34 - 38 have second terminals (for example, output terminals) 42 .
  • the first terminals 40 may be wider than other portions of the wiring 32 .
  • the plurality of the first terminals 40 are arranged linearly (in a parallel array) along a boundary (the 2-dot and dash line in FIG. 1 ) between the first region 12 and the second region 14 .
  • the first terminals 40 extend from the first region 12 to the second region 14 .
  • the first terminals 40 may be connected to plating leads 44 formed for electro-plating. The above is similarly applied to the second terminals 42 . It is noted that the plating leads 44 pass through the second region 14 , and are electrically connected to a plurality of wiring patterns 30 .
  • an insulation film for example, solder resist
  • the insulation film 46 covers the wiring pattern 30 while avoiding the semiconductor chip connecting terminals and the first and second terminals 40 and 42 for external connection described above.
  • the semiconductor chip 50 is mounted on the wiring substrate 10 in a manner to be electrically connected to the wiring pattern 30 .
  • the semiconductor chip 50 is a driver IC, and includes an integrated circuit formed inside.
  • the semiconductor chip 50 may be, for example, face-down bonded to the first region 12 .
  • an underfill material (resin) 48 is provided between the semiconductor chip 50 and the wiring substrate 10 . It is noted that, although omitted in FIG. 1 , other electronic components may be mounted on the wiring substrate 10 .
  • a reinforcing member 52 is provided on a surface of the wiring substrate 10 (on the surface of the base substrate 20 ), which is on the opposite side of the wiring pattern 30 (at the first terminals 40 ).
  • the reinforcing member 52 reinforces regions where terminals (for example, the first terminals 40 ) are formed in the wiring substrate 10 so that the terminals (for example, the first terminals 40 ) can be inserted in a connector.
  • the reinforcing member 52 restricts bending of the wiring substrate 10 .
  • the reinforcing member 52 may be a substrate (for example, an organic substrate), and may have a thickness greater than the thickness of the base substrate 20 . In the present embodiment, the reinforcing member 52 is provided in a manner to overlap the first terminals 40 .
  • the reinforcing member 52 is provided in a manner that a part thereof protrudes from the first region 12 to the second region 14 .
  • the reinforcing member 52 is provided such that a part thereof protrudes from the first region 12 to the second region 14 in a direction in which the plural first terminals 40 are arranged.
  • the widths of the wiring substrate 10 and the reinforcing member 52 can be matched, such that an accurate positioning of them with respect to a connector becomes possible.
  • the reinforcing member 52 may also be provided in a manner that a part thereof protrudes from the first region 12 to the second region 14 in a direction perpendicular to the arranging direction of the plural first terminals 40 .
  • the reinforcing member 52 may be adhered to the wiring substrate 10 through adhesive material 54 .
  • the adhesive material 54 is provided on the entire surface of contacting portions between the wiring substrate 10 and the reinforcing member 52 .
  • an energy setting type adhesive material that exhibits adhesive strength by application of predetermined energy, and then hardens (looses its adhesive strength), may be used.
  • the energy may be any one of heat, light, pressure and the like.
  • a thermosetting type adhesive material or an ultraviolet ray setting type adhesive material can be used as the adhesive material 54 .
  • the main composition of the adhesive material 54 may often be resin, and can be in a paste state or a film state under room temperature.
  • the adhesive material 54 may be hardened by applying predetermined energy before a cutting process to be described below.
  • the cutting process may be conducted at least after the hardening reaction has started.
  • a cutting tool for example, a die or a punch.
  • peeling of the reinforcing member 52 from the wiring substrate 10 can be prevented after the cutting process.
  • a material that exhibits adhesive strength under room temperature (for example, a known double-stick tape) may be used as the adhesive material 54 .
  • the wiring substrate 10 and the reinforcing member 52 are cut along the boundary between the first region 12 and the second region 14 .
  • they are not cut along the entire boundary between the first region 12 and the second region 14 , but cut along a part thereof.
  • they may be cut in a manner to surround the first terminals 40 (see FIG. 3(C) ).
  • the present process is conducted by using a manufacturing apparatus shown in FIG. 2 .
  • the semiconductor device manufacturing apparatus includes a first cutting section 60 , a second cutting section 70 , and a transfer apparatus 80 .
  • the first cutting section 60 cuts the first terminals 40 along the boundary between the first region 12 and the second region 14 (see FIG. 3(A) ).
  • the first cutting section 60 includes a first cutting tool 62 .
  • the first cutting tool 62 may be a shearing type (punch through type). More specifically, the first cutting tool 62 includes dies 64 and 66 for pressing the first region 12 to be fixed, and a punch 68 for punching through the second region 14 .
  • the dies 64 and 66 may additionally press parts of the second region 14 (peripheral regions of the punch 68 in FIG. 3(A) ) except the region to be punched through.
  • the die 64 presses the wiring substrate 10 in a direction different from the die 66 .
  • the punch 68 is movable in an axial direction of holes of the dies 64 and 66 , and can punch through the second region 14 of the wiring substrate 10 in one direction.
  • the punch 68 is disposed above the surface of the wiring substrate 10 on the side of the terminals 40 , and can punch through from that surface side in a direction in which the wiring substrate 10 is penetrated.
  • a tip surface (a surface that contacts the wiring substrate 10 ) of the punch 68 may be flat, and may tear at least a part of the wiring substrate 10 and the reinforcing member 52 to form a torn surface.
  • the second cutting section 70 continuously cuts the reinforcing member 52 from an inside thereof to the outside along the boundary between the first region 12 and the second region 14 (see FIG. 3(B) ).
  • the second cutting section 70 includes a second cutting tool 72 .
  • the second cutting tool 72 may be a shearing type (punch through type). More specifically, the second cutting tool 72 includes dies 74 and 76 for pressing the second region 14 to be fixed, and a punch 78 for punching through the first region 12 .
  • the dies 74 and 76 may additionally press parts of the first region 12 except the region to be punched through (peripheral regions of the punch 78 in FIG. 3(B) ).
  • the die 74 presses the wiring substrate 10 in a direction different from the die 76 .
  • the punch 78 is movable in an axial direction of the holes of the dies 74 and 76 , and can punch through the first region 12 of the wiring substrate 10 in one direction.
  • the punch 78 is disposed above the surface of the wiring substrate 10 on the side of the terminals 40 , and can punch through from that surface side in a direction in which the wiring substrate 10 is penetrated.
  • a tip surface (a surface that contacts the wiring substrate 10 ) of the punch 78 may be flat, and may tear at least a part of the wiring substrate 10 and the reinforcing member 52 to form a torn surface.
  • the transfer apparatus 80 includes a pair of first and second reels 82 and 84 .
  • the wiring substrate 10 is spanned across the first and second reels 82 and 84 , fed from the first reel 82 and wound on the second reel 84 , thereby enabling a reel-to-reel transfer.
  • the first and second cutting sections 60 and 70 may be disposed between the first and second reels 82 and 84 , and the cutting steps may be conducted in a single transfer.
  • the first and second cutting sections 60 and 70 have the same punch through direction (from the side of the surface having the first terminals 40 ), such that the cutting steps by the respective sections can be conducted in a single transfer without inverting the front and back of the wiring substrate 10 .
  • the first and second cutting tools 62 and 72 can be made into one piece as a single progressive die.
  • the first cutting section 60 is disposed on an upstream side of the transfer direction with respect to the second cutting section 70 .
  • cutting by the first cutting section 60 can be conducted before cutting by the second cutting section 70 .
  • one of the first cutting section 60 and the second cutting section 70 may be disposed between the first and second reels 82 and 84 , and the cutting steps may be conducted in a plurality of transfers.
  • the transfer apparatus is not limited to any particular configuration, and can be, for example, a belt type conveyor, so long as it can transfer the wiring substrate 10 in a fixed direction.
  • the first terminals 40 are cut by punching through the second region 14 .
  • at least the first region 12 is pressed to be fixed.
  • a slit 90 is formed in the second region 14 along the boundary between the first region 12 and the second region 14 (see FIG. 3(B) ).
  • the second region 14 is also pressed to be fixed, and a portion in the second region 14 adjacent to the first region 12 is punched through. Because of the slit 90 , the cutting step by the second cutting section 70 can be conducted without changing the external configuration of the wiring substrate 10 .
  • the wiring substrate 10 is punched through by the punch 68 from the side of the surface having the first terminals 40 .
  • burs 16 are formed on the side of the first terminals 40 .
  • burs 18 are formed on the side of the reinforcing member 52 .
  • the burs 16 on the side of the first terminals 40 may promote peeling of the first terminals 40 from the base substrate 20 , but the burs 18 on the side of the reinforcing member 52 do not cause such a problem.
  • the burs 16 on the side of the first terminals 40 are not formed in the first region 12 that is used as a final product, the first terminals 40 (the wiring pattern 30 ) are prevented from peeling off, and the reliability of the semiconductor device can be improved.
  • the slit 90 may be a gap or a long hole, and may be formed linearly or curved.
  • the slit 90 is formed at least inside the reinforcing member 52 , but is not formed continuously from the inside of the reinforcing member 52 to the outside.
  • the slit 90 may include a first portion 92 that extends inside the reinforcing member 52 along the widthwise direction of the first terminals 40 , and a second portion 94 that extends inside the reinforcing member 52 along the lengthwise direction of the first terminals 40 .
  • the first portion 92 traverses the first terminals 40 .
  • the second portion 94 may extend adjacent to an end section of the reinforcing member 52 .
  • the second portion 94 is formed in a manner to surround a region where the plural first terminals 40 are formed, and may be formed in one piece with the first portion 92 .
  • the slit 90 may be in a U shape.
  • a cutting distance by the second cutting section 70 to be described below becomes shorter, such that cutting by the second cutting section 70 can be stably conducted.
  • the slit 90 may be formed with the first portion 92 alone.
  • the slit 90 further includes a third portion 96 that is disposed outside the reinforcing member 52 opposite to the second portion 94 .
  • the third portion 96 may be disposed separated from the second portion 94 , and may extend in the same direction as the second portion 94 .
  • the contour of the reinforcing member 52 passes a portion between the second portion 94 and the third portion 96 .
  • the portion between the second portion 94 and the third portion 96 may be cut by the second cutting section 70 to be described below, such that the cutting distance becomes shorter, and cutting by the second cutting section 70 can be stably conducted.
  • the cutting step by the second cutting section 70 is conducted.
  • the wiring substrate 10 may be transferred reel-to-reel, such that the work area may be transferred from the first cutting section 60 to the second cutting section 70 , and the cutting step by the second cutting section 70 may be conducted.
  • the wiring substrate 10 may be transferred in a direction in which cut faces of the first terminals 40 made by the first cutting section 60 are disposed on the downstream side of the transfer direction.
  • the first region 12 is punched through, thereby continuously cutting the reinforcing member 52 from the inside thereof to the outside.
  • at least the second region 14 is pressed to be fixed.
  • the first region 12 may also be pressed to be fixed.
  • the present step is conducted by piercing the punch 78 through the wiring substrate 10 from the side of the surface where the first terminals 40 are provided.
  • a longitudinal width of a region to be punched through (a contact region between the punch 78 and the wiring substrate 10 ) may be greater than the distance between the second portion 94 and the third portion 96 of the slit 90 .
  • the longitudinal width of the region to be punched through may be generally the same as the width measured from the first portion 92 to an end of the third portion 96 in the lengthwise direction of the first terminals 40 .
  • a transverse width of the region to be punched through may be generally the same as the transverse width of a region surrounded by the slit 90 , or may be slightly smaller as shown in FIG. 3(B) .
  • the punch 78 pierces the wiring substrate 10 from the side of its surface where the first terminals 40 are provided. In this case, in a portion that is pressed by the dies 74 and 76 , the wiring substrate 10 hangs onto the die 76 on the lower side and bends due to the thickness of the reinforcing member 52 . For this reason, at the cutting step, parts of the wiring substrate 10 may be excessively pulled, and cracks (or dents) may occur. On the other hand, in a portion that is punched through by the punch 78 , the wiring substrate 10 does not bend, and cracks are not generated. In the present embodiment, the first region 12 that is used as a final product is punched through such that cracks are not generated or restrained from being generated in the first region 12 , and therefore the reliability of the semiconductor device can be improved.
  • a semiconductor device 1 (tape semiconductor device) can be manufactured.
  • a slit 100 is formed along the boundary between the first region 12 and the second region 14 .
  • the slit 100 cuts the portion between the second portion 94 and the third portion 96 of the slit 90 shown in FIG. 3(B) .
  • the slit 100 is formed in the second region 14 along the boundary between the first region 12 and the second region 14 .
  • the first region 12 and the second region 14 are connected in portions other than the slit 100 .
  • the first region 12 can be handled with the external shape of the wiring substrate 10 , such that management (such as shipping) of the semiconductor device is facilitated.
  • the semiconductor device 1 is finally cut out along the entire boundary between the first region 12 and the second region 14 .
  • the step of cutting along the boundary between the first region 12 and the second region 14 is divided into the step of cutting the first terminals 40 , and the step of continuously cutting the reinforcing member 52 from the inside thereof to the outside, and then conducted. Accordingly, the process to prevent peeling of the first terminals 40 and the process to prevent cracks in the first region 12 can both be realized, and the reliability of the semiconductor device can be improved.
  • FIG. 5 and FIG. 6 are views for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with a second embodiment of the present invention.
  • the cutting step by a second cutting section in other words, the step of continuously cutting the reinforcing member 52 from the inside thereof to the outside and an apparatus relating thereto are different from those described above.
  • the portion between the second portion 94 and the third portion 96 of the slit 90 is cut without breaking (tearing off).
  • a punch 110 has a cutting blade 112 having a pointed, sharp configuration, and the cutting blade 112 may cut the wiring substrate 10 , the adhesive material 54 and the reinforcing member 52 .
  • smooth cutting becomes possible by the cutting blade 112 , and portions of the wiring substrate 10 are not excessively pulled, such that cracks (or dents) are restrained from occurring. Accordingly, the reliability of the semiconductor device can be improved.
  • details of the second cutting tool other than the punch 110 can be derived from those of the second cutting tool 72 described above.
  • FIG. 7(A)-FIG . 7 (C) are views for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with a third embodiment of the present invention.
  • the wiring substrate 10 and the reinforcing member 52 are cut along the entire boundary between the first region 12 and the second region 14 .
  • not only the first terminals 40 , but also second terminals 42 are cut. It is noted that, in the present embodiment, a reinforcing member is not provided on the side of the second terminals 42 .
  • Slits 130 and 132 may be formed in the second region 14 along the boundary between the first region 12 and the second region 14 (see FIG. 7 (B)).
  • the contents of the first embodiment can be applied to the details for the process, and punches 120 and 122 are pierced from the side of the surface of the wiring substrate 19 having the first and second terminals 40 and 42 , in a manner described above.
  • each of the slits 130 and 132 is linearly formed.
  • the contents described above can also be applied to the slits 130 and 132 .
  • the slit 130 for the first terminals 40 may have the same configuration as that of the slit 90 .
  • a semiconductor device 3 (the first region 12 ) that is cut into an individual piece can be manufactured.
  • the semiconductor device 3 is a final product.
  • FIG. 8 is a view of an electro-optic device having a semiconductor device manufactured according to the present invention mounted thereon.
  • the electro-optic device 1000 includes the semiconductor device 3 described above, an electro-optic panel (for example, a liquid crystal panel or an EL panel) 1100 , and a circuit substrate (for example, a mother board) 1200 .
  • the semiconductor device 3 is electrically connected to the electro-optic panel 1100 through the second terminals (for example, output terminals), and electrically connected to the circuit substrate 1200 through the first terminals (for example, input terminals).
  • the first terminals together with the reinforcing member are inserted in a connector 1300 of the circuit substrate 1200 .
  • FIG. 9 shows a notebook type personal computer 2000
  • FIG. 10 shows a portable phone 3000 .
  • the present invention is not limited to the embodiments described above, and many modifications can be made.
  • the present invention may include compositions that are substantially the same as the compositions described in the embodiments (for example, a composition with the same function, method and result, or a composition with the same objects and result).
  • the present invention includes compositions in which portions not essential in the compositions described in the embodiments are replaced with others.
  • the present invention includes compositions that can achieve the same functions and effects or achieve the same objects of those of the compositions described in the embodiments.
  • the present invention includes compositions that include publicly known technology added to the compositions described in the embodiments.

Abstract

A method for manufacturing a semiconductor device is provided including: providing a reinforcing member on one surface of a wiring substrate that has a first region where a semiconductor chip is mounted and a second region around the first region, and has terminals extending from the first region to the second region formed on another surface thereof in a manner that the reinforcing member overlaps the terminals and a part thereof protrudes from the first region to the second region; cutting the terminals along a boundary between the first region and the second region; and continuously cutting the reinforcing member from an inboard side thereof to an outboard side along the boundary between the first region and the second region.

Description

    RELATED APPLICATIONS
  • This application is a divisional patent application of U.S. Ser. No. 10/985,668 filed Nov. 11, 2004 and claims priority to Japanese Patent Application No. 2003-385416 filed Nov. 14, 2003 all of which are hereby expressly incorporated by reference herein in their entirety.
  • BACKGROUND
  • 1. Technical Field
  • The present invention relates to semiconductor device manufacturing methods and manufacturing apparatuses.
  • 2. Related Technology
  • A reinforcing member is adhered to a wiring substrate in a COF (Chip On Film) device that is one form of a semiconductor device. The reinforcing member is to reinforce terminals of a wiring pattern, whereby the terminals can be inserted in a connector. The reinforcing member is attached to a wiring substrate, and then cut together with the wiring substrate in a predetermined shape.
  • Conventionally, the cutting step is conducted in a single process from one surface side of the wiring substrate. According to this, when a region of the terminals on the wiring substrate is cut, burs may be generated in a direction in which the terminals can be peeled. Or, when the reinforcing member is continuously cut from the inside thereof to the outside, cracks or indents may be generated in a region of the semiconductor device that becomes a final product. It has conventionally been difficult to solve these problems simultaneously.
  • It is an object of the present invention to improve the reliability concerning semiconductor device manufacturing methods and manufacturing apparatuses.
  • SUMMARY
  • A method for manufacturing a semiconductor device in accordance with the present invention includes the steps of
  • (a) providing a reinforcing member on one surface of a wiring substrate that has a first region where a semiconductor chip is mounted and a second region around the first region, and has terminals extending from the first region to the second region formed on another surface thereof in a manner that the reinforcing member overlaps the terminals and a part thereof protrudes from the first region to the second region;
  • (b) cutting the terminals along a boundary between the first region and the second region; and
  • (c) continuously cutting the reinforcing member from inside thereof to outside along the boundary between the first region and the second region.
  • According to the present invention, the step of cutting along the boundary between the first region and the second region is divided into the step of cutting the terminals and the step of continuously cutting the reinforcing member from the inside thereof to the outside, and then conducted. Accordingly, a process to prevent the terminals from peeling off and a process to prevent the first region from developing cracks can both be realized, and therefore the reliability of the semiconductor device can be improved.
  • In the method for manufacturing a semiconductor device, step (b) may be conducted by punching through from a surface side having the terminals in the wiring substrate; and step (c) may be conducted by punching through from the surface side having the terminals in the wiring substrate.
  • Accordingly, the punching direction is the same in steps (b) and (c).
  • In the method for manufacturing a semiconductor device, step (c) may be conducted after conducting step (b).
  • In the method for manufacturing a semiconductor device, in step (b), the terminals may be cut by punching through the second region in a state in which the first region is pressed to be fixed.
  • Accordingly, peeling of the first terminals in the first region can be prevented, and therefore the reliability of the semiconductor device can be improved.
  • In the method for manufacturing a semiconductor device, in step (b), the terminals may be cut by forming a slit along the boundary between the first region and the second region.
  • Accordingly, for example, the later step (c) can be conducted without changing the external shape of the wiring substrate.
  • In the method for manufacturing a semiconductor device, the slit may include a first portion extending inside the reinforcing member in a widthwise direction of the terminals, and a second portion extending inside the reinforcing member in a lengthwise direction of the terminals.
  • Accordingly, for example, the cutting distance in the later step (c) can be shortened, and therefore the cutting can be stably conducted.
  • In the method for manufacturing a semiconductor device, the slit may further include a third portion disposed outside the reinforcing member opposite to the second portion. Accordingly, for example, a portion between the second portion and the third portion may be cut in the later step (c), and therefore the cutting can be stably conducted.
  • In the method for manufacturing a semiconductor device, in step (c), the reinforcing member may be continuously cut from the inside thereof to the outside by punching through the first region in a state in which the second region is pressed to be fixed.
  • Accordingly, the first region is punched through, and cracks are not generated or restrained from being generated in the first region, and therefore the reliability of the semiconductor device can be improved.
  • In the method for manufacturing a semiconductor device, in step (c), the cutting may be conducted without tearing a portion between the second portion and the third portion.
  • Accordingly, smooth cutting can be conducted, such that a part of the wiring substrate is not excessively stretched, and cracks are restrained from occurring. Therefore, the reliability of the semiconductor device can be improved.
  • In the method for manufacturing a semiconductor device, by steps (b) and (c), the cutting may be conducted along the entire boundary between the first region and the second region.
  • Accordingly, the first region is cut into an individual piece.
  • In the method for manufacturing a semiconductor device, by steps (b) and (c), the cutting may be conducted along a part of the boundary between the first region and the second region. By so doing, the first region can be handled with the external configuration of the wiring substrate, and therefore the management of the semiconductor device becomes easy.
  • In the method for manufacturing a semiconductor device, the wiring substrate may have a plurality of first regions, the wiring substrate may span between a pair of first and second reels, and at least one of steps (b) and (c) may be conducted while the wiring substrate is fed out from the first reel and wound by the second reel.
  • When the punching direction is the same in steps (b) and (c), the front and back of the wiring substrate do not have to be reversed, and for example, the cutting steps can be conducted in a single transfer.
  • In the method for manufacturing a semiconductor device, the wiring substrate may be transferred in a direction in which the cut faces of the terminals in step (b) are disposed in a downstream side.
  • Accordingly, for example, when the slit is formed in a U-shape, the first region can be prevented from being pulled up.
  • In the method for manufacturing a semiconductor device, in step (a), the reinforcing member may be adhered to the wiring substrate through adhesive material.
  • In the method for manufacturing a semiconductor device, the adhesive material may be an energy setting type adhesive material, and the step of applying energy to harden the adhesive material may be included before steps (b) and (c).
  • Accordingly, when the inside of the reinforcing member is cut, the adhesive material existing between the wiring substrate and the reinforcing member can be prevented from adhering to a cutting tool. Also, when the adhesive material has hardened, peeling of the reinforcing member from the wiring substrate can be prevented after the cutting steps.
  • In accordance with the present invention, an apparatus for manufacturing a semiconductor device that includes a wiring substrate having a first region where a semiconductor chip is mounted and a second region around the first region and terminals extending from the first region to the second region formed on one surface thereof includes:
  • a cutting section that cuts the wiring substrate, wherein a reinforcing member is provided on another surface of the wiring substrate in a manner that the reinforcing member overlaps the terminals and a part thereof protrudes from the first region to the second region, and
  • wherein the cutting section includes a first cutting section for cutting the terminals along a boundary between the first region and the second region, and a second cutting section for continuously cutting the reinforcing member from inside thereof to the outside along the boundary between the first region and the second region.
  • According to the present invention, the cutting section for cutting along the boundary between the first region and the second region is divided into the first cutting section for cutting the terminals and the second cutting section for continuously cutting the reinforcing member from inside thereof to its outside. Accordingly, a process to prevent the terminals from peeling off and a process to prevent the first region from developing cracks can both be realized, and therefore the reliability of the semiconductor device can be improved.
  • In the apparatus for manufacturing a semiconductor device, the first cutting section may punch through from a surface side having the terminals in the wiring substrate; and the second cutting section may punch through from the surface side having the terminals in the wiring substrate.
  • Accordingly, the punching direction is the same in the first and second cutting sections.
  • In the apparatus for manufacturing a semiconductor, the first cutting section may be disposed on an upstream side in a transfer direction of the wiring substrate with respect to the second cutting section.
  • Accordingly, the cutting by the first cutting section can be conducted prior to the cutting by the second cutting section.
  • In the apparatus for manufacturing a semiconductor device, the first cutting section may include a die for pressing the first region to be fixed, and a punch to punch through the second region.
  • Accordingly, peeling of first terminals in the first region can be prevented, and therefore the reliability of the semiconductor device can be improved.
  • In the apparatus for manufacturing a semiconductor device, the second cutting section may include a die for pressing the second region to be fixed, and a punch to punch through the first region.
  • Accordingly, the first region is punched through, and cracks are not generated or restrained from being generated in the first region, and therefore the reliability of the semiconductor device can be improved.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a view for describing a semiconductor device manufacturing method in accordance with a first embodiment of the present invention.
  • FIG. 2 is a view for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with the first embodiment of the present invention.
  • FIG. 3(A)-FIG. 3(C) are views for describing the semiconductor device manufacturing method and manufacturing apparatus in accordance with the first embodiment of the present invention.
  • FIG. 4 is a cross-sectional view taken along a line IV-IV of FIG. 3(A).
  • FIG. 5 is a view for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with a second embodiment of the present invention.
  • FIG. 6 is a cross-sectional view taken along a line VI-VI of FIG. 5.
  • FIG. 7(A)-FIG. 7(C) are views for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with a third embodiment of the present invention.
  • FIG. 8 is a view showing an electro-optic device in accordance with an embodiment of the present invention.
  • FIG. 9 is a view showing an electronic device in accordance with an embodiment of the present invention.
  • FIG. 10 is a view showing an electronic device in accordance with an embodiment of the present invention.
  • DETAILED DESCRIPTION
  • Embodiments of the present invention are described below with reference to the accompanying drawings.
  • First Embodiment
  • FIG. 1-FIG. 4 are views for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with an embodiment of the present invention. FIG. 1 is a plan view of a wiring substrate used in the present embodiment, wherein a semiconductor chip is mounted on the wiring substrate. FIG. 2 is a diagram for describing the steps of cutting in a reel-to-reel transfer, wherein a cross-sectional view of the wiring substrate is shown. FIG. 3(A)-FIG. 3(C), and FIG. 4 are views for describing the steps of cutting the wiring substrate.
  • As shown in FIG. 1, the wiring substrate 10 includes a first region 12 (a region surrounded by a two-dot and dash line), and a second region 14 around the first region 12. The first region 12 has a plane configuration of a final product, and may be a region that cannot be visually recognized during the semiconductor device manufacturing stage. In the present embodiment, the wiring substrate 10 includes a plurality of first regions 12. The plural first regions 12 may be arranged in a single column (in the up-down direction in FIG. 1, although omitted), or may be arranged in a plurality of rows and a plurality of columns. In the present embodiment, a COF (chip on film) type semiconductor device is manufactured.
  • As shown in FIG. 1, the wiring substrate 10 includes a base substrate 20 and a wiring pattern 30. The base substrate 20 is a film composed of insulation material, and supports the wiring pattern 30. The base substrate 20 may be a flexible substrate formed from an organic material (for example, resin). In the example shown in FIG. 1, the base substrate 20 is in an elongated shape, and includes a plurality of holes 22 along side sections thereof. The holes 22 can also be used for positioning.
  • The wiring pattern 30 is formed on one surface of the base substrate 20, and formed in the first region 12. The wiring pattern 30 can be formed in each of a plurality of the first regions 12. A part of the wiring pattern 30 (for instance, a part of first terminals 40 and a part of second terminals 42 to be described later) may be formed in the second region 14. The wiring pattern 30 is composed of an electroconductive material (for example, copper (Cu) or gold (Au)), and includes a plurality of wirings 32, 34, 36 and 38. The wirings 32-38 have one terminal ends that extend to a region for mounting a semiconductor chip 50 as terminals for connecting to the semiconductor chip. Other terminal ends of the wirings 32-38 define terminals of the semiconductor device for external connection (first and second terminals 40 and 42). In the example shown in FIG. 1, the wiring 32 has first terminals (for example, input terminals) 40, and the wirings 34-38 have second terminals (for example, output terminals) 42. The first terminals 40 may be wider than other portions of the wiring 32. As shown in FIG. 1, the plurality of the first terminals 40 are arranged linearly (in a parallel array) along a boundary (the 2-dot and dash line in FIG. 1) between the first region 12 and the second region 14. The first terminals 40 extend from the first region 12 to the second region 14. The first terminals 40 may be connected to plating leads 44 formed for electro-plating. The above is similarly applied to the second terminals 42. It is noted that the plating leads 44 pass through the second region 14, and are electrically connected to a plurality of wiring patterns 30.
  • As shown in FIG. 2, an insulation film (for example, solder resist) 46 may be formed on a surface of the wiring substrate 10 where the wiring pattern 30 is formed. The insulation film 46 covers the wiring pattern 30 while avoiding the semiconductor chip connecting terminals and the first and second terminals 40 and 42 for external connection described above.
  • The semiconductor chip 50 is mounted on the wiring substrate 10 in a manner to be electrically connected to the wiring pattern 30. The semiconductor chip 50 is a driver IC, and includes an integrated circuit formed inside. The semiconductor chip 50 may be, for example, face-down bonded to the first region 12. As shown in FIG. 2, an underfill material (resin) 48 is provided between the semiconductor chip 50 and the wiring substrate 10. It is noted that, although omitted in FIG. 1, other electronic components may be mounted on the wiring substrate 10.
  • First, a reinforcing member 52 is provided on a surface of the wiring substrate 10 (on the surface of the base substrate 20), which is on the opposite side of the wiring pattern 30 (at the first terminals 40). The reinforcing member 52 reinforces regions where terminals (for example, the first terminals 40) are formed in the wiring substrate 10 so that the terminals (for example, the first terminals 40) can be inserted in a connector. The reinforcing member 52 restricts bending of the wiring substrate 10. The reinforcing member 52 may be a substrate (for example, an organic substrate), and may have a thickness greater than the thickness of the base substrate 20. In the present embodiment, the reinforcing member 52 is provided in a manner to overlap the first terminals 40. In this case, the reinforcing member 52 is provided in a manner that a part thereof protrudes from the first region 12 to the second region 14. In the example shown in FIG. 1, the reinforcing member 52 is provided such that a part thereof protrudes from the first region 12 to the second region 14 in a direction in which the plural first terminals 40 are arranged. By so doing, when the boundary between the first region 12 and the second region 14 is cut, the widths of the wiring substrate 10 and the reinforcing member 52 can be matched, such that an accurate positioning of them with respect to a connector becomes possible. It is noted that the reinforcing member 52 may also be provided in a manner that a part thereof protrudes from the first region 12 to the second region 14 in a direction perpendicular to the arranging direction of the plural first terminals 40.
  • The reinforcing member 52 may be adhered to the wiring substrate 10 through adhesive material 54. The adhesive material 54 is provided on the entire surface of contacting portions between the wiring substrate 10 and the reinforcing member 52. As the adhesive material 54, an energy setting type adhesive material that exhibits adhesive strength by application of predetermined energy, and then hardens (looses its adhesive strength), may be used. The energy may be any one of heat, light, pressure and the like. As the adhesive material 54, for example, a thermosetting type adhesive material or an ultraviolet ray setting type adhesive material can be used. The main composition of the adhesive material 54 may often be resin, and can be in a paste state or a film state under room temperature.
  • When an energy setting type adhesive material is used, the adhesive material 54 may be hardened by applying predetermined energy before a cutting process to be described below. In this case, although the hardening reaction of the adhesive material 54 may preferably be completed, the cutting process may be conducted at least after the hardening reaction has started. As a result, when the inside of the reinforcing member 52 is cut, the adhesive material 54 that is present between the wiring substrate 10 and the reinforcing member 52 can be prevented from adhering to a cutting tool (for example, a die or a punch). Also, when the adhesive material 54 has hardened, peeling of the reinforcing member 52 from the wiring substrate 10 can be prevented after the cutting process.
  • As a modified example, a material that exhibits adhesive strength under room temperature (for example, a known double-stick tape) may be used as the adhesive material 54.
  • Next, the wiring substrate 10 and the reinforcing member 52 are cut along the boundary between the first region 12 and the second region 14. In the present embodiment, they are not cut along the entire boundary between the first region 12 and the second region 14, but cut along a part thereof. For example, they may be cut in a manner to surround the first terminals 40 (see FIG. 3(C)).
  • The present process is conducted by using a manufacturing apparatus shown in FIG. 2. The semiconductor device manufacturing apparatus includes a first cutting section 60, a second cutting section 70, and a transfer apparatus 80.
  • The first cutting section 60 cuts the first terminals 40 along the boundary between the first region 12 and the second region 14 (see FIG. 3(A)). The first cutting section 60 includes a first cutting tool 62. The first cutting tool 62 may be a shearing type (punch through type). More specifically, the first cutting tool 62 includes dies 64 and 66 for pressing the first region 12 to be fixed, and a punch 68 for punching through the second region 14. The dies 64 and 66 may additionally press parts of the second region 14 (peripheral regions of the punch 68 in FIG. 3(A)) except the region to be punched through. The die 64 presses the wiring substrate 10 in a direction different from the die 66. The punch 68 is movable in an axial direction of holes of the dies 64 and 66, and can punch through the second region 14 of the wiring substrate 10 in one direction. In the present embodiment, the punch 68 is disposed above the surface of the wiring substrate 10 on the side of the terminals 40, and can punch through from that surface side in a direction in which the wiring substrate 10 is penetrated. A tip surface (a surface that contacts the wiring substrate 10) of the punch 68 may be flat, and may tear at least a part of the wiring substrate 10 and the reinforcing member 52 to form a torn surface.
  • The second cutting section 70 continuously cuts the reinforcing member 52 from an inside thereof to the outside along the boundary between the first region 12 and the second region 14 (see FIG. 3(B)). The second cutting section 70 includes a second cutting tool 72. The second cutting tool 72 may be a shearing type (punch through type). More specifically, the second cutting tool 72 includes dies 74 and 76 for pressing the second region 14 to be fixed, and a punch 78 for punching through the first region 12. The dies 74 and 76 may additionally press parts of the first region 12 except the region to be punched through (peripheral regions of the punch 78 in FIG. 3(B)). The die 74 presses the wiring substrate 10 in a direction different from the die 76. The punch 78 is movable in an axial direction of the holes of the dies 74 and 76, and can punch through the first region 12 of the wiring substrate 10 in one direction. In the present embodiment, the punch 78 is disposed above the surface of the wiring substrate 10 on the side of the terminals 40, and can punch through from that surface side in a direction in which the wiring substrate 10 is penetrated. A tip surface (a surface that contacts the wiring substrate 10) of the punch 78 may be flat, and may tear at least a part of the wiring substrate 10 and the reinforcing member 52 to form a torn surface.
  • The transfer apparatus 80 includes a pair of first and second reels 82 and 84. The wiring substrate 10 is spanned across the first and second reels 82 and 84, fed from the first reel 82 and wound on the second reel 84, thereby enabling a reel-to-reel transfer. In the present embodiment, the first and second cutting sections 60 and 70 may be disposed between the first and second reels 82 and 84, and the cutting steps may be conducted in a single transfer. In the present embodiment, the first and second cutting sections 60 and 70 have the same punch through direction (from the side of the surface having the first terminals 40), such that the cutting steps by the respective sections can be conducted in a single transfer without inverting the front and back of the wiring substrate 10. Also, since the punch through directions are the same, the first and second cutting tools 62 and 72 can be made into one piece as a single progressive die. The first cutting section 60 is disposed on an upstream side of the transfer direction with respect to the second cutting section 70. As a result, cutting by the first cutting section 60 can be conducted before cutting by the second cutting section 70. As a modified example, one of the first cutting section 60 and the second cutting section 70 may be disposed between the first and second reels 82 and 84, and the cutting steps may be conducted in a plurality of transfers. It is noted that the transfer apparatus is not limited to any particular configuration, and can be, for example, a belt type conveyor, so long as it can transfer the wiring substrate 10 in a fixed direction.
  • As shown in FIG. 3(A), in the cutting step by the first cutting section 60, the first terminals 40 are cut by punching through the second region 14. At this time, at least the first region 12 is pressed to be fixed. In the present embodiment, a slit 90 is formed in the second region 14 along the boundary between the first region 12 and the second region 14 (see FIG. 3(B)). In this case, as shown in FIG. 4, the second region 14 is also pressed to be fixed, and a portion in the second region 14 adjacent to the first region 12 is punched through. Because of the slit 90, the cutting step by the second cutting section 70 can be conducted without changing the external configuration of the wiring substrate 10.
  • As shown in FIG. 4, in accordance with the present embodiment, the wiring substrate 10 is punched through by the punch 68 from the side of the surface having the first terminals 40. At portions that are punched through by the punch 68, burs 16 are formed on the side of the first terminals 40. On the other hand, portions that are pressed by the dies 64 and 66, burs 18 are formed on the side of the reinforcing member 52. The burs 16 on the side of the first terminals 40 may promote peeling of the first terminals 40 from the base substrate 20, but the burs 18 on the side of the reinforcing member 52 do not cause such a problem. In accordance with the present embodiment, because the burs 16 on the side of the first terminals 40 are not formed in the first region 12 that is used as a final product, the first terminals 40 (the wiring pattern 30) are prevented from peeling off, and the reliability of the semiconductor device can be improved.
  • As indicated in FIG. 3(B), the slit 90 may be a gap or a long hole, and may be formed linearly or curved. The slit 90 is formed at least inside the reinforcing member 52, but is not formed continuously from the inside of the reinforcing member 52 to the outside. For example, the slit 90 may include a first portion 92 that extends inside the reinforcing member 52 along the widthwise direction of the first terminals 40, and a second portion 94 that extends inside the reinforcing member 52 along the lengthwise direction of the first terminals 40. The first portion 92 traverses the first terminals 40. The second portion 94 may extend adjacent to an end section of the reinforcing member 52. The second portion 94 is formed in a manner to surround a region where the plural first terminals 40 are formed, and may be formed in one piece with the first portion 92. In other words, the slit 90 may be in a U shape. As a result, a cutting distance by the second cutting section 70 to be described below becomes shorter, such that cutting by the second cutting section 70 can be stably conducted. Alternatively, the slit 90 may be formed with the first portion 92 alone.
  • In the example shown in FIG. 3(B), the slit 90 further includes a third portion 96 that is disposed outside the reinforcing member 52 opposite to the second portion 94. The third portion 96 may be disposed separated from the second portion 94, and may extend in the same direction as the second portion 94. The contour of the reinforcing member 52 passes a portion between the second portion 94 and the third portion 96. As a result, the portion between the second portion 94 and the third portion 96 may be cut by the second cutting section 70 to be described below, such that the cutting distance becomes shorter, and cutting by the second cutting section 70 can be stably conducted.
  • When the cutting step by the first cutting section 60 has been completed, the cutting step by the second cutting section 70 is conducted. As indicated in FIG. 2, the wiring substrate 10 may be transferred reel-to-reel, such that the work area may be transferred from the first cutting section 60 to the second cutting section 70, and the cutting step by the second cutting section 70 may be conducted. In this case, as indicated in FIG. 2, the wiring substrate 10 may be transferred in a direction in which cut faces of the first terminals 40 made by the first cutting section 60 are disposed on the downstream side of the transfer direction. As a result, for example, when the slit 90 is formed in a U-shape configuration as shown in FIG. 3(B), the first region 12 can be prevented from being turned up.
  • As indicated in FIG. 3(B), in the cutting step by the second cutting section 70, the first region 12 is punched through, thereby continuously cutting the reinforcing member 52 from the inside thereof to the outside. In this instance, at least the second region 14 is pressed to be fixed. The first region 12 may also be pressed to be fixed. The present step is conducted by piercing the punch 78 through the wiring substrate 10 from the side of the surface where the first terminals 40 are provided. In this case, a longitudinal width of a region to be punched through (a contact region between the punch 78 and the wiring substrate 10) may be greater than the distance between the second portion 94 and the third portion 96 of the slit 90. Alternatively, the longitudinal width of the region to be punched through may be generally the same as the width measured from the first portion 92 to an end of the third portion 96 in the lengthwise direction of the first terminals 40. On the other hand, a transverse width of the region to be punched through may be generally the same as the transverse width of a region surrounded by the slit 90, or may be slightly smaller as shown in FIG. 3(B).
  • In the present embodiment, the punch 78 pierces the wiring substrate 10 from the side of its surface where the first terminals 40 are provided. In this case, in a portion that is pressed by the dies 74 and 76, the wiring substrate 10 hangs onto the die 76 on the lower side and bends due to the thickness of the reinforcing member 52. For this reason, at the cutting step, parts of the wiring substrate 10 may be excessively pulled, and cracks (or dents) may occur. On the other hand, in a portion that is punched through by the punch 78, the wiring substrate 10 does not bend, and cracks are not generated. In the present embodiment, the first region 12 that is used as a final product is punched through such that cracks are not generated or restrained from being generated in the first region 12, and therefore the reliability of the semiconductor device can be improved.
  • In this manner, as indicated in FIG. 3(C), a semiconductor device 1 (tape semiconductor device) can be manufactured. In the semiconductor device 1, a slit 100 is formed along the boundary between the first region 12 and the second region 14. The slit 100 cuts the portion between the second portion 94 and the third portion 96 of the slit 90 shown in FIG. 3(B). The slit 100 is formed in the second region 14 along the boundary between the first region 12 and the second region 14.
  • In the present embodiment, the first region 12 and the second region 14 are connected in portions other than the slit 100. As a result, the first region 12 can be handled with the external shape of the wiring substrate 10, such that management (such as shipping) of the semiconductor device is facilitated. It is noted that the semiconductor device 1 is finally cut out along the entire boundary between the first region 12 and the second region 14.
  • In accordance with the present embodiment, the step of cutting along the boundary between the first region 12 and the second region 14 is divided into the step of cutting the first terminals 40, and the step of continuously cutting the reinforcing member 52 from the inside thereof to the outside, and then conducted. Accordingly, the process to prevent peeling of the first terminals 40 and the process to prevent cracks in the first region 12 can both be realized, and the reliability of the semiconductor device can be improved.
  • Second Embodiment
  • FIG. 5 and FIG. 6 are views for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with a second embodiment of the present invention. In the present embodiment, the cutting step by a second cutting section, in other words, the step of continuously cutting the reinforcing member 52 from the inside thereof to the outside and an apparatus relating thereto are different from those described above.
  • In the present embodiment, the portion between the second portion 94 and the third portion 96 of the slit 90 is cut without breaking (tearing off). For example, a punch 110 has a cutting blade 112 having a pointed, sharp configuration, and the cutting blade 112 may cut the wiring substrate 10, the adhesive material 54 and the reinforcing member 52. As a result, smooth cutting becomes possible by the cutting blade 112, and portions of the wiring substrate 10 are not excessively pulled, such that cracks (or dents) are restrained from occurring. Accordingly, the reliability of the semiconductor device can be improved. It is noted that details of the second cutting tool other than the punch 110 can be derived from those of the second cutting tool 72 described above.
  • The details described above in conjunction with the aforementioned embodiment can be applied to the other details of the present embodiment.
  • Third Embodiment
  • FIG. 7(A)-FIG. 7(C) are views for describing a semiconductor device manufacturing method and manufacturing apparatus in accordance with a third embodiment of the present invention. In the present embodiment, after the step of attaching the reinforcing member 52 has been completed, the wiring substrate 10 and the reinforcing member 52 are cut along the entire boundary between the first region 12 and the second region 14. In the present embodiment, not only the first terminals 40, but also second terminals 42 are cut. It is noted that, in the present embodiment, a reinforcing member is not provided on the side of the second terminals 42.
  • As indicated in FIG. 7(A), in the step of cutting by the first cutting section, all terminals extending from the first region 12 to the second region (first and second terminals 40 and 42) among the wiring pattern are cut. Slits 130 and 132 may be formed in the second region 14 along the boundary between the first region 12 and the second region 14 (see FIG. 7(B)). The contents of the first embodiment can be applied to the details for the process, and punches 120 and 122 are pierced from the side of the surface of the wiring substrate 19 having the first and second terminals 40 and 42, in a manner described above. In the example shown in FIG. 7(B), each of the slits 130 and 132 is linearly formed. The contents described above can also be applied to the slits 130 and 132. For example, the slit 130 for the first terminals 40 may have the same configuration as that of the slit 90.
  • As indicated in FIG. 7(B), in the cutting step by the second cutting section, almost the entire section of the first region 12 is punched through, thereby cutting along the entire boundary between the first region 12 and the second region 14. More specifically, the second region 14 is pressed to be fixed, and a punch 140 having a plane configuration generally the same as that of the first region 12 is punched from the side of the surface of the wiring substrate 10 having the first and second terminals 40 and 42. Other details of the process are the same as those described in the first embodiment.
  • In a manner described above, as shown in FIG. 7(C), a semiconductor device 3 (the first region 12) that is cut into an individual piece can be manufactured. The semiconductor device 3 is a final product.
  • The contents described above in the aforementioned embodiments can be applied to other details of the present embodiment.
  • FIG. 8 is a view of an electro-optic device having a semiconductor device manufactured according to the present invention mounted thereon. The electro-optic device 1000 includes the semiconductor device 3 described above, an electro-optic panel (for example, a liquid crystal panel or an EL panel) 1100, and a circuit substrate (for example, a mother board) 1200. The semiconductor device 3 is electrically connected to the electro-optic panel 1100 through the second terminals (for example, output terminals), and electrically connected to the circuit substrate 1200 through the first terminals (for example, input terminals). The first terminals together with the reinforcing member are inserted in a connector 1300 of the circuit substrate 1200.
  • As electronic apparatuses having a semiconductor device manufactured in accordance with the present invention, FIG. 9 shows a notebook type personal computer 2000, and FIG. 10 shows a portable phone 3000.
  • The present invention is not limited to the embodiments described above, and many modifications can be made. For example, the present invention may include compositions that are substantially the same as the compositions described in the embodiments (for example, a composition with the same function, method and result, or a composition with the same objects and result). Also, the present invention includes compositions in which portions not essential in the compositions described in the embodiments are replaced with others. Also, the present invention includes compositions that can achieve the same functions and effects or achieve the same objects of those of the compositions described in the embodiments. Furthermore, the present invention includes compositions that include publicly known technology added to the compositions described in the embodiments.

Claims (5)

1. An apparatus for manufacturing a semiconductor device including a wiring substrate having a first region where a semiconductor chip is mounted and a second region around the first region, and terminals extending from the first region to the second region formed on one surface thereof, comprising:
a cutting section that cuts the wiring substrate;
wherein a reinforcing member is provided on another surface of the wiring substrate, the reinforcing member overlapping the terminals and a part of the reinforcing member protrudes from the first region to the second region; and
wherein the cutting section includes:
a first cutting section cutting the terminals along a boundary between the first region and the second region; and
a second cutting section continuously cutting the reinforcing member from an inboard side to an outboard side along the boundary between the first region and the second region.
2. The apparatus for manufacturing a semiconductor device according to claim 1, wherein:
the first cutting section punches through from a surface side having the terminals in the wiring substrate; and
the second cutting section punches through from the surface side having the terminals in the wiring substrate.
3. The apparatus for manufacturing a semiconductor device according to claim 2, wherein:
the first cutting section is disposed on an upstream side in a transfer direction of the wiring substrate with respect to the second cutting section.
4. The apparatus for manufacturing a semiconductor device according to claim 2, wherein:
the first cutting section includes a die for pressing the first region to be fixed, and a punch to punch through the second region.
5. The apparatus for manufacturing a semiconductor device according to claim 2, wherein:
the second cutting section includes a die for pressing the second region to be fixed, and a punch to punch through the first region.
US11/986,643 2003-11-14 2007-11-21 Semiconductor device manufacturing method and manufacturing apparatus Abandoned US20080178723A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/986,643 US20080178723A1 (en) 2003-11-14 2007-11-21 Semiconductor device manufacturing method and manufacturing apparatus

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2003385416A JP3829939B2 (en) 2003-11-14 2003-11-14 Semiconductor device manufacturing method and manufacturing apparatus
JP2003-385416 2003-11-14
US10/985,668 US7316939B2 (en) 2003-11-14 2004-11-11 Semiconductor device manufacturing method and manufacturing apparatus
US11/986,643 US20080178723A1 (en) 2003-11-14 2007-11-21 Semiconductor device manufacturing method and manufacturing apparatus

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US10/985,668 Division US7316939B2 (en) 2003-11-14 2004-11-11 Semiconductor device manufacturing method and manufacturing apparatus

Publications (1)

Publication Number Publication Date
US20080178723A1 true US20080178723A1 (en) 2008-07-31

Family

ID=34631390

Family Applications (2)

Application Number Title Priority Date Filing Date
US10/985,668 Expired - Fee Related US7316939B2 (en) 2003-11-14 2004-11-11 Semiconductor device manufacturing method and manufacturing apparatus
US11/986,643 Abandoned US20080178723A1 (en) 2003-11-14 2007-11-21 Semiconductor device manufacturing method and manufacturing apparatus

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US10/985,668 Expired - Fee Related US7316939B2 (en) 2003-11-14 2004-11-11 Semiconductor device manufacturing method and manufacturing apparatus

Country Status (2)

Country Link
US (2) US7316939B2 (en)
JP (1) JP3829939B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090199972A1 (en) * 2008-02-11 2009-08-13 Cjc Holdings, Llc Water evaporation system and method
US20110139378A1 (en) * 2009-12-11 2011-06-16 Purestream Technology, Llc Wastewater treatment systems and methods
US20110140457A1 (en) * 2009-12-11 2011-06-16 Purestream Technology, Llc Wastewater pre-treatment and evaporation system
US20120055304A1 (en) * 2010-09-03 2012-03-08 Cheng Uei Precision Industry Co., Ltd. Cutting equipment
US20120184086A1 (en) * 2009-09-28 2012-07-19 Hae Choon Yang Punch singulation system and method

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3829940B2 (en) * 2003-11-14 2006-10-04 セイコーエプソン株式会社 Semiconductor device manufacturing method and manufacturing apparatus
JP3915927B2 (en) 2004-11-18 2007-05-16 セイコーエプソン株式会社 Electronic component and manufacturing method thereof
JP3915928B2 (en) 2004-11-24 2007-05-16 セイコーエプソン株式会社 Electronic component and manufacturing method thereof
JP4171926B2 (en) 2006-09-19 2008-10-29 セイコーエプソン株式会社 Manufacturing method of wiring board with board pieces
KR101445117B1 (en) * 2008-06-25 2014-10-01 삼성전자주식회사 A test pad structure, a pad structure for inspecting a semiconductor chip and a wiring substrate for a tape package having same
JP5561275B2 (en) 2009-04-30 2014-07-30 日本電気株式会社 Communication apparatus, connection method, and connection program
US10149382B2 (en) * 2016-11-18 2018-12-04 Ricoh Company, Ltd. Wiring substrate, wiring member, liquid discharge head, liquid discharge device, and liquid discharge apparatus
TWI745823B (en) * 2019-12-31 2021-11-11 頎邦科技股份有限公司 Stiffener structure of flexible print circuit board
TWI796550B (en) * 2020-02-26 2023-03-21 頎邦科技股份有限公司 Flexible circuit board

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4316320A (en) * 1978-10-13 1982-02-23 Matsushita Electric Industrial Co., Ltd. Method of manufacturing electronic circuit apparatus
US5427641A (en) * 1989-08-28 1995-06-27 Seiko Epson Corporation Method of forming a mounting structure on a tape carrier
US5763940A (en) * 1995-04-24 1998-06-09 Kabushiki Kaisha Toshiba Tape mounted semiconductor apparatus
US6084291A (en) * 1997-05-26 2000-07-04 Seiko Epson Corporation Tape carrier for TAB, integrated circuit device, a method of making the same, and an electronic device
US6274405B1 (en) * 1996-10-17 2001-08-14 Seiko Epson Corporation Semiconductor device, method of making the same, circuit board, and film carrier tape
US6313526B1 (en) * 1998-12-01 2001-11-06 Sharp Kabushiki Kaisha Semiconductor apparatus, Including thin film belt-like insulating tape
US6341549B2 (en) * 1997-12-30 2002-01-29 Samsung Electronic Co., Ltd. Trimming apparatus having punches with air flow routes for removal of gate scraps
US6559524B2 (en) * 2000-10-13 2003-05-06 Sharp Kabushiki Kaisha COF-use tape carrier and COF-structured semiconductor device using the same
US6624520B1 (en) * 1999-11-25 2003-09-23 Sharp Kabushiki Kaisha Tape carrier, manufacturing method of tape carrier and package manufacturing method
US6633002B2 (en) * 1999-05-20 2003-10-14 Nec Lcd Technologies, Ltd. Tape carrier having high flexibility with high density wiring patterns
US6744120B1 (en) * 1999-03-11 2004-06-01 Seiko Epson Corporation Flexible interconnect substrate of a tape-shaped semiconductor device, semiconductor device and circuit board
US6911729B1 (en) * 1999-05-14 2005-06-28 Sharp Kabushiki Kaisha Tape carrier semiconductor device
US7169643B1 (en) * 1998-12-28 2007-01-30 Seiko Epson Corporation Semiconductor device, method of fabricating the same, circuit board, and electronic apparatus

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3028286B2 (en) 1996-05-21 2000-04-04 日本航空電子工業株式会社 SMD pallet integrated type FPC and manufacturing method thereof
KR100354203B1 (en) 1999-02-09 2002-09-26 세이코 엡슨 가부시키가이샤 Flexible printed-circuit substrate, film carrier, semiconductor device on tape, semiconductor device, method of semiconductor manufacture, circuit substrate, and electronic device
JP3865594B2 (en) 2001-02-27 2007-01-10 三井金属鉱業株式会社 Manufacturing method, manufacturing apparatus, and manufacturing mold for film carrier tape for mounting electronic components
JP2003198070A (en) 2001-12-26 2003-07-11 Iwaki Electronics Corp Flexible printed wiring board
JP3829941B2 (en) * 2003-11-14 2006-10-04 セイコーエプソン株式会社 Semiconductor device manufacturing method and manufacturing apparatus
JP3829940B2 (en) * 2003-11-14 2006-10-04 セイコーエプソン株式会社 Semiconductor device manufacturing method and manufacturing apparatus

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4316320A (en) * 1978-10-13 1982-02-23 Matsushita Electric Industrial Co., Ltd. Method of manufacturing electronic circuit apparatus
US5427641A (en) * 1989-08-28 1995-06-27 Seiko Epson Corporation Method of forming a mounting structure on a tape carrier
US5763940A (en) * 1995-04-24 1998-06-09 Kabushiki Kaisha Toshiba Tape mounted semiconductor apparatus
US6274405B1 (en) * 1996-10-17 2001-08-14 Seiko Epson Corporation Semiconductor device, method of making the same, circuit board, and film carrier tape
US6084291A (en) * 1997-05-26 2000-07-04 Seiko Epson Corporation Tape carrier for TAB, integrated circuit device, a method of making the same, and an electronic device
US6341549B2 (en) * 1997-12-30 2002-01-29 Samsung Electronic Co., Ltd. Trimming apparatus having punches with air flow routes for removal of gate scraps
US6313526B1 (en) * 1998-12-01 2001-11-06 Sharp Kabushiki Kaisha Semiconductor apparatus, Including thin film belt-like insulating tape
US7169643B1 (en) * 1998-12-28 2007-01-30 Seiko Epson Corporation Semiconductor device, method of fabricating the same, circuit board, and electronic apparatus
US6744120B1 (en) * 1999-03-11 2004-06-01 Seiko Epson Corporation Flexible interconnect substrate of a tape-shaped semiconductor device, semiconductor device and circuit board
US6911729B1 (en) * 1999-05-14 2005-06-28 Sharp Kabushiki Kaisha Tape carrier semiconductor device
US6633002B2 (en) * 1999-05-20 2003-10-14 Nec Lcd Technologies, Ltd. Tape carrier having high flexibility with high density wiring patterns
US6624520B1 (en) * 1999-11-25 2003-09-23 Sharp Kabushiki Kaisha Tape carrier, manufacturing method of tape carrier and package manufacturing method
US6559524B2 (en) * 2000-10-13 2003-05-06 Sharp Kabushiki Kaisha COF-use tape carrier and COF-structured semiconductor device using the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090199972A1 (en) * 2008-02-11 2009-08-13 Cjc Holdings, Llc Water evaporation system and method
US20120184086A1 (en) * 2009-09-28 2012-07-19 Hae Choon Yang Punch singulation system and method
US20110139378A1 (en) * 2009-12-11 2011-06-16 Purestream Technology, Llc Wastewater treatment systems and methods
US20110140457A1 (en) * 2009-12-11 2011-06-16 Purestream Technology, Llc Wastewater pre-treatment and evaporation system
US20120055304A1 (en) * 2010-09-03 2012-03-08 Cheng Uei Precision Industry Co., Ltd. Cutting equipment
US8371197B2 (en) * 2010-09-03 2013-02-12 Cheng Uei Precision Industry Co., Ltd. Cutting equipment

Also Published As

Publication number Publication date
US20050121779A1 (en) 2005-06-09
JP2005150372A (en) 2005-06-09
US7316939B2 (en) 2008-01-08
JP3829939B2 (en) 2006-10-04

Similar Documents

Publication Publication Date Title
US20080178723A1 (en) Semiconductor device manufacturing method and manufacturing apparatus
US7582955B2 (en) Semiconductor device manufacturing method and manufacturing apparatus
US7282389B2 (en) Semiconductor device manufacturing method and manufacturing apparatus
JP3512655B2 (en) Semiconductor device, method of manufacturing the same, and reinforcing tape used for manufacturing the semiconductor device
JP3523536B2 (en) Semiconductor device and manufacturing method thereof, and liquid crystal module and mounting method thereof
US7535108B2 (en) Electronic component including reinforcing member
US7385142B2 (en) Manufacturing method of electronic part and wiring substrate
JP2857492B2 (en) TAB package
US7704793B2 (en) Electronic part and method for manufacturing the same
JP2005032815A (en) Flexible wiring board and its manufacturing method
JPH08139126A (en) Semiconductor device
JP2001015671A (en) Manufacture for lead frame
CN114760750A (en) Flexible circuit board
JPH10242213A (en) Flexible board
JP3829800B2 (en) Film carrier for mounting semiconductor chip and manufacturing method thereof
JP2985584B2 (en) Bend mounting type TAB film carrier and method of manufacturing the same
JPH05283473A (en) Film carrier semiconductor device and manufacture thereof
JPS6358848A (en) Film carrier substrate
JP2002026082A (en) Wiring board, its manufacturing method, semiconductor device, circuit board, and electronic appliance
JPH0677379A (en) Electronic component mounting device
JP2005079301A (en) Wiring board, its manufacturing method and electronic device
JPS6359593A (en) Mounting method in portable medium
JPH0655253U (en) Film carrier with reinforced leads

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION