US20080211003A1 - Capacitor in semiconductor device and method of manufacturing the same - Google Patents
Capacitor in semiconductor device and method of manufacturing the same Download PDFInfo
- Publication number
- US20080211003A1 US20080211003A1 US12/117,904 US11790408A US2008211003A1 US 20080211003 A1 US20080211003 A1 US 20080211003A1 US 11790408 A US11790408 A US 11790408A US 2008211003 A1 US2008211003 A1 US 2008211003A1
- Authority
- US
- United States
- Prior art keywords
- layer
- capacitor
- film
- aluminum
- dielectric film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 51
- 239000004065 semiconductor Substances 0.000 title claims abstract description 30
- 238000004519 manufacturing process Methods 0.000 title abstract description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 42
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 37
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 34
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000000463 material Substances 0.000 claims abstract description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 13
- 229910052710 silicon Inorganic materials 0.000 claims description 13
- 239000010703 silicon Substances 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 11
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 5
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 4
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 3
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 3
- 229910001936 tantalum oxide Inorganic materials 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims 5
- 230000001965 increasing effect Effects 0.000 abstract description 18
- 238000000137 annealing Methods 0.000 abstract description 17
- 230000015572 biosynthetic process Effects 0.000 abstract description 10
- 230000015556 catabolic process Effects 0.000 abstract description 8
- 238000007254 oxidation reaction Methods 0.000 abstract description 5
- 230000007850 degeneration Effects 0.000 abstract description 4
- 230000003647 oxidation Effects 0.000 abstract description 4
- 238000010924 continuous production Methods 0.000 abstract description 3
- 230000009467 reduction Effects 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 72
- 238000000034 method Methods 0.000 description 19
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 12
- 230000003247 decreasing effect Effects 0.000 description 12
- 238000000231 atomic layer deposition Methods 0.000 description 10
- 230000008569 process Effects 0.000 description 9
- 238000005229 chemical vapour deposition Methods 0.000 description 8
- 150000004767 nitrides Chemical class 0.000 description 8
- 238000007796 conventional method Methods 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910021529 ammonia Inorganic materials 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 4
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- 229910020286 SiOxNy Inorganic materials 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000005121 nitriding Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
Definitions
- the present invention relates to a capacitor in semiconductor device and a method of manufacturing the. More specifically, the present invention relates to a capacitor in semiconductor device and method of manufacturing of the same, wherein an alumina (Al 2 O 3 ) film capable of further decreasing the effective thickness is used as a dielectric film, instead of a conventional nitride film, and an aluminum (Al) layer is used as a conductive film, thus enhancing the breakdown voltage of the capacitor and decreasing leakage current leading to improved reliability of the device.
- an alumina (Al 2 O 3 ) film capable of further decreasing the effective thickness is used as a dielectric film, instead of a conventional nitride film, and an aluminum (Al) layer is used as a conductive film, thus enhancing the breakdown voltage of the capacitor and decreasing leakage current leading to improved reliability of the device.
- DRAM dynamic random access memory
- the capacitor primarily employs poly-silicon as a conductive material, and an oxide film, a nitride film or a lamination film thereof, namely an oxide-nitride-oxide (ONO) film as a dielectric material.
- C capacitance
- ⁇ 0 represents permittivity of vacuum
- ⁇ r represents a dielectric constant of a dielectric film
- A represents the surface area of a capacitor
- T represents the thickness of a dielectric film
- a method of increasing a surface area of a lower electrode of the capacitor by forming a poly-silicon layer into multi-layers and then forming the resulting multi-layers into a fin structure connecting each layer therethrough, or a method of increasing a height of the capacitor such as formation of a cylinder-shaped lower electrode on an upper part of a contact suffers from difficulty of subsequent processes due to a step caused by increased height of the capacitor, and high integration of DRAMs leads to a decreased area of the device, thus making it difficult to secure sufficient capacitance of the capacitor.
- FIGS. 1 a and 1 b are views illustrating a capacitor of a semiconductor device in accordance with a conventional art.
- lower structures such as element-isolation oxide films, MOSFET and bit lines are formed on a semiconductor substrate, although they are not shown in FIG. 1 a .
- a lower electrode 12 made of poly-silicon layer pattern is formed on the semiconductor substrate 10 having a contact plug for the lower electrode formed over the entire surface of the resulting lower structures, and an oxide film formed on the surface of the lower electrode 12 is removed by a pre-cleaning process using an HF solution.
- a nitride film as a dielectric film 16 , is formed on the surface of the lower electrode 12 via low-pressure chemical vapor deposition (LPCVD) and thermal oxidation is then carried out.
- LPCVD low-pressure chemical vapor deposition
- an oxide film 14 made of silicon dioxide (SiO 2 ) is formed between the nitride film 16 and poly-silicon layer 12 , and a SiO x N y film 18 is formed on the nitride film 16 .
- the nitride film 16 can be changed into a SiOxNy material.
- an upper electrode 20 made of poly-silicon material is formed on the SiOxNy film 18 , thereby forming a capacitor having a semiconductor-insulator-semiconductor (SIS) structure.
- SIS semiconductor-insulator-semiconductor
- the capacitor having the SIS structure is formed wherein the lower electrode 12 and upper electrode 20 are formed of poly-silicon layers, and a nitride film is used as a dielectric film 16 .
- the cell area is also decreased, and in order to secure sufficient capacitance, an effective thickness of the dielectric film 16 should be decreased.
- the effective thickness of the nitride film is reduced to less than 40 ⁇ , oxidation resistance thereof is sharply decreased, which results in problems such as oxidization of lower structures including lower electrode 12 and bit lines during a subsequent thermal oxidation process, increased leakage current of the capacitor itself and attenuation of breakdown voltage.
- the upper/lower electrodes are formed of poly-silicon layers, there are additional problems such as degeneration of electrodes, and formation of oxide films on the dielectric film and electrode interfaces thus increasing the effective thickness of the oxide film and then decreasing capacitance.
- the present invention has been made in view of the above problems, and it is an object of the present invention to provide a capacitor in semiconductor device and method of manufacturing of the same, capable of easily securing capacitance of the capacitor, decreasing leakage current, and increasing breakdown voltage, thereby improving process yield and reliability of device operation, via use of an alumina (Al 2 O 3 ) film having a high dielectric constant as a dielectric film of a capacitor and use of an aluminum (Al) layer as an electrode.
- a method of manufacturing a capacitor of a semiconductor device comprising:
- step 1 forming a lower electrode including a stack structure of a poly-silicon layer and a first aluminum layer on a semiconductor substrate having a lower electrode contact plug formed thereon (step 1);
- step 2 forming a dielectric film including a high-dielectric constant material layer on the lower electrode (step 2);
- step 3 forming an upper electrode including a second aluminum layer on the dielectric film
- the poly-silicon layer may be formed into a doped silicon layer, an undoped silicon layer or a stack structure of doped/undoped silicon layer.
- the poly-silicon layer is formed using an undoped poly-silicon layer as a seed and subjecting it to vacuum annealing.
- the poly-silicon layer is subjected to wet or dry pre-cleaning prior to forming the first aluminum layer of the lower electrode.
- the dielectric film is preferably formed via use of chemical vapor deposition (CVD), atomic layer deposition (ALD) or plasma-enhanced atomic layer deposition (PEALD).
- CVD chemical vapor deposition
- ALD atomic layer deposition
- PEALD plasma-enhanced atomic layer deposition
- the method of the present invention may further include annealing via plasma annealing, rapid annealing or furnace annealing, under ammonia (NH 3 ) or nitrogen (N 2 ) gas atmosphere, prior to forming the dielectric film.
- annealing via plasma annealing, rapid annealing or furnace annealing, under ammonia (NH 3 ) or nitrogen (N 2 ) gas atmosphere, prior to forming the dielectric film.
- annealing is preferably carried out at a temperature of 400 to 1,000° C. under ammonia (NH 3 ), nitrogen (N 2 ) or argon (Ar) gas atmosphere.
- NH 3 ammonia
- N 2 nitrogen
- Ar argon
- the upper electrode may include a stack structure of the second aluminum layer/poly-silicon layer.
- the dielectric film is preferably formed of an aluminum film, a hafnium oxide film or a tantalum oxide film.
- steps 1 through 3 at least two steps are preferably carried out in situ.
- a capacitor of a semiconductor device comprising:
- a semiconductor substrate having lower structures including a transistor and bit lines formed thereon;
- a lower electrode including a stack structure of a poly-silicon layer and a first aluminum layer formed on the semiconductor substrate;
- a dielectric film including a high-dielectric constant material layer formed on the lower electrode including a high-dielectric constant material layer formed on the lower electrode
- an upper electrode including a second aluminum layer formed on the dielectric film.
- the poly-silicon layer may be formed into a doped silicon layer, an undoped silicon layer or a stack structure of doped/undoped silicon layer.
- the poly-silicon layer may be formed of metastable poly-silicon (MPS).
- MPS metastable poly-silicon
- the dielectric film may be formed of an alumina film, a hafnium oxide film or a tantalum oxide film.
- the dielectric film may further include an aluminum nitride (AlN).
- AlN aluminum nitride
- the upper electrode may include a stack structure of the second aluminum layer and poly-silicon layer.
- FIGS. 1 a and 1 b are views illustrating a capacitor of a semiconductor device in accordance with a conventional art.
- FIGS. 2 a through 2 c are views illustrating a capacitor in semiconductor device and a method of manufacturing the same in accordance with the present invention.
- FIGS. 2 a through 2 c show a process flow chart for a capacitor in semiconductor device and a method of manufacturing the same in accordance with the present invention.
- lower structures such as element-isolation oxide films defining an active layer, MOSFET and bit lines are formed on a semiconductor substrate, although they are not shown in FIG. 2 a .
- a contact plug for the lower electrode is formed on the entire surface of the resulting structure.
- a first poly-silicon layer 32 for the lower electrode is formed on a semiconductor substrate 10 including the lower structures and the contact plug for the lower electrode.
- the first poly-silicon layer 32 may be deposited in the form into a doped silicon layer, an undoped silicon layer or a stack structure of doped/undoped silicon layer through low-pressure chemical vapor deposition (LPCVD).
- LPCVD low-pressure chemical vapor deposition
- an undoped poly-silicon layer is formed as a seed and subjecting it to vacuum annealing so as to increase the surface area thereof, or may be formed into metastable poly-silicon (MPS) having an irregular surface.
- MPS metastable poly-silicon
- the first poly-silicon layer 32 is subjected to a wet or dry pre-cleaning process using an HF solution, thereby removing an oxide film produced in the course of formation of the first poly-silicon layer 32 , and the first aluminum (Al) layer 34 is formed on the first poly-silicon layer 32 via use of conventional methods well known in the art such as chemical vapor deposition (CVD), physical vapor deposition (PVD) and atomic layer deposition (ALD). Then, the first aluminum (Al) layer 34 and first poly-silicon layer 32 are patterned to form the lower electrode 35 including a stack structure of the first poly-silicon layer 32 and first aluminum (Al) layer 34 .
- CVD chemical vapor deposition
- PVD physical vapor deposition
- ALD atomic layer deposition
- the lower electrode 35 is formed of a stack structure of the first poly-silicon layer 32 and first aluminum (Al) layer 34 and the first poly-silicon layer 32 is formed of a metastable poly-silicon layer, the surface area of the lower electrode 35 is increased and the negative effects due to the aluminum (Al) layer are eliminated, thereby increasing capacitance.
- the dielectric film 36 including a high-dielectric constant material layer is formed on the first aluminum (Al) layer 34 .
- the dielectric film 36 may be formed of an alumina (Al 2 O 3 ) film, a hafnium oxide (HfO 2 ) film or a tantalum oxide (Ta 2 O 5 ) film, via use of a conventional method well known in the art such as chemical vapor deposition (CVD), atomic layer deposition (ALD) or plasma-enhanced atomic layer deposition (PEALD).
- CVD chemical vapor deposition
- ALD atomic layer deposition
- PEALD plasma-enhanced atomic layer deposition
- the aluminum (Al 2 O 3 ) film will be illustrated by way of example.
- the method of the present invention may include nitriding the surface of the first aluminum (Al) layer 34 by annealing via use of a conventional method well known in the art such as plasma annealing, rapid annealing or furnace annealing, under ammonia (NH 3 ) or nitrogen (N 2 ) gas atmosphere, prior to forming the dielectric film.
- a conventional method well known in the art such as plasma annealing, rapid annealing or furnace annealing, under ammonia (NH 3 ) or nitrogen (N 2 ) gas atmosphere, prior to forming the dielectric film.
- the resulting structure is subjected to subsequent annealing at a temperature of 400 to 1,000° C. under ammonia (NH 3 ), nitrogen (N 2 ) or argon (Ar) gas atmosphere, via a conventional method such as rapid annealing or furnace annealing. Consequently, it is possible to prevent an increase in a film thickness due to formation of an oxide film resulting from change of the first aluminum (Al) layer 34 into alumina (Al 2 O 3 ) or aluminum nitride (AlN) in the course of an annealing or subsequent annealing process prior to deposition of the dielectric film 36 , thereby being capable of lowering the effective thickness (T eff ) of the dielectric film 36 to less than 25 ⁇ .
- NH 3 ammonia
- N 2 nitrogen
- Ar argon
- the upper electrode 41 including the second aluminum (Al) layer 38 is formed on the upper part of the dielectric film 36 .
- the upper electrode 41 may be formed of a stack structure of the second aluminum (Al) layer 38 and second poly-silicon layer 40 or may be formed of a single film of the second aluminum (Al) layer 38 .
- the second aluminum (Al) layer 38 may be formed by conventional methods such as chemical vapor deposition (CVD), physical vapor deposition (PVD) and atomic layer deposition (ALD).
- At least two processes may be carried out in situ, or may be continuously carried out in a cluster under vacuum conditions.
- leakage current is decreased due to a difference in a work function between aluminum (Al) and alumina (Al 2 O 3 ) and breakdown voltage characteristics are also improved.
- the capacitor of a semiconductor device manufactured by the above-mentioned method comprises the semiconductor substrate 30 having lower structures including a transistor and bit lines formed thereon; the lower electrode 35 including a stack structure of the poly-silicon layer 32 and the first aluminum layer 34 formed on the semiconductor substrate 30 ; the dielectric film 36 including a high-dielectric constant material layer formed on the lower electrode 35 ; and the upper electrode 41 including a second aluminum layer formed on the dielectric film 36 .
- the dielectric film 36 may further include an aluminum nitride (AlN) (not shown), and the upper electrode 41 may include a stack structure of the second aluminum layer 38 and poly-silicon layer 40 .
- the lower electrode 35 and upper electrode 41 are formed into a stack structure of the poly-silicon layer-aluminum (Al) layer, thus being capable of increasing the surface area of the capacitor and preventing degeneration of the device.
- the alumina (Al 2 O 3 ) film having a high dielectric constant as the dielectric film 36 enables reduction of the thickness of the insulation film, thus increasing capacitance
- internal formation of an MIM capacitor enables reduction of leakage current and improvement of dielectric breakdown characteristics, and use of a single piece of equipment enables a continuous process thus reducing production costs.
- a capacitor of a semiconductor device in accordance with the present invention and a method of manufacturing the same are capable of increasing a surface area of the capacitor and preventing degeneration of the device via formation of the lower electrode and upper electrode into a stack structure of the poly-silicon layer-aluminum (Al) layer.
- the present invention is capable of reducing the thickness of the insulation film via use of the alumina (Al 2 O 3 ) film having a high dielectric constant as the dielectric film, thus increasing capacitance, is capable of reducing leakage current and improving dielectric breakdown characteristics via internal formation of an MIM capacitor, and is capable of reducing production costs by ability to perform a continuous process via use of a single piece of equipment.
Abstract
The present invention relates to a capacitor in semiconductor device and a method of manufacturing the same, wherein, owing to formation of a lower electrode and an upper electrode into a stack structure of a poly-silicon layer and an aluminum (Al) layer and formation of an alumina (Al2O3) film as a dielectric film, the lower electrode is formed into a stack structure of the poly-silicon layer-aluminum (Al) layer, thus increasing a surface area of electrodes due to the absence of oxidation during annealing, and preventing degeneration of the device, and use of the dielectric film including a high-dielectric constant material layer enables reduction of the dielectric film's thickness. Accordingly, the present invention is capable of increasing capacitance, is capable of reducing leakage current and improving dielectric breakdown characteristics via internal formation of an MIM capacitor, and is capable of reducing production costs by performing a continuous process via use of a single piece of equipment.
Description
- This is a division of U.S. application Ser. No. 11/271,601 filed Nov. 10, 2005, which claims the priority benefit under 35 USC 119 of KR 10-2005-58768 filed Jun. 30, 2005, the entire respective disclosures of which are incorporated herein by reference.
- 1. Field of the Invention
- The present invention relates to a capacitor in semiconductor device and a method of manufacturing the. More specifically, the present invention relates to a capacitor in semiconductor device and method of manufacturing of the same, wherein an alumina (Al2O3) film capable of further decreasing the effective thickness is used as a dielectric film, instead of a conventional nitride film, and an aluminum (Al) layer is used as a conductive film, thus enhancing the breakdown voltage of the capacitor and decreasing leakage current leading to improved reliability of the device.
- 2. Description of the Related Art
- Recently, the high degree of integration of semiconductor devices has led to a decrease in cell size, and, as a result, it has become more difficult to fabricate a capacitor having sufficient capacitance. Particularly, in dynamic random access memory (DRAM) devices consisting of a MOS transistor and a capacitor, a crucial factor to achieve high integration of DRAM devices is to increase capacitance of the capacitor occupying a large area in a chip while reducing such an area.
- In this connection, the capacitor primarily employs poly-silicon as a conductive material, and an oxide film, a nitride film or a lamination film thereof, namely an oxide-nitride-oxide (ONO) film as a dielectric material. Therefore, as methods to increase capacitance (C) of the capacitor, as given by C=(∈0×∈r×A)/T wherein ∈0 represents permittivity of vacuum, ∈r represents a dielectric constant of a dielectric film, A represents the surface area of a capacitor, and T represents the thickness of a dielectric film, there may be exemplified a method involving utilization of a material having a high dielectric constant as a dielectric substance, a method of forming a dielectric film with a low thickness, or a method entailing increasing a surface area of the capacitor.
- However, such methods suffer from problems and disadvantages. That is, a great deal of research has been focused on dielectric substances having a high dielectric constant, for example, tantalum oxide (Ta2O5), titanium oxide (TiO2) and strontium titanate (SrTiO3), but it is difficult to apply these materials to practical devices due to the absence of solid confirmation of reliability such as breakdown voltage and thin film characteristics. In addition, decreasing the thickness of the dielectric film results in destruction thereof during operation of the device, this, in turn, significantly affects reliability of the capacitor.
- Additionally, a method of increasing a surface area of a lower electrode of the capacitor by forming a poly-silicon layer into multi-layers and then forming the resulting multi-layers into a fin structure connecting each layer therethrough, or a method of increasing a height of the capacitor such as formation of a cylinder-shaped lower electrode on an upper part of a contact suffers from difficulty of subsequent processes due to a step caused by increased height of the capacitor, and high integration of DRAMs leads to a decreased area of the device, thus making it difficult to secure sufficient capacitance of the capacitor.
- In addition, since current designs call for twice the number of cells per bit line as in the conventional art, in order to increase cell efficiency, capacitance of the cell capacitor should be further increased, whereas an available surface area of the capacitor is decreased. Therefore, in currently available fin type or cylinder type capacitors, the effective surface area of the capacitor is increased by increasing the height of the capacitor, decreasing the gap between low electrodes, or utilizing hemi-spherical silicon grains.
-
FIGS. 1 a and 1 b are views illustrating a capacitor of a semiconductor device in accordance with a conventional art. - First, referring to
FIG. 1 a, lower structures such as element-isolation oxide films, MOSFET and bit lines are formed on a semiconductor substrate, although they are not shown inFIG. 1 a. Next, alower electrode 12 made of poly-silicon layer pattern is formed on thesemiconductor substrate 10 having a contact plug for the lower electrode formed over the entire surface of the resulting lower structures, and an oxide film formed on the surface of thelower electrode 12 is removed by a pre-cleaning process using an HF solution. - Next, a nitride film, as a
dielectric film 16, is formed on the surface of thelower electrode 12 via low-pressure chemical vapor deposition (LPCVD) and thermal oxidation is then carried out. As a result, anoxide film 14 made of silicon dioxide (SiO2) is formed between thenitride film 16 and poly-silicon layer 12, and a SiOxNy film 18 is formed on thenitride film 16. Herein, thenitride film 16 can be changed into a SiOxNy material. - Next, referring to
FIG. 1 b, anupper electrode 20 made of poly-silicon material is formed on theSiOxNy film 18, thereby forming a capacitor having a semiconductor-insulator-semiconductor (SIS) structure. - In such a method of manufacturing a capacitor of a semiconductor device in accordance with a conventional art, the capacitor having the SIS structure is formed wherein the
lower electrode 12 andupper electrode 20 are formed of poly-silicon layers, and a nitride film is used as adielectric film 16. Meanwhile, as a design rule is reduced, the cell area is also decreased, and in order to secure sufficient capacitance, an effective thickness of thedielectric film 16 should be decreased. However, if the effective thickness of the nitride film is reduced to less than 40 Å, oxidation resistance thereof is sharply decreased, which results in problems such as oxidization of lower structures includinglower electrode 12 and bit lines during a subsequent thermal oxidation process, increased leakage current of the capacitor itself and attenuation of breakdown voltage. - Further, as the upper/lower electrodes are formed of poly-silicon layers, there are additional problems such as degeneration of electrodes, and formation of oxide films on the dielectric film and electrode interfaces thus increasing the effective thickness of the oxide film and then decreasing capacitance.
- Therefore, the present invention has been made in view of the above problems, and it is an object of the present invention to provide a capacitor in semiconductor device and method of manufacturing of the same, capable of easily securing capacitance of the capacitor, decreasing leakage current, and increasing breakdown voltage, thereby improving process yield and reliability of device operation, via use of an alumina (Al2O3) film having a high dielectric constant as a dielectric film of a capacitor and use of an aluminum (Al) layer as an electrode.
- In accordance with an aspect of the present invention, the above and other objects can be accomplished by the provision of a method of manufacturing a capacitor of a semiconductor device, comprising:
- forming a lower electrode including a stack structure of a poly-silicon layer and a first aluminum layer on a semiconductor substrate having a lower electrode contact plug formed thereon (step 1);
- forming a dielectric film including a high-dielectric constant material layer on the lower electrode (step 2); and
- forming an upper electrode including a second aluminum layer on the dielectric film (step 3).
- In the present invention, the poly-silicon layer may be formed into a doped silicon layer, an undoped silicon layer or a stack structure of doped/undoped silicon layer.
- Preferably, the poly-silicon layer is formed using an undoped poly-silicon layer as a seed and subjecting it to vacuum annealing.
- Preferably, the poly-silicon layer is subjected to wet or dry pre-cleaning prior to forming the first aluminum layer of the lower electrode.
- The dielectric film is preferably formed via use of chemical vapor deposition (CVD), atomic layer deposition (ALD) or plasma-enhanced atomic layer deposition (PEALD).
- The method of the present invention may further include annealing via plasma annealing, rapid annealing or furnace annealing, under ammonia (NH3) or nitrogen (N2) gas atmosphere, prior to forming the dielectric film.
- After forming the dielectric film, annealing is preferably carried out at a temperature of 400 to 1,000° C. under ammonia (NH3), nitrogen (N2) or argon (Ar) gas atmosphere.
- The upper electrode may include a stack structure of the second aluminum layer/poly-silicon layer.
- The dielectric film is preferably formed of an aluminum film, a hafnium oxide film or a tantalum oxide film.
- In steps 1 through 3, at least two steps are preferably carried out in situ.
- In accordance with another aspect of the present invention, there is provided a capacitor of a semiconductor device, comprising:
- a semiconductor substrate having lower structures including a transistor and bit lines formed thereon;
- a lower electrode including a stack structure of a poly-silicon layer and a first aluminum layer formed on the semiconductor substrate;
- a dielectric film including a high-dielectric constant material layer formed on the lower electrode; and
- an upper electrode including a second aluminum layer formed on the dielectric film.
- In the present invention, the poly-silicon layer may be formed into a doped silicon layer, an undoped silicon layer or a stack structure of doped/undoped silicon layer.
- The poly-silicon layer may be formed of metastable poly-silicon (MPS).
- The dielectric film may be formed of an alumina film, a hafnium oxide film or a tantalum oxide film.
- The dielectric film may further include an aluminum nitride (AlN).
- The upper electrode may include a stack structure of the second aluminum layer and poly-silicon layer.
- The above and other objects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
-
FIGS. 1 a and 1 b are views illustrating a capacitor of a semiconductor device in accordance with a conventional art; and -
FIGS. 2 a through 2 c are views illustrating a capacitor in semiconductor device and a method of manufacturing the same in accordance with the present invention. - Hereinafter, a capacitor in semiconductor device and a method of manufacturing the same in accordance with the present invention will be described in more detail with reference to the accompanying drawings.
-
FIGS. 2 a through 2 c show a process flow chart for a capacitor in semiconductor device and a method of manufacturing the same in accordance with the present invention. - First, referring to
FIG. 2 a, lower structures such as element-isolation oxide films defining an active layer, MOSFET and bit lines are formed on a semiconductor substrate, although they are not shown inFIG. 2 a. Next, a contact plug for the lower electrode is formed on the entire surface of the resulting structure. A first poly-silicon layer 32 for the lower electrode is formed on asemiconductor substrate 10 including the lower structures and the contact plug for the lower electrode. Herein, the first poly-silicon layer 32 may be deposited in the form into a doped silicon layer, an undoped silicon layer or a stack structure of doped/undoped silicon layer through low-pressure chemical vapor deposition (LPCVD). In addition, an undoped poly-silicon layer is formed as a seed and subjecting it to vacuum annealing so as to increase the surface area thereof, or may be formed into metastable poly-silicon (MPS) having an irregular surface. - Referring to
FIG. 2 b, the first poly-silicon layer 32 is subjected to a wet or dry pre-cleaning process using an HF solution, thereby removing an oxide film produced in the course of formation of the first poly-silicon layer 32, and the first aluminum (Al)layer 34 is formed on the first poly-silicon layer 32 via use of conventional methods well known in the art such as chemical vapor deposition (CVD), physical vapor deposition (PVD) and atomic layer deposition (ALD). Then, the first aluminum (Al)layer 34 and first poly-silicon layer 32 are patterned to form thelower electrode 35 including a stack structure of the first poly-silicon layer 32 and first aluminum (Al)layer 34. - In this case, when the
lower electrode 35 is formed of a stack structure of the first poly-silicon layer 32 and first aluminum (Al)layer 34 and the first poly-silicon layer 32 is formed of a metastable poly-silicon layer, the surface area of thelower electrode 35 is increased and the negative effects due to the aluminum (Al) layer are eliminated, thereby increasing capacitance. - Next, a
dielectric film 36 including a high-dielectric constant material layer is formed on the first aluminum (Al)layer 34. In this case, thedielectric film 36 may be formed of an alumina (Al2O3) film, a hafnium oxide (HfO2) film or a tantalum oxide (Ta2O5) film, via use of a conventional method well known in the art such as chemical vapor deposition (CVD), atomic layer deposition (ALD) or plasma-enhanced atomic layer deposition (PEALD). In the present invention, the aluminum (Al2O3) film will be illustrated by way of example. - In addition, the method of the present invention may include nitriding the surface of the first aluminum (Al)
layer 34 by annealing via use of a conventional method well known in the art such as plasma annealing, rapid annealing or furnace annealing, under ammonia (NH3) or nitrogen (N2) gas atmosphere, prior to forming the dielectric film. - Next, the resulting structure is subjected to subsequent annealing at a temperature of 400 to 1,000° C. under ammonia (NH3), nitrogen (N2) or argon (Ar) gas atmosphere, via a conventional method such as rapid annealing or furnace annealing. Consequently, it is possible to prevent an increase in a film thickness due to formation of an oxide film resulting from change of the first aluminum (Al)
layer 34 into alumina (Al2O3) or aluminum nitride (AlN) in the course of an annealing or subsequent annealing process prior to deposition of thedielectric film 36, thereby being capable of lowering the effective thickness (Teff) of thedielectric film 36 to less than 25 Å. - Next, referring to
FIG. 2 c, theupper electrode 41 including the second aluminum (Al)layer 38 is formed on the upper part of thedielectric film 36. Herein, theupper electrode 41 may be formed of a stack structure of the second aluminum (Al)layer 38 and second poly-silicon layer 40 or may be formed of a single film of the second aluminum (Al)layer 38. The second aluminum (Al)layer 38 may be formed by conventional methods such as chemical vapor deposition (CVD), physical vapor deposition (PVD) and atomic layer deposition (ALD). - Meanwhile, among processes involving deposition of the first aluminum (Al)
layer 34, nitriding the surface of the first aluminum (Al)layer 34, deposition of thedielectric film 36 and deposition of the second aluminum (Al)layer 38, at least two processes may be carried out in situ, or may be continuously carried out in a cluster under vacuum conditions. As a result, it is possible to simplify the manufacturing process and reduce facility investment. In addition, since an MIM structure of a capacitor is internally formed, leakage current is decreased due to a difference in a work function between aluminum (Al) and alumina (Al2O3) and breakdown voltage characteristics are also improved. - The capacitor of a semiconductor device manufactured by the above-mentioned method comprises the
semiconductor substrate 30 having lower structures including a transistor and bit lines formed thereon; thelower electrode 35 including a stack structure of the poly-silicon layer 32 and thefirst aluminum layer 34 formed on thesemiconductor substrate 30; thedielectric film 36 including a high-dielectric constant material layer formed on thelower electrode 35; and theupper electrode 41 including a second aluminum layer formed on thedielectric film 36. Herein, thedielectric film 36 may further include an aluminum nitride (AlN) (not shown), and theupper electrode 41 may include a stack structure of thesecond aluminum layer 38 and poly-silicon layer 40. - In the capacitor of a semiconductor device in accordance with the present invention, the
lower electrode 35 andupper electrode 41 are formed into a stack structure of the poly-silicon layer-aluminum (Al) layer, thus being capable of increasing the surface area of the capacitor and preventing degeneration of the device. Further, in accordance with the present invention, use of the alumina (Al2O3) film having a high dielectric constant as thedielectric film 36 enables reduction of the thickness of the insulation film, thus increasing capacitance, internal formation of an MIM capacitor enables reduction of leakage current and improvement of dielectric breakdown characteristics, and use of a single piece of equipment enables a continuous process thus reducing production costs. - As apparent from the above description, a capacitor of a semiconductor device in accordance with the present invention and a method of manufacturing the same are capable of increasing a surface area of the capacitor and preventing degeneration of the device via formation of the lower electrode and upper electrode into a stack structure of the poly-silicon layer-aluminum (Al) layer. Further, the present invention is capable of reducing the thickness of the insulation film via use of the alumina (Al2O3) film having a high dielectric constant as the dielectric film, thus increasing capacitance, is capable of reducing leakage current and improving dielectric breakdown characteristics via internal formation of an MIM capacitor, and is capable of reducing production costs by ability to perform a continuous process via use of a single piece of equipment.
- Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.
Claims (6)
1. A capacitor of a semiconductor device, comprising:
a semiconductor substrate having lower structures including a transistor and bit lines formed thereon;
a lower electrode including a stack structure of a polysilicon layer and a first aluminum layer formed on the semiconductor substrate;
a dielectric film including a high-dielectric constant material layer formed on the lower electrode; and
an upper electrode including a second aluminum layer formed on the dielectric film.
2. The capacitor of claim 1 , wherein the polysilicon layer comprises a doped silicon layer, an undoped silicon layer, or a stack structure of doped and undoped silicon layers.
3. The capacitor of claim 1 , wherein the polysilicon layer comprises a metastable polysilicon (MPS) layer.
4. The capacitor of claim 1 , wherein the dielectric film comprises an alumina film, a hafnium oxide film, or a tantalum oxide film.
5. The capacitor of claim 1 , wherein the dielectric film further comprises aluminum nitride (AlN).
6. The capacitor of claim 1 , wherein the upper electrode comprises a stack structure of the second aluminum layer and the polysilicon layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/117,904 US20080211003A1 (en) | 2005-06-30 | 2008-05-09 | Capacitor in semiconductor device and method of manufacturing the same |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050058768A KR100687904B1 (en) | 2005-06-30 | 2005-06-30 | Capacitor in semiconductor device and method of manufacturing of the same |
KR10-2005-58768 | 2005-06-30 | ||
US11/271,601 US7387929B2 (en) | 2005-06-30 | 2005-11-10 | Capacitor in semiconductor device and method of manufacturing the same |
US12/117,904 US20080211003A1 (en) | 2005-06-30 | 2008-05-09 | Capacitor in semiconductor device and method of manufacturing the same |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/271,601 Division US7387929B2 (en) | 2005-06-30 | 2005-11-10 | Capacitor in semiconductor device and method of manufacturing the same |
Publications (1)
Publication Number | Publication Date |
---|---|
US20080211003A1 true US20080211003A1 (en) | 2008-09-04 |
Family
ID=37590139
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/271,601 Expired - Fee Related US7387929B2 (en) | 2005-06-30 | 2005-11-10 | Capacitor in semiconductor device and method of manufacturing the same |
US12/117,904 Abandoned US20080211003A1 (en) | 2005-06-30 | 2008-05-09 | Capacitor in semiconductor device and method of manufacturing the same |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/271,601 Expired - Fee Related US7387929B2 (en) | 2005-06-30 | 2005-11-10 | Capacitor in semiconductor device and method of manufacturing the same |
Country Status (2)
Country | Link |
---|---|
US (2) | US7387929B2 (en) |
KR (1) | KR100687904B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110298025A1 (en) * | 2010-06-03 | 2011-12-08 | International Business Machines Corporation | Finfet-compatible metal-insulator-metal capacitor |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20060081470A (en) * | 2005-01-07 | 2006-07-13 | 삼성전자주식회사 | Tft substrate and manufacturing method of the same |
KR20100041179A (en) | 2008-10-13 | 2010-04-22 | 매그나칩 반도체 유한회사 | Insulator, capacitor with the same and fabricating method thereof, and method for fabricating semiconductor device |
CN104916523B (en) * | 2014-03-14 | 2018-11-09 | 上海华虹宏力半导体制造有限公司 | Improve the method for TDDB performances in metal capacitance top electrode etches processing procedure |
KR102253595B1 (en) | 2015-01-06 | 2021-05-20 | 삼성전자주식회사 | Semiconductor devices including capacitors and methods for manufacturing the same |
JP6179569B2 (en) * | 2015-08-20 | 2017-08-16 | カシオ計算機株式会社 | Image processing apparatus, image processing method, and program |
US10732441B2 (en) * | 2018-01-10 | 2020-08-04 | Oregon State University | Nano-cavity modulator device and method of manufacture and use |
CN108511425B (en) * | 2018-06-06 | 2023-07-04 | 长鑫存储技术有限公司 | Integrated circuit capacitor, method of manufacturing the same, and semiconductor device |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5316982A (en) * | 1991-10-18 | 1994-05-31 | Sharp Kabushiki Kaisha | Semiconductor device and method for preparing the same |
US6249080B1 (en) * | 1997-10-29 | 2001-06-19 | Matsushita Electric Works, Ltd. | Field emission electron source, method of producing the same, and use of the same |
US6744093B2 (en) * | 1999-05-12 | 2004-06-01 | Micron Technology, Inc. | Multilayer electrode for a ferroelectric capacitor |
US20040126983A1 (en) * | 2002-12-30 | 2004-07-01 | Yong-Soo Kim | Method for forming capacitor in semiconductor device |
US6835955B2 (en) * | 2002-10-31 | 2004-12-28 | Seiko Epson Corporation | Electro-optical device and electronic apparatus |
US20050082586A1 (en) * | 2003-10-20 | 2005-04-21 | Kuo-Chi Tu | MIM capacitor structure and method of manufacture |
US20050167725A1 (en) * | 2004-01-29 | 2005-08-04 | Matsushita Electric Industrial Co., Ltd. | Capacitor element and method for fabricating the same |
US20050196915A1 (en) * | 2004-02-24 | 2005-09-08 | Jeong Yong-Kuk | Method of fabricating analog capacitor using post-treatment technique |
US20050199615A1 (en) * | 2004-03-15 | 2005-09-15 | Barber John P. | Induction coil design for portable induction heating tool |
US20050208718A1 (en) * | 2004-03-16 | 2005-09-22 | Lim Jae-Soon | Methods of forming a capacitor using an atomic layer deposition process |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020039455A (en) * | 2000-11-21 | 2002-05-27 | 박종섭 | Method for forming capacitor in semiconductor device |
KR100493040B1 (en) * | 2002-12-30 | 2005-06-07 | 삼성전자주식회사 | Capacitor of a semiconductor device and manufacturing method whereof |
KR20050028749A (en) * | 2003-09-19 | 2005-03-23 | 삼성전자주식회사 | A semiconductor device having a capacitor of a multi-layer structure |
KR100680945B1 (en) * | 2004-02-05 | 2007-02-08 | 주식회사 하이닉스반도체 | Capacitor of a semiconductor device and method for forming the same |
KR100585003B1 (en) * | 2004-06-30 | 2006-05-29 | 주식회사 하이닉스반도체 | Capacitor and method for fabricating the same |
-
2005
- 2005-06-30 KR KR1020050058768A patent/KR100687904B1/en not_active IP Right Cessation
- 2005-11-10 US US11/271,601 patent/US7387929B2/en not_active Expired - Fee Related
-
2008
- 2008-05-09 US US12/117,904 patent/US20080211003A1/en not_active Abandoned
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5316982A (en) * | 1991-10-18 | 1994-05-31 | Sharp Kabushiki Kaisha | Semiconductor device and method for preparing the same |
US6249080B1 (en) * | 1997-10-29 | 2001-06-19 | Matsushita Electric Works, Ltd. | Field emission electron source, method of producing the same, and use of the same |
US6744093B2 (en) * | 1999-05-12 | 2004-06-01 | Micron Technology, Inc. | Multilayer electrode for a ferroelectric capacitor |
US6835955B2 (en) * | 2002-10-31 | 2004-12-28 | Seiko Epson Corporation | Electro-optical device and electronic apparatus |
US20040126983A1 (en) * | 2002-12-30 | 2004-07-01 | Yong-Soo Kim | Method for forming capacitor in semiconductor device |
US20050082586A1 (en) * | 2003-10-20 | 2005-04-21 | Kuo-Chi Tu | MIM capacitor structure and method of manufacture |
US20050167725A1 (en) * | 2004-01-29 | 2005-08-04 | Matsushita Electric Industrial Co., Ltd. | Capacitor element and method for fabricating the same |
US20050196915A1 (en) * | 2004-02-24 | 2005-09-08 | Jeong Yong-Kuk | Method of fabricating analog capacitor using post-treatment technique |
US20050199615A1 (en) * | 2004-03-15 | 2005-09-15 | Barber John P. | Induction coil design for portable induction heating tool |
US20050208718A1 (en) * | 2004-03-16 | 2005-09-22 | Lim Jae-Soon | Methods of forming a capacitor using an atomic layer deposition process |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110298025A1 (en) * | 2010-06-03 | 2011-12-08 | International Business Machines Corporation | Finfet-compatible metal-insulator-metal capacitor |
US8860107B2 (en) * | 2010-06-03 | 2014-10-14 | International Business Machines Corporation | FinFET-compatible metal-insulator-metal capacitor |
Also Published As
Publication number | Publication date |
---|---|
KR100687904B1 (en) | 2007-02-27 |
US7387929B2 (en) | 2008-06-17 |
KR20070003041A (en) | 2007-01-05 |
US20070004164A1 (en) | 2007-01-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6580111B2 (en) | Metal-insulator-metal capacitor | |
US7387929B2 (en) | Capacitor in semiconductor device and method of manufacturing the same | |
US20040141390A1 (en) | Capacitor of semiconductor device and method for manufacturing the same | |
US20030052374A1 (en) | Semiconductor device and method for fabricating the same | |
US6573547B2 (en) | Method for forming cell capacitor for high-integrated DRAMs | |
US7192828B2 (en) | Capacitor with high dielectric constant materials and method of making | |
JP2003017592A (en) | Capacitor forming method of semiconductor element | |
US20040166627A1 (en) | Methods for forming a capacitor on an integrated circuit device at reduced temperatures | |
KR20060062365A (en) | Metal-insulator-metal capacitor and a method there of | |
JP4063570B2 (en) | Capacitor forming method for semiconductor device | |
US7148101B2 (en) | Capacitors of semiconductor devices and methods of fabricating the same | |
KR101075528B1 (en) | Method for fabricating capacitor in semiconductor device | |
KR100271715B1 (en) | Manufacturing method for capacitor of the semiconductor device | |
KR100414868B1 (en) | Method for fabricating capacitor | |
KR101061169B1 (en) | Capacitor Formation Method of Semiconductor Device | |
KR100373341B1 (en) | Method for forming capacitor having metal bottom electrode | |
KR100265345B1 (en) | Method for fabricating high dielectric capacitor of semiconductor device | |
TWI235449B (en) | Manufacturing method for dielectric layer of capacitor | |
KR100411300B1 (en) | Capacitor in semiconductor device and method for fabricating the same | |
KR20050067571A (en) | Fabricating method for capacitor in semiconductor device | |
KR20040001902A (en) | Method for fabricating capacitor in semiconductor device | |
KR20040051933A (en) | Semiconductor memory device including ferroelectric and method for manufacturing the same | |
KR20030017910A (en) | method for manufacturing capacitor of semiconductor device | |
KR20040001946A (en) | Method for fabricating capacitor in semiconductor device | |
KR20060000917A (en) | Method for fabricating capacitor in semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |