US20080229759A1 - Method and apparatus for cooling integrated circuit chips using recycled power - Google Patents

Method and apparatus for cooling integrated circuit chips using recycled power Download PDF

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US20080229759A1
US20080229759A1 US11/726,429 US72642907A US2008229759A1 US 20080229759 A1 US20080229759 A1 US 20080229759A1 US 72642907 A US72642907 A US 72642907A US 2008229759 A1 US2008229759 A1 US 2008229759A1
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heat
thermoelectric
chip
temperature
power
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US11/726,429
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Chien Ouyang
Kenny C. Gross
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Sun Microsystems Inc
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Sun Microsystems Inc
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Priority to US11/726,429 priority Critical patent/US20080229759A1/en
Assigned to SUN MICROSYSTEMS, INC. reassignment SUN MICROSYSTEMS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: GROSS, KENNY C., OUYANG, CHIEN
Priority to PCT/US2008/051331 priority patent/WO2008115608A2/en
Publication of US20080229759A1 publication Critical patent/US20080229759A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165Containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/38Cooling arrangements using the Peltier effect
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N10/00Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)

Abstract

One embodiment of the present invention provides a system that cools integrated circuit (IC) chips within a computer system. During operation, the system converts heat generated by a heat-generating-device within the computer system into thermoelectric power. The system then supplies the thermoelectric power to an IC chip as a cooling power to reduce the operating temperature of the IC chip, thereby recycling wasted energy within the computer system.

Description

    BACKGROUND
  • 1. Field of the Invention
  • The present invention relates to techniques for improving energy efficiency within computer systems. More specifically, the present invention relates to a method and an apparatus that recycles heat dissipated within a computer system and converts the heat into cooling power for integrated circuit (IC) chips within the same computer system.
  • 2. Related Art
  • Rapid advances in computing technology presently make it possible to perform trillions of operations each second on data sets as large as a trillion bytes. These advances can be largely attributed to an exponential increase in the density and complexity of integrated circuits (ICs). Unfortunately, in conjunction with this increase in computational power, power consumption and heat dissipation of ICs has also increased dramatically.
  • Specifically, high-end computer servers can easily generate 20 kilowatts or more heat. Consequently, some power-demanding system components, such as a CPU or a graphics processing unit (GPU), can quickly reach unsafe operating temperatures.
  • To maintain safe operating temperatures and to prevent overheating for critical system components, servers typically utilize a number of cooling techniques. One commonly used cooling technique includes affixing heat sinks to heat-generating components to thermally conduct heat from the components and using powerful fans to increase air circulation around these components and to pump heat out of the server. Another cooling technique, which is referred to as “thermoelectric cooling” (TEC), uses the Peltier effect to cool an IC chip or to target “hot spots” within the IC chip.
  • Meanwhile, companies that operate servers are experiencing soaring energy costs because of the ever-increasing power consumption of the servers. Unfortunately, conventional cooling techniques require additional electrical power and therefore increase power consumption problems.
  • One way to reduce both power consumption and heat generation is to use low-power components. However, this approach may significantly restrict computational power and other aspects of server performance.
  • Hence, what is needed is a method and an system for cooling IC chips in an energy efficient manner without the above described problems.
  • SUMMARY
  • One embodiment of the present invention provides a system that cools integrated circuit (IC) chips within a computer system. During operation, the system converts heat generated by a heat-generating-device within the computer system into thermoelectric power. The system then supplies the thermoelectric power to an IC chip as a cooling power to reduce the operating temperature of the IC chip, thereby recycling wasted energy within the computer system.
  • In a variation on this embodiment, the system converts the heat generated by the heat-generating-device into thermoelectric power by: tapping into a temperature difference around the heat-generating-device; and converting the temperature difference into electricity using the Seebeck effect.
  • In a further variation on this embodiment, the system taps into the temperature difference around the heat-generating-device by: tapping into a first temperature reference on the heat-generating-device; and tapping into a second temperature reference from a heat sink, which has a lower temperature than the heat-generating-device.
  • In a further variation, the system increases the temperature difference by reducing the temperature of the second temperature reference.
  • In a further variation, the system reduces the temperature of the second temperature reference by using heat pipes to reduce the temperature.
  • In a further variation, the system taps into the first temperature reference by coupling a first thermal interface of a thermoelectric module to the heat-generating-device. The system additionally taps into the second temperature reference by coupling a second thermal interface of the thermoelectric module to the heat sink. Consequently, the temperature difference between the first thermal interface and the second thermal interface creates a voltage difference between the two thermal interfaces.
  • In a further variation, the thermoelectric module can be a bulk thermoelectric device or a thin film thermoelectric device.
  • In a variation on this embodiment, the system supplies the thermoelectric power to the IC chip as the cooling power by using the Peltier effect. Specifically, the system couples the IC chip to a first surface of a thermoelectric cooling module. Next, the system drives the thermoelectric cooling module using the generated thermoelectric power, so that the thermoelectric cooling module actively absorbs heat from the IC chip and releases the heat from a second surface.
  • In a further variation on this embodiment, the thermoelectric cooling module is a thin film thermoelectric element suitable for cooling a high temperature spot within the second IC chip.
  • In a variation on this embodiment, the system converts heat generated by a number of heat-generating-devices into thermoelectric power for each heat-generating-device. The system then combines the thermoelectric power for each heat-generating-device into an aggregate thermoelectric power.
  • In a further variation on this embodiment, the system monitors the operating temperature of the IC chip using a continuous system telemetry harness (CSTH). Next, the system controls the thermoelectric power supplied to the IC chip based on the monitored operating temperature by varying the number of heat-generating-devices used to generate the thermoelectric power.
  • In a variation on this embodiment, the heat-generating-device can include: a microprocessor chip package; a graphics processor chip package; an ASIC chip package; a video processor chip package; a DSP chip package; a memory chip package; a hard disk drive; a power supply; a graphic card; and any other heat source within the computer system.
  • In a variation on this embodiment, the IC chip can include: a microprocessor chip; a graphics processor chip; an ASIC chip; a video processor chip; a DSP chip; and a memory chip.
  • BRIEF DESCRIPTION OF THE FIGURES
  • FIG. 1 provides a block diagram illustrating a computing system in accordance with an embodiment of the present invention.
  • FIG. 2A illustrates an exemplary configuration for converting a temperature difference into thermoelectric power in accordance with an embodiment of the present invention.
  • FIG. 2B illustrates using heat pipes to achieve a low temperature reference for the thermoelectric power generation in accordance with an embodiment of the present invention.
  • FIG. 2C illustrates using heat pipes integrated with a heat sink to achieve the low temperature reference in accordance with an embodiment of the present invention.
  • FIG. 3A illustrates a configuration that uses a TEC to cool an IC chip in accordance with an embodiment of the present invention.
  • FIG. 3B illustrates using the Peltier diodes as thermoelectric elements in accordance with an embodiment of the present invention.
  • FIG. 4 illustrates a technique that integrates a thin film TEC device with a chip package to cool hot spots within the chip in accordance with an embodiment of the present invention.
  • FIG. 5 illustrates the process of provisioning thermoelectric power for cooling a primary chip package in accordance with an embodiment of the present invention.
  • DETAILED DESCRIPTION
  • The following description is presented to enable any person skilled in the art to make and use the invention, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present invention. Thus, the present invention is not limited to the embodiments shown, but is to be accorded the widest scope consistent with the claims.
  • Overview
  • As processor speeds continue to increase in modern computer systems, a large amount of heat is being generated. Some heat sources in computer systems include: the CPU, the GPU, the power supply, and the hard disk drive (HDD). This heat is generally considered to be waste heat and considerable efforts have been taken to effectively remove this heat from these heat sources.
  • One embodiment of the present invention “recycles” the heat dissipated by electronic devices within a computer system by converting the “waste heat” into useful electricity. Specifically, the present invention couples a thermoelectric device directly to a heat-generating-component (i.e., a heat source) so that the thermoelectric device can convert the temperature difference into thermoelectric power using the Seebeck effect.
  • One embodiment of the present invention then supplies this thermoelectric power to other parts of the computer system to be used as a cooling power to reduce the operating temperature of other heat-generating-components. In particular, the thermoelectric power is used in a thermoelectric cooling (TEC) configuration to drive TEC devices. Consequently, some of the “waste energy” within a computer system is recycled and reused, and furthermore some of the standard cooling power is saved.
  • Computer System
  • FIG. 1 provides a block diagram illustrating a computing system 100 in accordance with an embodiment of the present invention. Computing system 100 includes a motherboard 102. Motherboard 102 includes a number of IC chips, such as a processor 104 and a memory chip 106. Processor 104 can include any type of processor, including, but not limited to, a microprocessor (CPU), a digital signal processor, a device controller, or a computational engine within an appliance.
  • Motherboard 102 additionally includes a graphics processing unit (GPU) 108 and a number of chipsets 110-112. In one embodiment of the present invention, chipsets 108 and 110 include a northbridge chip and a southbridge chip, respectively. Motherboard 102 also includes a peripheral bus 114, which couples processor 104, memory 106, GPU 108, and chipsets 110-112 with peripheral devices, such as a storage device 116. Note that GPU 108 can alternatively be integrated onto a video card which communicates with motherboard 102 through peripheral bus 114.
  • Storage device 116 can include any type of non-volatile storage device that can be coupled to a computer system. This includes, but is not limited to, magnetic, optical, and magneto-optical storage devices, as well as storage devices based on flash memory and/or battery-backed up memory.
  • Computer system 100 also includes a power supply 118 which provides electrical power in a form that is suitable for driving components on motherboard 102 and peripherals such as storage device 116.
  • Note that each component described above can dissipate a great amount of heat during normal operation. In particular, processor 104, GPU 108, storage device 116, and power supply 118 can dissipate more heat than other system components, and therefore are often air cooled with dedicated fans 120-126.
  • Note that although the present invention is described in the context of computer system 100 illustrated in FIG. 1, the present invention can generally operate on any type of electronics that requires cooling during operation. Hence, the present invention is not limited to the computer system 100 illustrated in FIG. 1.
  • Thermoelectric Power Generation Using the Seebeck Effect
  • The Peltier effect and the Seebeck effect are collectively referred to as the “thermoelectric effect,” wherein the Peltier effect and the Seebeck effect are reversals of each other. More specifically, the Peltier effect converts electrical power into a temperature difference while the Seebeck effect converts thermal (i.e. temperature) gradients into electric power, such a voltage or a current.
  • The Seebeck effect produces an electromotive force (EMF) and consequently a voltage different in the presence of a temperature difference between two dissimilar conductors, such as metals or semiconductors. When the two conductors are connected in a complete loop, the EMF causes a continuous current to flow in the conductors. Hence, the Seebeck effect effectively converts thermal energy into a thermoelectric power. The voltage created is typically of the order of several microvolts per degree difference.
  • One embodiment of the present invention utilizes the Seebeck effect to convert temperature differences within a computer system into thermoelectric power in the form of a voltage or a current. FIG. 2A illustrates an exemplary configuration for converting a temperature difference into thermoelectric power in accordance with an embodiment of the present invention. As seen in FIG. 2A, a thermoelectric module 202 is sandwiched between a high temperature object 204 and a low temperature object 206. More specifically, thermoelectric module 202 comprises a bottom substrate 208 which makes thermal contact with high temperature object 204 at a temperature TH, and a top substrate 210 which makes thermal contact with low temperature object 206 at a temperature TL. Thermoelectric module 202 also includes a series of thermoelectric elements 212 which are disposed between substrate 208 and 210 in a manner which facilitates generating thermoelectric power. In one embodiment, thermoelectric elements 212 are made of semiconductor thermoelectric materials. We describe these thermoelectric elements in more detail below.
  • In one embodiment of the present invention, high temperature object 204 is a heat-generating component/device within a computer system. Such heat-generating components/devices can include, but are not limited to: a microprocessor chip package, a graphics processor chip package, an ASIC chip package, a video processor chip package, a DSP chip package, a memory chip package, a power supply, a graphics card, a HDD, a motherboard, or any other heat-generating devices within the computer system, which can be practically tapped into using thermoelectric module 202. Note that bottom substrate 208 of thermoelectric module 202 obtains the high temperature reference TH from the top surface of heat source 204.
  • In one embodiment of the present invention, low temperature object 206 is a heat sink, which is typically a machined metal device with a base for thermal contact and a group of fins for heat dissipation. The high thermal conductivity of the metal combined with its large surface area cause a rapid transfer of thermal energy to the surrounding environment, which facilitates maintaining a low temperature in the heat sink. Hence, the top substrate 210 of thermoelectric module 202 obtains a low temperature reference TL from the bottom surface of heat sink 206.
  • Thermoelectric module 202 taps into the temperature difference TH−TL and continuously generates a thermoelectric power. While doing so, the system effectively “recycles” heat dissipated by heat source 204 into potentially useful electricity. Referring to FIG. 2A, note that no external power is needed to perform such thermoelectric energy conversion.
  • In one embodiment, more thermoelectric power can be obtained by increasing the temperature difference TH−TL. This also allows more waste energy to be recycled. Because TH is typically difficult to control, one can increase the temperature difference by reducing the low temperature reference TL. One way to reduce TL for heat sink 206 is to use a heat sink fan. However, this requires additional power.
  • Another technique to reduce temperature TL is by using heat pipes. Heat pipes employ an evaporative cooling mechanism to transfer thermal energy from one end of a pipe to another by the evaporation and condensation of a working fluid or coolant.
  • More specifically, a single heat pipe includes a vacuum tight container, a capillary wick structure and a working fluid. Typically, the heat pipe is evacuated and then back-filled with a small quantity of a working fluid, just enough to saturate the wick. The atmosphere inside the heat pipe is set by an equilibrium condition of liquid and vapour. As heat enters the heat pipe from one end (the evaporating end), this equilibrium condition is disrupted, and some working fluid evaporates, which increases the vapour pressure at this end of the pipe. This higher pressure vapour travels to the condensing end of the pipe where the slightly lower temperature causes the vapour to condense, and thereby releases its latent heat absorbed during vaporization. The condensed fluid is then pumped back to the evaporating end by the capillary forces developed in the wick structure.
  • This continuous cycle can transfer large quantities of heat with very low thermal gradients. Note that the heat pipe operation is passive so that the only driving force of the heat-transfer process is the heat that is being transferred.
  • FIG. 2B illustrates using heat pipes to achieve a low temperature reference for the thermoelectric power generation in accordance with an embodiment of the present invention. In this embodiment, a group of heat pipes 214 replace heat sink 206 in FIG. 2A. Note that the evaporating ends of heat pipes 214 are in direct contact with top substrate 210 and therefore continuously absorb and transfer heat away to maintain a low TL at substrate 210.
  • FIG. 2C illustrates using heat pipes integrated with a heat sink to achieve a low temperature reference for the thermoelectric power generation in accordance with an embodiment of the present invention. Note that integrated heat pipes 214 and heat sink 216 take advantage of both the heat transfer ability of the heat pipes and the large heat dissipation surface area of the heat sink, which further increases the system's ability to achieve a lower TL at substrate 206.
  • Note that although we describe using a heat sink or heat pipes to obtain a low temperature reference, other techniques can be used to achieve a low temperature reference, which can include, but are not limited to, using a cooling liquid. Furthermore, configurations in FIGS. 2A-2C are intended for illustrative purposes and therefore should not limit other possible configurations which can convert waste heat generated by heat-dissipation devices into thermoelectric power.
  • Note that the above described technique can be simultaneously employed to multiple heat-generating-devices. Thus, multiple heat sources 204 can include a subset of the following: the CPU, the GPU, the memory chips, the chipsets, the HHD, and the power supply. Because the sizes and temperatures of these devices can be quite different, the amount of thermoelectric power generated from each of these heat-generating-devices can vary widely. However, the thermoelectric power from each of these devices can be combined into an aggregated power, for example, by merging a number of tributary thermoelectric currents into an aggregate current.
  • This thermoelectric power can be supplied to other devices in the same computer system. For example, it can be used to drive a low power chip. In one embodiment of the present invention, this thermoelectric power is used to drive a conventional cooling device within the same computer system. This cooling device can include, but is not limited to a cooling fan or a thermoelectric cooler (TEC).
  • Thermoelectric Cooling Using the Recycled Thermoelectric Power
  • One embodiment of the present invention uses the thermoelectric power generated from dissipated heat in a computer system as a cooling power for other heat-generating-devices within the same computer system.
  • In particular, this thermoelectric power can be used to drive a TEC device coupled to an IC chip. As mentioned earlier, a TEC device utilizes the Peltier effect to directly convert electrical power into a temperature difference.
  • FIG. 3A illustrates a configuration that uses a TEC to cool an IC chip in accordance with an embodiment of the present invention. As seen in FIG. 3A, the cooling power is provided by thermoelectric power source 302, which itself is generated using recycled heat energy. Note that thermoelectric power source 302 can include a DC voltage source or an equivalent DC current source. Thermoelectric power source 302 is coupled to a TEC circuit. This TEC circuit includes TEC device 304 and copper connections 306 which couple TEC device 304 and power source 302.
  • The bottom thermal interface of TEC device 304, which can be a ceramic plate, makes thermal contact with a heat source 308, such as a heat-generating CPU chip or a GPU chip. The Peltier effect creates a temperature difference so that the bottom thermal interface becomes the “cold side.” Heat dissipated from heat source 308 is actively absorbed by the cold side of TEC device 304. The heat is then transferred through TEC device 304 and released by the top thermal interface (can be another ceramic plate), which is the “hot side” of the temperature difference.
  • Note that semiconductors, for example, Bismuth Telluride, can be used as a thermoelectric material for creating the Peltier effect. This is partially because the semiconductor materials can be more conveniently configured to pump heat, and also because designers can control the type of charge carrier employed within the cooling circuit. Using a semiconductor TEC material, TEC device 304 can be constructed, in its simplest form, around a single semiconductor “pellet” which is soldered to an electrically-conductive material on each end (for example by using copper plates 310). In this “stripped-down” configuration, the second dissimilar material required for the Peltier effect is the copper connection paths 306 to thermoelectric power supply 302.
  • Note that in FIG. 3A, the heat will be moved (or “pumped”) in the direction of charge carrier movement throughout the circuit (it is the charge carriers that transfer the heat). In one embodiment, “N-type” semiconductor material is used to fabricate the pellet so that electrons (which have negative charges) are the charge carrier employed to create the bulk of the Peltier effect. With a DC voltage source connected as shown, electrons will be repelled by the negative pole and attracted by the positive pole of the supply, which forces electron flow in a clockwise direction (as shown by the arrows in FIG. 3A). As the electrons flow through the N-type material from the bottom to the top, heat is absorbed at the bottom thermal interface and is actively transferred to the top thermal interface, where it is released.
  • In a further embodiment, P-type semiconductor pellets are employed. These P-type pellets are manufactured so that the charge carriers in the material have positive charges (referred to as “holes”). These holes enhance the conductivity of the P-type crystalline structure, allowing electrons to flow more freely through the material when a voltage is applied. Positively charged carriers are repelled by the positive pole of the DC supply and are attracted to the negative pole, thus hole current flows in a direction opposite to that of electron flow. Because it is the charge carriers inherent in the material that convey the heat through the conductor, using the P-type material results in heat being drawn toward the negative pole of the power supply and away from the positive pole.
  • FIG. 3B illustrates using the Peltier diodes as thermoelectric elements in accordance with an embodiment of the present invention.
  • In this embodiment, the pairs of P/N pellets are arranged so that they are connected electrically in series, but thermally in parallel. The top and bottom thermal interfaces 310 provide the platform for the pellets and small conductive plates 312 connect them in series.
  • When a DC voltage is applied to the module, both the positively and negatively charged carriers in the pellet array absorb heat energy from the bottom thermal interface (i.e. cold side), which is in thermal contact with heat source 316, and release the heat from the top thermal interface (i.e. hot side). This allows the bottom thermal interface to stay cold and to continuously absorb heat. Note that top thermal interface 310 can be attached to a heat sink to more efficiently spread the heat.
  • Note that above described configurations for a TEC device in FIGS. 3A and 3B are also applicable to thermoelectric module 202 in FIG. 2. The difference is that thermoelectric module 202 uses the reverse Peltier effect to generate power from the temperature difference.
  • Hot Spot Cooling Using a “Thin Film”-Based TEC
  • One embodiment of the present invention uses a thin-film-based TEC device to cool “hot spots” within an IC chip. Note that heat generation and hence temperature distribution within a chip package is typically not uniform. Depending on a specific chip design, some small regions/spots within a chip can have significantly higher temperatures than an average chip temperature. These “hot spots” show up as peaks within a chip temperature profile as a function of chip dimensions, and can severely deteriorate the chip performance and reduce lifetime. On the other hand, reducing the hot spot temperature a few degrees can reduce thermal stress and can thereby enhance long term reliability.
  • Note that cooling these hot spots typically requires less power than cooling an entire chip. Therefore, it is more effective to focus thermoelectric cooling power to cool these hot spots using smaller TEC elements than to apply a bulk TEC device to the entire chip package to cool the whole chip.
  • One embodiment of the present invention utilizes semiconductor thin film thermoelectric materials, for example “thin film superlattices” elements to cool down hot spots on an IC chip. These thin film elements require much less cooling power (i.e. with higher efficiency) than bulk chip-size TECs.
  • In one embodiment, the required thermoelectric cooling power for the thin film TEC is provided by bulk thermoelectric modules. In a further embodiment, the bulk thermoelectric modules comprise conventional bulk thermoelectric material, such as Bi2Te3/Sb2Te3, and are constructed into similar sizes as the heat-generating devices providing the heat energy (as in FIG. 2A).
  • FIG. 4 illustrates a technique that integrates a thin film TEC device with a chip package to cool hot spots within the chip in accordance with an embodiment of the present invention.
  • In FIG. 4, a primary chip package 400 comprises a chip die 402 which produces a hot spot 404 during operation. Hot spot 404 is the targeted heat source which requires cooling. Note that primary chip package 400 can include, but is not limited to a microprocessor chip (CPU) package, a graphics processor chip (GPU) package, an ASIC chip package, a video processor chip package, a DSP chip package, and a memory chip package. In a further embodiment, primary chip package 400 is a chip package in a system that demands significantly higher operating power than most other chips in the system.
  • Chip die 402 is encased by a lid 406 which protects chip die 402 from above and protects a substrate 408 from below. Chip die 402 makes contact with lid 406 through a first thermal interface material 410, while also making contact with substrate 408 through solder balls 412. Two tiny thin film TEC elements 414 are disposed at the bottom surface of lid 406. Alternatively, TEC elements 414 can be fabricated on the top surface of chip die 402. Although we show two TEC elements 414, the number of TEC elements can be generally greater or less than two.
  • Note that TEC elements 414 are positioned immediately above hot spot 404, and are therefore more efficient in cooling hot spot 404. TEC elements 414 typically do not require a large amount of electrical power to operate. In one embodiment, the power required by TEC elements 414 is determined by the heat power generated by hot spot 404.
  • Note that top surface of lid 406 is thermally coupled to heat sink 416 through a second thermal interface material 418, wherein heat sink 416 continuously releases heat transferred from the hot spot 404 into the environment.
  • In one embodiment of the present invention, electrical power for TEC elements 414 is provided by power-generator chip packages 420 and 422, which are configured to convert their own dissipated heat into the desired electrical power. Chip packages 420 and 422 comprise chip dies 424 and 426, which are thermal coupled to bulk (chip-size) thermoelectric devices 428 and 430, respectively. These thermoelectric devices are used to transform the thermal energy (that would otherwise be waste heat) to thermoelectric power, which is then supplied to primary chip package 400 as the hot spot cooling power. Note that in this embodiment, thermoelectric devices 428 and 430 are much larger than thin film TEC elements 414. As a result, sufficient electrical power can be produced by these chips to drive the “thin film” TEC elements inside a single primary chip package. As discussed in a previous section, other non-chip heat-generating devices, such as a HDD or a video card can also be used to generate the thermoelectric cooling power.
  • Note that although we describe using small thin film TEC elements for hot spot cooling, a chip-sized TEC, either in bulk form or in thin film form, can also be used to cool a hot spot within a chip, or to cool an entire chip. However, a significantly higher power may be required to drive these chip-sized TECs. Also note that the number of power-generator chip packages can be greater or less than two.
  • Feedback Control and Electrical Current Flow Direction Control
  • FIG. 5 illustrates the process of provisioning thermoelectric power for cooling a primary chip package in accordance with an embodiment of the present invention. As seen in FIG. 5, a number of secondary chip packages 502506 are configured to operate as thermoelectric power generators (TEPGs). In one embodiment, chip packages 502-506 are coupled to “bulk” thermoelectric modules to form bulk TEPGs 508-512, respectively. These bulk TEPGs are capable of converting the heat dissipated from chip packages into electrical power within each of the TEPGs. TEPGs 508-512 are coupled to a TEC 514 within a primary chip package 516 to provide the cooling power to TEC 514. In one embodiment, TEC 514 is a thin film TEC module configured to cool a hot spot within primary chip package 516.
  • In one embodiment of the present invention, the operating temperatures, including an average chip temperature and hot spot temperatures of primary chip package 516, are monitored through one or more sensors. In one embodiment, these sensors are integrated into a Continuous System Telemetry Harness (CSTH) which provides continuous digitized temperature and wattage feedback from the chip package to a power controller 518. In one embodiment, if the monitored temperature is above a threshold temperature, power controller 518 determines that the power supplied to TEC device 514 is not sufficient, and subsequently provisions supplementary power to the TEC device 514. This supplementary power can be generated by introducing an additional TEPG into the power supply path. On the other hand, if the monitored temperature is below a low threshold, it is determined that the power supplied to TEC module 514 is more than sufficient, power controller 518 adjusts the thermoelectric power by reducing a TEPG from the supply path, wherein this extra power can be reserved for other primary chip packages which may need additional cooling power. In a further embodiment, power controller 518 can directly measure an aggregated current input into TEC 514 and determines if a sufficient cooling power is achieved.
  • One embodiment of the present invention provides a mechanism to regulate current flow. Because there are multiple TEPGs simultaneously providing power to a single TEC module, to prevent any conflict of current flows between these TEPGs, diodes can be used to control current flow directions. These diode placements are shown in FIG. 5. Note that they are arranged to regulate multiple supply currents so that the currents flow in the same direction to always add up. Consequently, each TEPG contributes its own power to the TEC device without conflicting with each other.
  • CONCLUSION
  • The present invention provides a technique to recycle waste thermal energy dissipated by electronic components within a computer system by converting the “waste heat” into useful thermoelectric power using thermoelectric devices. In particular, heat pipes can be used to create greater temperature difference around the thermoelectric devices, thereby achieving greater thermoelectric-conversion efficiency.
  • This thermoelectric power can then be supplied to other system components, thereby reducing overall system power requirements and saving energy. In particular, this thermoelectric power can be used to drive thin film thermoelectric elements to cool down hot spots within chip packages. A CSTH feedback control mechanism can be used to adjust the amount of cooling power by controlling the number of thermoelectric power generators.
  • The foregoing descriptions of embodiments of the present invention have been presented only for purposes of illustration and description. They are not intended to be exhaustive or to limit the present invention to the forms disclosed. Accordingly, many modifications and variations will be apparent to practitioners skilled in the art. Additionally, the above disclosure is not intended to limit the present invention. The scope of the present invention is defined by the appended claims.

Claims (26)

1. A method for cooling integrated circuit (IC) chips within a computer system, comprising:
converting heat generated by a heat-generating-device within the computer system during operation of the computer system into thermoelectric power; and
supplying the thermoelectric power to an IC chip as a cooling power to reduce the operating temperature of the IC chip, thereby recycling wasted energy within the computer system.
2. The method of claim 1, wherein converting the heat generated by the heat-generating-device into the thermoelectric power involves:
tapping into a temperature difference around the heat-generating-device; and
converting the temperature difference into electricity using the Seebeck effect.
3. The method of claim 2, wherein tapping into the temperature difference around the heat-generating-device involves:
tapping into a first temperature reference on the heat-generating-device; and
tapping into a second temperature reference from a heat sink, which has a lower temperature than the heat-generating-device.
4. The method of claim 3, wherein the method further comprises increasing the temperature difference by reducing the temperature of the second temperature reference.
5. The method of claim 4, wherein reducing the temperature of the second temperature reference involves using heat pipes to reduce the temperature.
6. The method of claim 3,
wherein tapping into the first temperature reference involves coupling a first thermal interface of a thermoelectric module to the heat-generating-device; and
wherein tapping into the second temperature reference involves coupling a second thermal interface of the thermoelectric module to the heat sink; and
wherein the temperature difference between the first thermal interface and the second thermal interface creates a voltage difference between the first and second thermal interfaces.
7. The method of claim 6, wherein the thermoelectric module can be a bulk thermoelectric device or a thin film thermoelectric device.
8. The method of claim 1, wherein supplying the thermoelectric power to the IC chip as the cooling power involves using the Peltier effect, which involves:
coupling the IC chip to a first surface of a thermoelectric cooling module; and
driving the thermoelectric cooling module using the generated thermoelectric power, so that the thermoelectric cooling module actively absorbs heat from the IC chip and releases the heat from a second surface.
9. The method of claim 8, wherein the thermoelectric cooling module is a thin film thermoelectric element suitable for cooling a high temperature spot within the second IC chip.
10. The method of claim 1, further comprising:
converting heat generated by a number of heat-generating-devices into thermoelectric power for each heat-generating-device; and
combining the thermoelectric power for each heat-generating-device into an aggregate thermoelectric power.
11. The method of claim 10, wherein the method further comprises:
monitoring the operating temperature of the IC chip using a continuous system telemetry harness (CSTH); and
controlling the thermoelectric power supplied to the IC chip based on the monitored operating temperature by varying the number of heat-generating-devices used to generate the thermoelectric power.
12. The method of claim 1, wherein the heat-generating-device can include:
a microprocessor chip package;
a graphics processor chip package;
an ASIC chip package;
a video processor chip package;
a DSP chip package;
a memory chip package;
a hard disk drive;
a power supply;
a graphic card; and
any other heat source within the computer system.
13. The method of claim 1, wherein the IC chip can include:
a microprocessor chip;
a graphics processor chip;
an ASIC chip;
a video processor chip;
a DSP chip package; and
a memory chip.
14. An apparatus that cools integrated circuit (IC) chips within a computer system, comprising:
an energy-conversion mechanism configured to convert heat generated by a heat-generating-device within the computer system during operation of the computer system into thermoelectric power; and
a power-supplying mechanism configured to supply the thermoelectric power to an IC chip as a cooling power to reduce the operating temperature of the IC chip, thereby recycling wasted energy within the computer system.
15. The apparatus of claim 14, wherein the energy-conversion mechanism is configured to:
tap into a temperature difference around the heat-generating-device; and
convert the temperature difference into electricity using the Seebeck effect.
16. The apparatus of claim 15, wherein while tapping into the temperature difference around the heat-generating-device, the energy-conversion mechanism is further configured to:
tap into a first temperature reference on the heat-generating-device; and
tap into a second temperature reference from a heat sink, which has a lower temperature than the heat-generating-device.
17. The apparatus of claim 16, wherein the energy-conversion mechanism is configured to increase the temperature difference by reducing the temperature of the second temperature reference.
18. The apparatus of claim 17, wherein the energy-conversion mechanism is configured to reduce the temperature of the second temperature reference by using heat pipes to reduce the temperature.
19. The apparatus of claim 16, wherein the energy-conversion mechanism is configured to:
tap into the first temperature reference by coupling a first thermal interface of a thermoelectric module to the heat-generating-device; and
tap into the second temperature reference by coupling a second thermal interface of the thermoelectric module to the heat sink; and
wherein the temperature difference between the first thermal interface and the second thermal interface creates a voltage difference between the first and second thermal interfaces.
20. The apparatus of claim 19, wherein the thermoelectric module can be a bulk thermoelectric device or a thin film thermoelectric device.
21. The apparatus of claim 14, wherein the power-supplying mechanism is configured to supply the thermoelectric power to the IC chip by using the Peltier effect, wherein the power-supplying mechanism further comprises:
a coupling mechanism configured to couple the IC chip to a first surface of a thermoelectric cooling module; and
a driving mechanism configured to drive the thermoelectric cooling module using the generated thermoelectric power, so that the thermoelectric cooling module actively absorbs heat from the IC chip and releases the heat from a second surface.
22. The apparatus of claim 21, wherein the thermoelectric cooling module is a thin film thermoelectric element suitable for cooling a high temperature spot within the second IC chip.
23. The apparatus of claim 14, further comprising:
a second conversion mechanism configured to convert heat generated by a number of heat-generating-devices into thermoelectric power for each heat-generating-device; and
a combining mechanism configured to combine the thermoelectric power for each heat-generating-device into an aggregate thermoelectric power.
24. The apparatus of claim 23, further comprising:
a monitoring mechanism configured to monitor the operating temperature of the IC chip using a continuous system telemetry harness (CSTH); and
a controlling mechanism configured to control the thermoelectric power supplied to the IC chip based on the monitored operating temperature by varying the number of heat-generating-devices used to generate the thermoelectric power.
25. The apparatus of claim 14, wherein the heat-generating-device can include:
a microprocessor chip package;
a graphics processor chip package;
an ASIC chip package;
a video processor chip package;
a DSP chip package;
a memory chip package;
a hard disk drive;
a power supply;
a graphic card; and
any other heat source within the computer system.
26. The apparatus of claim 14, wherein the IC chip can include:
a microprocessor chip;
a graphics processor chip;
an ASIC chip;
a video processor chip;
a DSP chip package; and
a memory chip.
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