US20090137067A1 - Method for forming an inductor - Google Patents

Method for forming an inductor Download PDF

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Publication number
US20090137067A1
US20090137067A1 US12/362,621 US36262109A US2009137067A1 US 20090137067 A1 US20090137067 A1 US 20090137067A1 US 36262109 A US36262109 A US 36262109A US 2009137067 A1 US2009137067 A1 US 2009137067A1
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forming
depositing
inductor pattern
magnetic material
magnetic
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Leonard Forbes
Kie Y. Ahn
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227Inductive arrangements or effects of, or between, wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F17/0013Printed inductances with stacked layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • Y10T29/49021Magnetic recording reproducing transducer [e.g., tape head, core, etc.]
    • Y10T29/49032Fabricating head structure or component thereof
    • Y10T29/4906Providing winding
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • Y10T29/49021Magnetic recording reproducing transducer [e.g., tape head, core, etc.]
    • Y10T29/49032Fabricating head structure or component thereof
    • Y10T29/4906Providing winding
    • Y10T29/49064Providing winding by coating
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • Y10T29/49069Data storage inductor or core
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base

Definitions

  • the present subject matter relates to inductors, and particularly to inductors used in integrated circuits.
  • Inductors are a critical component in the traditional discrete element circuits, such as impedance matching circuits, resonant tank circuits, linear filters, and power circuits, used in these industries. Since traditional inductors are bulky components, successful integration of the traditional discrete element circuits requires the development of miniaturized inductors.
  • One approach to miniaturizing an inductor is to use standard integrated circuit building blocks, such as resistors, capacitors, and active circuitry, such as operational amplifiers, to design an active inductor that simulates the electrical properties of a discrete inductor.
  • Active inductors can be designed to have a high inductance and a high Q factor, but inductors fabricated using these designs consume a great deal of power and generate noise.
  • a second approach to miniaturizing an inductor is to fabricate a solenoid type inductor with a core using conventional integrated circuit manufacturing process technology.
  • conventional integrated circuit process steps do not lend themselves to precisely and inexpensively fabricating a helical structure with a core. So, integrated circuit process technology is only marginally compatible with manufacturing a solenoid type inductor.
  • FIG. 1A is a cross-sectional view of one embodiment of a square spiral inductor embedded in a solid state structure.
  • FIG. 1B is a top view of one embodiment of a square spiral inductor pattern.
  • FIG. 2 is a cross-sectional view one embodiment of an inductor coupled to another electronic device in an integrated circuit.
  • FIG. 3A is a cross-sectional view of one embodiment of two vertically stacked inductors.
  • FIG. 3B is a cross-sectional view of one embodiment of two stacked and serially connected inductors showing the current in the inductors and the resulting magnetic field lines.
  • Inductors intended for use in circuits fabricated on a silicon substrate usually operate at lower frequencies and require larger inductances than inductors intended for use in circuits fabricated on a gallium arsenide substrate.
  • a larger inductance is usually realized in silicon by having the inductor occupy a larger surface area.
  • a larger inductance is achieved by adding a layer of magnetic material to the inductor.
  • Inductor 100 is formed on substrate 110 and comprises magnetic material layer 120 , insulating layer 130 , inductor pattern 140 , second insulating layer 150 , and second magnetic material layer 160 .
  • Magnetic material layer 120 is deposited on substrate 110
  • insulating layer 130 is deposited on magnetic material layer 120
  • inductor pattern 140 is deposited on insulating layer 130
  • second insulating layer 150 is deposited on inductor pattern 140
  • second magnetic material layer 160 is deposited on second insulating layer 150 .
  • Substrate 110 in one embodiment, is a semiconductor, and even though the invention is not limited to a particular type of semiconductor, silicon is the preferred semiconductor substrate material.
  • Magnetic material layer 120 in one embodiment, is deposited on the surface of substrate 110 .
  • the particular magnetic material selected for use in a particular inductor design depends on the inductance requirement. In one embodiment, in which a large inductance in a small volume is desired, a high permeability ferromagnetic material, such as pure iron or a NiFe alloy is selected.
  • a high permeability NiFe alloy is an alloy of 81% Ni and 19% Fe.
  • Electrically conducting films, such as an insulating magnetic oxide film, may also be suitable for use in the present invention.
  • Insulating layer 130 is deposited on magnetic material layer 120 .
  • insulating layer 130 is an inorganic silicon oxide film.
  • insulating layer 130 is silicon dioxide.
  • insulating layer 130 is an organic insulator, such as parylene and polyimide.
  • Inductor pattern 140 is deposited on insulating layer 130 .
  • inductor pattern 140 is a spiral.
  • inductor pattern 140 is a circular spiral.
  • inductor pattern 140 is a polygonal spiral, where the polygonal spiral may be in the shape of a triangle, square, rectangle, octagon, or hexagon.
  • a square spiral inductor pattern, which is shown as inductor pattern 140 in FIG. 1B is preferred, since it is easy to manufacture.
  • Inductor pattern 140 is fabricated from a high-conductivity material.
  • the high-conductivity material is gold.
  • the high-conductivity material is copper.
  • second insulating layer 150 is deposited on inductor pattern 140 , and is fabricated from the same materials as insulating layer 130 .
  • Second magnetic material layer 160 is deposited on second insulating layer 150 , and is fabricated from the same materials as magnetic material layer 120 . Second magnetic material layer 160 is preferably located above inductor pattern 140 , and second magnetic material layer 160 does not intersect the plane of magnetic material layer 160 .
  • Locating magnetic material layer 160 above inductor pattern 140 allows the contribution of the magnetic material to the inductance of the inductor to be precisely controlled during the manufacturing process.
  • the thickness of the layer of magnetic material along with the magnetic properties of the material define the contribution of the layer to the inductance of the inductor. Once the properties of the material are established during the preparation of the material, the thickness of the layer, which can be precisely controlled in an integrated circuit manufacturing process, defines the contribution of the layer of magnetic material to the inductance.
  • the inductor of the present invention is connected to other electronic devices in an integrated circuit.
  • the inductor of the present invention is compatible with conventional silicon manufacturing processes. Structures for coupling passive devices, such as inductors, to other integrated circuit devices are known in the art.
  • inductor 200 is coupled to device 210 .
  • the coupling is accomplished by providing conducting path 220 from inductor pattern 230 , through vias 240 , to device 210 .
  • Inductor structure 300 which combines two inductors, is shown.
  • Inductor structure 300 comprises base structure 305 , sandwich structure 310 , second sandwich structure 315 , and conducting path 320 .
  • Base structure 305 includes substrate 325 , magnetic material layer 330 , and insulating layer 335 .
  • Sandwich structure 310 includes inductor pattern 340 , insulating layer 345 , magnetic material layer 350 , and insulating layer 355 .
  • Second sandwich structure 315 is stacked on sandwich structure 310 .
  • Second sandwich structure 315 includes inductor pattern 360 , insulating layer 365 , magnetic material layer 370 , and insulating layer 375 .
  • Conducting path 320 couples sandwich structure 310 to second sandwich structure 315 , and serially connects inductor pattern 340 to inductor pattern 360 .
  • a current flowing in the serially connected inductor patterns creates a reinforcing magnetic field in magnetic material layer 350 .
  • Magnetic material layers 330 and 370 are located below inductor pattern 340 and above inductor pattern 360 , respectively. Magnetic material layers 330 and 370 confine the magnetic flux and noise radiated by a current flowing in inductor pattern 340 and inductor pattern 360 to the area bounded by the outer surfaces of magnetic material layers 330 and 370 .
  • FIG. 3B a diagram showing the currents and the resulting reinforcing magnetic fields of the two inductor sandwich of FIG. 3A is shown.
  • Current 375 flows in inductor pattern 380 , in conducting path 385 , and in inductor pattern 390 .
  • the resulting magnetic field lines 395 are shown as reinforcing each other in magnetic material 398 , which corresponds to magnetic material layer 350 in FIG. 3A .
  • Magnetic field lines 395 are confined by magnetic material barrier layers 399 .
  • an inductor comprises layers of material deposited on a silicon substrate. First, a layer of magnetic material is deposited on the silicon substrate. Next, an insulating layer is deposited on the magnetic material layer. An inductor pattern is deposited on the insulating layer and above the magnetic material layer. Finally, a second insulating layer is deposited on the inductor pattern, and a second magnetic material layer is deposited on the second insulating layer. The second magnetic material layer is deposited above the inductor pattern.
  • the inductor described above is coupled to another electronic device in an integrated circuit.
  • a plurality of sandwich structures are vertically stacked on an insulating layer that is deposited on a layer of magnetic material.
  • the layer of magnetic material is deposited on a silicon substrate.
  • the sandwich structures include an inductor pattern, an insulating layer deposited on the inductor pattern, a layer of magnetic material deposited on the insulating layer and above the inductor pattern, and an insulating layer deposited on the magnetic material layer.
  • the structures also include a conducting path through the structures, such that each inductor pattern is serially connected to the inductor pattern above by the conducting path. The current flowing in the serially connected inductor patterns creates a reinforcing magnetic field in the magnetic material between adjacent inductor patterns.
  • a method of fabricating an inductor comprises a series of steps. First, a silicon substrate is selected, a layer of magnetic material is deposited on the substrate, and an insulating layer is deposited on the magnetic material layer. Next, a plurality of sandwich structures are stacked on the insulating layer. The method of fabricating the structures comprises the steps of depositing an inductor pattern on the insulating layer and above the magnetic material layer, depositing an insulating layer on the inductor pattern, depositing a layer of magnetic material on the insulating layer and above the inductor pattern, and depositing an insulating layer on the magnetic material layer.
  • a conducting path is fabricated through the structures to connect each inductor pattern serially to the inductor pattern above, such that a current flowing in the serially connected inductor patterns creates a reinforcing magnetic field in the magnetic material between adjacent inductor patterns.

Abstract

A spiral inductor fabricated above a semiconductor substrate provides a large inductance while occupying only a small surface area. Including a layer of magnetic material above and below the inductor increases the inductance of the inductor. The magnetic material also acts as barrier that confines electronic noise generated in the spiral inductor to the area occupied by the spiral inductor. Inductance in a pair of stacked spiral inductors is increased by including a layer of magnetic material between the stacked spiral inductors.

Description

    RELATED APPLICATIONS
  • This application is a divisional of U.S. Patent Application Ser.. No. 09/946,054, filed Sep. 4, 2001, which is a continuation of U.S. Patent Application Ser. No. 09/789,146, filed Feb. 20, 2001, now U.S. Pat. No. 6,287,932, which is a divisional of U.S. Patent Application Ser. No. 09/243,584, filed Feb. 3, 1999, now U.S. Pat. No. 6,191,468, all of which are incorporated herein by reference in their entirety.
  • FIELD OF TECHNOLOGY
  • The present subject matter relates to inductors, and particularly to inductors used in integrated circuits.
  • BACKGROUND
  • The telecommunications and computer industries are driving the demand for miniaturized analog and mixed signal circuits. Inductors are a critical component in the traditional discrete element circuits, such as impedance matching circuits, resonant tank circuits, linear filters, and power circuits, used in these industries. Since traditional inductors are bulky components, successful integration of the traditional discrete element circuits requires the development of miniaturized inductors.
  • One approach to miniaturizing an inductor is to use standard integrated circuit building blocks, such as resistors, capacitors, and active circuitry, such as operational amplifiers, to design an active inductor that simulates the electrical properties of a discrete inductor. Active inductors can be designed to have a high inductance and a high Q factor, but inductors fabricated using these designs consume a great deal of power and generate noise.
  • A second approach to miniaturizing an inductor is to fabricate a solenoid type inductor with a core using conventional integrated circuit manufacturing process technology. Unfortunately, conventional integrated circuit process steps do not lend themselves to precisely and inexpensively fabricating a helical structure with a core. So, integrated circuit process technology is only marginally compatible with manufacturing a solenoid type inductor.
  • A third approach, sometimes used in the fabrication of miniature inductors in gallium arsenide circuits, is to fabricate a spiral type inductor using conventional integrated circuit processes. Unfortunately, this approach has a high cost factor associated with it when applied to fabricating inductors for use in silicon integrated circuits. Silicon integrated circuits operate at lower frequencies than gallium arsenide circuits, and generally require inductors having a higher inductance than inductors used in gallium arsenide circuits. The higher inductance is realized in a spiral inductor occupying a large surface area on the silicon substrate.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1A is a cross-sectional view of one embodiment of a square spiral inductor embedded in a solid state structure.
  • FIG. 1B is a top view of one embodiment of a square spiral inductor pattern.
  • FIG. 2 is a cross-sectional view one embodiment of an inductor coupled to another electronic device in an integrated circuit.
  • FIG. 3A is a cross-sectional view of one embodiment of two vertically stacked inductors.
  • FIG. 3B is a cross-sectional view of one embodiment of two stacked and serially connected inductors showing the current in the inductors and the resulting magnetic field lines.
  • DETAILED DESCRIPTION
  • In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that structural, logical and electrical changes may be made without departing from the spirit and scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
  • Inductors intended for use in circuits fabricated on a silicon substrate usually operate at lower frequencies and require larger inductances than inductors intended for use in circuits fabricated on a gallium arsenide substrate. As mentioned above, a larger inductance is usually realized in silicon by having the inductor occupy a larger surface area. According to one embodiment of the present invention, rather than increasing the inductance by increasing the surface area occupied by the inductor, a larger inductance is achieved by adding a layer of magnetic material to the inductor.
  • Referring to FIG. 1A, a cross-sectional view of one embodiment of a square spiral inductor of the present invention is shown. Inductor 100 is formed on substrate 110 and comprises magnetic material layer 120, insulating layer 130, inductor pattern 140, second insulating layer 150, and second magnetic material layer 160. Magnetic material layer 120 is deposited on substrate 110, insulating layer 130 is deposited on magnetic material layer 120, inductor pattern 140 is deposited on insulating layer 130, second insulating layer 150 is deposited on inductor pattern 140, and second magnetic material layer 160 is deposited on second insulating layer 150.
  • Substrate 110, in one embodiment, is a semiconductor, and even though the invention is not limited to a particular type of semiconductor, silicon is the preferred semiconductor substrate material.
  • Magnetic material layer 120, in one embodiment, is deposited on the surface of substrate 110. The particular magnetic material selected for use in a particular inductor design depends on the inductance requirement. In one embodiment, in which a large inductance in a small volume is desired, a high permeability ferromagnetic material, such as pure iron or a NiFe alloy is selected. An example of a high permeability NiFe alloy is an alloy of 81% Ni and 19% Fe. Electrically conducting films, such as an insulating magnetic oxide film, may also be suitable for use in the present invention.
  • Insulating layer 130 is deposited on magnetic material layer 120. In one embodiment, insulating layer 130 is an inorganic silicon oxide film. In an alternate embodiment, insulating layer 130 is silicon dioxide. In still another embodiment, which is perhaps preferable in a low temperature processing environment, insulating layer 130 is an organic insulator, such as parylene and polyimide.
  • Inductor pattern 140 is deposited on insulating layer 130. In one embodiment, inductor pattern 140 is a spiral. In an alternate embodiment, inductor pattern 140 is a circular spiral. In a second alternate embodiment, inductor pattern 140 is a polygonal spiral, where the polygonal spiral may be in the shape of a triangle, square, rectangle, octagon, or hexagon. A square spiral inductor pattern, which is shown as inductor pattern 140 in FIG. 1B, is preferred, since it is easy to manufacture. Inductor pattern 140 is fabricated from a high-conductivity material. In one embodiment the high-conductivity material is gold. In an alternate embodiment, the high-conductivity material is copper.
  • Referring to FIG. 1A, second insulating layer 150 is deposited on inductor pattern 140, and is fabricated from the same materials as insulating layer 130.
  • Second magnetic material layer 160 is deposited on second insulating layer 150, and is fabricated from the same materials as magnetic material layer 120. Second magnetic material layer 160 is preferably located above inductor pattern 140, and second magnetic material layer 160 does not intersect the plane of magnetic material layer 160.
  • Locating magnetic material layer 160 above inductor pattern 140 allows the contribution of the magnetic material to the inductance of the inductor to be precisely controlled during the manufacturing process. The thickness of the layer of magnetic material along with the magnetic properties of the material define the contribution of the layer to the inductance of the inductor. Once the properties of the material are established during the preparation of the material, the thickness of the layer, which can be precisely controlled in an integrated circuit manufacturing process, defines the contribution of the layer of magnetic material to the inductance.
  • In one embodiment, the inductor of the present invention is connected to other electronic devices in an integrated circuit. The inductor of the present invention is compatible with conventional silicon manufacturing processes. Structures for coupling passive devices, such as inductors, to other integrated circuit devices are known in the art.
  • Referring to FIG. 2, inductor 200 is coupled to device 210. The coupling is accomplished by providing conducting path 220 from inductor pattern 230, through vias 240, to device 210.
  • Referring to FIG. 3A, one embodiment of inductor structure 300, which combines two inductors, is shown. Inductor structure 300 comprises base structure 305, sandwich structure 310, second sandwich structure 315, and conducting path 320. Base structure 305 includes substrate 325, magnetic material layer 330, and insulating layer 335. Sandwich structure 310 includes inductor pattern 340, insulating layer 345, magnetic material layer 350, and insulating layer 355. Second sandwich structure 315 is stacked on sandwich structure 310. Second sandwich structure 315 includes inductor pattern 360, insulating layer 365, magnetic material layer 370, and insulating layer 375.
  • Conducting path 320 couples sandwich structure 310 to second sandwich structure 315, and serially connects inductor pattern 340 to inductor pattern 360. A current flowing in the serially connected inductor patterns creates a reinforcing magnetic field in magnetic material layer 350. Magnetic material layers 330 and 370 are located below inductor pattern 340 and above inductor pattern 360, respectively. Magnetic material layers 330 and 370 confine the magnetic flux and noise radiated by a current flowing in inductor pattern 340 and inductor pattern 360 to the area bounded by the outer surfaces of magnetic material layers 330 and 370. By stacking sandwich structures, in one embodiment, a large inductance can be created without increasing the surface area on a substrate occupied by the inductor.
  • Referring to FIG. 3B, a diagram showing the currents and the resulting reinforcing magnetic fields of the two inductor sandwich of FIG. 3A is shown. Current 375 flows in inductor pattern 380, in conducting path 385, and in inductor pattern 390. The resulting magnetic field lines 395 are shown as reinforcing each other in magnetic material 398, which corresponds to magnetic material layer 350 in FIG. 3A. Magnetic field lines 395 are confined by magnetic material barrier layers 399.
  • CONCLUSION
  • In one embodiment, an inductor comprises layers of material deposited on a silicon substrate. First, a layer of magnetic material is deposited on the silicon substrate. Next, an insulating layer is deposited on the magnetic material layer. An inductor pattern is deposited on the insulating layer and above the magnetic material layer. Finally, a second insulating layer is deposited on the inductor pattern, and a second magnetic material layer is deposited on the second insulating layer. The second magnetic material layer is deposited above the inductor pattern.
  • In an alternate embodiment, the inductor described above is coupled to another electronic device in an integrated circuit.
  • In still another embodiment, a plurality of sandwich structures are vertically stacked on an insulating layer that is deposited on a layer of magnetic material. The layer of magnetic material is deposited on a silicon substrate. The sandwich structures include an inductor pattern, an insulating layer deposited on the inductor pattern, a layer of magnetic material deposited on the insulating layer and above the inductor pattern, and an insulating layer deposited on the magnetic material layer. The structures also include a conducting path through the structures, such that each inductor pattern is serially connected to the inductor pattern above by the conducting path. The current flowing in the serially connected inductor patterns creates a reinforcing magnetic field in the magnetic material between adjacent inductor patterns.
  • In still another embodiment, a method of fabricating an inductor comprises a series of steps. First, a silicon substrate is selected, a layer of magnetic material is deposited on the substrate, and an insulating layer is deposited on the magnetic material layer. Next, a plurality of sandwich structures are stacked on the insulating layer. The method of fabricating the structures comprises the steps of depositing an inductor pattern on the insulating layer and above the magnetic material layer, depositing an insulating layer on the inductor pattern, depositing a layer of magnetic material on the insulating layer and above the inductor pattern, and depositing an insulating layer on the magnetic material layer. Finally, a conducting path is fabricated through the structures to connect each inductor pattern serially to the inductor pattern above, such that a current flowing in the serially connected inductor patterns creates a reinforcing magnetic field in the magnetic material between adjacent inductor patterns.
  • It is to be recognized that the above description is intended to be illustrative, and not restrictive. Many other embodiments will be apparent to those of skill in the art upon reviewing the above description. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims (40)

1. A method of fabricating an inductor comprising:
forming a magnetic material on a substrate;
forming an insulator of organic material on the magnetic material; and
forming an inductor pattern on the insulator.
2. The method of claim 1, wherein
forming the magnetic material comprises depositing a ferromagnetic material on the substrate, wherein the substrate is a silicon substrate;
forming the insulator comprises forming organic oxide material on the ferromagnetic material; and
forming the inductor pattern comprises forming a spiral octagon inductor pattern on the organic oxide material.
3. The method of claim 2, further comprising:
forming a second insulator of silicon dioxide on the spiral octagon inductor pattern; and
depositing magnetic oxide material on the second insulator.
4. The method of claim 1, wherein
forming the magnetic material comprises depositing magnetic oxide on the substrate,
forming the insulator comprises forming a polyimide material on the magnetic oxide material, and
forming the inductor pattern comprises forming a square polygonal spiral inductor pattern on the polyimide material.
5. The method of claim 4, further comprising:
depositing silicon dioxide on the square polygonal spiral inductor pattern; and
depositing a magnetic material on the silicon dioxide.
6. The method of claim 1, wherein
forming the magnetic material comprises depositing high permeability ferromagnetic material on a silicon substrate,
forming the insulator comprises forming a parylene material on the high permeability ferromagnetic material, and
forming the inductor pattern comprises forming a hexagonal spiral inductor pattern on the parylene material.
7. The method of claim 6, further comprising:
depositing silicon dioxide on the hexagonal spiral inductor pattern; and
depositing a nickel-iron material on the silicon dioxide.
8. The method of claim 1, wherein
forming the magnetic material comprises depositing ferromagnetic material on the substrate,
forming the insulator comprises forming a organic oxide material on the ferromagnetic material, and
forming an inductor pattern comprises forming a rectangular spiral inductor pattern on the organic oxide material.
9. The method of claim 8, further comprising:
depositing silicon dioxide on the rectangular spiral inductor pattern; and
depositing a nickel-iron material on the silicon dioxide.
10. The method of claim 1, wherein
forming the magnetic material comprises depositing magnetic material on the substrate, the substrate including silicon,
forming the insulator comprises forming an organic material on the magnetic material,
forming an inductor pattern comprises forming a spiral inductor pattern on the organic material, and
wherein the method further comprises:
depositing silicon dioxide on the spiral inductor pattern; and
depositing magnetic oxide material on the silicon dioxide.
11. The method of claim 10, wherein the magnetic material comprises iron.
12. The method of claim 10, wherein the spiral inductor pattern comprises gold.
13. The method of claim 1, wherein
forming the magnetic material comprises depositing magnetic oxide material on the substrate,
forming the insulator comprises depositing organic material on the magnetic oxide material,
forming the inductor pattern comprises forming a polygonal spiral inductor pattern on the organic material, and
wherein the method further comprises:
depositing silicon dioxide on the polygonal spiral inductor pattern; and
depositing an additional magnetic material on the silicon dioxide.
14. The method of claim 13, wherein depositing the additional magnetic material on the silicon dioxide comprises depositing a nickel-iron alloy on the silicon dioxide.
15. The method of claim 13, wherein the polygonal spiral inductor pattern comprises copper.
16. The method of claim 1, wherein
forming the magnetic material comprises depositing a high permeability ferromagnetic material on the substrate, the substrate including silicon
forming the insulator comprises depositing polyimide on the high permeability ferromagnetic material,
forming the inductor pattern comprises forming a triangular spiral inductor pattern on the polyimide material, and
wherein the method further comprises:
depositing silicon dioxide on the triangular spiral inductor pattern; and
depositing a nickel-iron alloy on the silicon dioxide.
17. The method of claim 16, wherein depositing the nickel-iron alloy on the silicon dioxide comprises depositing an eighty-one percent nickel and about a nineteen percent iron nickel-iron alloy on the silicone dioxide.
18. The method of claim 1, wherein
forming the magnetic material comprises depositing a ferromagnetic material on the substrate,
forming the insulator comprises depositing parylene on the ferromagnetic material,
forming the inductor pattern comprises forming a square spiral inductor pattern on the parylene material, and
wherein the method further comprises:
depositing an oxide material on the square spiral inductor pattern; and
depositing iron on the oxide material.
19. The method of claim 18, wherein
depositing the oxide material comprises depositing an organic insulator material on the square spiral inductor pattern, and
the square spiral inductor pattern comprises copper.
20. A method of fabricating an inductor comprising:
depositing a first magnetic material on a substrate;
forming a first insulator of organic material on the first magnetic material;
forming an inductor pattern on the first insulator material wherein the inductor pattern comprises gold,
forming a second insulator on the inductor pattern; and
depositing a second magnetic material on the second insulator.
21. The method of claim 20, wherein depositing at least one of the first and second magnetic materials comprises depositing a ferromagnetic material.
22. The method of claim 21, wherein depositing the ferromagnetic material comprises depositing iron.
23. The method of claim 20 wherein forming the inductor pattern comprises forming a square spiral inductor pattern.
24. The method of claim 20, wherein forming the inductor pattern includes forming a circular inductor pattern.
25. The method of claim 20, wherein forming the inductor pattern includes forming a rectangular inductor pattern.
26. The method of claim 20, wherein forming the inductor pattern includes forming a polygonal inductor pattern.
27. The method of claim 20, wherein depositing at least one of the first and second magnetic material comprises depositing a nickel-iron alloy.
28. The method of claim 20, wherein depositing at least one of the first and second magnetic material comprises depositing a nickel-iron alloy having a composition of about 81% nickel and 19% iron.
29. The method of claim 20, wherein forming the first insulator comprises forming a polyimide material on the first magnetic material.
30. The method of claim 20, wherein forming the first insulator comprises forming a parylene material on the first magnetic material.
31. The method of claim 20, wherein the substrate comprises a silicon substrate.
32. The method of claim 20, wherein the second insulator comprises silicone dioxide.
33. The method of claim 20, wherein the substrate comprises a semiconductor material.
34. A method of fabricating an inductor comprising:
depositing a first magnetic material on a silicon substrate;
depositing a first insulating material on the first magnetic material;
forming an inductor pattern from gold on the first insulating material;
depositing a second insulating material on the inductor pattern; and
depositing a second magnetic material on the second insulating material.
35. The method of claim 35, wherein the first magnetic material comprises a ferromagnetic material.
36. The method of claim 35, wherein the ferromagnetic material comprises iron.
37. The method of claim 34, wherein the inductor pattern comprises a square spiral pattern.
38. The method of claim 34, wherein at least one of the first and second insulating materials comprises silicon dioxide.
39. The method of claim 34, wherein at least one of the first and second insulating materials comprises polyimide.
40. The method of claim 34, wherein the inductor pattern comprises a circular spiral pattern.
US12/362,621 1999-02-03 2009-01-30 Method for forming an inductor Abandoned US20090137067A1 (en)

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