US20090300912A1 - Flex Circuit Apparatus and Method for Adding Capacitance while Conserving Circuit Board Surface Area - Google Patents
Flex Circuit Apparatus and Method for Adding Capacitance while Conserving Circuit Board Surface Area Download PDFInfo
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- US20090300912A1 US20090300912A1 US12/542,503 US54250309A US2009300912A1 US 20090300912 A1 US20090300912 A1 US 20090300912A1 US 54250309 A US54250309 A US 54250309A US 2009300912 A1 US2009300912 A1 US 2009300912A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/38—Multiple capacitors, i.e. structural combinations of fixed capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5387—Flexible insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Definitions
- Stacking is one technique that has been utilized to conserve surface area.
- One such stacking technique stacks integrated circuits on top of one another.
- integrated circuits are stacked in chip-scale packages (“CSPs”) into modules. Flex circuits are used to connect a pair of CSPs, conserving board surface area at the expense of added component height. This is a trade-off that manufacturers are often willing to make to allow smaller circuit boards.
- An apparatus for adding capacitance while conserving circuit board surface area includes a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers and an integrated-circuit (IC) device mounted on to the upper surface of the flex capacitor circuit and electrically connected to the flex capacitor circuit.
- the flex capacitor circuit is configured to provide bypass capacitance and, therefore, adds capacitance to the IC device when the IC device is mounted on the flex capacitor circuit.
- the flex capacitor circuit includes a plurality of conductive layers, one or more dielectric layers, and a plurality of vias. Each conductive layer is a solid plane except for openings for vias defined by the conductive layer. The one or more dielectric layers separate the conductive layers. The vias extend through openings in the conductive layers and provide electrical connections to the conductive layers and electrical connections for communicating a signal through the flex capacitor circuit.
- the integrated-circuit (IC) device is electrically connected to the vias in the flex capacitor circuit.
- the flex capacitor circuit adds capacitance to the IC device.
- a preferred method in accordance with the invention includes obtaining a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers, mounting an IC device on the upper surface of the flex capacitor circuit, and mounting the flex capacitor circuit on a circuit board. Mounting the IC device to the upper surface of the flex capacitor circuit creates an electrical interconnection between the IC device and the flex capacitor circuit and mounting the flex capacitor circuit on the circuit board creates an electrical interconnection between the IC device and the circuit board through the flex capacitor circuit and, therefore, adds capacitance to the IC device.
- FIG. 1 is a cross-sectional view of an embodiment of a flex-circuit apparatus for adding capacitance while conserving circuit board surface area.
- FIGS. 2A-2B are cross-sectional and perspective views, respectively, of an embodiment of a flex circuit apparatus for adding capacitance while conserving circuit board surface area that includes fins.
- FIGS. 3A-3B are cross-sectional and perspective views, respectively, of an embodiment of a flex circuit apparatus for adding capacitance while conserving circuit board surface area that includes additional capacitors.
- FIGS. 4A-4B are cross-sectional and perspective views, respectively, of an embodiment of a flex circuit apparatus for adding capacitance while conserving circuit board surface area that includes additional capacitors and a slug for transferring heat.
- FIG. 5 is a top view of a flex circuit that may be used in embodiments of a flex circuit apparatus for adding capacitance while conserving circuit board surface area.
- FIG. 6 is a flowchart of an embodiment of a method for adding capacitance while conserving circuit board surface area.
- the embodiments described utilize a flex circuit to effectively stack capacitance, providing a vertical solution that allows minimization of circuit board surface area or maximum utilization of available circuit board surface area.
- the embodiments provide a way of boosting capacitance for devices by using planes of a flex circuit or combination rigid/flex circuit.
- Certain embodiments provide on the flex circuit a capability of boosting capacitance even more by adding capacitors on top of the package. Embodiments enable the incorporating of these features in the packaging process of a die.
- Flex circuits (“flex”, “flex circuits” or “flexible circuit structures”) employed herein are flexible circuit structures that have at least two conductive layers.
- the conductive layers are, for example, metal such as copper or alloy 110 .
- Any flexible or conformable substrate with a multiple internal layer connectivity capability may be used as a flex circuit in embodiments.
- the entire flex circuit may be flexible or, as those of skill in the art will recognize, a printed circuit board (“PCB”) structure made flexible in certain areas, to allow conformability and wrapping around, e.g., the CSP, and rigid in other areas for planarity along, e.g., CSP surfaces.
- PCB printed circuit board
- Embodiments may be used, for example, with a die or integrated circuit (IC) device.
- CSP packages of a variety of types and configurations such as, for example, those that are die-sized, as well as those that are near chip-scale as well as the variety of ball grid array packages known in the art may be used.
- Typical CSPs such as, for example, monolithic ball-grid-array (“BGA”), micro ball-grid-array, and fine-pitch ball-grid-array (“FBGA”) packages have an array of connective contacts embodied, for example, as leads, bumps, solder balls, or balls that extend from a lower surface of a plastic (or other material) casing in any of several patterns and pitches. An external portion of the connective contacts is often finished with a ball or solder.
- BGA monolithic ball-grid-array
- FBGA fine-pitch ball-grid-array
- the apparatus includes a multi-layered flex circuit 10 used as a capacitor.
- flex capacitor circuit 10 includes an upper surface 12 and a lower surface 14 with six (6) intermediate conductive layers which except openings for vias, are solid planes.
- the six intermediate conductive layers include six (6) alternating power planes (i.e., three (3) “Power 1” planes 16 and three (3) “Power 2” planes 18 ) separated by dielectric layers 20 .
- One set of power planes e.g., the Power 1 planes 16
- the other set of power planes e.g., the Power 2 planes 18
- the dielectric layers 20 may be any of a variety of flexible dielectrics, such as Kapton.TM. or C-Ply.TM., both provided by 3M.
- the conductive layers may be metal such as copper or alloy 110 .
- the flex capacitor circuit 10 may be mounted between an IC device 22 (e.g., a CSP as described above) and the substrate or circuit board 24 to which the device 22 would normally attach. Mounted as such, the flex capacitor circuit 10 increases the bypass capacitance of the device 22 .
- the flex capacitor circuit 10 does this by providing an electrical connection between device 22 and circuit board 24 power and ground leads and respective power and ground conductive layers (e.g., Power 1 plane(s) 16 and Power 2 plane(s) 18 ) in the flex capacitor circuit 10 .
- the flex capacitor circuit 10 also provides an electrical connection for a signal to pass through the flex capacitor circuit 10 from/to the device 22 to the circuit board 24 .
- connective contacts 26 and connective contacts 28 (e.g., ball contacts) on the upper surface 12 and lower surface 14 , respectively, of flex capacitor 10 provide electrical connections through mounting pads (not shown) and supply vias 30 to the conductive layers.
- the connective contacts 26 and connective contacts 28 also provide the signal connection directly between device 22 and circuit board 24 through mounting pads and non-supply (i.e., signal) vias 32 .
- Contacts 26 , 28 may be formed between device 22 and flex capacitor circuit 10 , and between flex capacitor circuit 10 and circuit board 24 , as part of the mounting process.
- Device 22 may be mounted to upper surface 12 of flex capacitor circuit 10
- lower surface 14 of flex capacitor circuit 10 may be mounted to circuit board 24 .
- An adhesive may used to bond device 22 to flex capacitor circuit 10 and flex capacitor circuit 10 to the circuit board 24 .
- supply vias 30 and signal vias 32 extend through flex capacitor circuit 10 .
- Contacts 26 , 28 and vias 30 , 32 provide power supply, ground and signal connections between device 22 and circuit board 24 through flex capacitor circuit 10 .
- Power 1 planes 16 e.g., the power supply conductive layers
- flex capacitor circuit 10 may provide a power supply connection, with added capacitance provided by flex capacitor circuit 10 , between circuit board 24 and device 22 .
- the supply vias 30 connecting to Power 1 planes 16 are the two outermost supply vias 30 (left-most and right-most) shown in FIG.
- Supply vias 30 that connect to Power 1 planes 16 do not connect with Power 2 planes, but instead pass through openings 34 in Power 2 planes 18 . In this manner, these vias 30 provide an electrical connection to Power 1 planes 16 but not Power 2 planes 18 .
- Supply vias 30 connecting to Power 2 planes 18 may provide a ground connection for device 22 .
- Supply vias 30 connecting to Power 2 planes 18 do not connect to Power 1 planes, but instead pass through openings 36 in Power 1 planes 16 .
- Supply vias 30 connecting to Power 2 planes 18 are shown as supply vias 30 third from the left and third from the right in FIG. 1 .
- Signal vias 32 provide a signal connection between device 22 and circuit board 24 , as described above. As shown, signal vias 32 do not connect to Power 1 planes 16 and Power 2 planes 18 , but instead pass through openings 34 and 36 in Power 2 planes 18 and Power 1 planes 16 , respectively.
- flex capacitor circuit 10 By providing power supply, ground and signal connections through power supply vias 30 and vias 32 , flex capacitor circuit 10 adds capacitance without taking up any appreciable circuit board 24 surface area beyond that of device 22 itself.
- the amount of capacitance provided by flex capacitor circuit 10 is a function of a number of variables, as those of skill in the art will recognize, including the surface area, the number of layers, the distance between layers, and the dielectric material of flex capacitor circuit 10 .
- the greater the surface area of flex capacitor circuit 10 the greater the capacitance.
- the surface area may be increased by known techniques, such as dimpling, rough surface, etc., by extending flex capacitor circuit 10 beyond device 22 , or folding flex capacitor circuit 10 over device 22 , as described below. There typically is a direct, linear relationship between the surface area and the capacitance provided.
- a flex capacitor circuit 10 design may include greater surface area but fewer layers.
- a flex capacitor circuit 10 design might also incorporate a higher dielectric level material rather than increasing the number of layers in order to avoid increasing inductance.
- FIGS. 2A-2B depict an embodiment of an apparatus for adding capacitance while conserving circuit board surface area that includes fins 40 .
- Fins 40 may be formed as extended portions of flex capacitor circuit 10 . Consequently, fins 40 provide increased surface area for flex capacitor circuit 10 . The increased surface area provided by fins 40 increases the capacitance provided by flex capacitor circuit 10 .
- device 22 is mounted on flex capacitor circuit 10 , which is itself mounted on substrate or circuit board 24 .
- Connective contacts 26 , 28 provide power supply, ground, and signal connections between device 22 , flex capacitor circuit 10 , and circuit board 24 , as described above.
- fins 40 are shown extended above and perpendicular to device 22 . Fins 40 may be folded around (over the top of) device 22 or left exposed (as shown) at any desired angle. An advantage of leaving fins 40 exposed as shown is that exposed fins 40 provide heat dissipation.
- FIGS. 3A-3B shown is an embodiment of an apparatus for adding capacitance while conserving circuit board surface area that includes additional capacitors 42 . As shown, additional capacitors 42 are mounted on portions 44 of flex capacitor circuit 10 folded over device 22 .
- the device 22 is mounted on the flex capacitor circuit 10 , which is itself mounted on the substrate or circuit board 24 .
- Connective contacts 26 , 28 provide power supply, ground, and signal connections between device 22 , flex capacitor circuit 10 , and circuit board 24 , as described above.
- Folder portions 44 of the flex capacitor circuit 10 wrap around the upper surface of the device 22 and capacitors 42 may be mounted on folded portions 44 . Folded portions 44 may include mounting pads (not shown) for mounting capacitors 42 .
- the connections of capacitors 42 to device 22 may also be ported in a fashion normal to standard die packaging procedures to insulate the connections.
- flex capacitor circuit 10 may be incorporated with device 22 as a packaged die (e.g., a CSP).
- Flex capacitor circuit 10 may be easily employed in the manufacture of a packaged die, incorporating capacitance into a monolithic package.
- Surface mount capacitors 42 can be added to the package, as shown in FIGS. 3A-3B , to increase capacitance as desired.
- memory DIMMs utilizing inverted packages such as those shown here can take advantage of this packaging technology to meet overall package outline requirements with larger die sizes.
- FIGS. 4A-4B shown is an embodiment of an apparatus for adding capacitance while conserving circuit board surface area that includes additional capacitors 42 and a slug 46 for transferring heat.
- additional capacitors 42 are mounted on the folded portions 44 of flex capacitor circuit 10 .
- a slug 46 is also mounted on the package.
- the slug 46 may be mounted, e.g., on large mounting pads (not shown) on folded portions 44 .
- the surface of folded portions 44 facing device 22 could be plated for solder attachment and multiple vias used to transfer heat to the slug 46 mounted on the outer surface of folded portions 44 .
- a cutout or cutout window in folded portions 44 could be provided to mount slug 46 directly to device 22 .
- Slug 46 may be metal or other heat-conductive material.
- Slug 46 may interface to a heat sink (not shown) mounted on top of slug 46 or may itself be a heat sink.
- a flex capacitor circuit 10 that may be used in embodiments of an apparatus for adding capacitance while conserving circuit board surface area.
- Exemplary flex circuits are shown in the '992 patent discussed above and are known to those skilled in the art. Off-the-shelf flex circuits may be used.
- the flex capacitor circuit 10 includes mounting pads 50 .
- the mounting pads 50 provide connections from connective contacts 26 , 28 to the vias 30 , 32 discussed above.
- the power plane layers generally will not have traces, as these are not needed for the capacitance function.
- flex capacitor circuit 10 includes power plane layers separated by dielectric layers.
- the power plane layers may be metal layers that are solid planes with the exception of holes for vias 30 , 32 .
- the number of layers may depend on numerous factors including the capacitance desired, engineering and size constraints, and other design choices.
- flex capacitor circuit 10 in FIG. 1 includes six power plane layers.
- flex capacitor circuit 10 will have two or more power plane layers.
- flex capacitor circuit 10 is folded. Increasing the number of layers of flex capacitor circuit 10 may increase the difficulty of folding flex capacitor circuit 10 .
- flex capacitor circuit 10 may be thinned in the regions where it is folded. This may be done by removing layers or thinning the existing layers in the folding region. If necessary, additional layers may be added, or the layers thickened, in the portions of flex capacitor circuit 10 that extend beyond the folding region.
- Another technique for folding flex capacitor circuit 10 involves folding only some portion of the layers. For example, if flex capacitor circuit 10 included six layers, only two of the layers may extend beyond and be folded over device 22 .
- Method 60 includes obtaining a flex capacitor circuit 10 , block 62 , such as described above with reference to FIGS. 1-5 .
- the obtaining step may comprise fabricating a flex capacitor circuit 10 with the characteristics described above.
- a device 22 may be mounted on the flex capacitor circuit 10 .
- This mounting may include an adhesive, or other bonding material, being disposed on selected areas of an upper surface of the flex capacitor circuit 10 , block 64 , and device 22 , such as a CSP, being placed on the upper surface of the flex capacitor circuit 10 , block 66 , creating an adhesive contact between device 22 and flex capacitor circuit 10 and an electrical interconnection between device 22 and flex capacitor circuit 10 through contacts 26 (e.g., contact balls disposed during mounting step), mounting pads 50 and vias 30 , 32 .
- contacts 26 e.g., contact balls disposed during mounting step
- flex capacitor circuit 10 includes an extended portion, the extended portion may be wrapped or folded around device 22 , block 68 . The folded portion may be left exposed as fins 40 or folded completely over device 22 as discussed above.
- adhesive or other bonding material may be disposed on an upper surface of device 22 , block 70 , and the folded portions 44 placed on the upper surface of device 22 , block 72 , creating an adhesive contact between the upper surface of device 22 and folded portions 44 .
- One or more additional capacitors 42 may be mounted on the folded portions 44 , block 74 .
- a slug or heat sink may be mounted on the folded portions 44 , block 76 .
- the entire package of device 22 and flex capacitor circuit 10 may be mounted on a circuit board 24 .
- adhesive, or other bonding material may be disposed on the circuit board 24 , block 78 , and the package placed on the circuit board 24 , block 80 , creating an adhesive contact between flex capacitor circuit 10 and the circuit board 24 and an electrical interconnection between device 22 and circuit board 24 through flex capacitor circuit 10 (i.e., through contacts 26 , 28 (e.g., contact balls disposed during mounting step), mounting pads 50 and vias 30 , 32 ).
Abstract
An apparatus and a method for adding capacitance while conserving circuit board surface area. An apparatus for adding capacitance while conserving circuit board surface area includes a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers and an integrated-circuit (IC) device mounted on to the upper surface of the flex capacitor circuit and electrically connected to the flex capacitor circuit. The flex capacitor circuit is configured to provide bypass capacitance and, therefore, adds capacitance to the IC device when the IC device is mounted on the flex capacitor circuit.
Description
- This application is a continuation of Ser. No. 11/267,476, filed Nov. 4, 2005, now U.S. Pat. No. 7,576,995, which is hereby incorporated herein by reference.
- On densely populated circuit boards, space consumption is a critical issue. Each additional component placed on a circuit board takes up additional surface area. For example, if more capacitance is required for a given application, additional capacitors must be added to the circuit board, taking up additional surface area. With manufacturers trying to fit more and more components on circuit boards, techniques which minimize the amount of surface area of given components are sought after. This applies to capacitors as much as other components.
- At the same time, manufacturers are constantly looking for ways to reduce overall circuit board surface area. Stacking is one technique that has been utilized to conserve surface area. One such stacking technique stacks integrated circuits on top of one another. In U.S. Pat. No. 6,576,992 B1 (the '992 patent), owned by assignee of the present application and incorporated herein by reference, integrated circuits are stacked in chip-scale packages (“CSPs”) into modules. Flex circuits are used to connect a pair of CSPs, conserving board surface area at the expense of added component height. This is a trade-off that manufacturers are often willing to make to allow smaller circuit boards.
- An apparatus for adding capacitance while conserving circuit board surface area is provided that includes a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers and an integrated-circuit (IC) device mounted on to the upper surface of the flex capacitor circuit and electrically connected to the flex capacitor circuit. The flex capacitor circuit is configured to provide bypass capacitance and, therefore, adds capacitance to the IC device when the IC device is mounted on the flex capacitor circuit.
- Another apparatus for adding capacitance while conserving circuit board surface area includes a flex capacitor circuit with an upper surface and a lower surface and an integrated-circuit (IC) device mounted on to the upper surface of the flex capacitor circuit. The flex capacitor circuit includes a plurality of conductive layers, one or more dielectric layers, and a plurality of vias. Each conductive layer is a solid plane except for openings for vias defined by the conductive layer. The one or more dielectric layers separate the conductive layers. The vias extend through openings in the conductive layers and provide electrical connections to the conductive layers and electrical connections for communicating a signal through the flex capacitor circuit. The integrated-circuit (IC) device is electrically connected to the vias in the flex capacitor circuit. The flex capacitor circuit adds capacitance to the IC device.
- A preferred method in accordance with the invention includes obtaining a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers, mounting an IC device on the upper surface of the flex capacitor circuit, and mounting the flex capacitor circuit on a circuit board. Mounting the IC device to the upper surface of the flex capacitor circuit creates an electrical interconnection between the IC device and the flex capacitor circuit and mounting the flex capacitor circuit on the circuit board creates an electrical interconnection between the IC device and the circuit board through the flex capacitor circuit and, therefore, adds capacitance to the IC device.
- The detailed description will refer to the following drawings, wherein like numerals refer to like elements, and wherein:
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FIG. 1 is a cross-sectional view of an embodiment of a flex-circuit apparatus for adding capacitance while conserving circuit board surface area. -
FIGS. 2A-2B are cross-sectional and perspective views, respectively, of an embodiment of a flex circuit apparatus for adding capacitance while conserving circuit board surface area that includes fins. -
FIGS. 3A-3B are cross-sectional and perspective views, respectively, of an embodiment of a flex circuit apparatus for adding capacitance while conserving circuit board surface area that includes additional capacitors. -
FIGS. 4A-4B are cross-sectional and perspective views, respectively, of an embodiment of a flex circuit apparatus for adding capacitance while conserving circuit board surface area that includes additional capacitors and a slug for transferring heat. -
FIG. 5 is a top view of a flex circuit that may be used in embodiments of a flex circuit apparatus for adding capacitance while conserving circuit board surface area. -
FIG. 6 is a flowchart of an embodiment of a method for adding capacitance while conserving circuit board surface area. - An apparatus and method for adding capacitance while conserving circuit board surface area are described herein. The embodiments described utilize a flex circuit to effectively stack capacitance, providing a vertical solution that allows minimization of circuit board surface area or maximum utilization of available circuit board surface area. The embodiments provide a way of boosting capacitance for devices by using planes of a flex circuit or combination rigid/flex circuit. Certain embodiments provide on the flex circuit a capability of boosting capacitance even more by adding capacitors on top of the package. Embodiments enable the incorporating of these features in the packaging process of a die.
- Flex circuits (“flex”, “flex circuits” or “flexible circuit structures”) employed herein are flexible circuit structures that have at least two conductive layers. The conductive layers are, for example, metal such as copper or alloy 110. Any flexible or conformable substrate with a multiple internal layer connectivity capability may be used as a flex circuit in embodiments. The entire flex circuit may be flexible or, as those of skill in the art will recognize, a printed circuit board (“PCB”) structure made flexible in certain areas, to allow conformability and wrapping around, e.g., the CSP, and rigid in other areas for planarity along, e.g., CSP surfaces.
- Embodiments may be used, for example, with a die or integrated circuit (IC) device. For example, CSP packages of a variety of types and configurations such as, for example, those that are die-sized, as well as those that are near chip-scale as well as the variety of ball grid array packages known in the art may be used. Typical CSPs, such as, for example, monolithic ball-grid-array (“BGA”), micro ball-grid-array, and fine-pitch ball-grid-array (“FBGA”) packages have an array of connective contacts embodied, for example, as leads, bumps, solder balls, or balls that extend from a lower surface of a plastic (or other material) casing in any of several patterns and pitches. An external portion of the connective contacts is often finished with a ball or solder.
- With reference now to
FIG. 1 , shown is an apparatus for adding capacitance while conserving circuit board surface area. The apparatus includes amulti-layered flex circuit 10 used as a capacitor. In the embodiment shown,flex capacitor circuit 10 includes anupper surface 12 and alower surface 14 with six (6) intermediate conductive layers which except openings for vias, are solid planes. The six intermediate conductive layers include six (6) alternating power planes (i.e., three (3) “Power 1” planes 16 and three (3) “Power 2” planes 18) separated bydielectric layers 20. One set of power planes, e.g., the Power 1 planes 16, may be configured as a power supply layer, while the other set of power planes, e.g., the Power 2 planes 18, may be configured as a ground layer. Thedielectric layers 20 may be any of a variety of flexible dielectrics, such as Kapton.™. or C-Ply.™., both provided by 3M. As noted above, the conductive layers may be metal such as copper or alloy 110. - The
flex capacitor circuit 10 may be mounted between an IC device 22 (e.g., a CSP as described above) and the substrate orcircuit board 24 to which thedevice 22 would normally attach. Mounted as such, theflex capacitor circuit 10 increases the bypass capacitance of thedevice 22. Theflex capacitor circuit 10 does this by providing an electrical connection betweendevice 22 andcircuit board 24 power and ground leads and respective power and ground conductive layers (e.g., Power 1 plane(s) 16 and Power 2 plane(s) 18) in theflex capacitor circuit 10. Theflex capacitor circuit 10 also provides an electrical connection for a signal to pass through theflex capacitor circuit 10 from/to thedevice 22 to thecircuit board 24. - With continued reference to
FIG. 1 ,connective contacts 26 and connective contacts 28 (e.g., ball contacts) on theupper surface 12 andlower surface 14, respectively, offlex capacitor 10 provide electrical connections through mounting pads (not shown) and supply vias 30 to the conductive layers. Theconnective contacts 26 andconnective contacts 28 also provide the signal connection directly betweendevice 22 andcircuit board 24 through mounting pads and non-supply (i.e., signal) vias 32.Contacts device 22 andflex capacitor circuit 10, and betweenflex capacitor circuit 10 andcircuit board 24, as part of the mounting process.Device 22 may be mounted toupper surface 12 offlex capacitor circuit 10, whilelower surface 14 offlex capacitor circuit 10 may be mounted tocircuit board 24. An adhesive may used tobond device 22 to flexcapacitor circuit 10 andflex capacitor circuit 10 to thecircuit board 24. - As shown,
supply vias 30 and signal vias 32 extend throughflex capacitor circuit 10.Contacts vias device 22 andcircuit board 24 throughflex capacitor circuit 10. For example, in the cross-sectional view shown inFIG. 1 , there are two sets ofsupply vias 30 that connectcontacts flex capacitor circuit 10. In this manner,flex capacitor circuit 10 may provide a power supply connection, with added capacitance provided byflex capacitor circuit 10, betweencircuit board 24 anddevice 22. Thesupply vias 30 connecting to Power 1 planes 16 are the two outermost supply vias 30 (left-most and right-most) shown inFIG. 1 . Supply vias 30 that connect to Power 1 planes 16 do not connect with Power 2 planes, but instead pass throughopenings 34 in Power 2 planes 18. In this manner, thesevias 30 provide an electrical connection to Power 1 planes 16 but not Power 2 planes 18. - Similarly, there are two sets of
supply vias 30 that connect to Power 2 planes 18 (e.g., the ground conductive layers). Supply vias 30 connecting to Power 2 planes 18 may provide a ground connection fordevice 22. Supply vias 30 connecting to Power 2 planes 18 do not connect to Power 1 planes, but instead pass throughopenings 36 in Power 1 planes 16. Supply vias 30 connecting to Power 2 planes 18 are shown as supply vias 30 third from the left and third from the right inFIG. 1 . - With continuing reference to
FIG. 1 , the remaining vias aresignal vias 32. Signal vias 32 provide a signal connection betweendevice 22 andcircuit board 24, as described above. As shown, signal vias 32 do not connect to Power 1 planes 16 and Power 2 planes 18, but instead pass throughopenings - By providing power supply, ground and signal connections through
power supply vias 30 andvias 32,flex capacitor circuit 10 adds capacitance without taking up anyappreciable circuit board 24 surface area beyond that ofdevice 22 itself. The amount of capacitance provided byflex capacitor circuit 10 is a function of a number of variables, as those of skill in the art will recognize, including the surface area, the number of layers, the distance between layers, and the dielectric material offlex capacitor circuit 10. The greater the surface area offlex capacitor circuit 10, the greater the capacitance. The surface area may be increased by known techniques, such as dimpling, rough surface, etc., by extendingflex capacitor circuit 10 beyonddevice 22, or foldingflex capacitor circuit 10 overdevice 22, as described below. There typically is a direct, linear relationship between the surface area and the capacitance provided. - There is also a direct, linear relationship between the number of layers and the capacitance provided by
flex capacitor circuit 10. Hence, the greater number of layers, the more capacitance provided. Increasing the number of layers, however, also increases the inductance provided byflex capacitor circuit 10. Consequently, if too much inductance were a concern, aflex capacitor circuit 10 design may include greater surface area but fewer layers. - There is an inverse, linear relationship between the distance between conductive layers and the capacitance provided by
flex capacitor circuit 10. In other words, the smaller the distance between the layers, the greater capacitance provided. - On the other hand, there is a direct, linear relationship between the dielectric level of the dielectric material used for
dielectric layers 20 and the capacitance provided byflex capacitor circuit 10. In other words the higher the dielectric level of the dielectric material used in thedielectric layers 20, the greater the capacitance. Accordingly, aflex capacitor circuit 10 design might also incorporate a higher dielectric level material rather than increasing the number of layers in order to avoid increasing inductance. -
FIGS. 2A-2B depict an embodiment of an apparatus for adding capacitance while conserving circuit board surface area that includesfins 40.Fins 40 may be formed as extended portions offlex capacitor circuit 10. Consequently,fins 40 provide increased surface area forflex capacitor circuit 10. The increased surface area provided byfins 40 increases the capacitance provided byflex capacitor circuit 10. - As shown,
device 22 is mounted onflex capacitor circuit 10, which is itself mounted on substrate orcircuit board 24.Connective contacts device 22,flex capacitor circuit 10, andcircuit board 24, as described above. InFIGS. 2A-2B ,fins 40 are shown extended above and perpendicular todevice 22.Fins 40 may be folded around (over the top of)device 22 or left exposed (as shown) at any desired angle. An advantage of leavingfins 40 exposed as shown is that exposedfins 40 provide heat dissipation. - Another feature that can be incorporated with
flex capacitor circuit 10 is additional bulk capacitor mounting positions. Extended portions offlex capacitor circuit 10 that are folded over device 22 (or allowed to stand as fins 40) may provide a high-quality, close-proximity mounting for additional bulk capacitors. With reference now toFIGS. 3A-3B , shown is an embodiment of an apparatus for adding capacitance while conserving circuit board surface area that includesadditional capacitors 42. As shown,additional capacitors 42 are mounted onportions 44 offlex capacitor circuit 10 folded overdevice 22. - As shown, the
device 22 is mounted on theflex capacitor circuit 10, which is itself mounted on the substrate orcircuit board 24.Connective contacts device 22,flex capacitor circuit 10, andcircuit board 24, as described above.Folder portions 44 of theflex capacitor circuit 10 wrap around the upper surface of thedevice 22 andcapacitors 42 may be mounted on foldedportions 44. Foldedportions 44 may include mounting pads (not shown) for mountingcapacitors 42. The connections ofcapacitors 42 todevice 22 may also be ported in a fashion normal to standard die packaging procedures to insulate the connections. As shown inFIGS. 3A-3B ,flex capacitor circuit 10 may be incorporated withdevice 22 as a packaged die (e.g., a CSP).Flex capacitor circuit 10 may be easily employed in the manufacture of a packaged die, incorporating capacitance into a monolithic package.Surface mount capacitors 42 can be added to the package, as shown inFIGS. 3A-3B , to increase capacitance as desired. As an example, memory DIMMs utilizing inverted packages such as those shown here can take advantage of this packaging technology to meet overall package outline requirements with larger die sizes. - With reference to
FIGS. 4A-4B , shown is an embodiment of an apparatus for adding capacitance while conserving circuit board surface area that includesadditional capacitors 42 and aslug 46 for transferring heat. As above,additional capacitors 42 are mounted on the foldedportions 44 offlex capacitor circuit 10. In the embodiment shown, aslug 46 is also mounted on the package. Theslug 46 may be mounted, e.g., on large mounting pads (not shown) on foldedportions 44. The surface of foldedportions 44 facingdevice 22 could be plated for solder attachment and multiple vias used to transfer heat to theslug 46 mounted on the outer surface of foldedportions 44. Alternatively, a cutout or cutout window in foldedportions 44 could be provided to mountslug 46 directly todevice 22.Slug 46 may be metal or other heat-conductive material.Slug 46 may interface to a heat sink (not shown) mounted on top ofslug 46 or may itself be a heat sink. - With reference now to
FIG. 5 , shown is an embodiment of aflex capacitor circuit 10 that may be used in embodiments of an apparatus for adding capacitance while conserving circuit board surface area. Exemplary flex circuits are shown in the '992 patent discussed above and are known to those skilled in the art. Off-the-shelf flex circuits may be used. As shown, theflex capacitor circuit 10 includes mountingpads 50. The mountingpads 50 provide connections fromconnective contacts vias flex capacitor circuit 10, the power plane layers generally will not have traces, as these are not needed for the capacitance function. - As discussed above,
flex capacitor circuit 10 includes power plane layers separated by dielectric layers. The power plane layers may be metal layers that are solid planes with the exception of holes forvias flex capacitor circuit 10 inFIG. 1 includes six power plane layers. Generally,flex capacitor circuit 10 will have two or more power plane layers. - In certain embodiments, as discussed above,
flex capacitor circuit 10 is folded. Increasing the number of layers offlex capacitor circuit 10 may increase the difficulty of foldingflex capacitor circuit 10. There are techniques available for folding multiple-layered flex circuits. For example,flex capacitor circuit 10 may be thinned in the regions where it is folded. This may be done by removing layers or thinning the existing layers in the folding region. If necessary, additional layers may be added, or the layers thickened, in the portions offlex capacitor circuit 10 that extend beyond the folding region. Another technique for foldingflex capacitor circuit 10 involves folding only some portion of the layers. For example, ifflex capacitor circuit 10 included six layers, only two of the layers may extend beyond and be folded overdevice 22. - With reference now to
FIG. 6 , shown is a method 60 for adding capacitance while conserving circuit board surface area. Method 60 includes obtaining aflex capacitor circuit 10, block 62, such as described above with reference toFIGS. 1-5 . The obtaining step may comprise fabricating aflex capacitor circuit 10 with the characteristics described above. Adevice 22 may be mounted on theflex capacitor circuit 10. This mounting may include an adhesive, or other bonding material, being disposed on selected areas of an upper surface of theflex capacitor circuit 10, block 64, anddevice 22, such as a CSP, being placed on the upper surface of theflex capacitor circuit 10, block 66, creating an adhesive contact betweendevice 22 andflex capacitor circuit 10 and an electrical interconnection betweendevice 22 andflex capacitor circuit 10 through contacts 26 (e.g., contact balls disposed during mounting step), mountingpads 50 andvias flex capacitor circuit 10 includes an extended portion, the extended portion may be wrapped or folded arounddevice 22,block 68. The folded portion may be left exposed asfins 40 or folded completely overdevice 22 as discussed above. If folded overdevice 22, adhesive or other bonding material, may be disposed on an upper surface ofdevice 22, block 70, and the foldedportions 44 placed on the upper surface ofdevice 22, block 72, creating an adhesive contact between the upper surface ofdevice 22 and foldedportions 44. One or moreadditional capacitors 42 may be mounted on the foldedportions 44, block 74. Likewise, a slug or heat sink may be mounted on the foldedportions 44,block 76. - The entire package of
device 22 andflex capacitor circuit 10 may be mounted on acircuit board 24. For example, adhesive, or other bonding material, may be disposed on thecircuit board 24, block 78, and the package placed on thecircuit board 24, block 80, creating an adhesive contact betweenflex capacitor circuit 10 and thecircuit board 24 and an electrical interconnection betweendevice 22 andcircuit board 24 through flex capacitor circuit 10 (i.e., throughcontacts 26, 28 (e.g., contact balls disposed during mounting step), mountingpads 50 andvias 30, 32). - The terms and descriptions used herein are set forth by way of illustration only and are not meant as limitations. Those skilled in the art will recognize that many variations are possible within the spirit and scope of the invention as defined in the following claims, and their equivalents, in which all terms are to be understood in their broadest possible sense unless otherwise indicated.
Claims (6)
1. A method for adding capacitance while conserving circuit board surface area, comprising:
obtaining a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers, wherein the flex capacitor circuit is configured to provide bypass capacitance;
mounting an IC device on the upper surface of the flex capacitor circuit, wherein an electrical interconnection between the IC device and the flex capacitor circuit is created; and
mounting the flex capacitor circuit on a circuit board, wherein an electrical interconnection between the IC device and the circuit board through the flex capacitor circuit is created and capacitance is added to the IC device by the flex capacitor circuit.
2. The method of claim 1 , wherein mounting an IC device includes:
disposing a bonding material on selected areas of the upper surface of the flex capacitor circuit; and
placing the IC device onto the upper surface of the flex capacitor circuit, wherein a bonding contact between the upper surface and the IC device is created.
3. The method of claim 1 further comprising folding a portion of the flex capacitor circuit around the IC device.
4. The method of claim 3 further comprising disposing a bonding material on selected areas of an upper surface of the IC device, wherein a bonding contact between the upper surface of the IC device and the folded portion of the flex capacitor circuit is created.
5. The method of claim 3 further comprising mounting one or more capacitors onto the folded portion of the flex capacitor circuit.
6. The method of claim 3 further comprising mounting one or more slugs onto the folded portion of the flex capacitor circuit.
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US12/542,503 US20090300912A1 (en) | 2005-11-04 | 2009-08-17 | Flex Circuit Apparatus and Method for Adding Capacitance while Conserving Circuit Board Surface Area |
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US11/267,476 US7576995B2 (en) | 2005-11-04 | 2005-11-04 | Flex circuit apparatus and method for adding capacitance while conserving circuit board surface area |
US12/542,503 US20090300912A1 (en) | 2005-11-04 | 2009-08-17 | Flex Circuit Apparatus and Method for Adding Capacitance while Conserving Circuit Board Surface Area |
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US12/542,503 Abandoned US20090300912A1 (en) | 2005-11-04 | 2009-08-17 | Flex Circuit Apparatus and Method for Adding Capacitance while Conserving Circuit Board Surface Area |
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US20070103877A1 (en) | 2007-05-10 |
US7576995B2 (en) | 2009-08-18 |
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