US20100232085A1

US20100232085A1 - Electronic devices with floating metal rings

Info

Publication number: US20100232085A1
Application number: US12/402,589
Authority: US
Inventors: Yujen Wang
Original assignee: MediaTek Inc
Current assignee: MediaTek Inc
Priority date: 2009-03-12
Filing date: 2009-03-12
Publication date: 2010-09-16
Also published as: US20150131203A1; US9362052B2; US20120281337A1; US8971013B2; CN101834179A; TW201034038A

Abstract

A electronic device is provided. The electronic device comprises first and second electrodes and a first floating metal ring. The first and second electrodes are formed in a first layer. The first floating metal ring is formed in the first layer and encloses the first electrode and the second electrode. Thus, noise on a conducting line near the electronic device does not directly affect differential signals on the first and second electrodes.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention
The invention relates to an electronic device, and more particularly to a capacitor with a floating metal ring.
2. Description of the Related Art
Capacitors are essential passive elements in integrated circuits. In integrated circuits, differential signals on two electrodes of a capacitor are easily affected by nearby routed conducting lines. FIG. 1 shows a capacitor of symmetric metal-oxide-metal (MOM) structure. Electrodes E10 and E11 and an oxide layer therebetween form a capacitor CP1. If there is a conducting line L10 near the capacitor CP1, parasitic capacitors are formed between the conducting line L10 and the electrodes E10 and E11. FIG. 2 shows an equivalent circuit of the MOM structure and the conducting line L10. Referring to FIGS. 1 and 2, C10 represents the parasitic capacitor between the conducting line L10 and the electrode E10, and C11 represents the parasitic capacitor between the conducting line L10 and the electrode E11. Noise on the conducting line L10 directly affects the differential signals on the electrodes E10 and E11. Moreover, since the electrode E11 is farther away than the electrode E10 from the conducting line, the parasitic capacitor C11 is smaller than the parasitic capacitor C10, so that, the differential signals on the electrodes E10 and E11 suffer unequal effects from the conducting line L10.

BRIEF SUMMARY OF THE INVENTION

An exemplary embodiment of an electronic device comprises first and second electrodes and a first floating metal ring. The first and second electrodes are formed in a first layer. The first floating metal ring is formed in the first layer and encloses the first electrode and the second electrode. The first electrode and the second electrode are formed in an L-type shape, a ladder-type shape, a finger-type shape, a zipper-type shape, or a hook-type shape.
Another exemplary embodiment of an electronic device comprises first and second electrodes and a first floating metal ring. The first and second electrodes are formed in a first layer and are symmetrically disposed with respect to a first point. The first floating metal ring is formed in the first layer and encloses the first electrode and the second electrode. In some embodiments, the floating metal ring is symmetrically disposed with respect to the first point.
Another exemplary embodiment of an electronic device comprises first and second electrodes and a first floating metal ring. The first and second electrodes are formed in a first layer and are disposed in rotational symmetry with respect to a first symmetry point. The floating metal ring is formed in a first layer and encloses the first electrode and the second electrode. In some embodiments, the floating metal ring is disposed in rotational symmetry with respect to the first symmetry point.
Another exemplary embodiment of an electronic device comprises a first electrode, a second electrode, and a floating plate. The first and second electrodes are formed in a first layer. The floating plate is disposed under the first electrode and the second electrode. In some embodiments, the electronic device further comprises two walls disposed two sides of the electronic device.
A detailed description is given in the following embodiments with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

FIG. 1 shows a capacitor of symmetric metal-oxide-metal (MOM) structure;

FIG. 2 shows an equivalent circuit of the MOM structure and the nearby conducting line of FIG. 1;

FIG. 3 a shows an exemplary embodiment of a capacitor;

FIG. 3 b shows an exemplary embodiment of a capacitor;

FIG. 4 shows the capacitor of FIG. 3 a and a nearby conducting line;

FIG. 5 shows an equivalent circuit of the capacitor and the nearby conducting line of FIG. 4;

FIG. 6 shows an equivalent circuit transformed from the equivalent circuit of

FIG. 5 by Y-Δ transformation;

FIGS. 7 a and 7 b show the electrodes with zipper-type shapes in the capacitor of FIG. 3 a;

FIG. 7 c shows a woven structure formed by overlapping the electrodes with the zipper-type shapes of FIGS. 7 a and 7 b in two layers;

FIGS. 8 a and 8 b show the electrodes with hook-type shapes in the capacitor of FIG. 3 a;

FIG. 8 c shows another woven structure formed by overlapping the electrodes with the hook-type shapes of FIGS. 8 a and 8 b in two layers;

FIGS. 9 a and 9 b show the electrodes with L-type shapes in the capacitor of FIG. 3 a;

FIG. 9 c shows a woven structure formed by overlapping the electrodes with the L-type shapes of FIGS. 9 a and 9 b in two layers;

FIGS. 10 a and 10 b show the electrodes with ladder-type shapes in the capacitor of FIG. 3 a;

FIG. 10 c shows another woven structure formed by overlapping the electrodes with the ladder-type shapes of FIGS. 10 a and 10 b in two layers;

FIG. 11 shows an exemplary embodiment of a capacitor;

FIG. 12 shows an exemplary embodiment of the floating plate of the capacitor in FIG. 11; and

FIG. 13 shows an exemplary embodiment of a capacitor.

DETAILED DESCRIPTION OF THE INVENTION

The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.
Capacitors are provided. In an exemplary embodiment of a capacitor in FIG. 3 a, a capacitor CP3 comprises electrodes E30 and E31, an insulator (not shown), and a floating metal ring R30 a. The insulator can be oxide, so that the capacitor CP3 has a metal-oxide-metal (MOM) structure. In this embodiment, the electrodes E30 and E31, the insulation layer, and the floating metal ring R30 a are formed in the same layer. Referring to FIG. 3 a, each of the electrodes E30 and E31 has a finger-type shape, and the electrodes E30 and E31 are symmetrically disposed with respect to a point SP3. Fingers of the electrodes E30 and E31 extend toward the symmetry axis SA3 and are alternately disposed. The floating metal ring R30 a encloses the electrodes E30 and E31 and is symmetrically disposed with respect to the point SP3. Referring to FIG. 4, it is assumed that there is a conducting line L30 near the capacitor CP3. Due to the floating metal ring R30 a, noise on the conducting line L30 does not directly affect the differential signals on the electrodes E30 and E31.
FIG. 5 shows an equivalent circuit of the capacitor CP3 and the conducting line L30. A parasitic capacitor C30 is formed between the floating metal ring R30 a and the electrode E30, and a parasitic capacitor C31 is formed between the floating metal ring R30 a and the electrode E31. A parasitic capacitor C32 is formed between the conducting line L30 and the capacitor CP3. Since the electrodes E30 and E31 and the floating metal ring R30 a are symmetrically disposed with respect to the point SP3, the parasitic capacitors C30 and C31 between the floating metal ring R30 a and the electrodes E30 and E31 have the same capacitance, so that the differential signals on the electrodes E30 and E31 suffer equal effects from the conducting line L30.
In another aspect, the capacitance between the electrodes E30 and E31 can be increased due to the disposition of the floating metal ring R30 a. FIG. 6 shows an equivalent circuit transformed from the equivalent circuit in FIG. 5 by Y-Δ transformation. Capacitors C60-C62 in FIG. 6 are formed according to the capacitors C30-C32 in FIG. 5, and shown in following equations:
$c 60 = c 61 = \frac{c 32 \times c 30}{c 32 + 2 c 30} = \frac{c 32}{\frac{c 32}{c 30} + 2} < \frac{c 32}{2}, and$ $c 62 = \frac{c 30^{2}}{c 32 + 2 c 30} = \frac{c 30}{\frac{c 32}{c 30} + 2} < \frac{c 30}{2},$
wherein, c30-c32 and c60-c62 represent the capacitance of the capacitance capacitors C30-C32 and C60-C62, respectively.
According to above equations, since the capacitor CP3 and C62 are coupled in parallel, the capacitance between the electrodes E30 and E31 is increased from cp3 to cp3+c62, wherein cp3 represents the capacitance of the capacitor CP3. Moreover, the values c60 and c61 of the parasitic capacitors C60 and C61 between the conducting line L30 and the electrodes E30 and E31 are equal, and each of the values c60 and c61 is less than c32/2, so that the differential signals on the electrodes E30 and E31 suffer equal effects from the conducting line L30, and the effects on the differential signals are weak.
In the embodiment of FIG. 3 a, the floating metal ring R30 a strictly encloses the electrodes E30 and E31. In some embodiments, a floating metal ring R30 b has a breaking 301, so that the floating metal ring R30 b does not strictly enclose the electrodes E30 and E31. Moreover, the floating metal ring R30 b is symmetrically disposed with respect to a symmetry axis SA3.
In the embodiment of FIG. 3 a, the capacitor CP3 is formed by a single layer with the electrodes E30 and E31, the insulator, and the floating metal ring R30 a. In other embodiments, the capacitor CP3 can be form by a plurality of layers with electrodes. Each of the layers comprises electrodes E30 and E31 and the insulator, and at least one layer comprises the floating metal ring R30 a. Referring to FIG. 3 a, the electrodes E30 and E31 with the finger-type shape are symmetrically disposed with respect to the point SP3. However, the shapes of the electrodes E30 and E31 are not limited to the finger-type shape. The electrodes E30 and E31 can have any shape to be symmetrically disposed with respect to the point SP3.
In some embodiments, the electrodes E30 and E31 can be disposed in rotational symmetry with respect to a symmetry point. For example, the electrodes E30 and E31 of the capacitor CP3 can have zipper-type shapes as shown in FIGS. 7 a and 7 b or hook-type shapes as shown in FIGS. 8 a and 8 b. The electrodes E30 and E31 with the zipper-type shapes in FIGS. 7 a and 7 b are respectively disposed in rotational symmetry with respect to symmetry points SP7 a and SP7 b. The electrodes E30 and E31 with the hook-type shapes in FIGS. 8 a and 8 b are respectively disposed in rotational symmetry with respect to symmetry points SP8 a and SP8 b. If the capacitor CP3 is formed by electrodes in a plurality of layers, each of the layers comprises electrodes E30 and E31 with the zipper-type shape or the hook-type shape and the insulator, and at least one layer comprises the floating metal ring R30 a. In following, it is assumed that the capacitor CP3 is formed by electrodes in two layers. When the electrodes E30 and E31 of one layer have the zipper-type shape as in FIG. 7 a and those of the other layer have the zipper-type shape as in FIG. 7 b, the capacitor CP3 is formed in a woven structure by overlapping the two layers, as shown in FIG. 7 c. Similarly, when the electrodes E30 and E31 of one layer have the hook-type shape as in FIG. 8 a and those of the other layer have the hook-type shape as in FIG. 8 b, the capacitor CP3 is formed in a woven structure, as shown in FIG. 8 c, by overlapping the two layers. Moreover, according to symmetric geometry, the electrodes E30 and E31 with the figure-type shape and the floating metal ring R30 a as in FIG. 3 a are also disposed in rotational symmetry with respect to a symmetry point SP3. In FIGS. 7 c and 8 c, two layers of a capacitor are coupled together through vias represented by dark blocks.
According to above description, electrodes in one layer of a capacitor are disposed in rotational symmetry with respect to a symmetry point, and a floating metal ring in the same layer encloses the electrodes. Noise on a nearby conducting line does not directly affect differential signals on the electrodes. The differential signals suffer equal effects from the conducting line, and the effects on the differential signals are weak.
In other some embodiments, the electrodes E30 and E31 can be disposed in asymmetry. For example, the electrodes E30 and E31 of the capacitor CP3 can have L-type shapes as shown in FIGS. 9 a and 9 b or ladder-type shapes as shown in FIGS. 10 a and 10 b. If the capacitor CP3 is formed by electrodes in a plurality of layers, each of the two layers comprises electrodes E30 and E31 with the L-type shape or the ladder-type shape and the insulator, and at least one layer comprises the floating metal ring R30 a. In following, it is assumed that the capacitor CP3 is formed by electrodes in two layers. When the electrodes E30 and E31 of one layer have the L-type shape as in FIG. 9 a and those of the other layer have the L-type shape as in FIG. 9 b, the capacitor CP3 is formed in a woven structure by overlapping the two layers, as shown in FIG. 9 c. Similarly, when the electrodes E30 and E31 of one layer have the ladder-type shape as in FIG. 10 a and those of the other layer have the ladder-type shape as in FIG. 10 b, the capacitor CP3 is formed in a woven structure, as shown in FIG. 10 c, by overlapping the two layers. In FIGS. 9 c and 10 c, two layers of a capacitor are coupled together through vias represented by solid blocks.
According to the above description, a capacitor comprises two electrodes disposed in asymmetry and two connected floating metal rings, each enclosing the electrode in the same layer, so that noise on a nearby conducting line does not directly affect differential signals on the electrodes.
In another embodiment of a capacitor in FIG. 11, a capacitor CP11 comprises electrodes E110 and E111, an insulator (not shown), and a floating plate 110. The electrodes E110 and E111 can have a symmetric shape, such as the sharps of FIGS. 3 a, 7 a, 7 b, 8 a, and 8 b. The floating plate 110 is disposed under the electrodes E110 and E111. A parasitic capacitor is formed between the floating plate 110 and the electrode E110, and another parasitic capacitor is formed between the floating plate 110 and the electrode E111. Since the electrodes E110 and E111 have the symmetric shape, these parasitic capacitors between the floating plate 110 and the electrodes E110 and E111 have the same capacitance, so that the differential signals on the electrodes E110 and E111 suffer equal effects from the conducting line L110. Thus, the floating plate 110 can shield against imbalance capacitance effect between the line L110 and the electrodes E110 and E111.
In the embodiment of FIG. 11, the surface of the floating plate 110 is smooth. In some embodiments, the floating plate 110 can have trenches or slices or other kinds of holds. The floating plate 110 with trenches in FIG. 12 is given as an example.
Moreover, the capacitor CP11 of FIG. 11 may further comprise walls. As shown in FIG. 13, the capacitor CP11 further comprises walls W30 and W31 which are disposed two sides of the capacitor CP11. In this embodiment, the walls W30 and W31 are disposed the two opposite sides of the capacitor CP11. One wall W30 is formed by an upper conductive line 130 and lower conductive lines 132, and the upper conductive line 130 is connected with the lower conductive lines 132. There are holds formed between the lower conductive lines 132 the upper conductive line 130, and the corresponding side of the capacitor CP11. The other wall W31 is formed by an upper conductive line 132 and lower conductive lines 133, and the upper conductive line 132 is connected with lower the conductive lines 133. There are holds formed between the lower conductive lines 133, the upper conductive line 132, and the corresponding side of the capacitor CP11. The walls W30 and W31 and the floating plate 110 can shield against imbalance capacitance effect between the line L130 and the electrodes E110 and E111.
The floating metal rings, the floating plate, and the walls which are provided to shield against imbalance capacitance are not limited to a capacitor element. In some embodiments, the floating metal rings, the floating plate, and the walls can be used to shield against imbalance capacitance occurred in a resistor element or any other circuit, such as an amplifier circuit.
While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.

Claims

1. An electronic device comprising:

a first electrode formed in a first layer;

a second electrode formed in the first layer; and

a first floating metal ring formed in the first layer and enclosing the first electrode and the second electrode.

2. The electronic device as claimed in claim 1, wherein the first electrode and the second electrode are formed in an L-type shape, a ladder-type shape, a figure-type shape, a zipper-type shape, or a hook-type shape.

3. The electronic device as claimed in claim 1 further comprising:

a third electrode formed in a second layer; and

a fourth electrode formed in the second layer.

4. The electronic device as claimed in claim 3 further comprising:

a second floating metal ring formed in the second layer and enclosing the third electrode and the fourth electrode.

5. The electronic device as claimed in claim 3, wherein the first and the second electrodes in the first layer overlap the third and fourth electrodes in the second layer to form a woven structure.

6. The electronic device as claimed in claim 1, wherein the floating metal ring has a breaking.

7. The electronic device as claimed in claim 6, wherein the floating metal ring is symmetrically disposed with respect to a symmetry axis.

8. An electronic device comprising:

a first electrode formed in a first layer;

a second electrode formed in the first layer, wherein the first electrode and the second electrode are symmetrically disposed with respect to a first point; and

9. The electronic device as claimed in claim 8, wherein the floating metal ring is symmetrically disposed with respect to the first point.

10. The electronic device as claimed in claim 8, wherein the first electrode and the second electrode are formed in a figure-type shape.

11. The electronic device as claimed in claim 10, wherein figures of the first and second electrodes extend toward the symmetry axis

12. The electronic device as claimed in claim 11, wherein the figures of the first and second electrodes are alternately disposed.

13. The electronic device as claimed in claim 8 further comprising:

a third electrode formed in a second layer; and

a fourth electrode formed in the second layer.

14. The electronic device as claimed in claim 13 further comprising:

15. The electronic device as claimed in claim 14, wherein the third electrode and the fourth electrode are symmetrically disposed with respect to a second point, and the second floating metal ring is symmetrically disposed with respect to the second point.

16. The electronic device as claimed in claim 13, wherein the first and the second electrodes in the first layer overlap the third and fourth electrodes in the second layer to form a woven structure.

17. An electronic device comprising

a first electrode formed in a first layer

a second electrode formed in a first layer, wherein the first electrode and the second electrode are disposed in rotational symmetry with respect to a first symmetry point; and

a floating metal ring formed in a first layer and enclosing the first electrode and the second electrode.

18. The electronic device as claimed in claim 17, wherein the floating metal ring is in rotational symmetry with respect to the first symmetry point.

19. The electronic device as claimed in claim 17, wherein the first electrode and the second electrode are formed in a figure-type shape, a zipper-type shape, or a hook-type shape.

20. The electronic device as claimed in claim 17 further comprising:

a third electrode formed in a second layer; and

a fourth electrode formed in the second layer.

21. The electronic device as claimed in claim 20 further comprising:

22. The electronic device as claimed in claim 21, wherein the third electrode and the fourth electrode are disposed in rotational symmetry with respect to a second symmetry point, and the second floating metal ring is disposed in rotational symmetry with respect to the second symmetry point.

23. The electronic device as claimed in claim 20, wherein the first and the second electrodes in the first layer overlap the third and fourth electrodes in the second layer to form a woven structure.

24. An electronic device comprising:

a first electrode formed in a first layer;

a second electrode formed in the first layer; and

a floating plate disposed under the first electrode and the second electrode.

25. The electronic device as claimed in claim 24, wherein first electrode and the second electrode are formed in an L-type shape, a ladder-type shape, a figure-type shape, a zipper-type shape, or a hook-type shape.

26. The electronic device as claimed in claim 24, wherein the surface of the floating plate is smooth.

27. The electronic device as claimed in claim 24, wherein the floating plate has trenches or slices or other kinds of holds.

28. The electronic device as claimed in claim 24 further comprising two walls disposed two sides of the electronic device.

29. The electronic device as claimed in claim 28, wherein the two walls are disposed two opposite sides of the electronic device.

30. The electronic device as claimed in claim 28, wherein each of the walls is formed by an upper conductive line and a plurality of lower conductive lines, and the upper conductive line is connected with the conductive lines.

31. The electronic device as claimed in claim 30, wherein for each of the walls, there are holds formed between the lower conductive lines, the upper conductive line, and the corresponding side of the electronic device.