US20110298435A1 - Apparatus and method for voltage distribution - Google Patents

Apparatus and method for voltage distribution Download PDF

Info

Publication number
US20110298435A1
US20110298435A1 US12/844,320 US84432010A US2011298435A1 US 20110298435 A1 US20110298435 A1 US 20110298435A1 US 84432010 A US84432010 A US 84432010A US 2011298435 A1 US2011298435 A1 US 2011298435A1
Authority
US
United States
Prior art keywords
voltage
regulated
voltages
power
variable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/844,320
Inventor
David K. Homol
Ryan M. Pratt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Skyworks Solutions Inc
Original Assignee
Skyworks Solutions Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Skyworks Solutions Inc filed Critical Skyworks Solutions Inc
Priority to US12/844,320 priority Critical patent/US20110298435A1/en
Assigned to SKYWORKS SOLUTIONS, INC. reassignment SKYWORKS SOLUTIONS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HOMOL, DAVID K., PRATT, RYAN M.
Priority to PCT/US2011/039330 priority patent/WO2011156290A2/en
Publication of US20110298435A1 publication Critical patent/US20110298435A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/468—Regulating voltage or current wherein the variable actually regulated by the final control device is dc characterised by reference voltage circuitry, e.g. soft start, remote shutdown
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0928—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising both N- and P- wells in the substrate, e.g. twin-tub
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3036—Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers
    • H03G3/3042—Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers in modulators, frequency-changers, transmitters or power amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/28—Impedance matching networks
    • H03H11/30—Automatic matching of source impedance to load impedance
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/18—Indexing scheme relating to amplifiers the bias of the gate of a FET being controlled by a control signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/411—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising two power stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21131—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers the input bias voltage of a power amplifier being controlled, e.g. by a potentiometer or an emitter follower
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21139—An impedance adaptation circuit being added at the output of a power amplifier stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H03F2203/7215—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by a switch at the input of the amplifier

Definitions

  • the disclosed technology relates to electronic systems and, in particular, to voltage regulation in electronic systems.
  • Voltage regulators are electronic systems that can be used to maintain constant voltage levels. Typically, electronic voltage regulators compare an output voltage to a fixed, internal reference voltage. Differences between the output voltage and the fixed, internal reference voltage can create a negative feedback loop to reduce the voltage error.
  • Certain applications can require multiple accurate regulated voltages.
  • certain electronic systems require multiple accurate voltages to bias power amplifiers.
  • RF power amplifiers can be used to boost the power of an RF signal having a relatively low power based on a bias voltage. Thereafter, the boosted RF signal can be used for a variety of purposes, including driving the antenna of a transmitter.
  • Such voltage regulators can be included in a variety of electronic devices, such as devices with wireless communication functionalities, to provide accurate regulated voltages.
  • TDMA time division multiple access
  • GSM Global System for Mobile Communications
  • CDMA code division multiple access
  • W-CDMA wideband code division multiple access
  • a voltage regulator can be used to bias power amplifiers that can be used to shift power envelopes up and down within prescribed limits of power versus time.
  • the amplification of a RF signal can be managed and controlled, as a particular mobile phone can be assigned a transmission time slot for a particular frequency channel.
  • Voltage regulators can be employed to aid in regulating the power level of the RF signal over time, so as to prevent signal interference from transmission during an assigned receive time slot and/or to reduce power consumption.
  • One aspect of the disclosure is an apparatus that includes a voltage regulator and a variable voltage distribution circuit.
  • the voltage regulator can receive a reference voltage, a feedback signal, and a power supply voltage. Based on the received voltages, the voltage regulator can generate a regulated voltage.
  • the variable voltage distribution circuit can receive the regulated voltage from the voltage regulator and generate a plurality of variable regulated voltages and the feedback signal.
  • the variable voltage distribution circuit includes a voltage distribution circuit that can provide a plurality of regulated voltages from one regulated voltage in response to one or more distribution control signals.
  • the variable voltage distribution circuit also includes one or more variable voltage control elements that can selectively control at least one of the plurality of variable regulated output voltages in response to one or more variable voltage control signals.
  • the voltage regulator is a low-dropout regulator.
  • the voltage distribution circuit includes a transmission gate voltage distribution network.
  • at least one of the one or more variable voltage control elements includes an element configured to vary resistance.
  • one or more of the plurality of variable regulated voltages are electrically connected to one or more power amplifier bias reference input nodes.
  • the variable voltage distribution circuit includes one or more complementary metal oxide semiconductor circuit elements.
  • the one or more voltage distribution control signals can represent a plurality of power modes.
  • the feedback signal is provided by a feedback loop that includes the distribution circuit.
  • the voltage distribution circuit provides at least one of the plurality of regulated voltages to the one or more variable voltage control elements.
  • the apparatus includes a mobile device.
  • Another aspect of the disclosure is a method of controlling regulated voltages.
  • the method includes receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage and the power supply voltage; generating a plurality of regulated voltages from the reference voltage using a voltage distribution circuit; and controlling one or more of the regulated voltages using one or more variable voltage control elements to provide one or more variable regulated voltages.
  • the method further includes providing one or more variable regulated voltages to one or more power amplifiers.
  • a first die can include at least one variable voltage control element and a second die can include at least one of the one or more power amplifiers. Additionally, the first die and the second die can be formed using different process technologies.
  • generating the regulated voltage is based on a feedback signal provided by the voltage distribution circuit. In certain implementations, two or more of the plurality of regulated voltages are generated concurrently. In accordance with a number of implementations, the method further includes receiving one or more variable voltage control signals and using at least one of the one or more variable voltage control signals to provide different variable regulated voltage levels corresponding to different power modes. In certain implementations, the method further includes receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to different loads for different power modes.
  • the method further includes receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to loads in datapaths configured to generate signals in different frequency bands.
  • the one or more variable voltage control elements receive the plurality of regulated voltages from the voltage distribution circuit.
  • Another aspect of the disclosure is an apparatus that includes means for generating a regulated voltage based on a reference voltage, a feedback signal, and a power supply voltage.
  • the apparatus also includes means for generating a plurality of variable regulated voltages and the feedback signal based on the regulated voltage.
  • Yet another aspect of the disclosure is a computer-readable storage medium including instructions that when executed perform a method of: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage, the power supply voltage, and a feedback loop that includes at least a portion of a voltage distribution circuit; generating a plurality of regulated voltages from the reference voltage using the voltage distribution circuit, controlling one or more of the regulated voltages using one or more variable voltage control elements to provide one or more variable regulated voltages.
  • One more aspect of the disclosure is an apparatus that includes a voltage regulator and a variable voltage circuit.
  • the voltage regulator can receive a reference voltage and a power supply voltage, and generate a regulated voltage based at least in part on the reference voltage and the power supply voltage.
  • the variable voltage circuit can receive the regulated voltage from the voltage regulator and generate at least one variable regulated voltage.
  • the variable voltage distribution circuit can receive the regulated voltage from the voltage regulator and generate at least one variable regulated voltage.
  • the variable voltage distribution circuit includes one or more variable voltage control elements that can selectively control the at least one variable regulated output voltage in response to one or more variable voltage control signals
  • the voltage regulator includes a low-dropout regulator.
  • at least one of the one or more variable voltage control elements includes a field effect transistor.
  • the apparatus includes a complementary metal oxide semiconductor integrated circuit that includes at least one of the one or more variable voltage control elements.
  • the variable voltage circuit provides a bias voltage to one or more power amplifiers on a separate integrated circuit.
  • the separate integrated circuit can include a circuit element formed with a different process technology than the variable voltage circuit.
  • the separate integrated circuit can include a GaAs die and the variable voltage circuit can include at least one complementary metal oxide semiconductor circuit element.
  • one of the at least one variable regulated voltages is electrically connected to one or more current mirrors.
  • the apparatus includes a mobile device.
  • Yet another aspect of the disclosure is a method that includes: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage and the power supply voltage; and controlling the regulated voltage using one or more variable voltage control elements to provide a variable regulated voltages.
  • the method further includes providing the variable regulated voltages to one or more power amplifiers.
  • a first die can include at least one variable voltage control element and a second die includes at least one of the one or more power amplifiers.
  • the first die and the second die can be formed using different process technologies.
  • the method further includes receiving one or more variable voltage control signals and adjusting the variable regulated voltage based on a power mode of the load receiving the variable regulated voltage in response to at least one of the one or more variable voltage control signals.
  • Another aspect of the disclosure is an apparatus that includes means for generating a regulated voltage based on a reference voltage and a power supply voltage.
  • the apparatus also includes means for generating a variable regulated voltage from the regulated voltage.
  • One more aspect of the disclosure is a computer-readable storage medium including instructions that when executed perform a method of: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage and the power supply voltage; controlling the regulated voltages using one or more variable voltage control elements to provide a variable regulated voltages.
  • Yet another aspect of the disclosure is an apparatus that includes a voltage regulator that can receive a reference voltage, a feedback signal, and a power supply voltage, and generate based at least in part on the received voltages a regulated voltage.
  • the apparatus also includes a voltage distribution circuit that can receive the regulated voltage from the voltage regulator and generate a plurality of regulated voltages voltage in response to one or more distribution control signals.
  • the voltage regulator includes a low-dropout regulator.
  • the voltage distribution circuit includes a transmission gate voltage distribution network.
  • the voltage distribution circuit includes a transmission gate voltage distribution network.
  • one or more of the plurality of regulated voltages are electrically connected to one or more power amplifier bias reference input nodes.
  • the voltage distribution circuit includes one or more silicon complementary metal oxide semiconductor circuit elements and at least one of the one or more power amplifiers includes a different process technology.
  • the one or more voltage distribution control signals can represent a plurality of power modes.
  • the feedback signal is provided by a feedback loop that includes the distribution circuit.
  • the apparatus includes a mobile device.
  • One more aspect of the disclosure is a method that includes: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage and the power supply voltage; and generating a plurality of regulated voltages from the reference voltage using a voltage distribution circuit.
  • the method further includes providing one or more regulated voltages to one or more power amplifiers.
  • a first die can include at least a portion of the voltage distribution circuit and a second die can include at least one of the one or more power amplifiers.
  • the first die and the second die can be formed using different process technologies.
  • generating the regulated voltage is based on a feedback signal provided by the voltage distribution circuit. In accordance with various implementations, two or more of the plurality of regulated voltages are generated concurrently.
  • the method further includes receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to different loads based on power modes of the loads.
  • the method further includes receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to loads in data paths configured to generate signals in different frequency bands.
  • Yet another aspect of the disclosure is an apparatus that includes means for generating a regulated voltage based on a reference voltage, a feedback signal, and a power supply voltage.
  • the apparatus also includes means for generating a plurality of regulated voltages and the feedback signal based on the regulated voltage.
  • Yet another aspect of the disclosure is a computer-readable storage medium including instructions that when executed perform a method of: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage, the power supply voltage, and a feedback loop that includes at least a portion of a voltage distribution circuit; and generating a plurality of regulated voltages from the reference voltage using the voltage distribution circuit.
  • FIG. 1 schematically depicts a power amplifier module for amplifying a radio frequency (RF) signal.
  • RF radio frequency
  • FIG. 2 schematically depicts an example wireless device that can have one or more of the power amplifier modules of FIG. 1 configured to provide one or more functionalities as described herein.
  • FIGS. 3A and 3B show example system architectures that can be implemented in the wireless device of FIG. 2 .
  • FIGS. 4A and 4B schematically depict an example of how an RF signal to a power amplifier can be switched ON or OFF.
  • FIG. 5 shows that in certain embodiments, the switch depicted in FIGS. 4A and 4B can be formed as a triple-well CMOS device.
  • FIG. 6 shows an example configuration for operating the triple-well CMOS switch of FIG. 5 .
  • FIG. 7 is a block diagram of a circuit for distributing voltages from a single voltage regulator to a plurality of power amplifiers according to one embodiment.
  • FIGS. 8A-8C illustrate block diagrams for distributing regulated voltages from a single low-dropout regulator according to certain embodiments.
  • FIG. 9 illustrates an embodiment of a low-dropout regulator circuit.
  • FIG. 10 is a block diagram of a circuit for providing a variable voltage from a voltage regulator a plurality of power amplifiers according to one embodiment.
  • FIG. 11 is a block diagram for generating a variable voltage from a single low-dropout regulator according to one embodiment.
  • FIG. 12 is a block diagram of a circuit for distributing variable, regulated voltages from a single voltage regulator according to one embodiment.
  • FIG. 13 is a block diagram for distributing variable voltages from a single low-dropout regulator according to one embodiment.
  • FIG. 14A shows a process of providing a plurality of regulated voltages from a single regulated voltage.
  • FIG. 14B shows a process of providing a variable regulated voltage from a single regulated voltage.
  • FIG. 14C shows a process of providing a plurality of variable regulated voltages from a single regulated voltage.
  • FIG. 15 illustrates an electronic system that includes a variable voltage distribution function according to one embodiment.
  • FIG. 1 schematically depicts a power amplifier module (PAM) 10 that can be configured to achieve such an amplification of the RF signal so as to yield an output RF signal.
  • the power amplifier module can include one or more power amplifiers (PA).
  • FIG. 2 schematically depicts a device 11 , such as a wireless device, for which one or more power amplifiers controlled by one or more features of the present disclosure can be implemented.
  • the example wireless device 11 depicted in FIG. 2 can represent a multi-band and/or multi-mode device such as a multi-band/multi-mode mobile phone.
  • GSM Global System for Mobile
  • GSM mode mobile phones can operate at one or more of four frequency bands: 850 MHz (approximately 824-849 MHz for Tx, 869-894 MHz for Rx), 900 MHz (approximately 880-915 MHz for Tx, 925-960 MHz for Rx), 1800 MHz (approximately 1710-1785 MHz for Tx, 1805-1880 MHz for Rx), 1900 MHz (approximately 1850-1910 MHz for Tx, 1930-1990 MHz for Rx). Variations and/or regional/national implementations of the GSM bands are also utilized in different parts of the world.
  • CDMA Code division multiple access
  • One or more features of the present disclosure can be implemented in the foregoing example modes and/or bands, and in other communication standards.
  • 3G and 4G are non-limiting examples of such standards.
  • the wireless device 11 can include a transceiver component 13 configured to generate RF signals for transmission via an antenna 14 , and receive incoming RF signals from the antenna 14 .
  • a transceiver component 13 configured to generate RF signals for transmission via an antenna 14 , and receive incoming RF signals from the antenna 14 .
  • various functionalities associated with the transmission and receiving of RF signals can be achieved by one or more components that are collectively represented in FIG. 2 as the transceiver 13 .
  • a single component can be configured to provide both transmitting and receiving functionalities.
  • transmitting and receiving functionalities can be provided by separate components.
  • various antenna functionalities associated with the transmission and receiving of RF signals can be achieved by one or more components that are collectively represented in FIG. 2 as the antenna 14 .
  • a single antenna can be configured to provide both transmitting and receiving functionalities.
  • transmitting and receiving functionalities can be provided by separate antennas.
  • different bands associated with the wireless device 11 can be provided with one or more antennas.
  • one or more output signals from the transceiver 13 are depicted as being provided to the antenna 14 via one or more transmission paths 15 .
  • different transmission paths 15 can represent output paths associated with different bands and/or different power outputs.
  • two example power amplifiers 17 shown can represent amplifications associated with different power output configurations (e.g., low power output and high power output), and/or amplifications associated with different bands.
  • one or more detected signals from the antenna 14 are depicted as being provided to the transceiver 13 via one or more receiving paths 16 .
  • different receiving paths 16 can represent paths associated with different bands.
  • the four example paths 16 shown can represent quad-band capability that some wireless devices are provided with.
  • FIG. 2 shows that in certain embodiments, a switching component 12 can be provided, and such a component can be configured to provide a number of switching functionalities associated with an operation of the wireless device 11 .
  • the switching component 12 can include a number of switches configured to provide functionalities associated with, for example, switching between different bands, switching between different power modes, switching between transmission and receiving modes, or some combination thereof. Various non-limiting examples of such switches are described herein in greater detail.
  • FIG. 2 shows that in certain embodiments, a control component 18 can be provided, and such a component can be configured to provide various control functionalities associated with operations of the switching component 12 , the power amplifiers 17 , and/or other operating component(s).
  • a control component 18 can be provided, and such a component can be configured to provide various control functionalities associated with operations of the switching component 12 , the power amplifiers 17 , and/or other operating component(s).
  • Non-limiting examples of the control component 18 are described herein in greater detail.
  • FIG. 2 shows that in certain embodiments, a processor 20 can be configured to facilitate implementation of various processes described herein.
  • a processor 20 can be configured to facilitate implementation of various processes described herein.
  • embodiments of the present disclosure may also be described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, may be implemented by computer program instructions.
  • These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the acts specified in the flowchart and/or block diagram block or blocks.
  • these computer program instructions may also be stored in a computer-readable memory ( 19 in FIG. 2 ) that can direct a computer or other programmable data processing apparatus to operate in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the acts specified in the flowchart and/or block diagram block or blocks.
  • the computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operations to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions that execute on the computer or other programmable apparatus provide steps for implementing the acts specified in the flowchart and/or block diagram block or blocks.
  • FIGS. 3A and 3B show non-limiting examples of system architectures that can include one or more features of the present disclosure.
  • the example architectures are depicted with two RF bands; however, it will be understood that other numbers of RF bands are also possible.
  • system architectures having similar functionalities can be implemented in configurations having more than two bands (e.g., quad-band) or a single-band configuration.
  • a first RF input indicated as “LB IN” and corresponding to a first band can be amplified by one or more power amplifiers disposed and/or formed on a die 24 a .
  • Such amplified output RF signal is indicated as “LB OUT,” and can be subjected to impedance matching (e.g., to approximately 50 ⁇ ) by a component depicted as 30 a .
  • a second RF input indicated as “HB IN” and corresponding to a second band can be amplified by one or more power amplifiers disposed and/or formed on a die 24 b .
  • Such amplified output RF signal is indicated as “HB OUT,” and can be subjected to impedance matching by a component depicted as 30 b (e.g., to approximately 50 ⁇ ).
  • amplification for a given RF band can include two or more amplification modes.
  • the RF input LB IN can be routed to a high power amplification mode or a low/medium power amplification mode via a switch depicted as 32 a .
  • the switch 32 a is set for the high power mode, the RF signal can undergo amplification by one or more power amplifiers (e.g., by staged amplifiers 29 a and 29 b ) so as to yield a high power output.
  • the switch 32 a is set for the low/medium power mode, the RF signal can undergo amplification by one or more power amplifiers.
  • the switch 32 a need not be employed.
  • the input impedance of the staged amplifiers 29 a and 30 a can be substantially matched, and the RF input LB IN can be provided to both staged amplifiers 29 a and 30 a.
  • a low power mode can be achieved by utilizing a power amplifier 30 a ; and a medium power mode can be achieved by amplifying the RF signal in stages by the power amplifier 30 a and a second power amplifier 30 b .
  • Examples of switching and routing of the RF signals to allow selection of the low, medium and high power operating modes are described herein in greater detail.
  • the low/medium amplified output RF signal can be subjected to impedance matching by a component depicted as 31 a prior to being output in a manner similar to that of the high power output signal.
  • the RF input HB IN can be routed to a high power amplification mode or a low/medium power amplification mode via a switch depicted as 32 b . If the switch 32 b is set for the high power mode, the RF signal can undergo amplification by one or more power amplifiers (e.g., by staged amplifiers 29 c and 29 d ) so as to yield a high power output.
  • the switch 32 b is set for the high power mode
  • the RF signal can undergo amplification by one or more power amplifiers (e.g., by staged amplifiers 29 c and 29 d ) so as to yield a high power output.
  • the RF signal can undergo amplification by one or more power amplifiers.
  • a low power mode can be achieved by utilizing a power amplifier 30 c ; and a medium power mode can be achieved by amplifying the RF signal in stages by the power amplifier 30 c and a second power amplifier 30 d . Examples of switching and routing of the RF signals to allow selection of the low, medium and high power operating modes are described herein in greater detail.
  • the low/medium amplified output RF signal can be subjected to impedance matching by a component depicted as 31 b prior to being output in a manner similar to that of the high power output signal.
  • operation of the low and medium power modes can be facilitated by switch assemblies 27 a , 28 a (for the low band) and 27 b , 28 b (for the high band).
  • the switch 28 a can be closed, and the switch 32 a can be in a state that routes the LB IN signal to the power amplifier 30 a .
  • a connecting switch (depicted as the upper one in the switch assembly 27 a ) can be closed and a bypass switch (depicted as the lower one) can be opened, such that the power amplifiers 30 a and 30 b amplify the LB IN signal in stages to yield the medium power output.
  • the connecting switch of the switch assembly 27 a can be opened and the bypass switch of the switch assembly 27 a can be closed, such that the LB IN signal is amplified by the power amplifier 30 a by bypasses the power amplifier 30 b so as to yield the low power output. Operation of low or medium power mode for the high band can be achieved in a similar manner utilizing the switch assemblies 27 b and 28 b.
  • various switches are depicted as being part of a die 23 .
  • the die 23 can also include a power amplifier bias control component 25 .
  • the PA bias control component 25 is depicted as controlling the example PAs ( 29 a , 29 b , 30 a , 30 b of the low band portion, and 29 c , 29 d , 30 c , 30 d of the high band portion) via bias control lines depicted as 33 a and 33 b .
  • the PA bias control component 25 can be provided with one or more input control signals 26 so as to facilitate one or more functionalities associated with various PAs as described herein.
  • various switches and power amplifiers associated with the dies depicted as 24 a , 24 b can be fabricated on substrates such as gallium arsenide (GaAs) utilizing devices such as pseudomorphic high electron mobility transistors (pHEMT) or bipolar field effect transistors (BiFET).
  • GaAs gallium arsenide
  • pHEMT pseudomorphic high electron mobility transistors
  • BiFET bipolar field effect transistors
  • the dies depicted as 24 a , 24 b in FIG. 3A can be formed on the same GaAs substrate, or on separate GaAs substrates.
  • functionalities associated with the dies depicted as 24 a , 24 b can be formed on a single die, or on separate dies.
  • various switches e.g., 27 a , 27 b , 28 a , 28 b
  • various switches e.g., 27 a , 27 b , 28 a , 28 b
  • various PAs e.g., 29 a , 29 b , 30 a , 30 b of the low band portion, and 29 c , 29 d , 30 c , 30 d of the high band portion
  • CMOS complementary metal-oxide-semiconductor
  • at least some of the PA bias control component 25 can be implemented on a CMOS die. In the example shown in FIG.
  • the switches e.g., 27 a , 27 b , 28 a , 28 b
  • the PA bias control component 25 are depicted as being parts of the same CMOS die 26 .
  • such switches and PA bias control component can be parts of different CMOS dies.
  • At least one power amplifier and one or more switches associated with its operation can be implemented on a CMOS die.
  • FIG. 3B shows an example architecture 34 that can generally provide dual-band signal amplification functionalities similar to that described in reference to FIG. 3A .
  • “IN 1 ” and “OUT 1 ” can represent the low band input and output LB IN and LB out; and “IN 2 ” and “OUT 2 ” can represent the high band input and output HB IN and HB OUT.
  • switching functionality associated with switches 32 a and 32 b can be provided by switches 37 a and 37 b .
  • PAs 29 a , 29 b , 29 c , 29 d that are parts of dies 36 a , 36 b can be similar to the dies 24 a , 24 b described in reference to FIG. 3A .
  • power amplifiers 38 a , 38 b , 38 c , 38 d corresponding to the medium/low power modes are depicted as being formed on the same die 35 (e.g., CMOS die) on which the switches (e.g., 27 a , 27 b , 28 a , 28 b ) are formed.
  • the switches e.g., 27 a , 27 b , 28 a , 28 b
  • operation of the example medium/low power modes can be achieved in a manner similar to those described in reference to FIG. 3A .
  • the example configuration 34 of FIG. 3B includes a PA bias control component 37 that is part of the example CMOS die 35 .
  • the PA bias control component 37 is depicted as receiving one or more input control signals 28 and controlling one or more functionalities associated with the various PAs.
  • the PAs e.g., 29 a , 29 b for the first band, and 29 c , 29 d for the second band
  • the PAs associated with the high power mode are depicted as being controlled via bias control lines 39 a and 39 b .
  • the PAs (e.g., 38 a , 38 b for the first band, and 38 c , 38 d for the second band) associated with the medium/low mode are depicted as being controlled via bias control lines 39 c and 39 d.
  • FIGS. 3A and 3B are specific examples of design architectures that can be implemented. There are a number of other configurations that can be implemented utilizing one or more features of the present disclosure.
  • FIGS. 4A and 4B shows a switching configuration 40 that can form a basis for more complex architectures.
  • a signal path configuration 40 a of FIG. 4A an RF signal can be routed through a first path 42 a by providing a switch S 1 that is closed.
  • second path 42 b is depicted as having a switch S 2 that is open and a power amplifier.
  • the configuration 40 a can represent an OFF state.
  • a signal path configuration 40 b of FIG. 4B that can represent an ON state for the power amplifier
  • the switch S 2 on the second path 42 b is closed and the switch S 1 on the first path 42 a is open.
  • the first example path 42 a is depicted without any component other than the switch S 1 . It will be understood that there may be one or more components (e.g., one or more power amplifiers) along the first path 42 a.
  • a power amplifier system can be subjected to varying processes and operating conditions such as voltage and temperature variations.
  • a power amplifier system can be powered using a variable supply voltage, such as a battery of a mobile phone.
  • a power amplifier system it can be important for a power amplifier system to switch between power modes so that the power amplifier switch can control power consumption.
  • having a plurality of power modes allows the power amplifier to extend battery life.
  • Control signals such as mode input signals received on a pin or pad, can be used to indicate a desired mode of operation.
  • the power amplifier system can include a plurality of RF signal pathways, which can pass through power amplification stages of varying gain. Switches can be inserted in and/or about these pathways, and switch control logic can be used to enable the switches and power amplifiers associated with the selected power amplifier RF signal pathway.
  • a switch in a signal path of a power amplifier can produce a number of effects. For example, insertion of a switch into a RF signal pathway can result in a loss of signal power due to radiation and resistive losses. Additionally, even a switch in an OFF state placed along an active RF signal pathway can attenuate a RF signal. Thus, it can be important that the switch introduce low insertion loss in both ON and OFF states. Furthermore, it can be important that the switch be highly or acceptably linear, so as to reduce distortion of a RF signal which passes through the switch. Distortion can reduce the fidelity of an RF signal; and reduction of such distortion can be important in a mobile system embodiment.
  • switches can be integrated on a mixed-transistor integrated circuit (IC) having power amplification circuitry, such as a BiFET, BiCMOS die employing silicon or GaAs technologies. Additionally, switches can be provided on a discrete die, such as a pHEMT RF switch die, and can be configured to interface with a mixed-transistor power amplifier die to implement a configurable power amplifier system.
  • IC mixed-transistor integrated circuit
  • switches can be provided on a discrete die, such as a pHEMT RF switch die, and can be configured to interface with a mixed-transistor power amplifier die to implement a configurable power amplifier system.
  • these approaches can be relatively expensive and consume significant amounts of area as compared to a silicon CMOS technology. Power consumption and the area of a power amplifier system can be important considerations, such as in mobile system applications. Thus, there is a need for employing a CMOS switch in a RF signal power amplifier system.
  • CMOS RF switches can be relatively large, so that the switch resistance in an ON-state can be relatively small so as to minimize RF insertion loss.
  • large CMOS RF switches can have undesirable parasitic components, which can cause significant leakages and cause damage to RF signal fidelity.
  • the wells and active areas of the CMOS RF switches can have associated parasitic diode and bipolar structures. Without proper control of the wells of a CMOS RF switch, parasitic structures may become active and increase the power consumption of the power amplifier system and potentially render the system dysfunctional.
  • CMOS devices are susceptible to breakdown, such as gate oxide breakdown, and other reliability concerns, so it can be important to properly bias a CMOS RF switch during operation.
  • one or more switches described herein can be selectively activated depending on a variety of factors, including, for example, a power mode of the power amplifier system.
  • a CMOS RF switch may be positioned in an OFF state and configured to be in a shunt configuration with the active RF signal path.
  • the isolated P-well voltage of such a switch can be controlled to both prevent overvoltage or other stress conditions which may endanger the reliability, while optimizing or improving the linearity of the switch.
  • the linearity of the RF signal pathway having a shunt CMOS switch in an OFF-state can be improved by keeping the isolated P-well voltage at a selected voltage (e.g., relatively low voltage) so as to avoid forward biasing of parasitic diode structures formed between the P-well and the N-type diffusion regions of the source and drain.
  • a selected voltage e.g., relatively low voltage
  • CMOS RF switch such as a switch 50 depicted in FIG. 5 .
  • the example switch 50 can include a triple-well structure having an N-well 52 and a P-well 53 formed on a P-type substrate 51 .
  • the N-well 52 can surround the P-well 53 so as to electrically isolate the P-well 53 from the substrate 51 .
  • the N-well 52 can be formed by using, for example, a deep N-well or any other suitable N-type buried layer.
  • the switch 50 further includes a source terminal 56 and a drain terminal 59 .
  • An oxide layer 65 is disposed on the P-well 53 , and a gate 58 is disposed on top of the oxide layer 65 .
  • An N-type source diffusion region and an N-type drain diffusion region corresponding to the source and drain terminals ( 56 , 59 ) are depicted as regions 57 and 60 , respectively.
  • formation of the triple-well structure and the source, drain and gate terminals thereon can be achieved in a number of known ways.
  • an input signal can be provided to the source terminal 56 .
  • Whether the switch 50 allows the input signal to pass to the drain terminal 59 can be controlled by application of bias voltages to the gate 58 .
  • application of a first gate voltage can result in the switch 50 being in an “ON” state to allow passage of the input signal from the source terminal 56 to the drain terminal 59 ; while application of a second gate voltage can turn the switch 50 “OFF” to substantially prevent passage of the input signal.
  • the switch 50 can include a P-well terminal 54 connected to the P-well 53 by a P-type diffusion region 55 .
  • the P-type diffusion region 55 and the N-type diffusion regions 57 and 60 can be all formed substantially in the P-well 53 .
  • the P-well terminal 54 can be provided with one or more voltages, or held at one or more electrical potentials, to facilitate controlling of an isolated voltage of the P-well. Examples of such P-well voltages are described herein in greater detail.
  • the switch 50 can include an N-well terminal 61 connected to the N-well 52 by an N-type diffusion region 62 .
  • the N-type diffusion region 62 can be formed substantially in the N-well 52 .
  • the N-well terminal 61 can be provided with one or more voltages, or held at one or more electrical potentials, to provide the switch 50 with one or more desired operating performance features. One or more examples of such N-well voltages are described herein in greater detail.
  • the switch 50 can include a P-type substrate terminal 63 connected to the P-type substrate 51 and having a P-type diffusion region 64 .
  • the P-type diffusion region 64 can be formed substantially in the P-type substrate 51 .
  • the P-type substrate terminal 63 can be provided with one or more voltages, or held at one or more electrical potentials, to provide the switch 50 with one or more desired operating performance features. One or more examples of such N-well voltages are described herein in greater detail.
  • the switching functionality of the switch 50 is generally provided by an NMOS transistor defined by the N-type diffusion regions ( 57 , 60 ) in the P-well 53 .
  • FIG. 6 shows that for such a configuration, diodes can form at p-n junctions of the triple well structure.
  • a diode 72 can have an anode formed from the P-well 53 , and a cathode formed from the N-type diffusion region 57 .
  • a diode 73 can have an anode formed from the P-well 53 and a cathode formed from the N-type diffusion region 60 .
  • the diodes 72 and 73 can be biased in, for example, a reverse bias or forward bias region of operation.
  • bias voltages applied to the N-type diffusion regions 57 and 60 may or may not be the same.
  • a reverse bias can include a configuration where a voltage associated with an N-type region is equal to or greater than a voltage associated with a P-type region that forms a p-n junction with the N-type region.
  • the N-type diffusion regions 57 and 60 can be held at substantially the same DC voltage.
  • such a configuration can be achieved by providing a relatively large value shunt resistor (e.g., polysilicon resistor) 75 across the source and the drain.
  • shunt resistor e.g., polysilicon resistor
  • the N-well 52 can substantially isolate the P-well 53 from the P-type substrate 51 .
  • the presence of the N-well 52 between the P-well 53 and the P-type substrate 51 can result in two additional diodes.
  • the illustrated triple well structure can include a diode 71 having an anode formed from the P-well 53 and a cathode formed from the N-well 52 .
  • the triple well structure can include a diode 70 having an anode formed from the P-type substrate 51 and a cathode formed from the N-well 52 .
  • the switch 50 can be operated so as to reverse-bias one or more of the diodes shown in FIG. 6 .
  • the source terminal, drain terminal, gate terminal, P-well terminal, N-well terminal, P-substrate terminal, or any combination thereof can be provided with one or more voltages, or held at one or more electrical potentials.
  • such voltages or electrical potentials can also provide one or more additional functionalities that can improve the performance of the switch 50 .
  • FIGS. 5 and 6 have described an NMOS transistor as providing the functionality of a switch, a PMOS transistor can also be employed.
  • a number of applications can require multiple accurate regulated voltages.
  • multiple accurate power amplifier (PA) bias voltages can be required in the systems of FIGS. 3A , 3 B, among others.
  • PAs can be implemented in a number of applications, for example, mobile devices such as mobile phones.
  • the techniques described herein that use a single voltage regulator to provide variable and/or distributed regulated voltages can result in power savings that can have result in numerous advantages, for example, prolonging battery life of a mobile device.
  • Prolonged battery life can be convenient in some circumstances and critical in others. For example, a longer battery life can be a matter of life or death in emergency situations, such as being lost in the woods or trapped in a car during a snowstorm. Additionally, a longer battery life is good for the environment, as less power consumption helps to prevent depletion of natural resources and reduces the need for additional power generation.
  • LDOs low-dropout regulators
  • An LDO for each stage is typically implemented, as well as LDOs with different output voltages.
  • LDOs can increase die area and voltage distribution complexity.
  • multiple LDOs can also make such designs and their respective products fail cost, area, and/or current consumption targets or specifications.
  • Another conventional approach to achieve variable PA quiescent bias points is to add a bleed function to the PA bias.
  • accurate voltages as programmed and/or controlled by a user can be distributed using a single voltage regulator, such as a single LDO.
  • each of these accurate voltages can be selectively adjusted to a desired voltage level using one or more variable voltage control elements.
  • distribution and/or variable control of regulated voltage(s) can be done in a manner consistent with the demanding specifications required for analog circuits.
  • Using a single voltage regulator instead of multiple voltage regulators can result in significant savings in die area, lower current consumption, and reduced design complexity.
  • such a solution can provide additional flexibility for future architectural changes or functionality.
  • multiple voltage references can be used to create different quiescent bias points depending upon a desired power mode.
  • the specifications in the industry for quiescent current in each power mode for the PAM can be aggressive, especially for PAs used in RF applications. Therefore, there is a need to change the regulated voltage to some of the PA transistors depending on a chosen power mode.
  • CMOS complementary metal-oxide-semiconductor
  • Multi-mode products being introduced on the market today can require advanced architectures used to switch between various power modes (e.g., high power, medium power, and low power).
  • One such architecture is available in products from the Assignee of this application, Skyworks Solutions, Inc. of Woburn, Mass.
  • CMOS complementary metal-oxide-semiconductor
  • CMOS RF switches in such a hybrid application, the RF CMOS switches used are typically very large to provide low RF insertion loss. Due to their size and undesirable parasitics, these switches can exhibit significant losses and leakages. These leakages can lead to problematic and/or unintended forward active regions of operation which make entire PAM systems dysfunctional. Therefore, a solution using CMOS that overcomes such obstacles would be desirable.
  • FIG. 7 is a block diagram of a voltage distribution circuit 100 for distributing regulated voltages according to one embodiment.
  • the illustrated voltage distribution circuit 100 includes a single voltage regulator 102 , a distribution circuit 104 , a control circuit 106 , and PAs 108 a - 108 n .
  • the illustrated components of the distribution circuit 100 can be implemented on one or more integrated circuits using one or more semiconductor technologies.
  • the voltage regulator 102 , the distribution circuit 104 , and the control circuit can be implemented, for example, as part of the PA bias control 25 ( FIG. 3A ), 37 ( FIG. 3B ) described above.
  • the voltage distribution circuit 100 can provide a plurality of regulated voltages Vreg[1: N] to bias power amplifiers 108 a - 108 n from the single voltage regulator 102 .
  • the voltage distribution circuit 100 can implement a function to distribute a single input reference voltage Vref_in to a plurality of regulated voltages Vreg[1:N] with the distribution circuit 104 and the control circuit 106 .
  • the voltage regulator 102 can receive a reference voltage Vref_in, a power supply voltage, and a feedback signal Vfb as inputs and generate a regulated output voltage Vreg_out as an output.
  • the voltage regulator 102 can compare the regulated output voltage Vreg_out to the reference voltage Vref_in and differences between the regulated output voltage Vreg_out and the fixed, internal reference voltage Vref_in can create a negative feedback loop to reduce the voltage error.
  • the regulated output voltage Vreg_out can have a higher voltage value than the reference voltage Vref_in.
  • the feedback signal Vfb can be a voltage provided by the distribution circuit 104 .
  • the regulated output voltage Vreg_out can be used as a stable power supply voltage, which can be independent of load impedance, input-voltage variations, temperature, and/or time.
  • the voltage regulator 102 can include an operational amplifier, transistors, resistive elements, and/or diodes to create the regulated output voltage Vreg_out.
  • the dropout voltage can represent the difference between the output voltage and the input voltage at which a voltage regulator quits regulation with further reductions in input voltage.
  • a dropout voltage is typically considered to be reached when the output voltage has dropped to approximately 100 mV below the nominal value.
  • the dropout voltage which can characterize the regulator, can depend on, for example, load current and junction temperature of a pass transistor.
  • the dropout voltage can divide voltage regulators into three classes: standard regulators, quasi-LDOs, and LDOs.
  • Standard regulators can employ NPN pass transistors, and typically drop out at about 2 V.
  • Quasi-LDO regulators can use a Darlington structure to implement a pass device made up of an NPN transistor and a PNP.
  • the dropout voltage, V SAT (PNP)+V BE (NPN) can typically be about 1 V.
  • LDOs can have a dropout voltage of less than about 1 V, for example, about 100 mV to 200 mV.
  • the voltage regulator 102 can include any of these types of voltage regulators.
  • LDOs can include an open collector or an open drain topology.
  • the PMOS transistor 134 has a gate connected to the output of error amplifier 132 , a source connected to Vbatt, and a drain that provides an output voltage Vout.
  • Such a topology can be called an open drain circuit because the drain of the PMOS transistor 134 drives an output load.
  • An open collector circuit is a similar topology that can use a bipolar transistor instead of a MOSFET.
  • an emitter follower topology (also referred to as a common collector) can include providing an output voltage from the emitter, in which the emitter is connected to a first end of a resistor and a second end of the resistor is connected to a power rail or ground reference. More details regarding LDOs will be provided later in connection with FIG. 9 .
  • the reference voltage Vref_in can be a fixed internal reference voltage with a known voltage value.
  • the reference voltage Vref_in can be provided by a bandgap circuit, which is a circuit that can produce a reference voltage close to the theoretical bandgap of silicon at 0° K. In such an embodiment, the reference voltage Vreg_in can be around 1.25 V.
  • the power supply voltage Vbatt can be provided by a battery. Alternatively or additionally, the power supply voltage can be provided by any suitable source of a power supply.
  • the power supply voltage Vbatt can provide a voltage of, for example, about 1.5 V to 9.0 V.
  • the power supply voltage Vbatt can be provided by a lithium ion battery having a voltage of about 4.2 V when fully charged and a voltage of about 2.7 V when almost discharged. While a battery discharges, the voltage regulator 102 can provide a constant output voltage Vreg_out of, for example, around 2.5 V.
  • the power supply voltage Vbatt can be an upper limit on the output voltage Vreg_out.
  • the distribution circuit 104 can receive the regulated output voltage Vreg_out from the voltage regulator 102 and one or more distribution control signals Distribution_Control from the control circuit 106 . From these inputs, the distribution circuit can provide the voltage regulator 102 with a feedback signal Vfb and provide a plurality of PAs 108 a - 108 n with a plurality of regulated voltages Vreg[1:N]. Each of the regulated voltages Vreg[1:N] can be provided to one or more of the PAs 108 a - 108 n or individual stages of the PAs 108 a - 108 n . For example, in one embodiment, a PA can comprise two or more stages and two or more of the stages can receive different regulated voltages.
  • the distribution can comprises switches, such as transistors, or any suitable distribution elements operative to distribute accurate regulated output voltages. More detail regarding a particular embodiment of the distribution circuit 104 will be provided in connection with FIGS. 8A-8C .
  • the control circuit 106 can provide the distribution circuit 104 with one or more distribution control signals Distribution_Control.
  • the distribution control signals Distribution_Control can selectively control the regulated voltages Vreg[1:N] based on desired operation of the PAs 108 a - 108 n .
  • the distribution control signals Distribution_Control can adjust outputs of the distribution circuit 104 to enable/disable certain PAs and/or based on voltage levels desired for different power modes. More detail regarding particular embodiments of the control circuit 106 will be provided in connection with FIGS. 8A-8C .
  • the plurality of PAs 108 a - 108 n can use the regulated voltages Vreg[1: N] as bias signals in amplifying signals for transmission.
  • the plurality of PAs 108 a - 108 n can implement any of the PAs described above, for example, with reference to FIGS. 2 , 3 A, 3 B, 4 A, 4 B.
  • Each of the illustrated PAs 108 a - 108 n can represent one or more PAs.
  • one or more of the PAs 108 a - 108 n can include two or more stages that can receive different regulated voltages provided by the distribution circuit 104 . This feature is illustrated in FIG. 15 .
  • One or more of the plurality of PAs 108 a - 108 n can be implemented on either the same integrated circuit and/or a different integrated circuit than the distribution circuit 104 and/or the control circuit 106 , for example, as shown in FIGS. 3A and 3B .
  • One or more of the PAs 108 a - 108 n can be implemented in a different technology than the distribution circuit 104 .
  • the distribution circuit 104 can be implemented in a silicon CMOS technology and one or more of the PAs 108 a - 108 n can be implemented in, for example, GaAs pHEMPT or BiFET technologies. This can be advantageous because certain applications, such as PAM RF switches, can be better implemented in GaAs pHEMPT or BiFET, while the characteristics of less expensive CMOS technology can provide the required characteristics of the distribution circuit 104 .
  • FIGS. 8A-8C illustrate functional block diagrams for distributing regulated voltages from a single voltage regulator according to certain embodiments.
  • Voltage distribution systems 110 A, 1106 , 110 C illustrate three different ways of controlling voltage distribution.
  • the voltage distribution systems 110 A, 1106 , 110 C each include a single LDO 112 , distribution elements 114 , feedback elements 116 , and control circuits 120 , 122 , 124 . These systems can be used, for example, to distribute a single regulated output voltage to each of a plurality of PA bias references.
  • the single LDO 112 is an example of the voltage regulator 102 ( FIG. 7 ) and can implement any combination of the functionality described above with reference to the voltage regulator 102 .
  • the single LDO 112 can be used to provide a stable power supply voltage independent of load impedance, input-voltage variations, temperature, and time.
  • an LDO can be defined by a dropout voltage and/or schematic topology. LDOs can have a lower dropout voltage and dissipation than quasi-LDOs or standard voltage regulators, and thus can be more efficient. In some embodiments, LDOs can have lower maximum input voltage specifications than standard voltage regulators and/or can require certain external capacitors to maintain stability.
  • LDOs can maintain voltage regulation with small differences between supply voltage and load voltage. For example, a lithium-ion battery can drop from about 4.2 V (fully charged) to about 2.7 V (almost discharged) and an LDO can maintain a constant voltage of approximately 2.5 V at the load.
  • an LDO can be used in any equipment that needs constant and stable voltage, while minimizing the upstream supply and/or working with wide fluctuations in upstream supply.
  • Typical examples of circuits that can receive the LDO output include without limitation circuitry with digital or RF loads.
  • LDOs can be used in portable applications to maintain the required system voltage independent of the state of battery charge.
  • the LDO 112 can be a “linear” series voltage regulator.
  • Such voltage regulators typically include an input configured to receive a reference voltage, a means of scaling the output voltage and comparing it to the reference, a feedback amplifier, and a series pass transistor (bipolar or FET) with a voltage drop that can be controlled by the amplifier to maintain the output at the required value. For example, if the load current decreases, causing the output to rise incrementally, the error voltage can increase, the amplifier output can rise, the voltage across the pass transistor can increase, and the output can return to its original value.
  • LDO 112 can be implemented in CMOS technology, such as bulk CMOS, and one or more of the PAs 108 a - 108 n can be implemented in, for example, GaAs pHEMPT or BiFET technologies.
  • CMOS complementary metal-oxide-semiconductor
  • GaAs pHEMPT GaAs pHEMPT
  • BiFET BiFET
  • LDO 130 can include an error amplifier 132 and a PMOS pass transistor 134 .
  • the error amplifier 132 and the PMOS pass transistor 134 can form a voltage-controlled current source.
  • the error amplifier 132 can include a positive input terminal connected to Vref_in, a negative input terminal, and an output.
  • the PMOS pass transistor 134 can include a gate, a source, and a drain. As illustrated in FIG. 9 , the gate of the PMOS pass transistor 134 can be connected to the output of the error amplifier 132 , the source can be connected to a battery voltage Vbatt, and the drain can provide an output voltage Vout.
  • the output voltage Vout can be provided to one or more loads, such as a bias input to a PA, and a high gain feedback loop.
  • the high gain feedback loop can include distribution elements 136 . This can be advantageous because by integrating the distribution network 136 into the LDO feedback path the circuit can better compensate for process, temperature, and supply variations, and thus increase the accuracy of the regulated voltages provided. Accordingly, in this embodiment, the distribution elements 136 may not introduce additional variation in regulated voltages provided to loads, such as PAs.
  • the output voltage Vout can be scaled down by the voltage divider that includes resistors R 1 , R 2 .
  • a first end of a first resistor R 1 can be connected to the drain of PMOS pass transistor 134 .
  • a second end of the first resistor R 1 can be connected to the first end of the second resistor R 2 and the positive input of the error amplifier 132 .
  • the second end of the second resistor R 2 can be connected to ground.
  • the first resistor R 1 and the second resistor R 2 can correspond to the feedback elements 116 of FIGS. 8A-8C .
  • the values of the first resistor R 1 and the second resistor R 2 can be selected to set the gain of the LDO.
  • the output voltage Vout can be represented by the following equation:
  • Vout Vref — in+Vref — in*R 1 /R 2
  • the pass device 136 is a PMOS transistor.
  • a variety of pass devices can be used in LDOs based on a desired application. Examples of other types of pass devices can include without limitation NPN bipolar transistors, PNP bipolar transistors, and Darlington circuits.
  • bipolar pass devices can deliver the highest output current in certain embodiments.
  • a PNP can be preferred to an NPN, because the base of the PNP can be pulled to ground, fully saturating the transistor if necessary.
  • the base of the NPN can only be pulled as high as the supply voltage, limiting the minimum voltage drop to the voltage difference between the base and the emitter V BE .
  • NPN and Darlington pass devices are typically used in applications with dropout voltages of 1 V or more, which are not typically considered LDO devices.
  • NPN and Darlington pass devices can be used to implement dropout voltages of LDOs.
  • NPN and Darlington pass devices can be desirable in applications where wide bandwidth and immunity to capacitive loading are necessary, as they typically have characteristically low output impedance.
  • PMOS and PNP transistors can be effectively saturated in LDOs, thereby minimizing the voltage loss and the power dissipated by the pass device, thus allowing low dropout, high-efficiency voltage regulators.
  • PMOS pass devices can provide a lower dropout voltage than PNP transistors, approximately R Ds(ON) ⁇ I L in some embodiments.
  • PMOS pass devices can also allow the quiescent current flow to be minimized.
  • a typical drawback of using a MOS transistor is that it has been implemented as an external component, especially for controlling high currents. This can result in making the IC a controller, rather than a complete self-contained regulator.
  • the output Vreg_out of the single LDO 112 can be provided to distribution elements 114 .
  • the distribution elements 114 are one exemplary embodiment of the distribution circuit 104 ( FIG. 7 ).
  • the distribution elements 114 can include a transmission gate voltage distribution network of switches. In response to signals provided by a control circuit 120 , 122 , 124 , the distribution elements can selectively provide regulated output voltages to a plurality of different loads by turning switches “On” or “Off.” For example, one or more of the transmission switches can turn “On” and connect the output of the LDO 112 Vreg_out to one or more of regulated output voltages Vreg_out 1 -Vreg_out 6 . Alternatively or additionally, one or more of the transmission switches can turn “Off” and disable the connection between the output of the LDO 112 Vreg_out and one or more of the regulated output voltages Vreg_out 1 -Vreg_out 6 .
  • the distribution elements 114 can also include switches to close a feedback loop to the positive terminal of the LDO 112 .
  • Each of the switches can connect one of the distributed regulated output voltages Vreg_out 1 -Vreg_out 6 to the feedback elements 116 , for example, the first end of resistor R 1 .
  • these switches can be selectively controlled to close the feedback loop when a corresponding transmission switch turns “On” to provide a regulated output voltage. Closing the feedback loop can compensate for process, supply, and temperature variations, integrating the distribution network so that it can be included within a high gain feedback loop.
  • the distribution elements 114 can reduce or minimize output voltage errors by integrating the user-defined, digitally selected functionality within the feedback loop for an error amplifier in LDO 112 .
  • the distribution elements 114 can include transistors, such as MOSFETs and/or bipolar transistors.
  • the transistors can be NMOS devices.
  • Such NMOS devices can be formed using a bulk CMOS process technology, for example. These devices can supply specified temperature-compensated bias voltages to output loads.
  • bias voltages can be provided to the one or more GaAs PAs on a separate die while corresponding distribution elements 114 are in the “On” state and bias voltages are not supplied to one or more unused PAs when corresponding distribution elements 114 are in the “Off” state.
  • the bias voltages can be biased to 0 V or ground with a shunt NFET device.
  • one or more of the regulated output voltages Vreg_out 1 -Vreg_out 6 can be connected to a bias input of a current mirror of a PA.
  • the current mirror can bring the current inside the PA close to zero as the input discharges.
  • regulated output voltages While six regulated output voltages are illustrated in FIGS. 8A-8C , two or more regulated output voltages can be provided using distribution elements 114 and a single LDO 112 . Considerations such as fanout, wire routing, and/or a number of pins, for example, can limit the number of regulated voltages provided by a single LDO 112 . In one embodiment, from 1 to 32 regulated output voltages can be provided by a single LDO 112 .
  • FIGS. 8A-8C provide three different control circuits 120 , 122 , 124 , respectively, for the distribution elements 114 . These control circuits can be implemented in the digital domain.
  • the control circuit 106 FIG. 6 ) can implement any combination of the features described below in reference to FIGS. 8A-8C .
  • the control circuit 120 can include CMOS logic.
  • the control circuit 120 can selectively control the distribution of the regulated voltage provided by the LDO 112 to implement a variety of functionalities related to enabling and disabling voltage distribution including without limitation enabling data paths that generate signals within different frequency bands and enabling different modes of operation, such as power modes and/or controlling power of one or more PAs in specific modes of operation.
  • N bits of logic input can be provided to the control circuit 120 . From the logic input, the control circuit 120 can generate a control signal for each of the distribution elements 114 . In other embodiments, one or more of the distribution elements can share the same control signal.
  • the transmission switch and feedback switch for the same regulated output voltage can receive the same control signal, as illustrated in FIG.
  • transmission gates for two of the regulated output voltages can share the same control signal if they are enabled at the same time.
  • the control circuit 120 can include without limitation inverters, NAND gates, NOR gates, XOR gates, pass gates, and the like to implement logic functions to selectively control distribution elements 114 .
  • the control circuit 120 can include static CMOS logic and/or dynamic CMOS logic.
  • FIG. 8B provides another example control circuit 122 .
  • the control circuit 122 is a more specific example of the control circuit 120 and can implement any combination of the functions for the control circuit 120 described above.
  • the control circuit 122 receives enable inputs Ven_HB, Ven_LB and mode inputs Vmode 0 , Vmode 1 and provides outputs for each of the distribution elements 114 .
  • the enable inputs Ven_HB, Ven_LB can selectively control the distribution elements 114 such that regulated voltages are only provided to circuits driving certain frequency bands.
  • This can be advantageous for parts made for more than one application.
  • mobile devices such as cellular telephones, can operate in accordance with different standards that operate in different frequency bands.
  • a part that can selectively control can different circuits that process signals with different frequency bands can be used in multiple applications, without burning excess power from additional switching and leakage current.
  • such parts can also be used in devices that can operate under two or more standards operating within different frequency bands.
  • Vreg_out 1 -Vreg_out 3 can be provided to bias inputs of PAs used to generate high band signals and Vreg_out 4 -Vreg_out 6 can be provided to bias inputs of PAs used to generate low band signals, for example, as described later in connection with FIG. 15 .
  • high band PAs can be enabled or disabled by turning one or more of the distribution elements 114 “On” or “Off.”
  • low band PAs can be enabled or disabled. This idea can be applied to two or more different transmission bands.
  • selectively enabling and disabling different frequency bands can result in substantial power savings and/or reduce the need for separate voltage regulators and additional wiring routing for each power mode.
  • the mode inputs can selectively control the distribution elements 114 such that certain circuit elements are enabled or disabled in certain power modes.
  • This function can be implemented alternatively or in addition to the band enable functionality described above.
  • the mode inputs Vmode 0 , Vmode 1 can uniquely identify four different power modes, although this idea can be applied to more than four different power modes.
  • the state of the mode inputs Vmode 0 , Vmode 1 can represent a low power mode, a medium power mode, and a high power mode.
  • one or more of the regulated output voltages Vreg_out 1 -Vreg_out 6 can be provided based on the power mode. For example, the following table summarizes which regulated output voltages are provided via the distribution elements according to which band is enabled and the power mode, in one embodiment.
  • FIG. 8C provides another example control circuit 124 .
  • the control circuit 124 includes serial peripheral interface bus (SPI) logic.
  • SPI serial peripheral interface bus
  • the control circuit 124 receives data, latch and clock inputs and provides outputs for each of the distribution elements 114 .
  • SPI can provide a synchronous serial data link standard that operates in full duplex mode.
  • Devices can communicate in master/slave mode when the master device initiates a data frame.
  • a plurality of slave devices can include individual select lines to selectively control outputs.
  • regulated voltage can be used to create different quiescent bias points depending upon specific applications. Adjusting regulated voltage from a single voltage regulated based on the need for different reference voltages can eliminate the need for additional voltage regulators for specific needs, such as operating in a desired power mode. At the same time, industry specifications for quiescent current in each power mode for PAMs can be aggressive, especially for PAs used in RF applications.
  • regulated voltages can be changed to provide different quiescent currents to some of the PA bias inputs based on a chosen power mode.
  • FIG. 10 is a block diagram of a circuit for providing a variable voltage from a voltage regulator to a plurality of power amplifiers according to one embodiment.
  • the illustrated variable voltage circuit 140 includes a single voltage regulator 142 , a distribution circuit 144 , a control circuit 146 , and one or more PAs 148 .
  • the illustrated components of the distribution circuit 140 can be implemented on one or more integrated circuits using one or more semiconductor technologies.
  • the voltage regulator 142 , the distribution circuit 144 , and the control circuit can be implemented, for example, as part of the PA bias control 25 ( FIG. 3A ), 37 ( FIG. 3B ) described above.
  • the voltage distribution circuit 140 can provide a variable regulated voltage to bias one or more PAs 148 using the single voltage regulator 142 .
  • the voltage distribution circuit 140 can implement a function to adjust a single input reference voltage Vref_in to a desired regulated voltage level Var_Vreg with the variable voltage function circuit 144 and the control circuit 146 .
  • the voltage regulator 142 can receive a reference voltage Vref_in and a power supply voltage Vbatt as inputs and generate a regulated output voltage Vreg_out as an output.
  • the voltage regulator 142 can implement any combination of functions of the voltage regulator 102 ( FIG. 7 ), except that the voltage regulator 142 does not receive feedback from a voltage distribution circuit.
  • the voltage regulator 142 can be used in any of the applications described above in reference to the voltage regulator 102 ( FIG. 7 ).
  • the voltage regulator 142 can include an LDO. In such an embodiment, the voltage regulator 142 can implement any combination of features described above in reference to FIG. 9 .
  • the variable voltage function circuit 144 can receive the regulated output voltage Vreg_out from the voltage regulator 142 and one or more variable voltage control signals from the control circuit 146 . From these inputs, the variable voltage function circuit 144 can adjust the regulated voltage Vreg_out provided by the voltage regulator 142 and provide the one or more PAs 148 and/or individual stages of the PAs 148 with a variable regulated voltage Var_Vreg.
  • the variable voltage function circuit 144 can adjust the regulated voltage Vreg_out provided by the voltage regulator 142 and provide the one or more PAs 148 and/or individual stages of the PAs 148 with a variable regulated voltage Var_Vreg.
  • variable voltage function circuit 144 can include variable voltage control elements, such as variable resistive elements. More detail regarding a particular embodiment of the variable voltage circuit 144 will be provided later in reference to FIG. 11 .
  • the control circuit 146 can provide the variable voltage function circuit 144 with one or more variable control signals.
  • the variable voltage control signal(s) can selectively control the variable regulated voltage Var_Reg based on desired operation of the PA 148 .
  • the voltage control signal(s) can adjust outputs of the variable voltage function circuit 144 based on voltage levels desired for different power modes.
  • aggressive industry specifications for quiescent current in each power mode for a PAM can be met using a single LDO.
  • the variable voltage control signal(s) can be analog or digital.
  • the control 146 circuit can be implemented in a variety of process technologies, for example, CMOS, and in some embodiments bulk CMOS silicon technology.
  • the one or more PAs 148 receive the variable regulated voltage Var_Vreg as bias signals in amplifying signals for transmission.
  • the one or more PAs 148 can implement any combination of features of the power amplifiers described above, for example, with reference to FIGS. 2 , 3 A, 3 B, 4 A, 4 B.
  • one or more of PAs 148 can be implemented on either the same integrated circuit and/or a different integrated circuit than the variable voltage function circuit 144 and/or the control circuit 146 .
  • the one or more of the PAs 148 can be implemented in a different technology than the distribution circuit 104 .
  • variable voltage function circuit 144 can be implemented in CMOS technology and one or more of the PAs 148 can be implemented in, for example, GaAs pHEMPT or BiFET technologies.
  • This can be advantageous because certain applications, such as PAM RF switches, can be better implemented in GaAs pHEMPT or BiFET, while the characteristics of less expensive CMOS technology can provide the required characteristics of the variable voltage function circuit 144 .
  • FIG. 11 is a functional block diagram for generating a variable voltage from a single low-dropout regulator according to one embodiment.
  • the variable voltage system 150 can include a single LDO 152 , one or more variable voltage control elements 154 , and feedback elements 156 .
  • the variable voltage system 150 can be used, for example, to provide a variable regulated voltage Var_Vreg_out to a load, such a current mirror 158 in a PA 159 .
  • the variable voltage elements 154 can be implemented in one or more integrated circuits and in one or more process technologies. This can provide different regulated voltage levels to the load in response to the variable voltage control signal.
  • the variable voltage system 150 can be implemented in bulk CMOS silicon technology.
  • the single LDO 152 is an example of the voltage regulator 142 ( FIG. 10 ) and can implement any combination of the functionality described above with reference to the voltage regulator 142 or 102 ( FIG. 7 ).
  • the LDO 152 can implement any combination of features of the LDO 112 ( FIG. 9 ), except that the LDO 152 does not include a distribution circuit in the feedback loop to the positive terminal of the error amplifier.
  • the single LDO 152 can be used to provide a stable power supply voltage independent of load impedance, input-voltage variations, temperature, and time.
  • the variable voltage element 154 can receive the regulated voltage output of the LDO 152 and provide a variable regulated output voltage based on a variable voltage control input.
  • the variable voltage element 154 can include any circuit elements that can provide a variable voltage that results in a variable quiescent current provided to a load, for example, the current mirror 158 in PA 159 .
  • the variable voltage element may include elements that vary resistance.
  • the variable voltage control element 154 can include a resistive switching network that includes a resistor in parallel with a FET. The amount of current passes through the FET can change in response to the Variable Voltage Control, thereby adjusting the voltage level of Var_Vreg_Out.
  • variable voltage control element can be a long channel FET with a variable gate voltage that can implement a variable resistor.
  • variable voltage control element can include two or more relatively weak FETs and use the variable voltage control to provide different voltage levels by selectively turning a predetermined number of the relatively weak transistors “On.”
  • variable voltage system 150 can create different bias voltages based on the amount of current required in a PA reference current mirror 158 .
  • the variable voltage system 150 can be implemented in bulk CMOS and the PA 159 can be implemented in GaAs.
  • Such an implementation can reduce area consumption and lower cost by allowing the removal of additional elements, such as surface mount devices (SMDs), from the more expensive GaAs substrate.
  • SMDs surface mount devices
  • FIG. 12 is a block diagram of a circuit 160 for distributing variable, regulated voltages from a voltage regulator according to one embodiment.
  • the illustrated variable voltage distribution circuit 160 includes a single voltage regulator 162 , a variable voltage distribution circuit 164 , a control circuit 166 , and PAs 168 a - 168 n .
  • the illustrated components of the variable voltage distribution circuit 160 can implement any combination of the distribution and/or variable voltage functions described above, for example, in reference to FIGS. 7 and 10 .
  • the variable voltage distribution circuit 160 can provide a plurality of variable regulated voltages Var_Vreg[1:N] to bias power amplifiers 168 a - 168 n from the single voltage regulator 162 .
  • the voltage distribution circuit 160 can implement a function to distribute a single input reference voltage Vref_in to a plurality of variavle regulated voltages Var_Vreg[1:N] with the variable voltage distribution circuit 164 and the control circuit 166 , using any combination of the features described above.
  • FIG. 13 is a block diagram for distributing variable voltages from a single low-dropout regulator according to one embodiment.
  • Variable voltage distribution system 170 can include a single LDO 172 , one or more distribution elements 174 , one or more variable voltage control elements 176 , and feedback elements 178 .
  • the variable voltage distribution system 170 can implement any combination of features described above related to voltage distribution or variable voltage control, for example, in the voltage distribution systems 110 A, 1106 , 110 C ( FIGS. 8A-8C ) or the variable voltage system 150 ( FIG. 11 ).
  • the variable voltage distribution system 150 can provide a plurality of variable regulated voltages Var_Vreg_out 1 -Var_Vreg_out 6 to various loads, such as PAs.
  • variable voltage control can allow for distribution of accurate voltages as programmed by a user from the single LDO 172 . This combination can result in even greater savings in die area, lower current consumption, and reduced design complexity compared to implementing voltage distribution and voltage variation separately. In addition, variable voltage distribution can provide additional flexibility for future architectural changes or functionality.
  • variable voltage distribution system 150 can provide different quiescent bias currents based on desired power modes, along with distributing a single regulated output voltage to different loads by selectively enabling and disabling distribution of regulated voltage to the different loads. More detail about one example implementation of the variable voltage distribution system 150 in provided in connection with FIG. 15 .
  • the distribution elements 174 can comprise one or more switches that pass a regulated voltage to a variable voltage control element 176 when the switches are “On.” In one embodiment, there is one switch connected to each variable voltage control element 176 . In another embodiment, one or more variable voltage control elements 176 can be connected to switches and one or more variable voltage control elements can be connected directly to the output of the LDO 172 .
  • the distribution elements 174 can be connected to the output of the LDO 172 and can pass current to the variable voltage control elements 176 .
  • the variable voltage control elements can then adjust the regulated voltages and provide variable regulated voltages to loads, such as PAs. It can be advantageous to include one or more of the distribution elements 174 in a feedback loop with the LDO 172 , which can include feedback elements 178 . This can compensate for process, supply, and temperature variations that can be introduced by the distribution elements.
  • variable regulated output voltages can provide regulated voltages that can compensate for process, supply, and temperature variation.
  • the output of the LDO can be connected to variable voltage control elements.
  • the variable voltage control elements can then provide variable voltages to distribution elements that can selectively provide variable regulated voltages to loads, such as PAs.
  • a feedback loop with the LDO can include switches that match corresponding switches in the distribution elements, for example, by being formed on the same integrated circuit with similar layouts. In this way, the feedback loop take the output of the LDO, before adjustment by the variable voltage control elements, and compensate for process, supply, and temperature variation.
  • a user-defined functionality can be integrated within the feedback loop to the error amplifier in the LDO, thereby allowing for reduction or minimization of output voltage errors.
  • the user defined function can be implemented in digital distribution control signals, for example.
  • a highly reliable mixed signal approach can be implemented to distribute the variable regulated voltages, for example, to PA bias inputs.
  • variable LDO output voltage function can be outside the compensation loop of the LDO error amplifier.
  • the voltage distribution function can be utilized with the variable voltage function to distribute an array of variable reference voltages.
  • both distribution and variable voltage control functions can offer the flexibility to distribute different voltage levels to multiple loads (for example, PA stages) utilizing a single LDO output reference.
  • FIG. 14A shows a process 180 of providing a plurality of regulated voltages from a single regulated voltage.
  • the process 180 can be performed in a variety of applications, such as providing an accurate quiescent current for PAs.
  • the plurality of regulated voltages provided by the process 180 can be used to bias the PA systems described above in reference to FIGS. 3A-3B .
  • a reference voltage and a battery voltage are received.
  • the reference voltage can be a constant, known voltage value.
  • the battery voltage can be provided by a battery or any other suitable power supply.
  • the battery voltage can change over time. For example, as a battery discharges, the battery typically provides a lower voltage.
  • a regulated voltage can be generated at block 184 .
  • the regulated voltage can provide an accurate voltage based at least in part on the reference voltage and the battery voltage.
  • the regulated voltage can be generated using an operational amplifier with a feedback loop.
  • a plurality of regulated voltage can be generated from the regulated voltage at block 186 . This can provide multiple accurate, regulated voltages to circuits that require such voltage signals. Accordingly, a single voltage regulator can provide multiple loads with regulated voltages, saving area, reducing power consumption, and improving scalability, among other advantages.
  • the plurality of regulated voltages can selectively be provided to one or more loads, such as PAs or PA stages, at block 188 .
  • loads such as PAs or PA stages
  • two or more loads can be provided with regulated voltages concurrently.
  • the components used to selectively provide the regulated voltages can provide feedback information that can help to keep the generated regulated voltage at a stable, accurate value at block 184 .
  • the loads can be on either the same die or a different die than the components that create the regulated voltage. Alternatively or additionally, the loads can be created using either the process technology or a different technology than the components that create the regulated voltage.
  • the plurality of regulated voltages can be selectively provided to different loads to enable or disable certain circuit elements at block 188 .
  • certain loads can be provided with regulated voltages in certain modes of operation, such as power modes, to generate signals within predefined frequency bands, to comply with different standards, and/or to generate signals for certain applications.
  • FIG. 14B shows a process 190 of providing a variable regulated voltage from a single regulated voltage.
  • the process 190 can be performed in a variety of applications, such as providing an accurate quiescent current for PAs.
  • different voltage levels provided by the process 190 can be used to bias the PA systems described above in reference to FIGS. 3A-3B to different voltages.
  • the process 190 is similar to the process 180 , except that variable regulated voltages are implemented instead of a plurality of regulated voltages. Accordingly, blocks 192 and 194 can implement any combination of the functions described above in reference to blocks 182 and 184 .
  • the regulated voltage generated at block 194 can be controlled using one or more variable voltage control elements at block 186 .
  • This can provide multiple accurate, regulated voltage levels to circuits that can benefit from such voltage signals.
  • a single voltage regulator can provide one or more loads with a variable regulated voltage, instead of using separate voltage regulators for each desired voltage level. This can result in saving area, reducing power consumption, and improving scalability, among other advantages.
  • the variable regulated voltage can be provided to one or more loads, such as PAs or PA stages, at block 198 .
  • the variable regulated voltage can be provided to loads to adjust the amount of quiescent current provided.
  • the loads can be provided with different voltages in certain modes of operation, such as power modes, to comply with different standards, and/or to generate signals for certain applications.
  • the loads can be on either the same die or a different die than the components that create the regulated voltage. Alternatively or additionally, the loads can be created using either the process technology or a different technology than the components that create the regulated voltage.
  • FIG. 14C shows a process 200 of providing a plurality of variable regulated voltages from a single regulated voltage.
  • the process 200 can implement any combination of features described earlier in reference to the processes 180 , 190 .
  • the process 200 can include: receiving a reference voltage and a battery voltage at block 202 ; generating a regulated voltage at block 204 ; generating a plurality of regulated voltages from a single regulated voltage at block 206 ; controlling one or more regulated voltages with a variable voltage control element(s) at block 208 ; and providing one or more variable regulated voltages to power amplifier(s) at block 210 .
  • FIG. 15 illustrates an electronic system 220 that includes a variable voltage distribution function according to one embodiment.
  • the electronic system 220 illustrates how bias control circuits can selectively provide PAs with variable regulated voltages from a single LDO according to one embodiment.
  • the electronic system 220 can implement low band and/or high band functionality, in addition to operating in three different power modes (low power, medium power, and high power).
  • the voltage regulator 222 can receive a reference voltage Vref_in, a power supply voltage Vbatt, and a feedback signal Vfb from a variable voltage distribution circuit 204 . From the received signals, the voltage regulator 222 can provide the variable voltage distribution circuit 204 with a regulated voltage Vreg.
  • the control 206 can selectively control the regulated voltages that the variable voltage distribution circuit 204 can provide to bias inputs of one or more PA stages 208 a , 208 b , 212 a , 212 b , 216 a , 216 b , 220 a , 220 b .
  • the electronic system can provide high band and/or low band signals and operate at a low, medium, or high power mode.
  • Table 2 provides one example implementation of multiple power modes and operation for multiple frequency bands.
  • PA stages When PA stages are not provided with regulated voltages, their respective input nodes can discharge. Current mirrors, or similar circuit elements, can then bring the current inside the PA close to zero as the input discharges.
  • variable voltage distribution 204 can be implemented on an integrated circuit with pins for VregH_High, VregH_Med, VregH_Low on a first side and pins for VregL_High, VregL_Med, VregL_Low on an opposing side. This can provide for shorter routing, reduced area, and reduced power consumption.
  • the high band data path can be placed near the first side and the low band data path can be place near the opposing side.
  • certain power amplifiers within each data path can receive regulated voltages depending on the power mode. For example, in high band, high power operation, a regulated voltage VregH_High with a High voltage level can be provided to a bias input in PA stages 208 a , 208 b .
  • certain PA stages can be provided with regulated voltages during more than one power mode of operation. These PA stages can receive different voltage levels based on the power mode. For example, PA stages 212 a , 220 a can receive a regulated voltage VregH_Low, VregL_Low, respectively, in both medium power mode and low power mode when their respective bands are enabled.
  • Variable voltage elements in the variable voltage distribution circuit 204 can adjust the regulated voltage Vreg provided by the voltage regulator 222 to a Medium level for medium power mode and a Low level for low power mode. This can allow the PA stages 212 a , 220 a to be used in both low and medium power modes, saving additional area and power. In low power mode, only one PA stage 212 a , 220 a can be used. When the state of a switch 224 , 226 is changed, then the one PA stage 212 a , 220 a can be coupled to a second PA stage 212 b , 220 b for operation in medium power mode using both stages.
  • Voltage levels provided to PA stages can change based on the power mode. For example, a different voltage level can be implemented for each power mode. The particular voltage levels can be based on industry specifications and/or standards, for example. One or more of the high, medium and/or low voltage levels can be different between the low band data path and the high band data path. Alternatively or additionally, one or more of the high, medium and/or low voltage levels can be the same in the low band data path and the high band data path.
  • Such voltage regulation systems can be implemented in various electronic devices.
  • the electronic devices can include, but are not limited to, consumer electronic products, parts of the consumer electronic products, electronic test equipment, etc.
  • Examples of the electronic devices can also include, but are not limited to, memory chips, memory modules, circuits of optical networks or other communication networks, and disk driver circuits.
  • the consumer electronic products can include, but are not limited to, a mobile phone, a telephone, a television, a computer monitor, a computer, a hand-held computer, a personal digital assistant (PDA), a microwave, a refrigerator, an automobile, a stereo system, a cassette recorder or player, a DVD player, a CD player, a VCR, an MP3 player, a radio, a camcorder, a camera, a digital camera, a portable memory chip, a washer, a dryer, a washer/dryer, a copier, a facsimile machine, a scanner, a multi functional peripheral device, a wrist watch, a clock, etc. Further, the electronic devices can include unfinished products.
  • the words “comprise,” “comprising,” and the like are to be construed in an inclusive sense, as opposed to an exclusive or exhaustive sense; that is to say, in the sense of “including, but not limited to.”
  • the words “coupled” or connected”, as generally used herein, refer to two or more elements that may be either directly connected, or connected by way of one or more intermediate elements. Additionally, the words “herein,” “above,” “below,” and words of similar import, when used in this application, shall refer to this application as a whole and not to any particular portions of this application. Where the context permits, words in the above Detailed Description using the singular or plural number may also include the plural or singular number respectively.
  • conditional language used herein such as, among others, “can,” “could,” “might,” “can,” “e.g.,” “for example,” “such as” and the like, unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain embodiments include, while other embodiments do not include, certain features, elements and/or states.
  • conditional language is not generally intended to imply that features, elements and/or states are in any way required for one or more embodiments or that one or more embodiments necessarily include logic for deciding, with or without author input or prompting, whether these features, elements and/or states are included or are to be performed in any particular embodiment.

Abstract

Apparatus and methods for providing regulated voltages are disclosed. Using a single voltage regulator, a plurality of regulated voltages can be generated with a voltage distribution function. These regulated voltages can be used in a variety of applications, for example, as a bias voltage for a power amplifier. In addition, the distributed regulated voltages can implement a variety of functions, such as selectively enabling or disabling power amplifiers.

Description

    PRIORITY CLAIM
  • This application claims the benefit of priority under 35 U.S.C. §119(e) of U.S. Provisional Patent Application No. 61/352,330, entitled “Circuits & Systems,” filed Jun. 7, 2010, which is hereby incorporated herein by reference in its entirety to be considered part of this specification.
    • BACKGROUND
  • 1. Field
  • The disclosed technology relates to electronic systems and, in particular, to voltage regulation in electronic systems.
  • 2. Description of the Related Technology
  • Voltage regulators are electronic systems that can be used to maintain constant voltage levels. Typically, electronic voltage regulators compare an output voltage to a fixed, internal reference voltage. Differences between the output voltage and the fixed, internal reference voltage can create a negative feedback loop to reduce the voltage error.
  • Certain applications can require multiple accurate regulated voltages. For example, certain electronic systems require multiple accurate voltages to bias power amplifiers. In a particular example, RF power amplifiers can be used to boost the power of an RF signal having a relatively low power based on a bias voltage. Thereafter, the boosted RF signal can be used for a variety of purposes, including driving the antenna of a transmitter.
  • Such voltage regulators can be included in a variety of electronic devices, such as devices with wireless communication functionalities, to provide accurate regulated voltages. For example, in mobile phones having a time division multiple access (TDMA) architecture, such as those found in Global System for Mobile Communications (GSM), code division multiple access (CDMA), and wideband code division multiple access (W-CDMA) systems, a voltage regulator can be used to bias power amplifiers that can be used to shift power envelopes up and down within prescribed limits of power versus time. Advantageously, the amplification of a RF signal can be managed and controlled, as a particular mobile phone can be assigned a transmission time slot for a particular frequency channel. Voltage regulators can be employed to aid in regulating the power level of the RF signal over time, so as to prevent signal interference from transmission during an assigned receive time slot and/or to reduce power consumption.
  • There is a need for improved voltage regulators. Furthermore, there is a need for reducing die area, current consumption, and overall design complexity in electronic systems. Moreover, there is a need for providing additional flexibility for future architectural changes and/or functionality.
    • SUMMARY
  • The system, method, and computer-readable media described in the claims each have several aspects, no single one of which is solely responsible for its desirable attributes. Without limiting the scope of this invention, its more prominent features will now be briefly discussed.
  • One aspect of the disclosure is an apparatus that includes a voltage regulator and a variable voltage distribution circuit. The voltage regulator can receive a reference voltage, a feedback signal, and a power supply voltage. Based on the received voltages, the voltage regulator can generate a regulated voltage. The variable voltage distribution circuit can receive the regulated voltage from the voltage regulator and generate a plurality of variable regulated voltages and the feedback signal. In some implementations, the variable voltage distribution circuit includes a voltage distribution circuit that can provide a plurality of regulated voltages from one regulated voltage in response to one or more distribution control signals. In some implementations, the variable voltage distribution circuit also includes one or more variable voltage control elements that can selectively control at least one of the plurality of variable regulated output voltages in response to one or more variable voltage control signals.
  • According to certain implementations, the voltage regulator is a low-dropout regulator. In various implementations, the voltage distribution circuit includes a transmission gate voltage distribution network. In some implementations, at least one of the one or more variable voltage control elements includes an element configured to vary resistance. In certain implementations, one or more of the plurality of variable regulated voltages are electrically connected to one or more power amplifier bias reference input nodes.
  • In accordance with some implementations, the variable voltage distribution circuit includes one or more complementary metal oxide semiconductor circuit elements. According to a number of implementations, the one or more voltage distribution control signals can represent a plurality of power modes. In certain implementations, the feedback signal is provided by a feedback loop that includes the distribution circuit. According to several implementations, the voltage distribution circuit provides at least one of the plurality of regulated voltages to the one or more variable voltage control elements. In several implementations, the apparatus includes a mobile device.
  • Another aspect of the disclosure is a method of controlling regulated voltages. The method includes receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage and the power supply voltage; generating a plurality of regulated voltages from the reference voltage using a voltage distribution circuit; and controlling one or more of the regulated voltages using one or more variable voltage control elements to provide one or more variable regulated voltages.
  • According to certain implementations, the method further includes providing one or more variable regulated voltages to one or more power amplifiers. A first die can include at least one variable voltage control element and a second die can include at least one of the one or more power amplifiers. Additionally, the first die and the second die can be formed using different process technologies.
  • According to some implementations, generating the regulated voltage is based on a feedback signal provided by the voltage distribution circuit. In certain implementations, two or more of the plurality of regulated voltages are generated concurrently. In accordance with a number of implementations, the method further includes receiving one or more variable voltage control signals and using at least one of the one or more variable voltage control signals to provide different variable regulated voltage levels corresponding to different power modes. In certain implementations, the method further includes receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to different loads for different power modes. According to some implementations, the method further includes receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to loads in datapaths configured to generate signals in different frequency bands. In accordance with certain implementations, the one or more variable voltage control elements receive the plurality of regulated voltages from the voltage distribution circuit.
  • Another aspect of the disclosure is an apparatus that includes means for generating a regulated voltage based on a reference voltage, a feedback signal, and a power supply voltage. The apparatus also includes means for generating a plurality of variable regulated voltages and the feedback signal based on the regulated voltage.
  • Yet another aspect of the disclosure is a computer-readable storage medium including instructions that when executed perform a method of: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage, the power supply voltage, and a feedback loop that includes at least a portion of a voltage distribution circuit; generating a plurality of regulated voltages from the reference voltage using the voltage distribution circuit, controlling one or more of the regulated voltages using one or more variable voltage control elements to provide one or more variable regulated voltages.
  • One more aspect of the disclosure is an apparatus that includes a voltage regulator and a variable voltage circuit. The voltage regulator can receive a reference voltage and a power supply voltage, and generate a regulated voltage based at least in part on the reference voltage and the power supply voltage. The variable voltage circuit can receive the regulated voltage from the voltage regulator and generate at least one variable regulated voltage. The variable voltage distribution circuit can receive the regulated voltage from the voltage regulator and generate at least one variable regulated voltage. The variable voltage distribution circuit includes one or more variable voltage control elements that can selectively control the at least one variable regulated output voltage in response to one or more variable voltage control signals
  • In some implementations, the voltage regulator includes a low-dropout regulator. According to certain implementations, at least one of the one or more variable voltage control elements includes a field effect transistor. In accordance with a number of implementations, the apparatus includes a complementary metal oxide semiconductor integrated circuit that includes at least one of the one or more variable voltage control elements.
  • According to various implementations, the variable voltage circuit provides a bias voltage to one or more power amplifiers on a separate integrated circuit. The separate integrated circuit can include a circuit element formed with a different process technology than the variable voltage circuit. The separate integrated circuit can include a GaAs die and the variable voltage circuit can include at least one complementary metal oxide semiconductor circuit element.
  • In accordance with some implementations, one of the at least one variable regulated voltages is electrically connected to one or more current mirrors. In certain implementations, the apparatus includes a mobile device.
  • Yet another aspect of the disclosure is a method that includes: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage and the power supply voltage; and controlling the regulated voltage using one or more variable voltage control elements to provide a variable regulated voltages.
  • In certain implementations, the method further includes providing the variable regulated voltages to one or more power amplifiers. A first die can include at least one variable voltage control element and a second die includes at least one of the one or more power amplifiers. The first die and the second die can be formed using different process technologies.
  • According to various implementations, the method further includes receiving one or more variable voltage control signals and adjusting the variable regulated voltage based on a power mode of the load receiving the variable regulated voltage in response to at least one of the one or more variable voltage control signals.
  • Another aspect of the disclosure is an apparatus that includes means for generating a regulated voltage based on a reference voltage and a power supply voltage. The apparatus also includes means for generating a variable regulated voltage from the regulated voltage.
  • One more aspect of the disclosure is a computer-readable storage medium including instructions that when executed perform a method of: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage and the power supply voltage; controlling the regulated voltages using one or more variable voltage control elements to provide a variable regulated voltages.
  • Yet another aspect of the disclosure is an apparatus that includes a voltage regulator that can receive a reference voltage, a feedback signal, and a power supply voltage, and generate based at least in part on the received voltages a regulated voltage. The apparatus also includes a voltage distribution circuit that can receive the regulated voltage from the voltage regulator and generate a plurality of regulated voltages voltage in response to one or more distribution control signals.
  • In a number of implementations, the voltage regulator includes a low-dropout regulator. According to certain implementations, the voltage distribution circuit includes a transmission gate voltage distribution network. According to some implementations, the voltage distribution circuit includes a transmission gate voltage distribution network. In some implementations, one or more of the plurality of regulated voltages are electrically connected to one or more power amplifier bias reference input nodes. According to various implementations, the voltage distribution circuit includes one or more silicon complementary metal oxide semiconductor circuit elements and at least one of the one or more power amplifiers includes a different process technology. In accordance with certain implementations, the one or more voltage distribution control signals can represent a plurality of power modes. In some implementations, the feedback signal is provided by a feedback loop that includes the distribution circuit. In accordance with a number of implementations, the apparatus includes a mobile device.
  • One more aspect of the disclosure is a method that includes: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage and the power supply voltage; and generating a plurality of regulated voltages from the reference voltage using a voltage distribution circuit.
  • In certain implementations, the method further includes providing one or more regulated voltages to one or more power amplifiers. A first die can include at least a portion of the voltage distribution circuit and a second die can include at least one of the one or more power amplifiers. The first die and the second die can be formed using different process technologies.
  • According to some implementations, generating the regulated voltage is based on a feedback signal provided by the voltage distribution circuit. In accordance with various implementations, two or more of the plurality of regulated voltages are generated concurrently. In a number of implementations, the method further includes receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to different loads based on power modes of the loads. According to certain implementations, the method further includes receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to loads in data paths configured to generate signals in different frequency bands.
  • Yet another aspect of the disclosure is an apparatus that includes means for generating a regulated voltage based on a reference voltage, a feedback signal, and a power supply voltage. The apparatus also includes means for generating a plurality of regulated voltages and the feedback signal based on the regulated voltage.
  • And yet another aspect of the disclosure is a computer-readable storage medium including instructions that when executed perform a method of: receiving a reference voltage and a power supply voltage; generating a regulated voltage based at least in part on the reference voltage, the power supply voltage, and a feedback loop that includes at least a portion of a voltage distribution circuit; and generating a plurality of regulated voltages from the reference voltage using the voltage distribution circuit.
  • For purposes of summarizing the disclosure, certain aspects, advantages and novel features of the inventions have been described herein. It is to be understood that not necessarily all such advantages may be achieved in accordance with any particular embodiment of the invention. Thus, the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other advantages as may be taught or suggested herein.
  • The present disclosure relates to U.S. Pat. No. ______ [Attorney Docket SKYWRKS.061A], titled “APPARATUS AND METHOD FOR VARIABLE VOLTAGE DISTRIBUTION,” and U.S. Pat. No. ______ [Attorney Docket SKYWRKS.062A], titled “APPARATUS AND METHOD FOR VARIABLE VOLTAGE FUNCTION,” each filed on even date herewith and each hereby incorporated by reference herein in its entirety.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 schematically depicts a power amplifier module for amplifying a radio frequency (RF) signal.
  • FIG. 2 schematically depicts an example wireless device that can have one or more of the power amplifier modules of FIG. 1 configured to provide one or more functionalities as described herein.
  • FIGS. 3A and 3B show example system architectures that can be implemented in the wireless device of FIG. 2.
  • FIGS. 4A and 4B schematically depict an example of how an RF signal to a power amplifier can be switched ON or OFF.
  • FIG. 5 shows that in certain embodiments, the switch depicted in FIGS. 4A and 4B can be formed as a triple-well CMOS device.
  • FIG. 6 shows an example configuration for operating the triple-well CMOS switch of FIG. 5.
  • FIG. 7 is a block diagram of a circuit for distributing voltages from a single voltage regulator to a plurality of power amplifiers according to one embodiment.
  • FIGS. 8A-8C illustrate block diagrams for distributing regulated voltages from a single low-dropout regulator according to certain embodiments.
  • FIG. 9 illustrates an embodiment of a low-dropout regulator circuit.
  • FIG. 10 is a block diagram of a circuit for providing a variable voltage from a voltage regulator a plurality of power amplifiers according to one embodiment.
  • FIG. 11 is a block diagram for generating a variable voltage from a single low-dropout regulator according to one embodiment.
  • FIG. 12 is a block diagram of a circuit for distributing variable, regulated voltages from a single voltage regulator according to one embodiment.
  • FIG. 13 is a block diagram for distributing variable voltages from a single low-dropout regulator according to one embodiment.
  • FIG. 14A shows a process of providing a plurality of regulated voltages from a single regulated voltage.
  • FIG. 14B shows a process of providing a variable regulated voltage from a single regulated voltage.
  • FIG. 14C shows a process of providing a plurality of variable regulated voltages from a single regulated voltage.
  • FIG. 15 illustrates an electronic system that includes a variable voltage distribution function according to one embodiment.
    •  DETAILED DESCRIPTION OF CERTAIN EMBODIMENTS
  • The following detailed description of certain embodiments presents various descriptions of specific embodiments of the invention. However, the invention can be embodied in a multitude of different ways as defined and covered by the claims. In this description, reference is made to the drawings where like reference numerals indicate identical or functionally similar elements.
  • The headings provided herein, if any, are for convenience only and do not necessarily affect the scope or meaning of the claimed invention.
  • Provided herein are various non-limiting examples of devices and methods for facilitating amplification of a radio frequency (RF) signal. FIG. 1 schematically depicts a power amplifier module (PAM) 10 that can be configured to achieve such an amplification of the RF signal so as to yield an output RF signal. As described herein, the power amplifier module can include one or more power amplifiers (PA).
  • FIG. 2 schematically depicts a device 11, such as a wireless device, for which one or more power amplifiers controlled by one or more features of the present disclosure can be implemented. The example wireless device 11 depicted in FIG. 2 can represent a multi-band and/or multi-mode device such as a multi-band/multi-mode mobile phone.
  • By way of examples, Global System for Mobile (GSM) communication standard is a mode of digital cellular communication that is utilized in many parts of the world. GSM mode mobile phones can operate at one or more of four frequency bands: 850 MHz (approximately 824-849 MHz for Tx, 869-894 MHz for Rx), 900 MHz (approximately 880-915 MHz for Tx, 925-960 MHz for Rx), 1800 MHz (approximately 1710-1785 MHz for Tx, 1805-1880 MHz for Rx), 1900 MHz (approximately 1850-1910 MHz for Tx, 1930-1990 MHz for Rx). Variations and/or regional/national implementations of the GSM bands are also utilized in different parts of the world.
  • Code division multiple access (CDMA) is another standard that can be implemented in mobile phone devices. In certain implementations, CDMA devices can operate in one or more of 900 MHz and 1900 MHz bands.
  • One or more features of the present disclosure can be implemented in the foregoing example modes and/or bands, and in other communication standards. For example, 3G and 4G are non-limiting examples of such standards.
  • In certain embodiments, the wireless device 11 can include a transceiver component 13 configured to generate RF signals for transmission via an antenna 14, and receive incoming RF signals from the antenna 14. It will be understood that various functionalities associated with the transmission and receiving of RF signals can be achieved by one or more components that are collectively represented in FIG. 2 as the transceiver 13. For example, a single component can be configured to provide both transmitting and receiving functionalities. In another example, transmitting and receiving functionalities can be provided by separate components.
  • Similarly, it will be understood that various antenna functionalities associated with the transmission and receiving of RF signals can be achieved by one or more components that are collectively represented in FIG. 2 as the antenna 14. For example, a single antenna can be configured to provide both transmitting and receiving functionalities. In another example, transmitting and receiving functionalities can be provided by separate antennas. In yet another example, different bands associated with the wireless device 11 can be provided with one or more antennas.
  • In FIG. 2, one or more output signals from the transceiver 13 are depicted as being provided to the antenna 14 via one or more transmission paths 15. In the example shown, different transmission paths 15 can represent output paths associated with different bands and/or different power outputs. For example, two example power amplifiers 17 shown can represent amplifications associated with different power output configurations (e.g., low power output and high power output), and/or amplifications associated with different bands.
  • In FIG. 2, one or more detected signals from the antenna 14 are depicted as being provided to the transceiver 13 via one or more receiving paths 16. In the example shown, different receiving paths 16 can represent paths associated with different bands. For example, the four example paths 16 shown can represent quad-band capability that some wireless devices are provided with.
  • FIG. 2 shows that in certain embodiments, a switching component 12 can be provided, and such a component can be configured to provide a number of switching functionalities associated with an operation of the wireless device 11. In certain embodiments, the switching component 12 can include a number of switches configured to provide functionalities associated with, for example, switching between different bands, switching between different power modes, switching between transmission and receiving modes, or some combination thereof. Various non-limiting examples of such switches are described herein in greater detail.
  • FIG. 2 shows that in certain embodiments, a control component 18 can be provided, and such a component can be configured to provide various control functionalities associated with operations of the switching component 12, the power amplifiers 17, and/or other operating component(s). Non-limiting examples of the control component 18 are described herein in greater detail.
  • FIG. 2 shows that in certain embodiments, a processor 20 can be configured to facilitate implementation of various processes described herein. For the purpose of description, embodiments of the present disclosure may also be described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, may be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the acts specified in the flowchart and/or block diagram block or blocks.
  • In certain embodiments, these computer program instructions may also be stored in a computer-readable memory (19 in FIG. 2) that can direct a computer or other programmable data processing apparatus to operate in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the acts specified in the flowchart and/or block diagram block or blocks. The computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operations to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions that execute on the computer or other programmable apparatus provide steps for implementing the acts specified in the flowchart and/or block diagram block or blocks.
  • FIGS. 3A and 3B show non-limiting examples of system architectures that can include one or more features of the present disclosure. For the purpose of description, the example architectures are depicted with two RF bands; however, it will be understood that other numbers of RF bands are also possible. For example, system architectures having similar functionalities can be implemented in configurations having more than two bands (e.g., quad-band) or a single-band configuration.
  • In one example architecture 22, a first RF input indicated as “LB IN” and corresponding to a first band (e.g., a low band) can be amplified by one or more power amplifiers disposed and/or formed on a die 24 a. Such amplified output RF signal is indicated as “LB OUT,” and can be subjected to impedance matching (e.g., to approximately 50Ω) by a component depicted as 30 a. Similarly, a second RF input indicated as “HB IN” and corresponding to a second band (e.g., a high band) can be amplified by one or more power amplifiers disposed and/or formed on a die 24 b. Such amplified output RF signal is indicated as “HB OUT,” and can be subjected to impedance matching by a component depicted as 30 b (e.g., to approximately 50Ω).
  • In certain embodiments, amplification for a given RF band can include two or more amplification modes. For the example low RF band, the RF input LB IN can be routed to a high power amplification mode or a low/medium power amplification mode via a switch depicted as 32 a. If the switch 32 a is set for the high power mode, the RF signal can undergo amplification by one or more power amplifiers (e.g., by staged amplifiers 29 a and 29 b) so as to yield a high power output. If the switch 32 a is set for the low/medium power mode, the RF signal can undergo amplification by one or more power amplifiers.
  • In certain embodiments, the switch 32 a need not be employed. For example, the input impedance of the staged amplifiers 29 a and 30 a can be substantially matched, and the RF input LB IN can be provided to both staged amplifiers 29 a and 30 a.
  • In the example shown, a low power mode can be achieved by utilizing a power amplifier 30 a; and a medium power mode can be achieved by amplifying the RF signal in stages by the power amplifier 30 a and a second power amplifier 30 b. Examples of switching and routing of the RF signals to allow selection of the low, medium and high power operating modes are described herein in greater detail. The low/medium amplified output RF signal can be subjected to impedance matching by a component depicted as 31 a prior to being output in a manner similar to that of the high power output signal.
  • Similarly, for the example high RF band, the RF input HB IN can be routed to a high power amplification mode or a low/medium power amplification mode via a switch depicted as 32 b. If the switch 32 b is set for the high power mode, the RF signal can undergo amplification by one or more power amplifiers (e.g., by staged amplifiers 29 c and 29 d) so as to yield a high power output.
  • If the switch 32 b is set for the low/medium power mode, the RF signal can undergo amplification by one or more power amplifiers. In the example shown, a low power mode can be achieved by utilizing a power amplifier 30 c; and a medium power mode can be achieved by amplifying the RF signal in stages by the power amplifier 30 c and a second power amplifier 30 d. Examples of switching and routing of the RF signals to allow selection of the low, medium and high power operating modes are described herein in greater detail. The low/medium amplified output RF signal can be subjected to impedance matching by a component depicted as 31 b prior to being output in a manner similar to that of the high power output signal.
  • In the example architecture 22 depicted in FIG. 3A, operation of the low and medium power modes can be facilitated by switch assemblies 27 a, 28 a (for the low band) and 27 b, 28 b (for the high band). To operate in a low or medium power mode, for the low band, the switch 28 a can be closed, and the switch 32 a can be in a state that routes the LB IN signal to the power amplifier 30 a. To operate in a medium power mode, a connecting switch (depicted as the upper one in the switch assembly 27 a) can be closed and a bypass switch (depicted as the lower one) can be opened, such that the power amplifiers 30 a and 30 b amplify the LB IN signal in stages to yield the medium power output. To operate in a low output mode, the connecting switch of the switch assembly 27 a can be opened and the bypass switch of the switch assembly 27 a can be closed, such that the LB IN signal is amplified by the power amplifier 30 a by bypasses the power amplifier 30 b so as to yield the low power output. Operation of low or medium power mode for the high band can be achieved in a similar manner utilizing the switch assemblies 27 b and 28 b.
  • In the example configuration 22 shown in FIG. 3A, various switches (e.g., 27 a, 27 b, 28 a, 28 b) are depicted as being part of a die 23. In certain embodiments, the die 23 can also include a power amplifier bias control component 25. The PA bias control component 25 is depicted as controlling the example PAs (29 a, 29 b, 30 a, 30 b of the low band portion, and 29 c, 29 d, 30 c, 30 d of the high band portion) via bias control lines depicted as 33 a and 33 b. In certain embodiments, the PA bias control component 25 can be provided with one or more input control signals 26 so as to facilitate one or more functionalities associated with various PAs as described herein.
  • In certain embodiments, various switches and power amplifiers associated with the dies depicted as 24 a, 24 b can be fabricated on substrates such as gallium arsenide (GaAs) utilizing devices such as pseudomorphic high electron mobility transistors (pHEMT) or bipolar field effect transistors (BiFET). In certain embodiments, the dies depicted as 24 a, 24 b in FIG. 3A can be formed on the same GaAs substrate, or on separate GaAs substrates. Further, functionalities associated with the dies depicted as 24 a, 24 b can be formed on a single die, or on separate dies.
  • In certain embodiments, various switches (e.g., 27 a, 27 b, 28 a, 28 b) associated with operation of various PAs (e.g., 29 a, 29 b, 30 a, 30 b of the low band portion, and 29 c, 29 d, 30 c, 30 d of the high band portion) can be fabricated as complementary metal-oxide-semiconductor (CMOS) devices. In certain embodiments, at least some of the PA bias control component 25 can be implemented on a CMOS die. In the example shown in FIG. 3A, the switches (e.g., 27 a, 27 b, 28 a, 28 b) and the PA bias control component 25 are depicted as being parts of the same CMOS die 26. In certain embodiments, such switches and PA bias control component can be parts of different CMOS dies.
  • In certain embodiments, at least one power amplifier and one or more switches associated with its operation can be implemented on a CMOS die.
  • FIG. 3B shows an example architecture 34 that can generally provide dual-band signal amplification functionalities similar to that described in reference to FIG. 3A. In FIG. 3B, “IN 1” and “OUT 1” can represent the low band input and output LB IN and LB out; and “IN 2” and “OUT 2” can represent the high band input and output HB IN and HB OUT. Further, switching functionality associated with switches 32 a and 32 b can be provided by switches 37 a and 37 b. For high power mode of operation, PAs 29 a, 29 b, 29 c, 29 d that are parts of dies 36 a, 36 b can be similar to the dies 24 a, 24 b described in reference to FIG. 3A.
  • In FIG. 3B, power amplifiers 38 a, 38 b, 38 c, 38 d corresponding to the medium/low power modes are depicted as being formed on the same die 35 (e.g., CMOS die) on which the switches (e.g., 27 a, 27 b, 28 a, 28 b) are formed. Other than these components being on the same CMOS die, operation of the example medium/low power modes can be achieved in a manner similar to those described in reference to FIG. 3A.
  • Similar to FIG. 3A, the example configuration 34 of FIG. 3B includes a PA bias control component 37 that is part of the example CMOS die 35. The PA bias control component 37 is depicted as receiving one or more input control signals 28 and controlling one or more functionalities associated with the various PAs. The PAs (e.g., 29 a, 29 b for the first band, and 29 c, 29 d for the second band) associated with the high power mode are depicted as being controlled via bias control lines 39 a and 39 b. The PAs (e.g., 38 a, 38 b for the first band, and 38 c, 38 d for the second band) associated with the medium/low mode are depicted as being controlled via bias control lines 39 c and 39 d.
  • It will be understood that the configurations 22 and 34 of FIGS. 3A and 3B are specific examples of design architectures that can be implemented. There are a number of other configurations that can be implemented utilizing one or more features of the present disclosure.
  • In the context of switches for RF power amplifiers, FIGS. 4A and 4B shows a switching configuration 40 that can form a basis for more complex architectures. In a signal path configuration 40 a of FIG. 4A, an RF signal can be routed through a first path 42 a by providing a switch S1 that is closed. In the configuration 40 a, second path 42 b is depicted as having a switch S2 that is open and a power amplifier. Thus, for the purpose of operating the power amplifier in the example path 42 b, the configuration 40 a can represent an OFF state.
  • In a signal path configuration 40 b of FIG. 4B that can represent an ON state for the power amplifier, the switch S2 on the second path 42 b is closed and the switch S1 on the first path 42 a is open. For the purpose of description of FIGS. 4A and 4B, the first example path 42 a is depicted without any component other than the switch S1. It will be understood that there may be one or more components (e.g., one or more power amplifiers) along the first path 42 a.
  • In the context of power amplifiers that can be included in portable and/or wireless devices (e.g., mobile phones), a power amplifier system can be subjected to varying processes and operating conditions such as voltage and temperature variations. For example, a power amplifier system can be powered using a variable supply voltage, such as a battery of a mobile phone.
  • In certain situations, it can be important for a power amplifier system to switch between power modes so that the power amplifier switch can control power consumption. For example, in a mobile device embodiment, having a plurality of power modes allows the power amplifier to extend battery life. Control signals, such as mode input signals received on a pin or pad, can be used to indicate a desired mode of operation. The power amplifier system can include a plurality of RF signal pathways, which can pass through power amplification stages of varying gain. Switches can be inserted in and/or about these pathways, and switch control logic can be used to enable the switches and power amplifiers associated with the selected power amplifier RF signal pathway.
  • Placing a switch in a signal path of a power amplifier (e.g., in the example signal path 42 b of FIGS. 4A and 4B) can produce a number of effects. For example, insertion of a switch into a RF signal pathway can result in a loss of signal power due to radiation and resistive losses. Additionally, even a switch in an OFF state placed along an active RF signal pathway can attenuate a RF signal. Thus, it can be important that the switch introduce low insertion loss in both ON and OFF states. Furthermore, it can be important that the switch be highly or acceptably linear, so as to reduce distortion of a RF signal which passes through the switch. Distortion can reduce the fidelity of an RF signal; and reduction of such distortion can be important in a mobile system embodiment.
  • In certain embodiments, switches can be integrated on a mixed-transistor integrated circuit (IC) having power amplification circuitry, such as a BiFET, BiCMOS die employing silicon or GaAs technologies. Additionally, switches can be provided on a discrete die, such as a pHEMT RF switch die, and can be configured to interface with a mixed-transistor power amplifier die to implement a configurable power amplifier system. However, these approaches can be relatively expensive and consume significant amounts of area as compared to a silicon CMOS technology. Power consumption and the area of a power amplifier system can be important considerations, such as in mobile system applications. Thus, there is a need for employing a CMOS switch in a RF signal power amplifier system.
  • In certain embodiments, CMOS RF switches can be relatively large, so that the switch resistance in an ON-state can be relatively small so as to minimize RF insertion loss. However, large CMOS RF switches can have undesirable parasitic components, which can cause significant leakages and cause damage to RF signal fidelity. Additionally, the wells and active areas of the CMOS RF switches can have associated parasitic diode and bipolar structures. Without proper control of the wells of a CMOS RF switch, parasitic structures may become active and increase the power consumption of the power amplifier system and potentially render the system dysfunctional. Furthermore, CMOS devices are susceptible to breakdown, such as gate oxide breakdown, and other reliability concerns, so it can be important to properly bias a CMOS RF switch during operation.
  • In certain embodiments, one or more switches described herein can be selectively activated depending on a variety of factors, including, for example, a power mode of the power amplifier system. For example, in a high power mode a CMOS RF switch may be positioned in an OFF state and configured to be in a shunt configuration with the active RF signal path. The isolated P-well voltage of such a switch can be controlled to both prevent overvoltage or other stress conditions which may endanger the reliability, while optimizing or improving the linearity of the switch. The linearity of the RF signal pathway having a shunt CMOS switch in an OFF-state can be improved by keeping the isolated P-well voltage at a selected voltage (e.g., relatively low voltage) so as to avoid forward biasing of parasitic diode structures formed between the P-well and the N-type diffusion regions of the source and drain. By preventing the forward-biasing of parasitic diode structures, the injection of unintended current into the active RF signal pathway can be avoided, thereby increasing linearity of the power amplifier system.
  • In certain embodiments, some or all of the foregoing example properties can be addressed by one or more features associated with a CMOS RF switch, such as a switch 50 depicted in FIG. 5. The example switch 50 can include a triple-well structure having an N-well 52 and a P-well 53 formed on a P-type substrate 51. As shown in FIG. 5, the N-well 52 can surround the P-well 53 so as to electrically isolate the P-well 53 from the substrate 51. The N-well 52 can be formed by using, for example, a deep N-well or any other suitable N-type buried layer.
  • The switch 50 further includes a source terminal 56 and a drain terminal 59. An oxide layer 65 is disposed on the P-well 53, and a gate 58 is disposed on top of the oxide layer 65. An N-type source diffusion region and an N-type drain diffusion region corresponding to the source and drain terminals (56, 59) are depicted as regions 57 and 60, respectively. In certain embodiments, formation of the triple-well structure and the source, drain and gate terminals thereon can be achieved in a number of known ways.
  • In certain operating situations, an input signal can be provided to the source terminal 56. Whether the switch 50 allows the input signal to pass to the drain terminal 59 (so as to yield an output signal) can be controlled by application of bias voltages to the gate 58. For example, application of a first gate voltage can result in the switch 50 being in an “ON” state to allow passage of the input signal from the source terminal 56 to the drain terminal 59; while application of a second gate voltage can turn the switch 50 “OFF” to substantially prevent passage of the input signal.
  • In certain embodiments, the switch 50 can include a P-well terminal 54 connected to the P-well 53 by a P-type diffusion region 55. In certain embodiments, the P-type diffusion region 55 and the N- type diffusion regions 57 and 60 can be all formed substantially in the P-well 53. In certain embodiments, the P-well terminal 54 can be provided with one or more voltages, or held at one or more electrical potentials, to facilitate controlling of an isolated voltage of the P-well. Examples of such P-well voltages are described herein in greater detail.
  • In certain embodiments, the switch 50 can include an N-well terminal 61 connected to the N-well 52 by an N-type diffusion region 62. In certain embodiments, the N-type diffusion region 62 can be formed substantially in the N-well 52. In certain embodiments, the N-well terminal 61 can be provided with one or more voltages, or held at one or more electrical potentials, to provide the switch 50 with one or more desired operating performance features. One or more examples of such N-well voltages are described herein in greater detail.
  • In certain embodiments, the switch 50 can include a P-type substrate terminal 63 connected to the P-type substrate 51 and having a P-type diffusion region 64. In certain embodiments, the P-type diffusion region 64 can be formed substantially in the P-type substrate 51. In certain embodiments, the P-type substrate terminal 63 can be provided with one or more voltages, or held at one or more electrical potentials, to provide the switch 50 with one or more desired operating performance features. One or more examples of such N-well voltages are described herein in greater detail.
  • In the example CMOS device shown in FIG. 5, the switching functionality of the switch 50 is generally provided by an NMOS transistor defined by the N-type diffusion regions (57, 60) in the P-well 53. FIG. 6 shows that for such a configuration, diodes can form at p-n junctions of the triple well structure. For example, a diode 72 can have an anode formed from the P-well 53, and a cathode formed from the N-type diffusion region 57. Similarly, a diode 73 can have an anode formed from the P-well 53 and a cathode formed from the N-type diffusion region 60. Depending on the voltage of the P-well 53 relative to the voltages of the N- type diffusion regions 57 and 60, the diodes 72 and 73 can be biased in, for example, a reverse bias or forward bias region of operation. For the purpose of description herein, bias voltages applied to the N-type diffusion regions 57 and 60 (corresponding to the source and drain terminals, respectively) may or may not be the same. Further, for the purpose of description herein, a reverse bias can include a configuration where a voltage associated with an N-type region is equal to or greater than a voltage associated with a P-type region that forms a p-n junction with the N-type region.
  • In certain embodiments, the N- type diffusion regions 57 and 60 can be held at substantially the same DC voltage. In certain embodiment, such a configuration can be achieved by providing a relatively large value shunt resistor (e.g., polysilicon resistor) 75 across the source and the drain.
  • In the context of triple-well CMOS devices, the N-well 52 can substantially isolate the P-well 53 from the P-type substrate 51. In certain embodiments, the presence of the N-well 52 between the P-well 53 and the P-type substrate 51 can result in two additional diodes. As shown in FIG. 6, the illustrated triple well structure can include a diode 71 having an anode formed from the P-well 53 and a cathode formed from the N-well 52. Similarly, the triple well structure can include a diode 70 having an anode formed from the P-type substrate 51 and a cathode formed from the N-well 52.
  • In certain embodiments, the switch 50 can be operated so as to reverse-bias one or more of the diodes shown in FIG. 6. To maintain such reverse-biases, the source terminal, drain terminal, gate terminal, P-well terminal, N-well terminal, P-substrate terminal, or any combination thereof, can be provided with one or more voltages, or held at one or more electrical potentials. In certain embodiments, such voltages or electrical potentials can also provide one or more additional functionalities that can improve the performance of the switch 50. Non-limiting examples of such performance enhancing features are described herein in greater detail. Although FIGS. 5 and 6 have described an NMOS transistor as providing the functionality of a switch, a PMOS transistor can also be employed.
    • Voltage Regulation
  • A number of applications can require multiple accurate regulated voltages. For example, multiple accurate power amplifier (PA) bias voltages can be required in the systems of FIGS. 3A, 3B, among others. As discussed above, PAs can be implemented in a number of applications, for example, mobile devices such as mobile phones. The techniques described herein that use a single voltage regulator to provide variable and/or distributed regulated voltages can result in power savings that can have result in numerous advantages, for example, prolonging battery life of a mobile device. Prolonged battery life can be convenient in some circumstances and critical in others. For example, a longer battery life can be a matter of life or death in emergency situations, such as being lost in the woods or trapped in a car during a snowstorm. Additionally, a longer battery life is good for the environment, as less power consumption helps to prevent depletion of natural resources and reduces the need for additional power generation.
  • One conventional approach to providing multiple accurate regulated voltages involves using multiple low-dropout regulators (LDOs) to regulate the voltages that are passed to each stage of a PA at each power mode. An LDO for each stage is typically implemented, as well as LDOs with different output voltages. Although it can be desirable to keep current and area consumption as low as possible, these conventional approaches to voltage regulation can increase die area and voltage distribution complexity. Moreover, multiple LDOs can also make such designs and their respective products fail cost, area, and/or current consumption targets or specifications. Another conventional approach to achieve variable PA quiescent bias points is to add a bleed function to the PA bias.
  • Advantageously, accurate voltages as programmed and/or controlled by a user can be distributed using a single voltage regulator, such as a single LDO. Alternatively or additionally, each of these accurate voltages can be selectively adjusted to a desired voltage level using one or more variable voltage control elements. Moreover, distribution and/or variable control of regulated voltage(s) can be done in a manner consistent with the demanding specifications required for analog circuits. Using a single voltage regulator instead of multiple voltage regulators can result in significant savings in die area, lower current consumption, and reduced design complexity. In addition, such a solution can provide additional flexibility for future architectural changes or functionality.
  • Further, multiple voltage references can be used to create different quiescent bias points depending upon a desired power mode. The specifications in the industry for quiescent current in each power mode for the PAM can be aggressive, especially for PAs used in RF applications. Therefore, there is a need to change the regulated voltage to some of the PA transistors depending on a chosen power mode.
  • Moreover, a number of process technologies can be used to implement such a voltage regulator, including without limitation GaAs, pHEMPT, BiFET, and CMOS technologies. Although GaAs, pHEMPT, or BiFET technologies have typically been considered more desirable technologies than CMOS for implementing PAM RF switches and their associated data paths, voltage regulation can be implemented in CMOS according to one embodiment. Multi-mode products being introduced on the market today can require advanced architectures used to switch between various power modes (e.g., high power, medium power, and low power). One such architecture is available in products from the Assignee of this application, Skyworks Solutions, Inc. of Woburn, Mass. With market pressure to reduce costs and maintain profitable gross margins, these architectures may become more cost-effective by using a lower cost technology, such as bulk or triple-well CMOS, despite certain shortcomings. For example, using CMOS RF switches in such a hybrid application, the RF CMOS switches used are typically very large to provide low RF insertion loss. Due to their size and undesirable parasitics, these switches can exhibit significant losses and leakages. These leakages can lead to problematic and/or unintended forward active regions of operation which make entire PAM systems dysfunctional. Therefore, a solution using CMOS that overcomes such obstacles would be desirable.
    • Distribution of Regulated Voltages
  • FIG. 7 is a block diagram of a voltage distribution circuit 100 for distributing regulated voltages according to one embodiment. The illustrated voltage distribution circuit 100 includes a single voltage regulator 102, a distribution circuit 104, a control circuit 106, and PAs 108 a-108 n. The illustrated components of the distribution circuit 100 can be implemented on one or more integrated circuits using one or more semiconductor technologies. The voltage regulator 102, the distribution circuit 104, and the control circuit can be implemented, for example, as part of the PA bias control 25 (FIG. 3A), 37 (FIG. 3B) described above. The voltage distribution circuit 100 can provide a plurality of regulated voltages Vreg[1: N] to bias power amplifiers 108 a-108 n from the single voltage regulator 102. The voltage distribution circuit 100 can implement a function to distribute a single input reference voltage Vref_in to a plurality of regulated voltages Vreg[1:N] with the distribution circuit 104 and the control circuit 106.
  • The voltage regulator 102 can receive a reference voltage Vref_in, a power supply voltage, and a feedback signal Vfb as inputs and generate a regulated output voltage Vreg_out as an output. The voltage regulator 102 can compare the regulated output voltage Vreg_out to the reference voltage Vref_in and differences between the regulated output voltage Vreg_out and the fixed, internal reference voltage Vref_in can create a negative feedback loop to reduce the voltage error. The regulated output voltage Vreg_out can have a higher voltage value than the reference voltage Vref_in. The feedback signal Vfb can be a voltage provided by the distribution circuit 104. The regulated output voltage Vreg_out can be used as a stable power supply voltage, which can be independent of load impedance, input-voltage variations, temperature, and/or time. The voltage regulator 102 can include an operational amplifier, transistors, resistive elements, and/or diodes to create the regulated output voltage Vreg_out.
  • One characteristic of a voltage regulator is a dropout voltage. The dropout voltage can represent the difference between the output voltage and the input voltage at which a voltage regulator quits regulation with further reductions in input voltage. A dropout voltage is typically considered to be reached when the output voltage has dropped to approximately 100 mV below the nominal value. The dropout voltage, which can characterize the regulator, can depend on, for example, load current and junction temperature of a pass transistor.
  • The dropout voltage can divide voltage regulators into three classes: standard regulators, quasi-LDOs, and LDOs. Standard regulators can employ NPN pass transistors, and typically drop out at about 2 V. Quasi-LDO regulators can use a Darlington structure to implement a pass device made up of an NPN transistor and a PNP. The dropout voltage, VSAT(PNP)+VBE(NPN), can typically be about 1 V. LDOs can have a dropout voltage of less than about 1 V, for example, about 100 mV to 200 mV. The voltage regulator 102 can include any of these types of voltage regulators.
  • Alternatively or additionally, voltage regulators can be defined by their schematic topology. As one example, LDOs can include an open collector or an open drain topology. For example, as shown in FIG. 9, the PMOS transistor 134 has a gate connected to the output of error amplifier 132, a source connected to Vbatt, and a drain that provides an output voltage Vout. Such a topology can be called an open drain circuit because the drain of the PMOS transistor 134 drives an output load. An open collector circuit is a similar topology that can use a bipolar transistor instead of a MOSFET. These topologies can enable transistor saturation in a transistor driving an LDO output and limit the voltage drop to the saturation drop. In contrast, an emitter follower topology (also referred to as a common collector) can include providing an output voltage from the emitter, in which the emitter is connected to a first end of a resistor and a second end of the resistor is connected to a power rail or ground reference. More details regarding LDOs will be provided later in connection with FIG. 9.
  • The reference voltage Vref_in can be a fixed internal reference voltage with a known voltage value. In one embodiment, the reference voltage Vref_in can be provided by a bandgap circuit, which is a circuit that can produce a reference voltage close to the theoretical bandgap of silicon at 0° K. In such an embodiment, the reference voltage Vreg_in can be around 1.25 V.
  • The power supply voltage Vbatt can be provided by a battery. Alternatively or additionally, the power supply voltage can be provided by any suitable source of a power supply. The power supply voltage Vbatt can provide a voltage of, for example, about 1.5 V to 9.0 V. In one embodiment, the power supply voltage Vbatt can be provided by a lithium ion battery having a voltage of about 4.2 V when fully charged and a voltage of about 2.7 V when almost discharged. While a battery discharges, the voltage regulator 102 can provide a constant output voltage Vreg_out of, for example, around 2.5 V. The power supply voltage Vbatt can be an upper limit on the output voltage Vreg_out.
  • The distribution circuit 104 can receive the regulated output voltage Vreg_out from the voltage regulator 102 and one or more distribution control signals Distribution_Control from the control circuit 106. From these inputs, the distribution circuit can provide the voltage regulator 102 with a feedback signal Vfb and provide a plurality of PAs 108 a-108 n with a plurality of regulated voltages Vreg[1:N]. Each of the regulated voltages Vreg[1:N] can be provided to one or more of the PAs 108 a-108 n or individual stages of the PAs108 a-108 n. For example, in one embodiment, a PA can comprise two or more stages and two or more of the stages can receive different regulated voltages. From such a PA, outputs from different stages can be used for different purposes, for example, different power modes as will be described with more detail in connection with FIG. 15. The distribution can comprises switches, such as transistors, or any suitable distribution elements operative to distribute accurate regulated output voltages. More detail regarding a particular embodiment of the distribution circuit 104 will be provided in connection with FIGS. 8A-8C.
  • The control circuit 106 can provide the distribution circuit 104 with one or more distribution control signals Distribution_Control. The distribution control signals Distribution_Control can selectively control the regulated voltages Vreg[1:N] based on desired operation of the PAs 108 a-108 n. For example, the distribution control signals Distribution_Control can adjust outputs of the distribution circuit 104 to enable/disable certain PAs and/or based on voltage levels desired for different power modes. More detail regarding particular embodiments of the control circuit 106 will be provided in connection with FIGS. 8A-8C.
  • The plurality of PAs 108 a-108 n can use the regulated voltages Vreg[1: N] as bias signals in amplifying signals for transmission. The plurality of PAs 108 a-108 n can implement any of the PAs described above, for example, with reference to FIGS. 2, 3A, 3B, 4A, 4B. Each of the illustrated PAs 108 a-108 n can represent one or more PAs. In addition, one or more of the PAs 108 a-108 n can include two or more stages that can receive different regulated voltages provided by the distribution circuit 104. This feature is illustrated in FIG. 15.
  • One or more of the plurality of PAs 108 a-108 n can be implemented on either the same integrated circuit and/or a different integrated circuit than the distribution circuit 104 and/or the control circuit 106, for example, as shown in FIGS. 3A and 3B. One or more of the PAs 108 a-108 n can be implemented in a different technology than the distribution circuit 104. For example, the distribution circuit 104 can be implemented in a silicon CMOS technology and one or more of the PAs 108 a-108 n can be implemented in, for example, GaAs pHEMPT or BiFET technologies. This can be advantageous because certain applications, such as PAM RF switches, can be better implemented in GaAs pHEMPT or BiFET, while the characteristics of less expensive CMOS technology can provide the required characteristics of the distribution circuit 104.
  • FIGS. 8A-8C illustrate functional block diagrams for distributing regulated voltages from a single voltage regulator according to certain embodiments. Voltage distribution systems 110A, 1106, 110C illustrate three different ways of controlling voltage distribution. The voltage distribution systems 110A, 1106, 110C each include a single LDO 112, distribution elements 114, feedback elements 116, and control circuits 120, 122, 124. These systems can be used, for example, to distribute a single regulated output voltage to each of a plurality of PA bias references.
  • The single LDO 112 is an example of the voltage regulator 102 (FIG. 7) and can implement any combination of the functionality described above with reference to the voltage regulator 102. The single LDO 112 can be used to provide a stable power supply voltage independent of load impedance, input-voltage variations, temperature, and time. As described above, an LDO can be defined by a dropout voltage and/or schematic topology. LDOs can have a lower dropout voltage and dissipation than quasi-LDOs or standard voltage regulators, and thus can be more efficient. In some embodiments, LDOs can have lower maximum input voltage specifications than standard voltage regulators and/or can require certain external capacitors to maintain stability.
  • LDOs can maintain voltage regulation with small differences between supply voltage and load voltage. For example, a lithium-ion battery can drop from about 4.2 V (fully charged) to about 2.7 V (almost discharged) and an LDO can maintain a constant voltage of approximately 2.5 V at the load. Advantageously, an LDO can be used in any equipment that needs constant and stable voltage, while minimizing the upstream supply and/or working with wide fluctuations in upstream supply. Typical examples of circuits that can receive the LDO output include without limitation circuitry with digital or RF loads. For example, LDOs can be used in portable applications to maintain the required system voltage independent of the state of battery charge.
  • The LDO 112 can be a “linear” series voltage regulator. Such voltage regulators typically include an input configured to receive a reference voltage, a means of scaling the output voltage and comparing it to the reference, a feedback amplifier, and a series pass transistor (bipolar or FET) with a voltage drop that can be controlled by the amplifier to maintain the output at the required value. For example, if the load current decreases, causing the output to rise incrementally, the error voltage can increase, the amplifier output can rise, the voltage across the pass transistor can increase, and the output can return to its original value.
  • One or more of the PAs 108 a-108 n can be implemented in a different technology than the LDO 112. For example, LDO 112 can be implemented in CMOS technology, such as bulk CMOS, and one or more of the PAs 108 a-108 n can be implemented in, for example, GaAs pHEMPT or BiFET technologies. Alternatively or additionally, one or more of the PAs 108 a-108 n can be implemented in the same technology as the LDO 112, for example, CMOS, GaAs pHEMPT, or BiFET technologies.
  • One embodiment of the LDO 112 is provided in FIG. 9. LDO 130 can include an error amplifier 132 and a PMOS pass transistor 134. The error amplifier 132 and the PMOS pass transistor 134 can form a voltage-controlled current source. The error amplifier 132 can include a positive input terminal connected to Vref_in, a negative input terminal, and an output. The PMOS pass transistor 134 can include a gate, a source, and a drain. As illustrated in FIG. 9, the gate of the PMOS pass transistor 134 can be connected to the output of the error amplifier 132, the source can be connected to a battery voltage Vbatt, and the drain can provide an output voltage Vout. The output voltage Vout can be provided to one or more loads, such as a bias input to a PA, and a high gain feedback loop. In one embodiment, the high gain feedback loop can include distribution elements 136. This can be advantageous because by integrating the distribution network 136 into the LDO feedback path the circuit can better compensate for process, temperature, and supply variations, and thus increase the accuracy of the regulated voltages provided. Accordingly, in this embodiment, the distribution elements 136 may not introduce additional variation in regulated voltages provided to loads, such as PAs.
  • In the feedback loop, the output voltage Vout can be scaled down by the voltage divider that includes resistors R1, R2. A first end of a first resistor R1 can be connected to the drain of PMOS pass transistor 134. A second end of the first resistor R1 can be connected to the first end of the second resistor R2 and the positive input of the error amplifier 132. The second end of the second resistor R2 can be connected to ground. The first resistor R1 and the second resistor R2 can correspond to the feedback elements 116 of FIGS. 8A-8C. The values of the first resistor R1 and the second resistor R2 can be selected to set the gain of the LDO. For example, the output voltage Vout can be represented by the following equation:

  • Vout=Vref — in+Vref — in*R1/R2
  • In the embodiment shown in FIG. 9, the pass device 136 is a PMOS transistor. However, a variety of pass devices can be used in LDOs based on a desired application. Examples of other types of pass devices can include without limitation NPN bipolar transistors, PNP bipolar transistors, and Darlington circuits. For a given supply voltage, bipolar pass devices can deliver the highest output current in certain embodiments. In some applications, a PNP can be preferred to an NPN, because the base of the PNP can be pulled to ground, fully saturating the transistor if necessary. Typically, the base of the NPN can only be pulled as high as the supply voltage, limiting the minimum voltage drop to the voltage difference between the base and the emitter VBE. As a result, NPN and Darlington pass devices are typically used in applications with dropout voltages of 1 V or more, which are not typically considered LDO devices. Yet in other embodiments, NPN and Darlington pass devices can be used to implement dropout voltages of LDOs. NPN and Darlington pass devices can be desirable in applications where wide bandwidth and immunity to capacitive loading are necessary, as they typically have characteristically low output impedance. PMOS and PNP transistors can be effectively saturated in LDOs, thereby minimizing the voltage loss and the power dissipated by the pass device, thus allowing low dropout, high-efficiency voltage regulators. PMOS pass devices can provide a lower dropout voltage than PNP transistors, approximately RDs(ON)×IL in some embodiments. PMOS pass devices can also allow the quiescent current flow to be minimized. A typical drawback of using a MOS transistor is that it has been implemented as an external component, especially for controlling high currents. This can result in making the IC a controller, rather than a complete self-contained regulator.
  • Referring back to FIGS. 8A-8C, the output Vreg_out of the single LDO 112 can be provided to distribution elements 114. The distribution elements 114 are one exemplary embodiment of the distribution circuit 104 (FIG. 7).
  • The distribution elements 114 can include a transmission gate voltage distribution network of switches. In response to signals provided by a control circuit 120, 122, 124, the distribution elements can selectively provide regulated output voltages to a plurality of different loads by turning switches “On” or “Off.” For example, one or more of the transmission switches can turn “On” and connect the output of the LDO 112 Vreg_out to one or more of regulated output voltages Vreg_out1-Vreg_out6. Alternatively or additionally, one or more of the transmission switches can turn “Off” and disable the connection between the output of the LDO 112 Vreg_out and one or more of the regulated output voltages Vreg_out1-Vreg_out6.
  • The distribution elements 114 can also include switches to close a feedback loop to the positive terminal of the LDO 112. Each of the switches can connect one of the distributed regulated output voltages Vreg_out1-Vreg_out6 to the feedback elements 116, for example, the first end of resistor R1. In one embodiment, these switches can be selectively controlled to close the feedback loop when a corresponding transmission switch turns “On” to provide a regulated output voltage. Closing the feedback loop can compensate for process, supply, and temperature variations, integrating the distribution network so that it can be included within a high gain feedback loop. Thus, the distribution elements 114 can reduce or minimize output voltage errors by integrating the user-defined, digitally selected functionality within the feedback loop for an error amplifier in LDO 112.
  • The distribution elements 114 can include transistors, such as MOSFETs and/or bipolar transistors. In one embodiment, the transistors can be NMOS devices. Such NMOS devices can be formed using a bulk CMOS process technology, for example. These devices can supply specified temperature-compensated bias voltages to output loads. For example, in one embodiment, such bias voltages can be provided to the one or more GaAs PAs on a separate die while corresponding distribution elements 114 are in the “On” state and bias voltages are not supplied to one or more unused PAs when corresponding distribution elements 114 are in the “Off” state. When distribution elements are in the “Off” state, the bias voltages can be biased to 0 V or ground with a shunt NFET device. In some embodiments, one or more of the regulated output voltages Vreg_out1-Vreg_out6 can be connected to a bias input of a current mirror of a PA. The current mirror can bring the current inside the PA close to zero as the input discharges.
  • While six regulated output voltages are illustrated in FIGS. 8A-8C, two or more regulated output voltages can be provided using distribution elements 114 and a single LDO 112. Considerations such as fanout, wire routing, and/or a number of pins, for example, can limit the number of regulated voltages provided by a single LDO 112. In one embodiment, from 1 to 32 regulated output voltages can be provided by a single LDO 112.
  • FIGS. 8A-8C provide three different control circuits 120, 122, 124, respectively, for the distribution elements 114. These control circuits can be implemented in the digital domain. The control circuit 106 (FIG. 6) can implement any combination of the features described below in reference to FIGS. 8A-8C.
  • Referring to FIG. 8A, the control circuit 120 can include CMOS logic. The control circuit 120 can selectively control the distribution of the regulated voltage provided by the LDO 112 to implement a variety of functionalities related to enabling and disabling voltage distribution including without limitation enabling data paths that generate signals within different frequency bands and enabling different modes of operation, such as power modes and/or controlling power of one or more PAs in specific modes of operation. N bits of logic input can be provided to the control circuit 120. From the logic input, the control circuit 120 can generate a control signal for each of the distribution elements 114. In other embodiments, one or more of the distribution elements can share the same control signal. For example, the transmission switch and feedback switch for the same regulated output voltage can receive the same control signal, as illustrated in FIG. 8A. As another example, transmission gates for two of the regulated output voltages can share the same control signal if they are enabled at the same time. The control circuit 120 can include without limitation inverters, NAND gates, NOR gates, XOR gates, pass gates, and the like to implement logic functions to selectively control distribution elements 114. The control circuit 120 can include static CMOS logic and/or dynamic CMOS logic.
  • FIG. 8B provides another example control circuit 122. The control circuit 122 is a more specific example of the control circuit 120 and can implement any combination of the functions for the control circuit 120 described above. The control circuit 122 receives enable inputs Ven_HB, Ven_LB and mode inputs Vmode0, Vmode1 and provides outputs for each of the distribution elements 114.
  • The enable inputs Ven_HB, Ven_LB can selectively control the distribution elements 114 such that regulated voltages are only provided to circuits driving certain frequency bands. This can be advantageous for parts made for more than one application. For example, mobile devices, such as cellular telephones, can operate in accordance with different standards that operate in different frequency bands. A part that can selectively control can different circuits that process signals with different frequency bands can be used in multiple applications, without burning excess power from additional switching and leakage current. Moreover, such parts can also be used in devices that can operate under two or more standards operating within different frequency bands.
  • In one embodiment, Vreg_out1-Vreg_out3 can be provided to bias inputs of PAs used to generate high band signals and Vreg_out4-Vreg_out6 can be provided to bias inputs of PAs used to generate low band signals, for example, as described later in connection with FIG. 15. For example, based on the state of Ven_HB, high band PAs can be enabled or disabled by turning one or more of the distribution elements 114 “On” or “Off.” Similarly, as another example, based on the state of Ven_LB, low band PAs can be enabled or disabled. This idea can be applied to two or more different transmission bands. Advantageously, selectively enabling and disabling different frequency bands can result in substantial power savings and/or reduce the need for separate voltage regulators and additional wiring routing for each power mode.
  • The mode inputs can selectively control the distribution elements 114 such that certain circuit elements are enabled or disabled in certain power modes. This function can be implemented alternatively or in addition to the band enable functionality described above. For example, the mode inputs Vmode0, Vmode1 can uniquely identify four different power modes, although this idea can be applied to more than four different power modes. In one embodiment, the state of the mode inputs Vmode0, Vmode1 can represent a low power mode, a medium power mode, and a high power mode. In this embodiment, one or more of the regulated output voltages Vreg_out1-Vreg_out6 can be provided based on the power mode. For example, the following table summarizes which regulated output voltages are provided via the distribution elements according to which band is enabled and the power mode, in one embodiment.
  • TABLE 1
    Regulated Output Voltage
    Band, Mode Provided
    High Band, High Power Vreg_out1
    High Band, Medium Power Vreg_out2, Vreg_out3
    High Band, Low Power Vreg_out3
    Low Band, High Power Vreg_out4
    Low Band, Medium Power Vreg_out5, Vreg_out6
    Low Band, Low Power Vreg_out6
  • FIG. 8C provides another example control circuit 124. The control circuit 124 includes serial peripheral interface bus (SPI) logic. The control circuit 124 receives data, latch and clock inputs and provides outputs for each of the distribution elements 114. SPI can provide a synchronous serial data link standard that operates in full duplex mode. Devices can communicate in master/slave mode when the master device initiates a data frame. A plurality of slave devices can include individual select lines to selectively control outputs.
    • Variable Control of Regulated Voltage
  • As discussed above, multiple voltage references can be used to create different quiescent bias points depending upon specific applications. Adjusting regulated voltage from a single voltage regulated based on the need for different reference voltages can eliminate the need for additional voltage regulators for specific needs, such as operating in a desired power mode. At the same time, industry specifications for quiescent current in each power mode for PAMs can be aggressive, especially for PAs used in RF applications. Advantageously, regulated voltages can be changed to provide different quiescent currents to some of the PA bias inputs based on a chosen power mode.
  • FIG. 10 is a block diagram of a circuit for providing a variable voltage from a voltage regulator to a plurality of power amplifiers according to one embodiment. The illustrated variable voltage circuit 140 includes a single voltage regulator 142, a distribution circuit 144, a control circuit 146, and one or more PAs 148. The illustrated components of the distribution circuit 140 can be implemented on one or more integrated circuits using one or more semiconductor technologies. The voltage regulator 142, the distribution circuit 144, and the control circuit can be implemented, for example, as part of the PA bias control 25 (FIG. 3A), 37 (FIG. 3B) described above. The voltage distribution circuit 140 can provide a variable regulated voltage to bias one or more PAs 148 using the single voltage regulator 142. The voltage distribution circuit 140 can implement a function to adjust a single input reference voltage Vref_in to a desired regulated voltage level Var_Vreg with the variable voltage function circuit 144 and the control circuit 146.
  • The voltage regulator 142 can receive a reference voltage Vref_in and a power supply voltage Vbatt as inputs and generate a regulated output voltage Vreg_out as an output. The voltage regulator 142 can implement any combination of functions of the voltage regulator 102 (FIG. 7), except that the voltage regulator 142 does not receive feedback from a voltage distribution circuit. In addition, the voltage regulator 142 can be used in any of the applications described above in reference to the voltage regulator 102 (FIG. 7). In one embodiment, the voltage regulator 142 can include an LDO. In such an embodiment, the voltage regulator 142 can implement any combination of features described above in reference to FIG. 9.
  • The variable voltage function circuit 144 can receive the regulated output voltage Vreg_out from the voltage regulator 142 and one or more variable voltage control signals from the control circuit 146. From these inputs, the variable voltage function circuit 144 can adjust the regulated voltage Vreg_out provided by the voltage regulator 142 and provide the one or more PAs 148 and/or individual stages of the PAs 148 with a variable regulated voltage Var_Vreg. By providing a variable voltage function with a single LDO, one LDO can be used to supply multiple accurate voltage values, instead of using separate LDOs for each voltage value. This can help to reduce current, area consumption, and overall design complexity.
  • The variable voltage function circuit 144 can include variable voltage control elements, such as variable resistive elements. More detail regarding a particular embodiment of the variable voltage circuit 144 will be provided later in reference to FIG. 11.
  • The control circuit 146 can provide the variable voltage function circuit 144 with one or more variable control signals. The variable voltage control signal(s) can selectively control the variable regulated voltage Var_Reg based on desired operation of the PA 148. For example, the voltage control signal(s) can adjust outputs of the variable voltage function circuit 144 based on voltage levels desired for different power modes. Thus, aggressive industry specifications for quiescent current in each power mode for a PAM can be met using a single LDO. The variable voltage control signal(s) can be analog or digital. The control 146 circuit can be implemented in a variety of process technologies, for example, CMOS, and in some embodiments bulk CMOS silicon technology.
  • The one or more PAs 148 receive the variable regulated voltage Var_Vreg as bias signals in amplifying signals for transmission. The one or more PAs 148 can implement any combination of features of the power amplifiers described above, for example, with reference to FIGS. 2, 3A, 3B, 4A, 4B. Like the embodiments shown in FIGS. 3A and 3B, one or more of PAs 148 can be implemented on either the same integrated circuit and/or a different integrated circuit than the variable voltage function circuit 144 and/or the control circuit 146. The one or more of the PAs 148 can be implemented in a different technology than the distribution circuit 104. For example, the variable voltage function circuit 144 can be implemented in CMOS technology and one or more of the PAs 148 can be implemented in, for example, GaAs pHEMPT or BiFET technologies. This can be advantageous because certain applications, such as PAM RF switches, can be better implemented in GaAs pHEMPT or BiFET, while the characteristics of less expensive CMOS technology can provide the required characteristics of the variable voltage function circuit 144.
  • FIG. 11 is a functional block diagram for generating a variable voltage from a single low-dropout regulator according to one embodiment. The variable voltage system 150 can include a single LDO 152, one or more variable voltage control elements 154, and feedback elements 156. The variable voltage system 150 can be used, for example, to provide a variable regulated voltage Var_Vreg_out to a load, such a current mirror 158 in a PA 159. Like the variable voltage control circuit 144 and the PA 148, the variable voltage elements 154 can be implemented in one or more integrated circuits and in one or more process technologies. This can provide different regulated voltage levels to the load in response to the variable voltage control signal. The variable voltage system 150 can be implemented in bulk CMOS silicon technology.
  • The single LDO 152 is an example of the voltage regulator 142 (FIG. 10) and can implement any combination of the functionality described above with reference to the voltage regulator 142 or 102 (FIG. 7). In addition, the LDO 152 can implement any combination of features of the LDO 112 (FIG. 9), except that the LDO 152 does not include a distribution circuit in the feedback loop to the positive terminal of the error amplifier. The single LDO 152 can be used to provide a stable power supply voltage independent of load impedance, input-voltage variations, temperature, and time.
  • The variable voltage element 154 can receive the regulated voltage output of the LDO 152 and provide a variable regulated output voltage based on a variable voltage control input. The variable voltage element 154 can include any circuit elements that can provide a variable voltage that results in a variable quiescent current provided to a load, for example, the current mirror 158 in PA 159. The variable voltage element may include elements that vary resistance. As illustrated, the variable voltage control element 154 can include a resistive switching network that includes a resistor in parallel with a FET. The amount of current passes through the FET can change in response to the Variable Voltage Control, thereby adjusting the voltage level of Var_Vreg_Out. In another embodiment, the variable voltage control element can be a long channel FET with a variable gate voltage that can implement a variable resistor. In yet another embodiment, the variable voltage control element can include two or more relatively weak FETs and use the variable voltage control to provide different voltage levels by selectively turning a predetermined number of the relatively weak transistors “On.”
  • Thus, in one embodiment, the variable voltage system 150 can create different bias voltages based on the amount of current required in a PA reference current mirror 158. Advantageously, the variable voltage system 150 can be implemented in bulk CMOS and the PA 159 can be implemented in GaAs. Such an implementation can reduce area consumption and lower cost by allowing the removal of additional elements, such as surface mount devices (SMDs), from the more expensive GaAs substrate.
    • Distribution of Variable Regulated Voltages
  • FIG. 12 is a block diagram of a circuit 160 for distributing variable, regulated voltages from a voltage regulator according to one embodiment. The illustrated variable voltage distribution circuit 160 includes a single voltage regulator 162, a variable voltage distribution circuit 164, a control circuit 166, and PAs 168 a-168 n. The illustrated components of the variable voltage distribution circuit 160 can implement any combination of the distribution and/or variable voltage functions described above, for example, in reference to FIGS. 7 and 10. The variable voltage distribution circuit 160 can provide a plurality of variable regulated voltages Var_Vreg[1:N] to bias power amplifiers 168 a-168 n from the single voltage regulator 162. The voltage distribution circuit 160 can implement a function to distribute a single input reference voltage Vref_in to a plurality of variavle regulated voltages Var_Vreg[1:N] with the variable voltage distribution circuit 164 and the control circuit 166, using any combination of the features described above.
  • FIG. 13 is a block diagram for distributing variable voltages from a single low-dropout regulator according to one embodiment. Variable voltage distribution system 170 can include a single LDO 172, one or more distribution elements 174, one or more variable voltage control elements 176, and feedback elements 178. The variable voltage distribution system 170 can implement any combination of features described above related to voltage distribution or variable voltage control, for example, in the voltage distribution systems 110A, 1106, 110C (FIGS. 8A-8C) or the variable voltage system 150 (FIG. 11). The variable voltage distribution system 150 can provide a plurality of variable regulated voltages Var_Vreg_out1-Var_Vreg_out6 to various loads, such as PAs.
  • Combining voltage distribution and variable voltage control can allow for distribution of accurate voltages as programmed by a user from the single LDO 172. This combination can result in even greater savings in die area, lower current consumption, and reduced design complexity compared to implementing voltage distribution and voltage variation separately. In addition, variable voltage distribution can provide additional flexibility for future architectural changes or functionality.
  • The variable voltage distribution system 150 can provide different quiescent bias currents based on desired power modes, along with distributing a single regulated output voltage to different loads by selectively enabling and disabling distribution of regulated voltage to the different loads. More detail about one example implementation of the variable voltage distribution system 150 in provided in connection with FIG. 15.
  • The distribution elements 174 can comprise one or more switches that pass a regulated voltage to a variable voltage control element 176 when the switches are “On.” In one embodiment, there is one switch connected to each variable voltage control element 176. In another embodiment, one or more variable voltage control elements 176 can be connected to switches and one or more variable voltage control elements can be connected directly to the output of the LDO 172.
  • As shown in FIG. 13, the distribution elements 174 can be connected to the output of the LDO 172 and can pass current to the variable voltage control elements 176. The variable voltage control elements can then adjust the regulated voltages and provide variable regulated voltages to loads, such as PAs. It can be advantageous to include one or more of the distribution elements 174 in a feedback loop with the LDO 172, which can include feedback elements 178. This can compensate for process, supply, and temperature variations that can be introduced by the distribution elements. Thus, variable regulated output voltages can provide regulated voltages that can compensate for process, supply, and temperature variation.
  • In another embodiment, the output of the LDO can be connected to variable voltage control elements. The variable voltage control elements can then provide variable voltages to distribution elements that can selectively provide variable regulated voltages to loads, such as PAs. In this embodiment, a feedback loop with the LDO can include switches that match corresponding switches in the distribution elements, for example, by being formed on the same integrated circuit with similar layouts. In this way, the feedback loop take the output of the LDO, before adjustment by the variable voltage control elements, and compensate for process, supply, and temperature variation.
  • In addition, a user-defined functionality can be integrated within the feedback loop to the error amplifier in the LDO, thereby allowing for reduction or minimization of output voltage errors. The user defined function can be implemented in digital distribution control signals, for example. In such an implementation, a highly reliable mixed signal approach can be implemented to distribute the variable regulated voltages, for example, to PA bias inputs.
  • The variable LDO output voltage function can be outside the compensation loop of the LDO error amplifier. To effectively compensate for process, supply, and temperature variations while minimizing current and area consumption, the voltage distribution function can be utilized with the variable voltage function to distribute an array of variable reference voltages. In one embodiment, both distribution and variable voltage control functions can offer the flexibility to distribute different voltage levels to multiple loads (for example, PA stages) utilizing a single LDO output reference.
  • FIG. 14A shows a process 180 of providing a plurality of regulated voltages from a single regulated voltage. The process 180 can be performed in a variety of applications, such as providing an accurate quiescent current for PAs. For example, the plurality of regulated voltages provided by the process 180 can be used to bias the PA systems described above in reference to FIGS. 3A-3B.
  • At block 182, a reference voltage and a battery voltage are received. The reference voltage can be a constant, known voltage value. The battery voltage can be provided by a battery or any other suitable power supply. The battery voltage can change over time. For example, as a battery discharges, the battery typically provides a lower voltage.
  • Because the battery voltage can change, it may not be suitable for certain applications that require a constant voltage. Accordingly, a regulated voltage can be generated at block 184. The regulated voltage can provide an accurate voltage based at least in part on the reference voltage and the battery voltage. In one embodiment, the regulated voltage can be generated using an operational amplifier with a feedback loop.
  • A plurality of regulated voltage can be generated from the regulated voltage at block 186. This can provide multiple accurate, regulated voltages to circuits that require such voltage signals. Accordingly, a single voltage regulator can provide multiple loads with regulated voltages, saving area, reducing power consumption, and improving scalability, among other advantages.
  • The plurality of regulated voltages can selectively be provided to one or more loads, such as PAs or PA stages, at block 188. In one embodiment, two or more loads can be provided with regulated voltages concurrently. The components used to selectively provide the regulated voltages can provide feedback information that can help to keep the generated regulated voltage at a stable, accurate value at block 184. The loads can be on either the same die or a different die than the components that create the regulated voltage. Alternatively or additionally, the loads can be created using either the process technology or a different technology than the components that create the regulated voltage.
  • The plurality of regulated voltages can be selectively provided to different loads to enable or disable certain circuit elements at block 188. For example, certain loads can be provided with regulated voltages in certain modes of operation, such as power modes, to generate signals within predefined frequency bands, to comply with different standards, and/or to generate signals for certain applications.
  • FIG. 14B shows a process 190 of providing a variable regulated voltage from a single regulated voltage. The process 190 can be performed in a variety of applications, such as providing an accurate quiescent current for PAs. For example, different voltage levels provided by the process 190 can be used to bias the PA systems described above in reference to FIGS. 3A-3B to different voltages.
  • The process 190 is similar to the process 180, except that variable regulated voltages are implemented instead of a plurality of regulated voltages. Accordingly, blocks 192 and 194 can implement any combination of the functions described above in reference to blocks 182 and 184.
  • The regulated voltage generated at block 194 can be controlled using one or more variable voltage control elements at block 186. This can provide multiple accurate, regulated voltage levels to circuits that can benefit from such voltage signals. Accordingly, a single voltage regulator can provide one or more loads with a variable regulated voltage, instead of using separate voltage regulators for each desired voltage level. This can result in saving area, reducing power consumption, and improving scalability, among other advantages.
  • The variable regulated voltage can be provided to one or more loads, such as PAs or PA stages, at block 198. The variable regulated voltage can be provided to loads to adjust the amount of quiescent current provided. For example, the loads can be provided with different voltages in certain modes of operation, such as power modes, to comply with different standards, and/or to generate signals for certain applications. The loads can be on either the same die or a different die than the components that create the regulated voltage. Alternatively or additionally, the loads can be created using either the process technology or a different technology than the components that create the regulated voltage.
  • FIG. 14C shows a process 200 of providing a plurality of variable regulated voltages from a single regulated voltage. The process 200 can implement any combination of features described earlier in reference to the processes 180, 190. The process 200 can include: receiving a reference voltage and a battery voltage at block 202; generating a regulated voltage at block 204; generating a plurality of regulated voltages from a single regulated voltage at block 206; controlling one or more regulated voltages with a variable voltage control element(s) at block 208; and providing one or more variable regulated voltages to power amplifier(s) at block 210.
  • FIG. 15 illustrates an electronic system 220 that includes a variable voltage distribution function according to one embodiment. The electronic system 220 illustrates how bias control circuits can selectively provide PAs with variable regulated voltages from a single LDO according to one embodiment. The electronic system 220 can implement low band and/or high band functionality, in addition to operating in three different power modes (low power, medium power, and high power).
  • The voltage regulator 222 can receive a reference voltage Vref_in, a power supply voltage Vbatt, and a feedback signal Vfb from a variable voltage distribution circuit 204. From the received signals, the voltage regulator 222 can provide the variable voltage distribution circuit 204 with a regulated voltage Vreg. The control 206 can selectively control the regulated voltages that the variable voltage distribution circuit 204 can provide to bias inputs of one or more PA stages 208 a, 208 b, 212 a, 212 b, 216 a, 216 b, 220 a, 220 b. With the control 206 and the variable voltage distribution circuit 204, the electronic system can provide high band and/or low band signals and operate at a low, medium, or high power mode.
  • Table 2 provides one example implementation of multiple power modes and operation for multiple frequency bands. When PA stages are not provided with regulated voltages, their respective input nodes can discharge. Current mirrors, or similar circuit elements, can then bring the current inside the PA close to zero as the input discharges.
  • TABLE 2
    PA Stages Receiving a Variable Voltage
    Band, Mode Regulated Voltage (FIG. 15) Level
    High Band, High Power 208a, 208b High
    High Band, Medium Power 212a, 212b Medium
    High Band, Low Power 212a Low
    Low Band, High Power 216a, 216b High
    Low Band, Medium Power 220a, 220b Medium
    Low Band, Low Power 220a Low
  • As shown in Table 2, only PA stages 208 a, 208 b, 212 a, 212 b for the high band data path can be provided with regulated voltages in high band mode. Similarly, only PA stages 216 a, 216 b, 220 a, 220 b for the low band data path can be provided with regulated voltages in low band mode. In one embodiment, the variable voltage distribution 204 can be implemented on an integrated circuit with pins for VregH_High, VregH_Med, VregH_Low on a first side and pins for VregL_High, VregL_Med, VregL_Low on an opposing side. This can provide for shorter routing, reduced area, and reduced power consumption. For example, the high band data path can be placed near the first side and the low band data path can be place near the opposing side.
  • As also shown in Table 2, certain power amplifiers within each data path can receive regulated voltages depending on the power mode. For example, in high band, high power operation, a regulated voltage VregH_High with a High voltage level can be provided to a bias input in PA stages 208 a, 208 b. In addition, certain PA stages can be provided with regulated voltages during more than one power mode of operation. These PA stages can receive different voltage levels based on the power mode. For example, PA stages 212 a, 220 a can receive a regulated voltage VregH_Low, VregL_Low, respectively, in both medium power mode and low power mode when their respective bands are enabled. Variable voltage elements in the variable voltage distribution circuit 204 can adjust the regulated voltage Vreg provided by the voltage regulator 222 to a Medium level for medium power mode and a Low level for low power mode. This can allow the PA stages 212 a, 220 a to be used in both low and medium power modes, saving additional area and power. In low power mode, only one PA stage 212 a, 220 a can be used. When the state of a switch 224, 226 is changed, then the one PA stage 212 a, 220 a can be coupled to a second PA stage 212 b, 220 b for operation in medium power mode using both stages.
  • Voltage levels provided to PA stages can change based on the power mode. For example, a different voltage level can be implemented for each power mode. The particular voltage levels can be based on industry specifications and/or standards, for example. One or more of the high, medium and/or low voltage levels can be different between the low band data path and the high band data path. Alternatively or additionally, one or more of the high, medium and/or low voltage levels can be the same in the low band data path and the high band data path.
    • Applications
  • Some of the embodiments described above have provided examples in connection with wireless devices and/or mobile phones. However, the principles and advantages of the embodiments can be used for any other systems or apparatus that have needs for distribution and/or variation of regulated voltage(s).
  • Such voltage regulation systems can be implemented in various electronic devices. Examples of the electronic devices can include, but are not limited to, consumer electronic products, parts of the consumer electronic products, electronic test equipment, etc. Examples of the electronic devices can also include, but are not limited to, memory chips, memory modules, circuits of optical networks or other communication networks, and disk driver circuits. The consumer electronic products can include, but are not limited to, a mobile phone, a telephone, a television, a computer monitor, a computer, a hand-held computer, a personal digital assistant (PDA), a microwave, a refrigerator, an automobile, a stereo system, a cassette recorder or player, a DVD player, a CD player, a VCR, an MP3 player, a radio, a camcorder, a camera, a digital camera, a portable memory chip, a washer, a dryer, a washer/dryer, a copier, a facsimile machine, a scanner, a multi functional peripheral device, a wrist watch, a clock, etc. Further, the electronic devices can include unfinished products.
    • CONCLUSION
  • Unless the context clearly requires otherwise, throughout the description and the claims, the words “comprise,” “comprising,” and the like are to be construed in an inclusive sense, as opposed to an exclusive or exhaustive sense; that is to say, in the sense of “including, but not limited to.” The words “coupled” or connected”, as generally used herein, refer to two or more elements that may be either directly connected, or connected by way of one or more intermediate elements. Additionally, the words “herein,” “above,” “below,” and words of similar import, when used in this application, shall refer to this application as a whole and not to any particular portions of this application. Where the context permits, words in the above Detailed Description using the singular or plural number may also include the plural or singular number respectively. The word “or” in reference to a list of two or more items, that word covers all of the following interpretations of the word: any of the items in the list, all of the items in the list, and any combination of the items in the list.
  • Moreover, conditional language used herein, such as, among others, “can,” “could,” “might,” “can,” “e.g.,” “for example,” “such as” and the like, unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain embodiments include, while other embodiments do not include, certain features, elements and/or states. Thus, such conditional language is not generally intended to imply that features, elements and/or states are in any way required for one or more embodiments or that one or more embodiments necessarily include logic for deciding, with or without author input or prompting, whether these features, elements and/or states are included or are to be performed in any particular embodiment.
  • The above detailed description of embodiments of the invention is not intended to be exhaustive or to limit the invention to the precise form disclosed above. While specific embodiments of, and examples for, the invention are described above for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize. For example, while processes or blocks are presented in a given order, alternative embodiments may perform routines having steps, or employ systems having blocks, in a different order, and some processes or blocks may be deleted, moved, added, subdivided, combined, and/or modified. Each of these processes or blocks may be implemented in a variety of different ways. Also, while processes or blocks are at times shown as being performed in series, these processes or blocks may instead be performed in parallel, or may be performed at different times.
  • The teachings of the invention provided herein can be applied to other systems, not necessarily the system described above. The elements and acts of the various embodiments described above can be combined to provide further embodiments.
  • While certain embodiments of the inventions have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the disclosure. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the disclosure. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the disclosure.

Claims (19)

1. An apparatus comprising:
a voltage regulator configured to receive a reference voltage, a feedback signal, and a power supply voltage, and to generate based at least in part on the received voltages a regulated voltage; and
a voltage distribution circuit configured to receive the regulated voltage from the voltage regulator and to generate a plurality of regulated voltages voltage in response to one or more distribution control signals.
2. The apparatus of claim 1, wherein the voltage regulator comprises a low-dropout regulator.
3. The apparatus of claim 1, wherein the voltage distribution circuit comprises a transmission gate voltage distribution network.
4. The apparatus of claim 1, wherein the voltage distribution circuit comprises a transmission gate voltage distribution network.
5. The apparatus of claim 1, wherein one or more of the plurality of regulated voltages are electrically connected to one or more power amplifier bias reference input nodes.
6. The apparatus of claim 1, wherein the voltage distribution circuit includes one or more silicon complementary metal oxide semiconductor circuit elements and at least one of the one or more power amplifiers includes a different process technology.
7. The apparatus of claim 1, wherein the one or more voltage distribution control signals can represent a plurality of power modes.
8. The apparatus of claim 1, wherein the feedback signal is provided by a feedback loop that includes the distribution circuit.
9. The apparatus of claim 1, wherein the apparatus comprises a mobile device.
10. A method comprising:
receiving a reference voltage and a power supply voltage;
generating a regulated voltage based at least in part on the reference voltage and the power supply voltage; and
generating a plurality of regulated voltages from the reference voltage using a voltage distribution circuit.
11. The method of claim 10, further comprising providing one or more regulated voltages to one or more power amplifiers.
12. The method of claim 11, wherein a first die includes at least a portion of the voltage distribution circuit and a second die includes at least one of the one or more power amplifiers.
13. The method of claim 12, wherein the first die and the second die are formed using different process technologies.
14. The method of claim 10, wherein generating the regulated voltage is based on a feedback signal provided by the voltage distribution circuit.
15. The method of claim 10, wherein two or more of the plurality of regulated voltages are generated concurrently.
16. The method of claim 10, further comprising receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to different loads based on power modes of the loads.
17. The method of claim 10, further comprising receiving one or more voltage distribution control signals and using at least one of the one or more voltage distribution control signals to selectively provide variable regulated voltages to loads in data paths configured to generate signals in different frequency bands.
18. An apparatus comprising:
means for generating a regulated voltage based on a reference voltage, a feedback signal, and a power supply voltage; and
means for generating a plurality of regulated voltages and the feedback signal based on the regulated voltage.
19. A computer-readable storage medium comprising instructions that when executed perform a method of:
receiving a reference voltage and a power supply voltage;
generating a regulated voltage based at least in part on the reference voltage, the power supply voltage, and a feedback loop that includes at least a portion of a voltage distribution circuit; and
generating a plurality of regulated voltages from the reference voltage using the voltage distribution circuit.
US12/844,320 2010-06-07 2010-07-27 Apparatus and method for voltage distribution Abandoned US20110298435A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/844,320 US20110298435A1 (en) 2010-06-07 2010-07-27 Apparatus and method for voltage distribution
PCT/US2011/039330 WO2011156290A2 (en) 2010-06-07 2011-06-06 Apparatus and method for variable voltage distribution

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US35233010P 2010-06-07 2010-06-07
US12/844,320 US20110298435A1 (en) 2010-06-07 2010-07-27 Apparatus and method for voltage distribution

Publications (1)

Publication Number Publication Date
US20110298435A1 true US20110298435A1 (en) 2011-12-08

Family

ID=44486278

Family Applications (17)

Application Number Title Priority Date Filing Date
US12/844,333 Active 2032-05-28 US8880014B2 (en) 2010-06-07 2010-07-27 CMOS RF switch device and method for biasing the same
US12/844,301 Active 2031-09-07 US8421438B2 (en) 2010-06-07 2010-07-27 Apparatus and method for diffusion sensing
US12/844,246 Active 2030-08-04 US8369805B2 (en) 2010-06-07 2010-07-27 High linearity CMOS RF switch passing large signal and quiescent power amplifier current
US12/844,511 Active US8008970B1 (en) 2010-06-07 2010-07-27 Apparatus and method for enabled switch detection
US12/844,382 Active 2031-08-12 US8417196B2 (en) 2010-06-07 2010-07-27 Apparatus and method for directional coupling
US12/844,449 Active 2030-12-05 US8461897B2 (en) 2010-06-07 2010-07-27 Apparatus and method for well buffering
US12/844,638 Abandoned US20110298280A1 (en) 2010-06-07 2010-07-27 Apparatus and method for variable voltage distribution
US12/844,320 Abandoned US20110298435A1 (en) 2010-06-07 2010-07-27 Apparatus and method for voltage distribution
US12/844,491 Active 2030-12-28 US8330530B2 (en) 2010-06-07 2010-07-27 Apparatus and method for disabling well bias
US12/844,640 Active 2030-12-24 US8368463B2 (en) 2010-06-07 2010-07-27 Voltage distribution for controlling CMOS RF switch
US12/844,597 Abandoned US20110298432A1 (en) 2010-06-07 2010-07-27 Apparatus and method for variable voltage function
US13/856,723 Active US9014647B2 (en) 2010-06-07 2013-04-04 Methods for directional coupler termination impedance control
US14/500,636 Active US9294073B2 (en) 2010-06-07 2014-09-29 CMOS RF switch device and method for biasing the same
US15/059,925 Active US9762192B2 (en) 2010-06-07 2016-03-03 CMOS RF switch device and method for biasing the same
US15/135,896 Active US9667210B2 (en) 2010-06-07 2016-04-22 Apparatus and methods for generating a variable regulated voltage
US15/498,039 Active US10236847B2 (en) 2010-06-07 2017-04-26 Apparatus and method for variable voltage distribution
US16/239,111 Abandoned US20190165747A1 (en) 2010-06-07 2019-01-03 Apparatus and method for voltage distribution

Family Applications Before (7)

Application Number Title Priority Date Filing Date
US12/844,333 Active 2032-05-28 US8880014B2 (en) 2010-06-07 2010-07-27 CMOS RF switch device and method for biasing the same
US12/844,301 Active 2031-09-07 US8421438B2 (en) 2010-06-07 2010-07-27 Apparatus and method for diffusion sensing
US12/844,246 Active 2030-08-04 US8369805B2 (en) 2010-06-07 2010-07-27 High linearity CMOS RF switch passing large signal and quiescent power amplifier current
US12/844,511 Active US8008970B1 (en) 2010-06-07 2010-07-27 Apparatus and method for enabled switch detection
US12/844,382 Active 2031-08-12 US8417196B2 (en) 2010-06-07 2010-07-27 Apparatus and method for directional coupling
US12/844,449 Active 2030-12-05 US8461897B2 (en) 2010-06-07 2010-07-27 Apparatus and method for well buffering
US12/844,638 Abandoned US20110298280A1 (en) 2010-06-07 2010-07-27 Apparatus and method for variable voltage distribution

Family Applications After (9)

Application Number Title Priority Date Filing Date
US12/844,491 Active 2030-12-28 US8330530B2 (en) 2010-06-07 2010-07-27 Apparatus and method for disabling well bias
US12/844,640 Active 2030-12-24 US8368463B2 (en) 2010-06-07 2010-07-27 Voltage distribution for controlling CMOS RF switch
US12/844,597 Abandoned US20110298432A1 (en) 2010-06-07 2010-07-27 Apparatus and method for variable voltage function
US13/856,723 Active US9014647B2 (en) 2010-06-07 2013-04-04 Methods for directional coupler termination impedance control
US14/500,636 Active US9294073B2 (en) 2010-06-07 2014-09-29 CMOS RF switch device and method for biasing the same
US15/059,925 Active US9762192B2 (en) 2010-06-07 2016-03-03 CMOS RF switch device and method for biasing the same
US15/135,896 Active US9667210B2 (en) 2010-06-07 2016-04-22 Apparatus and methods for generating a variable regulated voltage
US15/498,039 Active US10236847B2 (en) 2010-06-07 2017-04-26 Apparatus and method for variable voltage distribution
US16/239,111 Abandoned US20190165747A1 (en) 2010-06-07 2019-01-03 Apparatus and method for voltage distribution

Country Status (2)

Country Link
US (17) US8880014B2 (en)
WO (4) WO2011156291A2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130271095A1 (en) * 2012-04-13 2013-10-17 Infineon Technologies Austria Ag Linear Voltage Regulator
US20140112224A1 (en) * 2012-10-24 2014-04-24 Qualcomm Incorporated Systems and methods for low power operations on wireless networks
US9191891B2 (en) 2012-11-02 2015-11-17 Qualcomm Incorporated Systems and methods for low power wake-up signal implementation and operations for WLAN
US9585091B2 (en) 2012-08-17 2017-02-28 Qualcomm Incorporated Systems and methods for low power wake up signal and operations for WLAN
US9667210B2 (en) 2010-06-07 2017-05-30 Skyworks Solutions, Inc. Apparatus and methods for generating a variable regulated voltage
US20170337886A1 (en) * 2016-05-19 2017-11-23 Novatek Microelectronics Corp. Voltage regulator and method applied thereto
US20220413534A1 (en) * 2021-06-29 2022-12-29 Skyworks Solutions, Inc. Voltage regulation schemes for powering multiple circuit blocks
US11936416B2 (en) * 2020-01-15 2024-03-19 Skyworks Solutions, Inc. Biasing of cascode power amplifiers for multiple power supply domains

Families Citing this family (195)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9166471B1 (en) 2009-03-13 2015-10-20 Rf Micro Devices, Inc. 3D frequency dithering for DC-to-DC converters used in multi-mode cellular transmitters
US9112452B1 (en) 2009-07-14 2015-08-18 Rf Micro Devices, Inc. High-efficiency power supply for a modulated load
US8548398B2 (en) 2010-02-01 2013-10-01 Rf Micro Devices, Inc. Envelope power supply calibration of a multi-mode radio frequency power amplifier
WO2011133542A1 (en) * 2010-04-19 2011-10-27 Rf Micro Devices, Inc. Pseudo-envelope following power management system
US8519788B2 (en) 2010-04-19 2013-08-27 Rf Micro Devices, Inc. Boost charge-pump with fractional ratio and offset loop for supply modulation
US8633766B2 (en) 2010-04-19 2014-01-21 Rf Micro Devices, Inc. Pseudo-envelope follower power management system with high frequency ripple current compensation
US9431974B2 (en) 2010-04-19 2016-08-30 Qorvo Us, Inc. Pseudo-envelope following feedback delay compensation
US9099961B2 (en) 2010-04-19 2015-08-04 Rf Micro Devices, Inc. Output impedance compensation of a pseudo-envelope follower power management system
US8981848B2 (en) 2010-04-19 2015-03-17 Rf Micro Devices, Inc. Programmable delay circuitry
US9214865B2 (en) 2010-04-20 2015-12-15 Rf Micro Devices, Inc. Voltage compatible charge pump buck and buck power supplies
US9362825B2 (en) 2010-04-20 2016-06-07 Rf Micro Devices, Inc. Look-up table based configuration of a DC-DC converter
US9900204B2 (en) 2010-04-20 2018-02-20 Qorvo Us, Inc. Multiple functional equivalence digital communications interface
US9214900B2 (en) 2010-04-20 2015-12-15 Rf Micro Devices, Inc. Interference reduction between RF communications bands
US9577590B2 (en) 2010-04-20 2017-02-21 Qorvo Us, Inc. Dual inductive element charge pump buck and buck power supplies
US9184701B2 (en) 2010-04-20 2015-11-10 Rf Micro Devices, Inc. Snubber for a direct current (DC)-DC converter
US9553550B2 (en) * 2010-04-20 2017-01-24 Qorvo Us, Inc. Multiband RF switch ground isolation
US9008597B2 (en) 2010-04-20 2015-04-14 Rf Micro Devices, Inc. Direct current (DC)-DC converter having a multi-stage output filter
US8866549B2 (en) 2010-06-01 2014-10-21 Rf Micro Devices, Inc. Method of power amplifier calibration
WO2012027039A1 (en) 2010-08-25 2012-03-01 Rf Micro Devices, Inc. Multi-mode/multi-band power management system
US9954436B2 (en) 2010-09-29 2018-04-24 Qorvo Us, Inc. Single μC-buckboost converter with multiple regulated supply outputs
US8400211B2 (en) * 2010-10-15 2013-03-19 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuits with reduced voltage across gate dielectric and operating methods thereof
WO2012068260A1 (en) 2010-11-16 2012-05-24 Rf Micro Devices, Inc. Digital gain multiplier for envelop tracking systems and corresponding method
US8633541B2 (en) * 2010-12-28 2014-01-21 Texas Instruments Incorporated Diode isolated drain extended NMOS ESD cell
US8588713B2 (en) 2011-01-10 2013-11-19 Rf Micro Devices, Inc. Power management system for multi-carriers transmitter
WO2012106437A1 (en) 2011-02-02 2012-08-09 Rf Micro Devices, Inc. Fast envelope system calibration
US8942313B2 (en) 2011-02-07 2015-01-27 Rf Micro Devices, Inc. Group delay calibration method for power amplifier envelope tracking
US8624760B2 (en) 2011-02-07 2014-01-07 Rf Micro Devices, Inc. Apparatuses and methods for rate conversion and fractional delay calculation using a coefficient look up table
US9246460B2 (en) 2011-05-05 2016-01-26 Rf Micro Devices, Inc. Power management architecture for modulated and constant supply operation
US9247496B2 (en) 2011-05-05 2016-01-26 Rf Micro Devices, Inc. Power loop control based envelope tracking
US9379667B2 (en) 2011-05-05 2016-06-28 Rf Micro Devices, Inc. Multiple power supply input parallel amplifier based envelope tracking
CN103748794B (en) 2011-05-31 2015-09-16 射频小型装置公司 A kind of method and apparatus of the complex gain for measuring transmission path
US9019011B2 (en) 2011-06-01 2015-04-28 Rf Micro Devices, Inc. Method of power amplifier calibration for an envelope tracking system
US8760228B2 (en) 2011-06-24 2014-06-24 Rf Micro Devices, Inc. Differential power management and power amplifier architecture
US8626091B2 (en) 2011-07-15 2014-01-07 Rf Micro Devices, Inc. Envelope tracking with variable compression
US8952710B2 (en) 2011-07-15 2015-02-10 Rf Micro Devices, Inc. Pulsed behavior modeling with steady state average conditions
US8792840B2 (en) 2011-07-15 2014-07-29 Rf Micro Devices, Inc. Modified switching ripple for envelope tracking system
US9263996B2 (en) 2011-07-20 2016-02-16 Rf Micro Devices, Inc. Quasi iso-gain supply voltage function for envelope tracking systems
US9313733B2 (en) * 2011-08-03 2016-04-12 Golba Llc Repeater device for reducing the electromagnetic radiation transmitted from cellular phone antennas and extending phone battery life
US8618868B2 (en) 2011-08-17 2013-12-31 Rf Micro Devices, Inc. Single charge-pump buck-boost for providing independent voltages
CN103858338B (en) 2011-09-02 2016-09-07 射频小型装置公司 Separation VCC and common VCC power management framework for envelope-tracking
US8957728B2 (en) 2011-10-06 2015-02-17 Rf Micro Devices, Inc. Combined filter and transconductance amplifier
CN103959189B (en) 2011-10-26 2015-12-23 射频小型装置公司 Based on the parallel amplifier phase compensation of inductance
US9024688B2 (en) 2011-10-26 2015-05-05 Rf Micro Devices, Inc. Dual parallel amplifier based DC-DC converter
US9484797B2 (en) 2011-10-26 2016-11-01 Qorvo Us, Inc. RF switching converter with ripple correction
US9294041B2 (en) 2011-10-26 2016-03-22 Rf Micro Devices, Inc. Average frequency control of switcher for envelope tracking
US8634789B2 (en) * 2011-11-10 2014-01-21 Skyworks Solutions, Inc. Multi-mode power amplifier
US9250643B2 (en) 2011-11-30 2016-02-02 Rf Micro Devices, Inc. Using a switching signal delay to reduce noise from a switching power supply
US9515621B2 (en) 2011-11-30 2016-12-06 Qorvo Us, Inc. Multimode RF amplifier system
US8975959B2 (en) 2011-11-30 2015-03-10 Rf Micro Devices, Inc. Monotonic conversion of RF power amplifier calibration data
US9041365B2 (en) 2011-12-01 2015-05-26 Rf Micro Devices, Inc. Multiple mode RF power converter
WO2013082384A1 (en) 2011-12-01 2013-06-06 Rf Micro Devices, Inc. Rf power converter
US9256234B2 (en) 2011-12-01 2016-02-09 Rf Micro Devices, Inc. Voltage offset loop for a switching controller
US8947161B2 (en) 2011-12-01 2015-02-03 Rf Micro Devices, Inc. Linear amplifier power supply modulation for envelope tracking
US9280163B2 (en) 2011-12-01 2016-03-08 Rf Micro Devices, Inc. Average power tracking controller
US9494962B2 (en) 2011-12-02 2016-11-15 Rf Micro Devices, Inc. Phase reconfigurable switching power supply
US9813036B2 (en) 2011-12-16 2017-11-07 Qorvo Us, Inc. Dynamic loadline power amplifier with baseband linearization
US9298198B2 (en) 2011-12-28 2016-03-29 Rf Micro Devices, Inc. Noise reduction for envelope tracking
US8981839B2 (en) 2012-06-11 2015-03-17 Rf Micro Devices, Inc. Power source multiplexer
KR101983959B1 (en) 2012-06-14 2019-05-29 스카이워크스 솔루션즈, 인코포레이티드 Power amplifier modules with power amplifier and transmission line and related systems, devices, and methods
WO2014018861A1 (en) 2012-07-26 2014-01-30 Rf Micro Devices, Inc. Programmable rf notch filter for envelope tracking
US9576949B2 (en) * 2012-09-05 2017-02-21 Taiwan Semiconductor Manufacturing Company, Ltd. Diode formed of PMOSFET and schottky diodes
US9225231B2 (en) 2012-09-14 2015-12-29 Rf Micro Devices, Inc. Open loop ripple cancellation circuit in a DC-DC converter
US9197256B2 (en) 2012-10-08 2015-11-24 Rf Micro Devices, Inc. Reducing effects of RF mixer-based artifact using pre-distortion of an envelope power supply signal
US9207692B2 (en) 2012-10-18 2015-12-08 Rf Micro Devices, Inc. Transitioning from envelope tracking to average power tracking
US9627975B2 (en) 2012-11-16 2017-04-18 Qorvo Us, Inc. Modulated power supply system and method with automatic transition between buck and boost modes
FR2998364B1 (en) * 2012-11-19 2015-01-02 Continental Automotive France AUTOMOTIVE VEHICLE INDUCTIVE SENSOR COMPRISING ELECTRIC OSCILLATORS ADAPTED TO FORM ELECTRONIC RESONANCE PHENOMENA TO FORM A VOLTAGE ALTERNATIVE TO THE TERMINALS OF AN EXCITATION COIL
US9013844B2 (en) * 2013-01-15 2015-04-21 Xilinx, Inc. Circuit for and method of enabling the discharge of electric charge in an integrated circuit
US9300252B2 (en) 2013-01-24 2016-03-29 Rf Micro Devices, Inc. Communications based adjustments of a parallel amplifier power supply
US9178472B2 (en) 2013-02-08 2015-11-03 Rf Micro Devices, Inc. Bi-directional power supply signal based linear amplifier
US9178058B2 (en) 2013-03-13 2015-11-03 Taiwan Semiconductor Manufacturing Company, Ltd. RF switch on high resistive substrate
US10698432B2 (en) 2013-03-13 2020-06-30 Intel Corporation Dual loop digital low drop regulator and current sharing control apparatus for distributable voltage regulators
US9203353B2 (en) 2013-03-14 2015-12-01 Rf Micro Devices, Inc. Noise conversion gain limited RF power amplifier
WO2014152903A2 (en) 2013-03-14 2014-09-25 Rf Micro Devices, Inc Envelope tracking power supply voltage dynamic range reduction
US9479118B2 (en) 2013-04-16 2016-10-25 Rf Micro Devices, Inc. Dual instantaneous envelope tracking
US9086709B2 (en) 2013-05-28 2015-07-21 Newlans, Inc. Apparatus and methods for variable capacitor arrays
US9570222B2 (en) 2013-05-28 2017-02-14 Tdk Corporation Vector inductor having multiple mutually coupled metalization layers providing high quality factor
CN103389765B (en) * 2013-06-25 2015-01-14 绍兴润煜工程有限公司 Method for adjusting power amplifier grid bias voltage to realize energy conservation and consumption reduction according to requirements
US9374005B2 (en) 2013-08-13 2016-06-21 Rf Micro Devices, Inc. Expanded range DC-DC converter
US9621327B2 (en) * 2013-09-17 2017-04-11 Skyworks Solutions, Inc. Systems and methods related to carrier aggregation front-end module applications
US9876480B2 (en) * 2013-10-22 2018-01-23 Infineon Technologies Ag System and method for a tunable capacitance circuit
CN104752423B (en) * 2013-12-31 2018-08-21 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacturing method and electronic device
JP5900756B2 (en) * 2014-02-28 2016-04-06 株式会社村田製作所 Power amplification module
JP2015172904A (en) * 2014-03-12 2015-10-01 株式会社東芝 Ldo type voltage regulator and power receiver
US9590569B2 (en) * 2014-05-06 2017-03-07 Skyworks Solutions, Inc. Systems, circuits and methods related to low power efficiency improvement in multi-mode multi-band power amplifiers
US9461639B2 (en) * 2014-05-16 2016-10-04 Freescale Semiconductor, Inc. Semiconductor device and power circuit including a sense transistor for current sensing
US9755670B2 (en) 2014-05-29 2017-09-05 Skyworks Solutions, Inc. Adaptive load for coupler in broadband multimode multiband front end module
US20150349742A1 (en) * 2014-05-29 2015-12-03 Skyworks Solutions, Inc. Adaptive load for coupler in broadband multimode multi-band front end module
CN106575812B (en) 2014-06-12 2020-10-30 天工方案公司 Apparatus and method relating to directional coupler
US9429975B2 (en) * 2014-06-16 2016-08-30 Skyworks Solutions, Inc. Band-gap reference circuit for biasing an RF device
US9614476B2 (en) 2014-07-01 2017-04-04 Qorvo Us, Inc. Group delay calibration of RF envelope tracking
US9496902B2 (en) 2014-07-24 2016-11-15 Skyworks Solutions, Inc. Apparatus and methods for reconfigurable directional couplers in an RF transceiver with selectable phase shifters
US9577626B2 (en) 2014-08-07 2017-02-21 Skyworks Solutions, Inc. Apparatus and methods for controlling radio frequency switches
US20160191085A1 (en) * 2014-08-13 2016-06-30 Skyworks Solutions, Inc. Transmit front end module for dual antenna applications
KR102026543B1 (en) 2014-08-19 2019-09-27 비쉐이-실리코닉스 Electronic circuit
US20160261261A1 (en) * 2015-03-04 2016-09-08 GLF Integrated Power, Inc. Methods and Apparatus for a Burst Mode Charge Pump Load Switch
US9465075B2 (en) 2014-08-29 2016-10-11 Freescale Semiconductor, Inc. Wetting current diagnostics
US9455700B1 (en) * 2014-09-04 2016-09-27 Macom Technology Solutions Holdings, Inc. Transmit/receive module including gate/drain switching control
US9866260B2 (en) * 2014-09-12 2018-01-09 Infineon Technologies Ag System and method for a directional coupler module
US9431963B2 (en) * 2014-09-19 2016-08-30 Qualcomm Incorporated Dual stage low noise amplifier for multiband receiver
US9467124B2 (en) 2014-09-30 2016-10-11 Skyworks Solutions, Inc. Voltage generator with charge pump and related methods and apparatus
US9778668B2 (en) 2014-09-30 2017-10-03 Nxp Usa, Inc. Sensed switch current control
US9374124B2 (en) 2014-10-03 2016-06-21 Analog Devices Global Apparatus and methods for biasing radio frequency switches
US9735752B2 (en) 2014-12-03 2017-08-15 Tdk Corporation Apparatus and methods for tunable filters
US9461610B2 (en) 2014-12-03 2016-10-04 Tdk Corporation Apparatus and methods for high voltage variable capacitors
US9614269B2 (en) 2014-12-10 2017-04-04 Skyworks Solutions, Inc. RF coupler with adjustable termination impedance
US9671812B2 (en) 2014-12-17 2017-06-06 Tdk Corporation Apparatus and methods for temperature compensation of variable capacitors
KR20170093252A (en) * 2014-12-30 2017-08-14 스카이워크스 솔루션즈, 인코포레이티드 CMOS transmit / receive switch integrated in radio frequency device
CN104660019B (en) 2015-01-16 2017-12-05 矽力杰半导体技术(杭州)有限公司 A kind of Multiphase Parallel converter and its control method
US9362882B1 (en) 2015-01-23 2016-06-07 Tdk Corporation Apparatus and methods for segmented variable capacitor arrays
US10101395B2 (en) 2015-02-18 2018-10-16 Nxp Usa, Inc. Wetting current diagnostics
KR101804270B1 (en) 2015-03-23 2017-12-04 전북대학교산학협력단 CMOS stacked FET antenna switch on high resistivity silicon substrate
US10382002B2 (en) 2015-03-27 2019-08-13 Tdk Corporation Apparatus and methods for tunable phase networks
US9680426B2 (en) 2015-03-27 2017-06-13 Tdk Corporation Power amplifiers with tunable notches
US10073482B2 (en) 2015-03-30 2018-09-11 Tdk Corporation Apparatus and methods for MOS capacitor structures for variable capacitor arrays
US9595942B2 (en) 2015-03-30 2017-03-14 Tdk Corporation MOS capacitors with interleaved fingers and methods of forming the same
US10042376B2 (en) 2015-03-30 2018-08-07 Tdk Corporation MOS capacitors for variable capacitor arrays and methods of forming the same
US9837555B2 (en) 2015-04-15 2017-12-05 Futurewei Technologies, Inc. Apparatus and method for a low loss coupling capacitor
US10248177B2 (en) * 2015-05-22 2019-04-02 Advanced Micro Devices, Inc. Droop detection and regulation for processor tiles
US9449969B1 (en) * 2015-06-03 2016-09-20 Futurewei Technologies, Inc. Device and method for a high isolation switch
US9729056B2 (en) * 2015-06-10 2017-08-08 Infineon Technologies Ag Charge injection circuit for instantaneous transient support
US9912297B2 (en) 2015-07-01 2018-03-06 Qorvo Us, Inc. Envelope tracking power converter circuitry
US9948240B2 (en) 2015-07-01 2018-04-17 Qorvo Us, Inc. Dual-output asynchronous power converter circuitry
US9973155B2 (en) 2015-07-09 2018-05-15 Tdk Corporation Apparatus and methods for tunable power amplifiers
US10263315B2 (en) * 2015-07-22 2019-04-16 Kyocera Corporation Directional coupler and communication module
US9817416B2 (en) * 2015-08-17 2017-11-14 Skyworks Solutions, Inc. Apparatus and methods for programmable low dropout regulators for radio frequency electronics
US9584118B1 (en) 2015-08-26 2017-02-28 Nxp Usa, Inc. Substrate bias circuit and method for biasing a substrate
US9866244B2 (en) 2015-09-10 2018-01-09 Skyworks Solutions, Inc. Electromagnetic couplers for multi-frequency power detection
WO2017069900A1 (en) * 2015-10-21 2017-04-27 Advanced Micro Devices, Inc. Droop detection and regulation for processor tiles
CN105202803A (en) * 2015-10-24 2015-12-30 唐玉敏 Portable board-assembly refrigeration apparatus
US9667244B1 (en) 2015-11-16 2017-05-30 Analog Devices Global Method of and apparatus for biasing switches
US9666841B1 (en) 2015-12-21 2017-05-30 Ventus Networks Llc Router having removable cellular communication module
US10177722B2 (en) 2016-01-12 2019-01-08 Qualcomm Incorporated Carrier aggregation low-noise amplifier with tunable integrated power splitter
WO2017136631A1 (en) 2016-02-05 2017-08-10 Skyworks Solutions, Inc. Electromagnetic couplers with multi-band filtering
CN105739587A (en) * 2016-02-23 2016-07-06 无锡中微亿芯有限公司 Low dropout regulator which can output large current and has adjustable temperature coefficient
WO2017151321A1 (en) 2016-02-29 2017-09-08 Skyworks Solutions, Inc. Integrated filter and directional coupler assemblies
US9953938B2 (en) 2016-03-30 2018-04-24 Skyworks Solutions, Inc. Tunable active silicon for coupler linearity improvement and reconfiguration
US9712158B1 (en) 2016-04-07 2017-07-18 Analog Devices Global Apparatus and methods for biasing radio frequency switches
US10263647B2 (en) * 2016-04-09 2019-04-16 Skyworks Solutions, Inc. Multiplexing architectures for wireless applications
TW201739099A (en) 2016-04-29 2017-11-01 天工方案公司 Tunable electromagnetic coupler and modules and devices using same
TWI735568B (en) 2016-04-29 2021-08-11 美商天工方案公司 Compensated electromagnetic coupler
WO2017196652A2 (en) 2016-05-09 2017-11-16 Skyworks Solutions, Inc. Self-adjusting electromagnetic coupler with automatic frequency detection
US9973147B2 (en) 2016-05-10 2018-05-15 Qorvo Us, Inc. Envelope tracking power management circuit
US10164681B2 (en) 2016-06-06 2018-12-25 Skyworks Solutions, Inc. Isolating noise sources and coupling fields in RF chips
KR102291940B1 (en) 2016-06-22 2021-08-23 스카이워크스 솔루션즈, 인코포레이티드 Electromagnetic coupler arrangements for multi-frequency power detection and devices comprising same
WO2018005667A1 (en) * 2016-06-28 2018-01-04 Antkowiak Marek E Antenna status remote monitoring system
US9918172B1 (en) * 2016-08-19 2018-03-13 Semiconductor Components Industries, Llc Active output driver supply compensation for noise reduction
CN107818973B (en) * 2016-09-13 2019-12-10 立积电子股份有限公司 Transistor for increasing signal amplitude range
TWI595653B (en) * 2016-09-13 2017-08-11 立積電子股份有限公司 Transistor for increasing a range of a swing of a signal
US10283584B2 (en) * 2016-09-27 2019-05-07 Globalfoundries Inc. Capacitive structure in a semiconductor device having reduced capacitance variability
US20180097485A1 (en) * 2016-10-03 2018-04-05 United States Of America As Represented By Secretary Of The Navy HPA Bypass Switch
WO2018068124A1 (en) * 2016-10-12 2018-04-19 Novena Tec Inc. Multiple source charge controller
US10025334B1 (en) 2016-12-29 2018-07-17 Nuvoton Technology Corporation Reduction of output undershoot in low-current voltage regulators
FR3065339B1 (en) * 2017-04-13 2019-07-05 Stmicroelectronics Sa TRANSMISSION LINE WITH DEVICE FOR LIMITING LOSSES BY DISAPPOINTMENT
US10171037B2 (en) 2017-04-25 2019-01-01 Qorvo Us, Inc. Multi-mode power management system supporting fifth-generation new radio
US10742189B2 (en) 2017-06-06 2020-08-11 Skyworks Solutions, Inc. Switched multi-coupler apparatus and modules and devices using same
US11088685B2 (en) 2017-07-03 2021-08-10 Mitsubishi Electric Corporation High-frequency switch
US10103926B1 (en) 2017-08-08 2018-10-16 Qorvo Us, Inc. Multi-mode power management circuit
US10879852B2 (en) 2017-08-08 2020-12-29 Qorvo Us, Inc. Power management circuit and related radio frequency front-end circuit
US10090809B1 (en) * 2017-08-15 2018-10-02 Qorvo Us, Inc. Multi-mode mobile power management circuit
US10170994B1 (en) * 2017-08-22 2019-01-01 Advanced Micro Devices, Inc. Voltage regulators for an integrated circuit chip
US10326408B2 (en) 2017-09-18 2019-06-18 Qorvo Us, Inc. Envelope tracking power management circuit
KR102385164B1 (en) 2017-09-18 2022-04-12 삼성전자주식회사 Transmitter device and transceiver device for transmitting different wireless standard signal
US10553530B2 (en) 2017-09-29 2020-02-04 Qorvo Us, Inc. Three-dimensional (3D) inductor-capacitor (LC) circuit
JP2019071534A (en) 2017-10-06 2019-05-09 株式会社村田製作所 Bidirectional coupler
US10361667B2 (en) 2017-12-08 2019-07-23 Qorvo Us, Inc. Low noise amplifier circuit
US10097145B1 (en) 2017-12-11 2018-10-09 Qorvo Us, Inc. Multi-mode power management circuit
CN107977039A (en) * 2017-12-28 2018-05-01 北京北广科技股份有限公司 The random waveform long-range control method of high power amplifier
CN108107966A (en) * 2017-12-28 2018-06-01 北京北广科技股份有限公司 A kind of remote control High power amplifier circuits and its application method
JP7027176B2 (en) * 2018-01-22 2022-03-01 ラピスセミコンダクタ株式会社 Semiconductor device
US10476437B2 (en) 2018-03-15 2019-11-12 Qorvo Us, Inc. Multimode voltage tracker circuit
CN108401122B (en) * 2018-03-28 2020-04-14 西安微电子技术研究所 High-precision DAC (digital-to-analog converter) for CMOS (complementary metal oxide semiconductor) image sensor
IT201800004665A1 (en) * 2018-04-18 2019-10-18 INTERFACE ELECTRONIC CIRCUIT FOR A MICROELECTROMECHANICAL ACOUSTIC TRANSDUCER AND RELATIVE METHOD
WO2019212830A2 (en) 2018-04-30 2019-11-07 Skyworks Solutions, Inc. Front end systems with switched termination for enhanced intermodulation distortion performance
SG10201907067WA (en) 2018-08-01 2020-03-30 Skyworks Solutions Inc Variable power amplifier bias impedance
US10386877B1 (en) 2018-10-14 2019-08-20 Nuvoton Technology Corporation LDO regulator with output-drop recovery
CN109767985B (en) * 2019-01-22 2022-02-15 上海华虹宏力半导体制造有限公司 Silicon-on-insulator radio frequency switch device and manufacturing method thereof
CN109633405B (en) * 2019-01-28 2020-11-10 山西大学 Junction temperature calibration and heat dissipation assembly performance evaluation device based on bias current precompensation
US11165397B2 (en) 2019-01-30 2021-11-02 Skyworks Solutions, Inc. Apparatus and methods for true power detection
US20220158665A1 (en) * 2019-03-29 2022-05-19 Interdigital Ce Patent Holdings Control device
US11784108B2 (en) 2019-08-06 2023-10-10 Intel Corporation Thermal management in integrated circuit packages
US20210043573A1 (en) * 2019-08-06 2021-02-11 Intel Corporation Thermal management in integrated circuit packages
US11830787B2 (en) 2019-08-06 2023-11-28 Intel Corporation Thermal management in integrated circuit packages
CN110676323B (en) * 2019-09-17 2023-04-28 长江存储科技有限责任公司 NMOS transistor, forming method thereof and charge pump circuit
US11329647B2 (en) * 2019-10-29 2022-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. Radio frequency switch circuit
WO2021232259A1 (en) * 2020-05-20 2021-11-25 Yangtze Memory Technologies Co., Ltd. 3d nand flash memory device and integration method thereof
US11133836B1 (en) * 2020-07-16 2021-09-28 Nxp Usa, Inc. High isolation radio frequency switch
US11601144B2 (en) 2020-08-26 2023-03-07 Skyworks Solutions, Inc. Broadband architectures for radio frequency front-ends
US11671122B2 (en) 2020-08-26 2023-06-06 Skyworks Solutions, Inc. Filter reuse in radio frequency front-ends
US11290105B1 (en) * 2020-12-21 2022-03-29 Psemi Corporation High power RF switch with controlled well voltage for improved linearity
CN114629490A (en) * 2021-02-07 2022-06-14 台湾积体电路制造股份有限公司 Dual-mode power supply circuit and method
DE102021111003A1 (en) 2021-02-07 2022-08-11 Taiwan Semiconductor Manufacturing Co., Ltd. DUAL MODE SUPPLY CIRCUIT AND METHOD
TWI779484B (en) * 2021-02-08 2022-10-01 瑞昱半導體股份有限公司 Communication chip
US11641188B1 (en) 2021-12-29 2023-05-02 International Business Machines Corporation Current-mode signal path of an integrated radio frequency pulse generator
US11757431B2 (en) 2021-12-29 2023-09-12 International Business Machines Corporation Current-mode signal path of an integrated radio frequency pulse generator
US11888504B2 (en) 2022-02-18 2024-01-30 Apple Inc. Electronic devices with output load independent detection capabilities

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6909320B2 (en) * 2003-06-19 2005-06-21 Freescale Semiconductor, Inc. Method and apparatus for dual output voltage regulation
US20060114059A1 (en) * 2004-12-01 2006-06-01 Alcatel Power amplifier
US7068019B1 (en) * 2005-03-23 2006-06-27 Mediatek Inc. Switchable linear regulator
US7170265B2 (en) * 2005-04-07 2007-01-30 Sige Semiconductor Inc. Voltage regulator circuit with two or more output ports
US20080142954A1 (en) * 2006-12-19 2008-06-19 Chuan Hu Multi-chip package having two or more heat spreaders
US20100156362A1 (en) * 2008-12-23 2010-06-24 Texas Instruments Incorporated Load transient response time of LDOs with NMOS outputs with a voltage controlled current source
US7872527B2 (en) * 2009-03-31 2011-01-18 Qualcomm, Incorporated Power supply control system and method with variable post-regulation
US20110298432A1 (en) * 2010-06-07 2011-12-08 Skyworks Solutions, Inc Apparatus and method for variable voltage function

Family Cites Families (108)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3226339C2 (en) 1981-07-17 1985-12-19 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Analog switch device with MOS transistors
US4701724A (en) 1986-07-15 1987-10-20 Motorola, Inc. Injection switch and directional coupler
US4998075A (en) 1989-10-26 1991-03-05 Western Digital Corporation Programmable multiple oscillator circuit
US5010292A (en) * 1989-12-12 1991-04-23 North American Philips Corporation Voltage regulator with reduced semiconductor power dissipation
US5117125A (en) * 1990-11-19 1992-05-26 National Semiconductor Corp. Logic level control for impact ionization sensitive processes
JP3444653B2 (en) * 1994-06-09 2003-09-08 三菱電機株式会社 Power amplifier
JP4037470B2 (en) 1994-06-28 2008-01-23 エルピーダメモリ株式会社 Semiconductor device
US5574678A (en) * 1995-03-01 1996-11-12 Lattice Semiconductor Corp. Continuous time programmable analog block architecture
US5949226A (en) * 1995-04-10 1999-09-07 Kabushiki Kaisha Toyoda Jidoshokki Seisakush DC/DC converter with reduced power consumpton and improved efficiency
FI101505B1 (en) 1995-05-10 1998-06-30 Nokia Mobile Phones Ltd Method for improving power measurement through a directional switch at low power levels
US5625328A (en) 1995-09-15 1997-04-29 E-Systems, Inc. Stripline directional coupler tolerant of substrate variations
US5646550A (en) * 1996-02-22 1997-07-08 Motorola, Inc. High reliability output buffer for multiple voltage system
US5748134A (en) 1996-03-01 1998-05-05 Ericsson Inc. Method and apparatus for converting an analog signal into digital format
JP3258930B2 (en) 1997-04-24 2002-02-18 東芝マイクロエレクトロニクス株式会社 Transmission gate
US6218895B1 (en) * 1997-06-20 2001-04-17 Intel Corporation Multiple well transistor circuits having forward body bias
KR19990073944A (en) * 1998-03-05 1999-10-05 윤종용 Multi-Output Power Regulator Circuit
US6307233B1 (en) * 1998-07-31 2001-10-23 Texas Instruments Incorporated Electrically isolated double gated transistor
US6281737B1 (en) 1998-11-20 2001-08-28 International Business Machines Corporation Method and apparatus for reducing parasitic bipolar current in a silicon-on-insulator transistor
JP3504514B2 (en) * 1998-11-24 2004-03-08 三菱電機株式会社 High frequency amplifier
JP2000228084A (en) 1999-02-05 2000-08-15 Mitsubishi Electric Corp Voltage generating circuit
DE50007487D1 (en) * 1999-03-23 2004-09-23 Siemens Ag LOAD-SYNCHRONOUS DOUBLE-CHARGE PUMP WITH INTEGRATED REGULATOR
KR100307534B1 (en) * 1999-09-07 2001-11-05 김영환 Back bias voltage level circuit
GB9926956D0 (en) 1999-11-13 2000-01-12 Koninkl Philips Electronics Nv Amplifier
KR100332114B1 (en) 1999-12-27 2002-04-10 박종섭 A circuit for creating bias level in a flash memory device
JP2001211640A (en) * 2000-01-20 2001-08-03 Hitachi Ltd Electronic device, semiconductor integrated circuit, and information processing system
JP2001217663A (en) * 2000-02-02 2001-08-10 Nec Saitama Ltd Transmission circuit
US6504212B1 (en) 2000-02-03 2003-01-07 International Business Machines Corporation Method and apparatus for enhanced SOI passgate operations
US6917095B1 (en) * 2000-05-30 2005-07-12 Altera Corporation Integrated radio frequency circuits
US6246221B1 (en) 2000-09-20 2001-06-12 Texas Instruments Incorporated PMOS low drop-out voltage regulator using non-inverting variable gain stage
JP2002164441A (en) 2000-11-27 2002-06-07 Matsushita Electric Ind Co Ltd High frequency switch circuit device
US6507471B2 (en) 2000-12-07 2003-01-14 Koninklijke Philips Electronics N.V. ESD protection devices
US6876529B2 (en) 2000-12-15 2005-04-05 Skyworks Solutions, Inc. Electrostatic discharge protection circuit
US6680650B2 (en) 2001-01-12 2004-01-20 Broadcom Corporation MOSFET well biasing scheme that migrates body effect
JP3674520B2 (en) 2001-03-07 2005-07-20 関西日本電気株式会社 Semiconductor integrated circuit device
US6738432B2 (en) 2001-03-21 2004-05-18 Ericsson Inc. System and method for RF signal amplification
GB2376384B (en) 2001-06-08 2005-03-16 Sony Uk Ltd Antenna switch
US6630903B1 (en) * 2001-09-28 2003-10-07 Itt Manufacturing Enterprises, Inc. Programmable power regulator for medium to high power RF amplifiers with variable frequency applications
US6804502B2 (en) 2001-10-10 2004-10-12 Peregrine Semiconductor Corporation Switch circuit and method of switching radio frequency signals
US6522110B1 (en) * 2001-10-23 2003-02-18 Texas Instruments Incorporated Multiple output switching regulator
US6839211B2 (en) 2002-02-21 2005-01-04 Broadcom Corporation Methods and systems for reducing power-on failure of integrated circuits
WO2003073605A1 (en) 2002-02-28 2003-09-04 Fujitsu Limited High-frequency amplifier
JP3916502B2 (en) 2002-04-26 2007-05-16 富士通株式会社 Output circuit
US7039377B2 (en) 2002-06-14 2006-05-02 Skyworks Solutions, Inc. Switchable gain amplifier
US6784722B2 (en) 2002-10-09 2004-08-31 Intel Corporation Wide-range local bias generator for body bias grid
ITMI20022268A1 (en) * 2002-10-25 2004-04-26 Atmel Corp VARIABLE CHARGE PUMP CIRCUIT WITH DYNAMIC LOAD
US6937094B2 (en) 2002-11-22 2005-08-30 Powerwave Technologies, Inc. Systems and methods of dynamic bias switching for radio frequency power amplifiers
GB2395849B (en) * 2002-11-26 2005-11-09 Wolfson Ltd Improved analogue selector
US7149496B2 (en) * 2003-03-27 2006-12-12 Kyocera Corporation High-frequency module and radio communication apparatus
US7872454B2 (en) 2003-08-21 2011-01-18 Marvell World Trade Ltd. Digital low dropout regulator
US7512386B2 (en) 2003-08-29 2009-03-31 Nokia Corporation Method and apparatus providing integrated load matching using adaptive power amplifier compensation
US7053718B2 (en) 2003-09-25 2006-05-30 Silicon Laboratories Inc. Stacked RF power amplifier
JP2005184631A (en) 2003-12-22 2005-07-07 Renesas Technology Corp High-frequency power amplifying electronic component
US6972596B1 (en) * 2004-02-03 2005-12-06 Sun Microsystems, Inc. Method and apparatus for amplifying capacitively coupled inter-chip communication signals
JP4091576B2 (en) 2004-03-24 2008-05-28 株式会社東芝 Semiconductor integrated circuit and frequency modulation device
KR100593901B1 (en) * 2004-04-22 2006-06-28 삼성전기주식회사 Directional coupler and dual band transmitter using same
US7514911B2 (en) * 2004-05-13 2009-04-07 Marvell World Trade Ltd. Voltage regulator feedback protection method and apparatus
US7388357B2 (en) * 2004-06-15 2008-06-17 Semtech Corporation Method and apparatus for reducing input supply ripple in a DC-DC switching converter
US7060566B2 (en) 2004-06-22 2006-06-13 Infineon Technologies Ag Standby current reduction over a process window with a trimmable well bias
JP4143054B2 (en) 2004-08-19 2008-09-03 株式会社東芝 Voltage generation circuit
JP4487726B2 (en) 2004-10-28 2010-06-23 株式会社デンソー Analog switches and switched capacitor filters
JP4212569B2 (en) * 2005-04-01 2009-01-21 株式会社デンソー Switching device
US7109897B1 (en) * 2005-10-07 2006-09-19 Rf Micro Devices, Inc. Power amplifier control reducing output power variation
US7301402B2 (en) 2005-11-17 2007-11-27 Freescale Semiconductor, Inc. Soft saturation detection for power amplifiers
KR100690924B1 (en) * 2005-12-21 2007-03-09 삼성전자주식회사 Semiconductor integrated circuit device and fabrication method for the same
KR100737539B1 (en) 2006-02-13 2007-07-10 주식회사 팬택앤큐리텔 A power amplifier matching circuit of mobile communication terminal
US7615977B2 (en) * 2006-05-15 2009-11-10 Stmicroelectronics S.A. Linear voltage regulator and method of limiting the current in such a regulator
JP4832965B2 (en) 2006-06-07 2011-12-07 パナソニック株式会社 Switch circuit device, radio circuit device using the switch circuit device, and sampling circuit device
KR101165386B1 (en) 2006-06-13 2012-07-12 페어차일드코리아반도체 주식회사 Qusi-resonat converter and controlling method thereof
US7764055B2 (en) * 2006-07-10 2010-07-27 Skyworks Solutions, Inc. Polar transmitter having a dynamically controlled voltage regulator and method for operating same
US7508266B1 (en) 2006-08-29 2009-03-24 Pmc-Sierra, Inc. Method for enhancing linearity of a transistor amplifier using switched capacitive loads
US8288829B2 (en) 2006-09-21 2012-10-16 Nanyang Technological University Triple well transmit-receive switch transistor
US7609047B2 (en) 2006-11-09 2009-10-27 Intel Corporation Dynamically configurable voltage regulator for integrated circuits
US7719141B2 (en) 2006-11-16 2010-05-18 Star Rf, Inc. Electronic switch network
US7605651B2 (en) * 2007-01-25 2009-10-20 Skyworks Solutions, Inc. Multimode amplifier for operation in linear and saturated modes
US7787834B2 (en) * 2007-02-08 2010-08-31 Broadcom Corporation Voice, data and RF integrated circuit with off-chip power amplifier and methods for use therewith
US7554473B2 (en) 2007-05-02 2009-06-30 Cirrus Logic, Inc. Control system using a nonlinear delta-sigma modulator with nonlinear process modeling
CN100480944C (en) * 2007-05-15 2009-04-22 北京中星微电子有限公司 Voltage controlled current source and low voltage difference regulated power supply installed with same
JP5018245B2 (en) * 2007-05-31 2012-09-05 株式会社日立製作所 Analog switch
KR100925356B1 (en) * 2007-07-16 2009-11-09 지씨티 세미컨덕터 인코포레이티드 Voltage regulation circuit and control method of the same
JP2009042428A (en) * 2007-08-08 2009-02-26 Nec Electronics Corp Amplifier circuit and display device
US7671699B2 (en) * 2007-08-14 2010-03-02 Pine Valley Investments, Inc. Coupler
US7855534B2 (en) 2007-08-30 2010-12-21 International Business Machines Corporation Method for regulating a voltage using a dual loop linear voltage regulator with high frequency noise reduction
US7738841B2 (en) 2007-09-14 2010-06-15 Samsung Electro-Mechanics Systems, methods and apparatuses for high power complementary metal oxide semiconductor (CMOS) antenna switches using body switching and external component in multi-stacking structure
JP5136834B2 (en) * 2007-10-16 2013-02-06 株式会社村田製作所 RF power amplifier and power supply circuit for controlling power supply voltage of RF power amplifier
US8063618B2 (en) 2007-12-31 2011-11-22 Intel Corporation Supply voltage control based at least in part on power state of integrated circuit
KR101481725B1 (en) * 2008-02-26 2015-01-13 삼성전자주식회사 Apparatus and method for power transmitter in wirelass communication systems
KR100927407B1 (en) * 2008-04-24 2009-11-19 주식회사 하이닉스반도체 Voltage regulator
US8175554B2 (en) * 2008-05-07 2012-05-08 Intel Mobile Communications GmbH Radio frequency communication devices and methods
US7868683B2 (en) 2008-08-12 2011-01-11 Infineon Technologies Ag Switch using an accelerating element
US7940111B2 (en) 2008-10-30 2011-05-10 Qualcomm Incorporated High-performance analog switch
US8217635B2 (en) * 2009-04-03 2012-07-10 Infineon Technologies Ag LDO with distributed output device
US8749213B2 (en) 2009-06-09 2014-06-10 Silergy Technology Mixed mode control for switching regulator with fast transient responses
US8102205B2 (en) * 2009-08-04 2012-01-24 Qualcomm, Incorporated Amplifier module with multiple operating modes
US8310277B2 (en) 2009-08-27 2012-11-13 Qualcomm, Incorporated High linear fast peak detector
JP5381528B2 (en) * 2009-09-09 2014-01-08 三菱電機株式会社 Directional coupler
US8306481B2 (en) 2009-10-30 2012-11-06 Infineon Technologies Ag Single pole multi throw switch
US7969203B1 (en) * 2009-12-03 2011-06-28 Nxp B.V. Switch-body PMOS switch with switch-body dummies
US7936187B1 (en) 2009-12-03 2011-05-03 Nxp B.V. Switch-body NMOS-PMOS switch with complementary clocked switch-body NMOS-PMOS dummies
US9887014B2 (en) 2009-12-18 2018-02-06 Aeroflex Colorado Springs Inc. Radiation tolerant circuit for minimizing the dependence of a precision voltage reference from ground bounce and signal glitch
JP5426434B2 (en) 2010-03-05 2014-02-26 株式会社東芝 Transceiver module
US8570235B2 (en) * 2010-05-04 2013-10-29 Samsung Electro-Mechanics Systems and methods for complementary metal-oxide-semiconductor (CMOS) differential antenna switches using multi-section impedance transformations
US8441149B2 (en) 2010-06-25 2013-05-14 Intel Corporation Distributed power delivery scheme for on-die voltage scaling
JP5313970B2 (en) * 2010-06-30 2013-10-09 パナソニック株式会社 High frequency power amplifier
KR101128487B1 (en) * 2010-10-12 2012-06-21 포항공과대학교 산학협력단 Power amplifier linearization method and apparatus
JP5655704B2 (en) * 2011-05-19 2015-01-21 三菱電機株式会社 High frequency power amplifier
JP2013009249A (en) * 2011-06-27 2013-01-10 Mitsubishi Electric Corp Power amplifier
US8681460B2 (en) 2011-07-13 2014-03-25 Sony Corporation Electrostatic discharge (ESD) protection device
US8847672B2 (en) 2013-01-15 2014-09-30 Triquint Semiconductor, Inc. Switching device with resistive divider

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6909320B2 (en) * 2003-06-19 2005-06-21 Freescale Semiconductor, Inc. Method and apparatus for dual output voltage regulation
US20060114059A1 (en) * 2004-12-01 2006-06-01 Alcatel Power amplifier
US7068019B1 (en) * 2005-03-23 2006-06-27 Mediatek Inc. Switchable linear regulator
US7170265B2 (en) * 2005-04-07 2007-01-30 Sige Semiconductor Inc. Voltage regulator circuit with two or more output ports
US20080142954A1 (en) * 2006-12-19 2008-06-19 Chuan Hu Multi-chip package having two or more heat spreaders
US20100156362A1 (en) * 2008-12-23 2010-06-24 Texas Instruments Incorporated Load transient response time of LDOs with NMOS outputs with a voltage controlled current source
US7872527B2 (en) * 2009-03-31 2011-01-18 Qualcomm, Incorporated Power supply control system and method with variable post-regulation
US20110298432A1 (en) * 2010-06-07 2011-12-08 Skyworks Solutions, Inc Apparatus and method for variable voltage function
US20110298280A1 (en) * 2010-06-07 2011-12-08 Skyworks Solutions, Inc Apparatus and method for variable voltage distribution

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10236847B2 (en) 2010-06-07 2019-03-19 Skyworks Solutions, Inc. Apparatus and method for variable voltage distribution
US9667210B2 (en) 2010-06-07 2017-05-30 Skyworks Solutions, Inc. Apparatus and methods for generating a variable regulated voltage
US9081404B2 (en) * 2012-04-13 2015-07-14 Infineon Technologies Austria Ag Voltage regulator having input stage and current mirror
US20130271095A1 (en) * 2012-04-13 2013-10-17 Infineon Technologies Austria Ag Linear Voltage Regulator
US9585091B2 (en) 2012-08-17 2017-02-28 Qualcomm Incorporated Systems and methods for low power wake up signal and operations for WLAN
US9191890B2 (en) * 2012-10-24 2015-11-17 Qualcomm Incorporated Systems and methods for low power operations on wireless networks
US20140112224A1 (en) * 2012-10-24 2014-04-24 Qualcomm Incorporated Systems and methods for low power operations on wireless networks
US9743351B2 (en) 2012-11-02 2017-08-22 Qualcomm Incorporated Systems and methods for low power wake-up signal implementation and operations for WLAN
US9191891B2 (en) 2012-11-02 2015-11-17 Qualcomm Incorporated Systems and methods for low power wake-up signal implementation and operations for WLAN
US10614766B2 (en) * 2016-05-19 2020-04-07 Novatek Microelectronics Corp. Voltage regulator and method applied thereto
US20170337886A1 (en) * 2016-05-19 2017-11-23 Novatek Microelectronics Corp. Voltage regulator and method applied thereto
US11936416B2 (en) * 2020-01-15 2024-03-19 Skyworks Solutions, Inc. Biasing of cascode power amplifiers for multiple power supply domains
US20220413534A1 (en) * 2021-06-29 2022-12-29 Skyworks Solutions, Inc. Voltage regulation schemes for powering multiple circuit blocks
US11953926B2 (en) * 2021-06-29 2024-04-09 Skyworks Solutions, Inc. Voltage regulation schemes for powering multiple circuit blocks

Also Published As

Publication number Publication date
US20110298537A1 (en) 2011-12-08
WO2011156289A2 (en) 2011-12-15
WO2011156290A3 (en) 2012-03-15
US8008970B1 (en) 2011-08-30
US8369805B2 (en) 2013-02-05
US8368463B2 (en) 2013-02-05
WO2011156291A2 (en) 2011-12-15
US9667210B2 (en) 2017-05-30
US20110298559A1 (en) 2011-12-08
US20110298280A1 (en) 2011-12-08
US20150084692A1 (en) 2015-03-26
US20160252917A1 (en) 2016-09-01
US20110298523A1 (en) 2011-12-08
US20110298432A1 (en) 2011-12-08
WO2011156293A2 (en) 2011-12-15
US8421438B2 (en) 2013-04-16
US8330530B2 (en) 2012-12-11
WO2011156291A3 (en) 2012-03-01
US20110300898A1 (en) 2011-12-08
US9014647B2 (en) 2015-04-21
US20130293316A1 (en) 2013-11-07
US20110298444A1 (en) 2011-12-08
US9762192B2 (en) 2017-09-12
US9294073B2 (en) 2016-03-22
US20110300899A1 (en) 2011-12-08
US20160294342A1 (en) 2016-10-06
US8417196B2 (en) 2013-04-09
WO2011156289A3 (en) 2012-03-15
US20190165747A1 (en) 2019-05-30
WO2011156293A3 (en) 2012-04-12
US8880014B2 (en) 2014-11-04
US20170279424A1 (en) 2017-09-28
US20110298526A1 (en) 2011-12-08
WO2011156290A2 (en) 2011-12-15
US10236847B2 (en) 2019-03-19
US8461897B2 (en) 2013-06-11

Similar Documents

Publication Publication Date Title
US10236847B2 (en) Apparatus and method for variable voltage distribution
US10080192B2 (en) Apparatus and methods for envelope tracking systems
US9859846B2 (en) Apparatus and methods for capacitive load reduction in a mobile device

Legal Events

Date Code Title Description
AS Assignment

Owner name: SKYWORKS SOLUTIONS, INC., MASSACHUSETTS

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:HOMOL, DAVID K.;PRATT, RYAN M.;REEL/FRAME:025130/0446

Effective date: 20100924

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION