US20130178071A1 - Thermal oxide film formation method for silicon single crystal wafer - Google Patents
Thermal oxide film formation method for silicon single crystal wafer Download PDFInfo
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- US20130178071A1 US20130178071A1 US13/824,028 US201113824028A US2013178071A1 US 20130178071 A1 US20130178071 A1 US 20130178071A1 US 201113824028 A US201113824028 A US 201113824028A US 2013178071 A1 US2013178071 A1 US 2013178071A1
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/024—Group 12/16 materials
- H01L21/02403—Oxides
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- H—ELECTRICITY
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02598—Microstructure monocrystalline
Definitions
- the present invention relates to a thermal oxide film formation method for suppressing slip dislocation, etc. taking place when thermal oxide film is formed on a silicon single crystal wafer.
- a thermal oxide film on the surface of a silicon single crystal wafer e.g., silicon single crystal wafer is mounted on a heat treatment jig (frequently referred to as wafer boat) made of heat resistant material (e.g., quartz or SiC) to set such a jig within a tube for heat treatment furnace to perform heat treatment under oxidizing atmosphere.
- a heat treatment jig (frequently referred to as wafer boat) made of heat resistant material (e.g., quartz or SiC) to set such a jig within a tube for heat treatment furnace to perform heat treatment under oxidizing atmosphere.
- Control of film thickness of the thermal oxide film formed in this way is performed after subjected to calculation by the kind of the heat treatment atmosphere, the heat treatment temperature and/or heat treatment time.
- thermal oxide film to be formed on the surface of the silicon single crystal wafer although depending upon the purpose, in the case of fabricating a bonded SOI wafer including a thick buried oxide film layer (BOX layer) as described in the Patent Literature 1, a thick thermal oxide film is formed on at least one of two silicon single crystal wafers to be bonded and a bonding process is performed.
- BOX layer buried oxide film layer
- high temperature/long time heat treatment is performed under the atmosphere including water vapor such as wet O 2 oxidation or pyrogenic oxidation, etc. as the heat treatment atmosphere where oxidation rate is high.
- the present invention has been made in view of the above-described problems, and aims at providing a method of forming a thermal oxide film of preventing sticking onto a wafer boat taking place particularly in forming s thick oxide film to have ability to suppress occurrence of slip dislocation and/or crack of a silicon single crystal wafer during formation of the thermal oxide film.
- the present invention provides a method of forming a thermal oxide film on a silicon single crystal wafer, at least comprising: throwing the silicon single crystal wafer into a heat treatment furnace; elevating temperature of the heat treatment furnace up to a temperature T1 where a thermal oxide film is formed to form a thermal oxide film having a thickness d1; subsequently lowering the temperature of the heat treatment furnace down to a temperature lower than the temperature T1; and thereafter elevating the temperature of the heat treatment furnace up to a temperature T2 higher than the temperature T1 to additionally form a thermal oxide film having a thickness d2 thicker than the thickness d1.
- the thermal oxide film formed in this way warp phenomenon of wafer takes place resulting from a temperature difference between a wafer outer peripheral part and a central part occurring at the time of lowering temperature, and therefore a position in contact with a wafer boat for holding the wafer changes. For this reason, it is possible to prevent that the wafer is stuck onto the wafer boat by the thermal oxide film.
- the thermal oxide film formed during oxidation at the temperature T1 of the preceding stage has the effect of the protective film in high temperature oxidation performed at the temperature T2 of the succeeding stage.
- a thick oxide film is additionally formed by high temperature oxidation of the succeeding stage, while suppressing occurrence of the slip dislocation and/or crack in the state where the contact position is changed and the thermal oxide film as the protective film is formed at the preceding stage. Therefore, it is possible to efficiently form satisfactory thick thermal oxide film.
- the temperature of the heat treatment furnace is elevated up to the temperature T2 higher than the temperature T1 without taking out the silicon single crystal wafer from the heat treatment furnace to additionally form a thermal oxide film having the thickness d2 thicker than the thickness d1 after the temperature of the heat treatment furnace is lowered down to the temperature lower than the temperature T1.
- the thermal oxide film is additionally formed as described above, thereby making it possible to additionally form the thermal oxide film continuously within the heat treatment furnace. Such a process is efficient.
- the temperature T1 is set to a temperature lower than 1200° C.
- the temperature T2 is set to a temperature of 1200° C. or more.
- the temperature T1 is set to a temperature lower than 1200° C., thereby making it possible to form a thermal oxide film while effectively preventing occurrence of slip dislocation by the low temperature oxidation of the preceding stage.
- the temperature T2 is set to a temperature of 1200° C. or more, thereby making it possible to efficiently form thick thermal oxide film by the high temperature oxidation of the succeeding stage at a sufficient oxidation rate.
- the temperature of the heat treatment furnace is lowered down to the temperature lower than the temperature T1
- the temperature of the heat treatment furnace is lowered down to a temperature lower than the temperature T1 by 200° C. or more.
- the temperature of the heat treatment furnace is lowered down to the temperature lower than the temperature T1 by 200° C. or more, thereby making it possible to allow warp phenomenon of the wafer at time of lowering temperature to sufficiently take place to change the position in contact with the wafer boat thus to effectively prevent sticking.
- the temperature of the heat treatment furnace is lowered down to the temperature lower than the temperature T1
- the temperature of the heat treatment furnace is lowered down to a temperature equal to or less than a throw-in temperature when the silicon single crystal wafer is thrown into the heat treatment furnace.
- the temperature of the heat treatment furnace is lowered down to a temperature equal to or less than a throw-in temperature when the silicon single crystal wafer is thrown into the heat treatment furnace, thereby making it possible to allow warp phenomenon of the wafer at the time of lowering temperature to sufficiently take place to change the position in contact with the wafer boat to securely prevent sticking.
- a film thickness obtained by totalizing the thickness d1 and the thickness d2 may be 2500 nm or more.
- the thickness d1 is 500 nm or more.
- the thickness d1 is 500 nm or more so that the thermal oxide film thus formed functions as a satisfactory protective film in high temperature oxidation of the succeeding stage to securely prevent occurrence of the slip dislocation.
- thermal oxide film having the thickness d2 is additionally formed, further additional formation of a thermal oxide film by lowering the temperature of the heat treatment furnace down to a temperature lower than the temperature T1 and thereafter elevating the temperature of the heat treatment furnace up to a temperature higher than the temperature T1 is repeated one or more times.
- the thermal oxide film is additionally formed as described above, thereby making it possible to securely prevent sticking onto the wafer boat particularly in forming a thick thermal oxide film.
- FIG. 1 is a view showing temperature and atmospheric gas within a heat treatment furnace in an example
- FIG. 2 is view showing temperature and atmospheric gas within a heat treatment furnace in comparative examples 1, 2, and
- FIG. 3 is a view showing temperature and atmospheric gas within a heat treatment furnace in a comparative example 3.
- a silicon single crystal wafer is first thrown into, e.g., a longitudinal heat treatment furnace.
- wafers are filled into a wafer boat having supporting parts for mounting a plurality of wafers thereon to perform loading the wafer boat into a tube of the heat treatment furnace to thereby throw them thereinto.
- a heater is set so that there is provided, e.g., temperature of about 500° C.
- the temperature of the heat treatment furnace is elevated up to the temperature T1 where a thermal oxide film is formed to hold such temperature to thereby form a thermal oxide film having thickness d1.
- the temperature T1 where the thermal oxide film is formed is not particularly limited.
- the temperature of the heat treatment furnace is a temperature higher than 600° C.
- a thermal oxide film having a certain thickness is formed, but it is preferable that, e.g., the temperature T1 is a temperature lower than 1200° C.
- the temperature of the heat treatment furnace is a temperature lower than 1200° C.
- the thickness d1 of the thermal oxide film to be formed at this time is not particularly limited, but e.g., a thickness of 500 nm or more is preferable.
- the thermal oxide film having such a thickness is formed, whereby the thermal oxide film has a thickness to a degree such that the thermal oxide film sufficiently functions as a protective film in high temperature oxidation of the succeeding stage, thus making it possible to sufficiently suppress occurrence of the slip dislocation.
- the temperature of the heat treatment furnace is lowered down to a temperature lower than the temperature T1.
- the temperature of the heat treatment furnace is lowered so that a temperature difference takes place between the outer peripheral part of the wafer and the central part thereof.
- warp phenomenon takes place at the wafer resulting from the temperature difference.
- the position in contact with the wafer boat changes. For this reason, it can be prevented that the wafer may be stuck onto the wafer boat by the thermal oxide film formed.
- the temperature of the heat treatment is lowered down to a temperature lower than the temperature T1 by 200° C. or more.
- the temperature of the heat treatment furnace is lowered down to a temperature equal to or less than a throw-in temperature when the silicon single crystal wafer is thrown into the heat treatment furnace.
- the temperature of the heat treatment furnace is elevated up to a temperature T2 higher than the temperature T1 to additionally form a thermal oxide film having thickness d2 thicker than the thickness d1.
- this thermal oxide film functions as a protective film so that slip dislocation is difficult to occur even at a high temperature.
- a thermal oxide film having thickness d2 thicker than that of the low temperature oxidation of the preceding stage in high temperature oxidation since the oxidation rate is high due to high temperature, it is possible to efficiently and additionally form thick thermal oxide film.
- the temperature T2 at this time may be a temperature higher than the temperature T1, but is not particularly limited. In this case, for example, it is preferable that the temperature T2 is 1200° C. or more.
- the temperature T2 is 1200° C. or more, since the oxidation rate is sufficiently high, such a process is efficient. Moreover, even when the temperature T2 is such a high temperature, since the thermal oxide film is formed by the low temperature oxidation of the preceding stage in the present invention, such thermal oxide film functions as a protective film so that slip dislocation is difficult to take place.
- the temperature of the heat treatment furnace is elevated up to the temperature T2 without taking out the wafer toward the outside of the heat treatment furnace to continuously perform formation of the oxide film after the temperature of the heat treatment furnace is lowered.
- Such temperature elevation, temperature lowering and temperature holding within the heat treatment furnace may be performed by controlling heater output.
- temperature-elevating rate and temperature-lowering rate are not particularly limited.
- the atmosphere in formation of a thermal oxide film is oxidizing atmosphere where the oxide film is formed
- the atmosphere is not also particularly limited, and e.g., wet O 2 oxidation and/or pyrogenic oxidation, etc. may be performed under the atmosphere including vapor water.
- thermal oxide film formation method of the present invention as described above, occurrence of slip dislocation and/or crack is prevented also in forming a thick thermal oxide film having thickness of 2500 nm or more, otherwise 5000 nm or more where slip dislocation, etc. is apt to particularly take place, and thus a satisfactory thermal oxide film can be formed.
- the thermal oxide film having the thickness d2 is additionally formed in a manner as described above, further additional formation of a thermal oxide film by lowering the temperature of the heat treatment furnace down to a temperature lower than the temperature T1 and thereafter elevating the temperature of the heat treatment furnace up to a temperature higher than the temperature T1 is repeated one or more times.
- temperature lowering and temperature elevation of the present invention may be repeated further one or more times in this way to thereby prevent sticking onto the wafer boat, thus making it possible securely prevent slip dislocation and/or crack.
- the oxide film formation method according to the present invention may be also applied to a bonded SOI wafer made by bonding two ordinary silicon single crystal wafers through the oxide film, and to a SOI wafer fabricated through high temperature heat treatment after oxygen ions are implanted into an ordinary silicon single crystal wafer, in addition to ordinary silicon single crystal wafer comprised of only silicon single crystal.
- “silicon single crystal wafer” in the present invention may include these SOI wafers.
- a mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation ⁇ 100> was thrown into a longitudinal heat treatment furnace to form a thermal oxide film having a thickness of 6000 nm by the heat treatment profile of FIG. 1 .
- Table 1 there are shown throw-in temperature Tin(° C.), low temperature oxidation temperature T1(° C.), lowered temperature T(° C.), high temperature oxidation temperature T2(° C.) and taking-out temperature Tout(° C.) in this instance.
- the oxidation is performed by the pyrogenic oxidation.
- oxidation 1 oxidation time was adjusted so that a thermal oxidation film having a thickness of 1000 nm is formed.
- oxidation 2 oxidation time was adjusted so that a thermal oxidation film having a thickness of 5000 nm is additionally formed.
- the temperature-elevating rate from Tin(° C.) to T1(° C.) was set to 5(° C./min), and the temperature-lowering rate from Tin(° C.) to T(° C.) was set to 2.5(° C./min).
- the temperature-elevating rate from T(° C.) to T2(° C.) was set to 2(° C./min) until 900° C., was set to 1(° C./min) between 900° C. and 1200(° C.), and was set to 0.5(° C./min) between 1200 and 1250(° C.).
- the temperature-lowering rate from T2(° C.) to Tout(° C.) was set to 0.5(° C./min) until 1200° C., was set to 1(° C./min) between 1200 and 1100(° C.), and was set to 2(° C./min) between 1100 and Tout(° C.).
- the thermal oxide film having a thickness of 6000 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, at the position in contact with the wafer boat, contact trace was observed, but linear slip dislocation was not observed.
- a mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation ⁇ 100> was thrown into a longitudinal heat treatment furnace to form a thermal oxide film having a thickness of 5500 nm by the heat treatment profile of FIG. 1 .
- Table 1 there are shown throw-in temperature Tin(° C.), low temperature oxidation temperature T1(° C.), lowered temperature T(° C.), high temperature oxidation temperature T2(° C.) and taking-out temperature Tout(° C.) in this instance.
- the oxidation was performed by the pyrogenic oxidation.
- oxidation 1 oxidation time was adjusted so that a thermal oxide film having a thickness of 500 nm is formed.
- oxidation 2 oxidation time was adjusted so that a thermal oxidation film having a thickness of 5000 nm is additionally formed.
- the temperature-elevating rate from Tin(° C.) to T1(° C.) was set to 5(° C./min), and the temperature-lowering rate from T1(° C.) to T(° C.) was set to 2.5(° C./min).
- the temperature-elevating rate from T(° C.) to T2(° C.) was set to 2(° C./min) until 900° C., was set to 1(° C./min) between 900° C. and 1200(° C.), and was set to 0.5(° C./min) between 1200 and 1250(° C.).
- the temperature-lowering rate from T2(° C.) to Tout(° C.) was set to 0.5(° C./min) until 1200° C., was set to 1(° C./min) between 1200 and 1100(° C.), and was set to 2(° C./min) between 1100 and Tout(° C.).
- the thermal oxide film having a thickness of 5500 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, at the position in contact with the wafer boat, contact trace was observed, but linear slip dislocation was not observed.
- a mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation ⁇ 100> was thrown into a longitudinal heat treatment furnace to form an oxide film having a thickness of 2500 nm by the heat treatment profile of FIG. 1 .
- the table 1 there are shown throw-in temperature Tin(° C.), low temperature oxidation temperature T1(° C.), lowered temperature T(° C.), high temperature oxidation temperature T2(° C.) and taking-out temperature Tout(° C.) in this instance.
- the oxidation is performed by the pyrogenic oxidation.
- oxidation 1 oxidation time was adjusted so that a thermal oxidation film having a thickness of 500 nm is formed.
- oxidation 2 oxidation time was adjusted so that a thermal oxidation film having a thickness of 2000 nm is additionally formed.
- the temperature-elevating rate from Tin(° C.) to T1(° C.) was set to 5(° C./min), and the temperature-lowering rate from T1(° C.) to T(° C.) was set to 2.5(° C./min).
- the temperature-elevating rate from T(° C.) to T2(° C.) was set to 2(° C./min) until 900° C., and was set to 1 (° C./min) between 900° C. and 1200(° C.).
- the temperature-lowering rate from T2(° C.) to Tout(° C.) was set to 1(° C./min) until 1100° C., and was set to 2(° C./min) between 1100 and Tout(° C.).
- the thermal oxide film having a thickness of 2500 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, at the position in contact with the wafer boat, contact trace was observed, but linear slip dislocation was not observed.
- thermal oxide film thicknesses in Examples 1-3 are shown in Table 2.
- a thermal oxide film having a thickness of 6000 nm was formed under the same condition as that of the example 1 except for the fact that the wafer is once taken out toward the outside of the heat treatment furnace after temperature lowering down to T(° C.).
- the thermal oxide film having a thickness of 6000 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, at the position in contact with the wafer boat, contact trace was observed, but linear slip dislocation was not observed.
- a mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation ⁇ 100> was thrown into a longitudinal heat treatment furnace to form an oxide film having a thickness of 6000 nm by the heat treatment profile of FIG. 2 .
- the table 3 there are shown throw-in temperature Tin(° C.), oxidation temperature T11(° C.), and taking out temperature Tout(° C.) in this instance.
- Example 1 In addition, the temperature-elevating rate and the temperature-lowering rate were set to the same condition as those at the time of the high temperature oxidation of Example 1.
- the thermal oxide film having a thickness of 6000 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, a strong linear slip dislocation having, as base point, contact trace with respect to the wafer boat was observed as crossing mark.
- a mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation ⁇ 100> was thrown into a longitudinal heat treatment furnace to form an oxide film having a thickness of 2500 nm by the heat treatment profile of FIG. 2 .
- Table 3 there are shown throw-in temperature Tin(° C.), oxidation temperature T11(° C.) and taking-out temperature Tout(° C.) in this instance.
- Example 3 In addition, the temperature-elevating rate and temperature-lowering rate were set to the same condition as those at the time of the high temperature oxidation of Example 3.
- the thermal oxide film having a thickness of 2500 nm was formed thereafter to observe a slip dislocation by the X-ray topography.
- a linear slip dislocation having, as base point, contact trace with respect to wafer boat was observed as crossing mark.
- a mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation ⁇ 100> was thrown into a longitudinal heat treatment furnace to form a thermal oxide film having a thickness of 6000 nm by the heat treatment profile, as described in FIG. 3 , having double-stage heat treatment in which temperature elevating is performed without temperature lowering between heat treatments of the preceding stage and the succeeding stage.
- Table 5 there are shown throw-in temperature Tin(° C.), oxidation temperatures T11, T12 (° C.) and taking-out temperature Tout(° C.).
- the oxidation was performed by the pyrogenic oxidation.
- oxidation 1 oxidation time was adjusted so that a thermal oxide film having a thickness 1000 nm is formed.
- oxidation 2 oxidation time was adjusted so that a thermal oxide film having a thickness 5000 nm is additionally formed.
- a thermal oxide film having a thickness of 6000 nm was formed thereafter to observe slip dislocation by the X-ray topography method.
- a strong linear slip dislocation (weak (short) as compared to Comparative Example 1) having, as base point, contact trace with respect to wafer boat was observed as crossing mark.
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Abstract
Description
- The present invention relates to a thermal oxide film formation method for suppressing slip dislocation, etc. taking place when thermal oxide film is formed on a silicon single crystal wafer.
- Hitherto, in order to form a thermal oxide film on the surface of a silicon single crystal wafer, e.g., silicon single crystal wafer is mounted on a heat treatment jig (frequently referred to as wafer boat) made of heat resistant material (e.g., quartz or SiC) to set such a jig within a tube for heat treatment furnace to perform heat treatment under oxidizing atmosphere.
- Control of film thickness of the thermal oxide film formed in this way is performed after subjected to calculation by the kind of the heat treatment atmosphere, the heat treatment temperature and/or heat treatment time.
- In regard to film thickness of thermal oxide film to be formed on the surface of the silicon single crystal wafer, although depending upon the purpose, in the case of fabricating a bonded SOI wafer including a thick buried oxide film layer (BOX layer) as described in the
Patent Literature 1, a thick thermal oxide film is formed on at least one of two silicon single crystal wafers to be bonded and a bonding process is performed. - For the purpose of forming such a thick oxide film, high temperature/long time heat treatment is performed under the atmosphere including water vapor such as wet O2 oxidation or pyrogenic oxidation, etc. as the heat treatment atmosphere where oxidation rate is high.
-
- Patent Literature 1: Japanese Unexamined Patent Publication (Kokai) No. 2008-277702
- Particularly, in forming a thick thermal oxide film, when high temperature/long time heat treatment is performed under the atmosphere including water vapor, the thermal oxide film formed on the surface of the silicon single crystal wafer is stuck onto a wafer boat. For this reason, there was the problem that slip dislocation and/or crack may take place at the part thereof.
- The present invention has been made in view of the above-described problems, and aims at providing a method of forming a thermal oxide film of preventing sticking onto a wafer boat taking place particularly in forming s thick oxide film to have ability to suppress occurrence of slip dislocation and/or crack of a silicon single crystal wafer during formation of the thermal oxide film.
- To attain the above-mentioned problems, the present invention provides a method of forming a thermal oxide film on a silicon single crystal wafer, at least comprising: throwing the silicon single crystal wafer into a heat treatment furnace; elevating temperature of the heat treatment furnace up to a temperature T1 where a thermal oxide film is formed to form a thermal oxide film having a thickness d1; subsequently lowering the temperature of the heat treatment furnace down to a temperature lower than the temperature T1; and thereafter elevating the temperature of the heat treatment furnace up to a temperature T2 higher than the temperature T1 to additionally form a thermal oxide film having a thickness d2 thicker than the thickness d1.
- By forming the thermal oxide film in this way, warp phenomenon of wafer takes place resulting from a temperature difference between a wafer outer peripheral part and a central part occurring at the time of lowering temperature, and therefore a position in contact with a wafer boat for holding the wafer changes. For this reason, it is possible to prevent that the wafer is stuck onto the wafer boat by the thermal oxide film. Moreover, the thermal oxide film formed during oxidation at the temperature T1 of the preceding stage has the effect of the protective film in high temperature oxidation performed at the temperature T2 of the succeeding stage. Further, a thick oxide film is additionally formed by high temperature oxidation of the succeeding stage, while suppressing occurrence of the slip dislocation and/or crack in the state where the contact position is changed and the thermal oxide film as the protective film is formed at the preceding stage. Therefore, it is possible to efficiently form satisfactory thick thermal oxide film.
- At this time, it is preferable that the temperature of the heat treatment furnace is elevated up to the temperature T2 higher than the temperature T1 without taking out the silicon single crystal wafer from the heat treatment furnace to additionally form a thermal oxide film having the thickness d2 thicker than the thickness d1 after the temperature of the heat treatment furnace is lowered down to the temperature lower than the temperature T1.
- The thermal oxide film is additionally formed as described above, thereby making it possible to additionally form the thermal oxide film continuously within the heat treatment furnace. Such a process is efficient.
- At this time, it is preferable that the temperature T1 is set to a temperature lower than 1200° C., and the temperature T2 is set to a temperature of 1200° C. or more.
- As described above, the temperature T1 is set to a temperature lower than 1200° C., thereby making it possible to form a thermal oxide film while effectively preventing occurrence of slip dislocation by the low temperature oxidation of the preceding stage. Moreover, the temperature T2 is set to a temperature of 1200° C. or more, thereby making it possible to efficiently form thick thermal oxide film by the high temperature oxidation of the succeeding stage at a sufficient oxidation rate.
- At this time, it is preferable that when the temperature of the heat treatment furnace is lowered down to the temperature lower than the temperature T1, the temperature of the heat treatment furnace is lowered down to a temperature lower than the temperature T1 by 200° C. or more.
- As described above, the temperature of the heat treatment furnace is lowered down to the temperature lower than the temperature T1 by 200° C. or more, thereby making it possible to allow warp phenomenon of the wafer at time of lowering temperature to sufficiently take place to change the position in contact with the wafer boat thus to effectively prevent sticking.
- At this time, it is preferable that when the temperature of the heat treatment furnace is lowered down to the temperature lower than the temperature T1, the temperature of the heat treatment furnace is lowered down to a temperature equal to or less than a throw-in temperature when the silicon single crystal wafer is thrown into the heat treatment furnace.
- As described above, the temperature of the heat treatment furnace is lowered down to a temperature equal to or less than a throw-in temperature when the silicon single crystal wafer is thrown into the heat treatment furnace, thereby making it possible to allow warp phenomenon of the wafer at the time of lowering temperature to sufficiently take place to change the position in contact with the wafer boat to securely prevent sticking.
- At this time, a film thickness obtained by totalizing the thickness d1 and the thickness d2 may be 2500 nm or more.
- Also in forming such a thick thermal oxide film, in accordance with the method according to the present invention, it is possible to prevent occurrence of slip dislocation thus to perform satisfactory formation of the thermal oxide film.
- At this time, it is preferable that the thickness d1 is 500 nm or more.
- As described above, the thickness d1 is 500 nm or more so that the thermal oxide film thus formed functions as a satisfactory protective film in high temperature oxidation of the succeeding stage to securely prevent occurrence of the slip dislocation.
- At this time, it is preferable that after the thermal oxide film having the thickness d2 is additionally formed, further additional formation of a thermal oxide film by lowering the temperature of the heat treatment furnace down to a temperature lower than the temperature T1 and thereafter elevating the temperature of the heat treatment furnace up to a temperature higher than the temperature T1 is repeated one or more times.
- The thermal oxide film is additionally formed as described above, thereby making it possible to securely prevent sticking onto the wafer boat particularly in forming a thick thermal oxide film.
- As described above, in accordance with the present invention, it is possible to efficiently perform thermal oxide film formation while suppressing occurrence of slip dislocation and/or crack particularly also in forming a thick thermal oxide film.
-
FIG. 1 is a view showing temperature and atmospheric gas within a heat treatment furnace in an example, -
FIG. 2 is view showing temperature and atmospheric gas within a heat treatment furnace in comparative examples 1, 2, and -
FIG. 3 is a view showing temperature and atmospheric gas within a heat treatment furnace in a comparative example 3. - While the present invention will now be described in detail with reference to the drawings as an example of preferred embodiments, the present invention is not limited to such an implementation.
- In the present invention, a silicon single crystal wafer is first thrown into, e.g., a longitudinal heat treatment furnace.
- In this instance, wafers are filled into a wafer boat having supporting parts for mounting a plurality of wafers thereon to perform loading the wafer boat into a tube of the heat treatment furnace to thereby throw them thereinto. As temperature (throw-in temperature) within the heat treatment furnace at this time, a heater is set so that there is provided, e.g., temperature of about 500° C.
- Next, the temperature of the heat treatment furnace is elevated up to the temperature T1 where a thermal oxide film is formed to hold such temperature to thereby form a thermal oxide film having thickness d1.
- At this time, as long as the temperature of the heat treatment furnace is a temperature such that thermal oxide film can be formed on a silicon single crystal wafer, the temperature T1 where the thermal oxide film is formed is not particularly limited. In this case, when the temperature of the heat treatment furnace is a temperature higher than 600° C., a thermal oxide film having a certain thickness is formed, but it is preferable that, e.g., the temperature T1 is a temperature lower than 1200° C. When the temperature of the heat treatment furnace is a temperature lower than 1200° C., it is possible to sufficiently suppress occurrence of the slip dislocation during formation of the thermal oxide film.
- The thickness d1 of the thermal oxide film to be formed at this time is not particularly limited, but e.g., a thickness of 500 nm or more is preferable.
- The thermal oxide film having such a thickness is formed, whereby the thermal oxide film has a thickness to a degree such that the thermal oxide film sufficiently functions as a protective film in high temperature oxidation of the succeeding stage, thus making it possible to sufficiently suppress occurrence of the slip dislocation.
- Next, the temperature of the heat treatment furnace is lowered down to a temperature lower than the temperature T1.
- In this way, the temperature of the heat treatment furnace is lowered so that a temperature difference takes place between the outer peripheral part of the wafer and the central part thereof. As a result, warp phenomenon takes place at the wafer resulting from the temperature difference. Thus, the position in contact with the wafer boat changes. For this reason, it can be prevented that the wafer may be stuck onto the wafer boat by the thermal oxide film formed.
- In this instance, it is preferable that the temperature of the heat treatment is lowered down to a temperature lower than the temperature T1 by 200° C. or more. Moreover, it is more preferable that the temperature of the heat treatment furnace is lowered down to a temperature equal to or less than a throw-in temperature when the silicon single crystal wafer is thrown into the heat treatment furnace.
- When the temperature of the heat treatment furnace is lowered down to such a temperature, warp phenomenon of the wafer is caused to sufficiently take place, thereby making it possible to securely attain sticking prevention based on change of the position in contact with the wafer boat.
- Next, the temperature of the heat treatment furnace is elevated up to a temperature T2 higher than the temperature T1 to additionally form a thermal oxide film having thickness d2 thicker than the thickness d1.
- In this way, in the high temperature oxidation process of the succeeding stage, because the thermal oxide film is already formed at the low temperature oxidation process of the preceding stage, this thermal oxide film functions as a protective film so that slip dislocation is difficult to occur even at a high temperature. Moreover, when a thermal oxide film having thickness d2 thicker than that of the low temperature oxidation of the preceding stage in high temperature oxidation, since the oxidation rate is high due to high temperature, it is possible to efficiently and additionally form thick thermal oxide film.
- The temperature T2 at this time may be a temperature higher than the temperature T1, but is not particularly limited. In this case, for example, it is preferable that the temperature T2 is 1200° C. or more.
- When the temperature T2 is 1200° C. or more, since the oxidation rate is sufficiently high, such a process is efficient. Moreover, even when the temperature T2 is such a high temperature, since the thermal oxide film is formed by the low temperature oxidation of the preceding stage in the present invention, such thermal oxide film functions as a protective film so that slip dislocation is difficult to take place.
- Moreover, while a wafer can be taken out toward the outside of the heat treatment furnace before the temperature of the heat treatment furnace is elevated up to the temperature T2 after the temperature of the heat treatment furnace is lowered, it is preferable that if the throughput of the oxidation process is taken into account, the temperature of the heat treatment furnace is elevated up to the temperature T2 without taking out the wafer toward the outside of the heat treatment furnace to continuously perform formation of the oxide film after the temperature of the heat treatment furnace is lowered.
- Such temperature elevation, temperature lowering and temperature holding within the heat treatment furnace may be performed by controlling heater output. Moreover, temperature-elevating rate and temperature-lowering rate are not particularly limited.
- Further, as long as the atmosphere in formation of a thermal oxide film is oxidizing atmosphere where the oxide film is formed, the atmosphere is not also particularly limited, and e.g., wet O2 oxidation and/or pyrogenic oxidation, etc. may be performed under the atmosphere including vapor water.
- According to the thermal oxide film formation method of the present invention as described above, occurrence of slip dislocation and/or crack is prevented also in forming a thick thermal oxide film having thickness of 2500 nm or more, otherwise 5000 nm or more where slip dislocation, etc. is apt to particularly take place, and thus a satisfactory thermal oxide film can be formed.
- Moreover, the thermal oxide film having the thickness d2 is additionally formed in a manner as described above, further additional formation of a thermal oxide film by lowering the temperature of the heat treatment furnace down to a temperature lower than the temperature T1 and thereafter elevating the temperature of the heat treatment furnace up to a temperature higher than the temperature T1 is repeated one or more times.
- Particularly in the case of forming a thick thermal oxide film, etc., temperature lowering and temperature elevation of the present invention may be repeated further one or more times in this way to thereby prevent sticking onto the wafer boat, thus making it possible securely prevent slip dislocation and/or crack.
- It is to be noted that the oxide film formation method according to the present invention may be also applied to a bonded SOI wafer made by bonding two ordinary silicon single crystal wafers through the oxide film, and to a SOI wafer fabricated through high temperature heat treatment after oxygen ions are implanted into an ordinary silicon single crystal wafer, in addition to ordinary silicon single crystal wafer comprised of only silicon single crystal. Accordingly, “silicon single crystal wafer” in the present invention may include these SOI wafers.
- While the present invention will be described in more concrete manner by making reference to the examples and the comparative examples, the present invention is not limited to these examples.
- A mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation <100> was thrown into a longitudinal heat treatment furnace to form a thermal oxide film having a thickness of 6000 nm by the heat treatment profile of
FIG. 1 . In the Table 1, there are shown throw-in temperature Tin(° C.), low temperature oxidation temperature T1(° C.), lowered temperature T(° C.), high temperature oxidation temperature T2(° C.) and taking-out temperature Tout(° C.) in this instance. - The oxidation is performed by the pyrogenic oxidation. In the case of the low temperature oxidation (oxidation 1), oxidation time was adjusted so that a thermal oxidation film having a thickness of 1000 nm is formed. In the case of the high temperature oxidation (oxidation 2), oxidation time was adjusted so that a thermal oxidation film having a thickness of 5000 nm is additionally formed.
- The temperature-elevating rate from Tin(° C.) to T1(° C.) was set to 5(° C./min), and the temperature-lowering rate from Tin(° C.) to T(° C.) was set to 2.5(° C./min).
- Moreover, the temperature-elevating rate from T(° C.) to T2(° C.) was set to 2(° C./min) until 900° C., was set to 1(° C./min) between 900° C. and 1200(° C.), and was set to 0.5(° C./min) between 1200 and 1250(° C.). The temperature-lowering rate from T2(° C.) to Tout(° C.) was set to 0.5(° C./min) until 1200° C., was set to 1(° C./min) between 1200 and 1100(° C.), and was set to 2(° C./min) between 1100 and Tout(° C.).
- The thermal oxide film having a thickness of 6000 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, at the position in contact with the wafer boat, contact trace was observed, but linear slip dislocation was not observed.
- A mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation <100> was thrown into a longitudinal heat treatment furnace to form a thermal oxide film having a thickness of 5500 nm by the heat treatment profile of
FIG. 1 . In the Table 1, there are shown throw-in temperature Tin(° C.), low temperature oxidation temperature T1(° C.), lowered temperature T(° C.), high temperature oxidation temperature T2(° C.) and taking-out temperature Tout(° C.) in this instance. - The oxidation was performed by the pyrogenic oxidation. In the case of the low temperature oxidation (oxidation 1), oxidation time was adjusted so that a thermal oxide film having a thickness of 500 nm is formed. In the case of the high temperature oxidation (oxidation 2), oxidation time was adjusted so that a thermal oxidation film having a thickness of 5000 nm is additionally formed.
- The temperature-elevating rate from Tin(° C.) to T1(° C.) was set to 5(° C./min), and the temperature-lowering rate from T1(° C.) to T(° C.) was set to 2.5(° C./min).
- Moreover, the temperature-elevating rate from T(° C.) to T2(° C.) was set to 2(° C./min) until 900° C., was set to 1(° C./min) between 900° C. and 1200(° C.), and was set to 0.5(° C./min) between 1200 and 1250(° C.). The temperature-lowering rate from T2(° C.) to Tout(° C.) was set to 0.5(° C./min) until 1200° C., was set to 1(° C./min) between 1200 and 1100(° C.), and was set to 2(° C./min) between 1100 and Tout(° C.).
- The thermal oxide film having a thickness of 5500 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, at the position in contact with the wafer boat, contact trace was observed, but linear slip dislocation was not observed.
- A mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation <100> was thrown into a longitudinal heat treatment furnace to form an oxide film having a thickness of 2500 nm by the heat treatment profile of
FIG. 1 . In the table 1, there are shown throw-in temperature Tin(° C.), low temperature oxidation temperature T1(° C.), lowered temperature T(° C.), high temperature oxidation temperature T2(° C.) and taking-out temperature Tout(° C.) in this instance. - The oxidation is performed by the pyrogenic oxidation. In the case of the low temperature oxidation (oxidation 1), oxidation time was adjusted so that a thermal oxidation film having a thickness of 500 nm is formed. In the case of the high temperature oxidation (oxidation 2), oxidation time was adjusted so that a thermal oxidation film having a thickness of 2000 nm is additionally formed.
- The temperature-elevating rate from Tin(° C.) to T1(° C.) was set to 5(° C./min), and the temperature-lowering rate from T1(° C.) to T(° C.) was set to 2.5(° C./min).
- Moreover, the temperature-elevating rate from T(° C.) to T2(° C.) was set to 2(° C./min) until 900° C., and was set to 1 (° C./min) between 900° C. and 1200(° C.). The temperature-lowering rate from T2(° C.) to Tout(° C.) was set to 1(° C./min) until 1100° C., and was set to 2(° C./min) between 1100 and Tout(° C.).
- The thermal oxide film having a thickness of 2500 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, at the position in contact with the wafer boat, contact trace was observed, but linear slip dislocation was not observed.
- The temperatures at the time of forming thermal oxide film in Examples 1-3 are shown in Table 1, and the thermal oxide film thicknesses in Examples 1-3 are shown in Table 2.
-
-
TABLE 1 Tin (° C.) T1 (° C.) T (° C.) T2 (° C.) Tout (° C.) Example 1 500 1050 500 1250 500 Example 2 600 1000 800 1250 600 Example 3 500 1000 500 1200 500 -
TABLE 2 Total oxide Oxidation (1) Oxidation (2) film d1 (nm) d2 (nm) thickness Example 1 1000 5000 6000 nm Example 2 500 5000 5500 nm Example 3 500 2000 2500 nm - A thermal oxide film having a thickness of 6000 nm was formed under the same condition as that of the example 1 except for the fact that the wafer is once taken out toward the outside of the heat treatment furnace after temperature lowering down to T(° C.).
- The thermal oxide film having a thickness of 6000 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, at the position in contact with the wafer boat, contact trace was observed, but linear slip dislocation was not observed.
- A mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation <100> was thrown into a longitudinal heat treatment furnace to form an oxide film having a thickness of 6000 nm by the heat treatment profile of
FIG. 2 . In the table 3, there are shown throw-in temperature Tin(° C.), oxidation temperature T11(° C.), and taking out temperature Tout(° C.) in this instance. - In addition, the temperature-elevating rate and the temperature-lowering rate were set to the same condition as those at the time of the high temperature oxidation of Example 1.
- The thermal oxide film having a thickness of 6000 nm was formed thereafter to observe the slip dislocation by the X-ray topography method. As a result, a strong linear slip dislocation having, as base point, contact trace with respect to the wafer boat was observed as crossing mark.
- A mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation <100> was thrown into a longitudinal heat treatment furnace to form an oxide film having a thickness of 2500 nm by the heat treatment profile of
FIG. 2 . In Table 3, there are shown throw-in temperature Tin(° C.), oxidation temperature T11(° C.) and taking-out temperature Tout(° C.) in this instance. - In addition, the temperature-elevating rate and temperature-lowering rate were set to the same condition as those at the time of the high temperature oxidation of Example 3.
- The thermal oxide film having a thickness of 2500 nm was formed thereafter to observe a slip dislocation by the X-ray topography. As a result, a linear slip dislocation having, as base point, contact trace with respect to wafer boat was observed as crossing mark.
- The temperatures at the time of forming thermal oxide films in Comparative Examples 1, 2 are shown in the Table 3, and the thermal oxide film thicknesses in Comparative Examples 1, 2 are shown in Table 4.
-
TABLE 3 Tin (° C.) T11 (° C.) Tout (° C.) Comparative 500 1250 500 Example 1 Comparative 500 1200 500 Example 2 -
TABLE 4 Oxidation d11 (nm) Comparative Example 1 6000 Comparative Example 2 2500 - A mirror polished silicon single crystal wafer having a diameter of 200 mm and crystal orientation <100> was thrown into a longitudinal heat treatment furnace to form a thermal oxide film having a thickness of 6000 nm by the heat treatment profile, as described in
FIG. 3 , having double-stage heat treatment in which temperature elevating is performed without temperature lowering between heat treatments of the preceding stage and the succeeding stage. In Table 5, there are shown throw-in temperature Tin(° C.), oxidation temperatures T11, T12 (° C.) and taking-out temperature Tout(° C.). The oxidation was performed by the pyrogenic oxidation. In the case of low temperature oxidation (oxidation 1), oxidation time was adjusted so that a thermal oxide film having a thickness 1000 nm is formed. In the case of the high temperature oxidation (oxidation 2), oxidation time was adjusted so that a thermal oxide film having a thickness 5000 nm is additionally formed. - In addition, the temperature-elevating rate and the temperature-lowering rate were set to the same conditions as those of Example 1.
- A thermal oxide film having a thickness of 6000 nm was formed thereafter to observe slip dislocation by the X-ray topography method. As a result, a strong linear slip dislocation (weak (short) as compared to Comparative Example 1) having, as base point, contact trace with respect to wafer boat was observed as crossing mark.
- The temperatures at the time of forming thermal oxide film in Comparative Example 3 are shown in Table 5, and the thermal oxide film thicknesses in Comparative Example 3 are illustrated in Table 6.
-
TABLE 5 Tin (° C.) T11 (° C.) T12 (° C.) Tout (° C.) Comparative 500 1050 1250 500 Example 3 -
TABLE 6 Total oxide Oxidation (1) Oxidation (2) film d11 (nm) d12 (nm) thickness Comparative 1000 5000 6000 nm Example 3 - It is to be noted that the present invention is not restricted to the foregoing embodiment. The foregoing embodiment is just an exemplification, and any examples that have substantially the same configuration and demonstrate the same functions and effects as the technical concept described in claims of the present invention are included in the technical scope of the present invention.
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Citations (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4494303A (en) * | 1983-03-31 | 1985-01-22 | At&T Bell Laboratories | Method of making dielectrically isolated silicon devices |
US5009926A (en) * | 1989-05-18 | 1991-04-23 | Oki Electric Industry Co., Ltd. | Method of forming an insulating film |
US5648282A (en) * | 1992-06-26 | 1997-07-15 | Matsushita Electronics Corporation | Autodoping prevention and oxide layer formation apparatus |
US5650353A (en) * | 1992-09-29 | 1997-07-22 | Shin-Etsu Handotai Co., Ltd. | Method for production of SOI substrate |
US5738909A (en) * | 1996-01-10 | 1998-04-14 | Micron Technology, Inc. | Method of forming high-integrity ultrathin oxides |
US5786277A (en) * | 1995-09-29 | 1998-07-28 | Nec Corporation | Method of manufacturing a semiconductor device having an oxide film of a high quality on a semiconductor substrate |
US5851892A (en) * | 1997-05-07 | 1998-12-22 | Cypress Semiconductor Corp. | Fabrication sequence employing an oxide formed with minimized inducted charge and/or maximized breakdown voltage |
US5926741A (en) * | 1996-07-12 | 1999-07-20 | Sharp Kabushiki Kaisha | Method of forming gate dielectric films for MOSFETs without generation of natural oxide films |
US5962854A (en) * | 1996-06-12 | 1999-10-05 | Ishizuka Electronics Corporation | Infrared sensor and infrared detector |
US6281141B1 (en) * | 1999-02-08 | 2001-08-28 | Steag Rtp Systems, Inc. | Process for forming thin dielectric layers in semiconductor devices |
US20010017294A1 (en) * | 1997-11-14 | 2001-08-30 | Nobutoshi Aoki | Method and equipment for manufacturing semiconductor device |
US20010050052A1 (en) * | 1998-04-03 | 2001-12-13 | Tsuyoshi Moriyama | Semiconductor device manufacturing apparatus and semiconductor device manufacturing method |
US20010052621A1 (en) * | 2000-06-05 | 2001-12-20 | Beaman Kevin L. | PD-SOI substrate with suppressed floating body effect and method for its fabrication |
US6455382B1 (en) * | 2001-05-03 | 2002-09-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multi-step method for forming sacrificial silicon oxide layer |
US20030054596A1 (en) * | 2001-09-17 | 2003-03-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming a uniform ultra-thin gate oxide layer |
US6537926B1 (en) * | 1999-09-14 | 2003-03-25 | Infineon Technologies, Ag | Process for improving the thickness uniformity of a thin oxide layer in semiconductor wafer fabrication |
JP2004064037A (en) * | 2002-06-03 | 2004-02-26 | Sanyo Electric Co Ltd | Method of manufacturing semiconductor device |
US20040185676A1 (en) * | 2003-01-31 | 2004-09-23 | Nec Electronics Corporation | Semiconductor device and method of manufacturing semiconductor device |
US6797323B1 (en) * | 1996-11-29 | 2004-09-28 | Sony Corporation | Method of forming silicon oxide layer |
US20040224531A1 (en) * | 2003-05-09 | 2004-11-11 | Samsung Electronics Co., Ltd. | Method of forming an oxide layer and method of forming an oxinitride layer |
US20040235295A1 (en) * | 2003-05-20 | 2004-11-25 | Zhong Dong | Methods for improving quality of high temperature oxide (HTO) formed from halogen-containing precursor and products thereof and apparatus thereof |
USRE38674E1 (en) * | 1991-12-17 | 2004-12-21 | Intel Corporation | Process for forming a thin oxide layer |
US7332448B2 (en) * | 2004-09-10 | 2008-02-19 | Seiko Epson Corporation | Manufacturing method of semiconductor device and semiconductor manufacturing device |
US20100032710A1 (en) * | 2005-10-25 | 2010-02-11 | Peter Steven Bui | Deep Diffused Thin Photodiodes |
US20100144161A1 (en) * | 2008-12-09 | 2010-06-10 | Hitachi-Kokusai Electric Inc. | Semiconductor device manufacturing method and substrate processing apparatus |
US20100184267A1 (en) * | 2009-01-21 | 2010-07-22 | Tokyo Electron Limited | Method of forming silicon oxide film and method of production of semiconductor memory device using this method |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11186255A (en) * | 1996-11-29 | 1999-07-09 | Sony Corp | Method of forming silicon oxide film |
US6541394B1 (en) * | 1999-01-12 | 2003-04-01 | Agere Systems Guardian Corp. | Method of making a graded grown, high quality oxide layer for a semiconductor device |
JP2000232222A (en) * | 1999-02-10 | 2000-08-22 | Nec Corp | Manufacture of semiconductor device |
JP4914536B2 (en) * | 2001-02-28 | 2012-04-11 | 東京エレクトロン株式会社 | Oxide film formation method |
US6890831B2 (en) | 2002-06-03 | 2005-05-10 | Sanyo Electric Co., Ltd. | Method of fabricating semiconductor device |
JP4427489B2 (en) | 2005-06-13 | 2010-03-10 | 株式会社東芝 | Manufacturing method of semiconductor device |
JP2007053227A (en) | 2005-08-18 | 2007-03-01 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
JP5280015B2 (en) * | 2007-05-07 | 2013-09-04 | 信越半導体株式会社 | Manufacturing method of SOI substrate |
-
2010
- 2010-11-10 JP JP2010251775A patent/JP5479304B2/en active Active
-
2011
- 2011-10-06 EP EP11839425.3A patent/EP2639819B1/en active Active
- 2011-10-06 US US13/824,028 patent/US9171737B2/en active Active
- 2011-10-06 KR KR1020137010398A patent/KR101725777B1/en active IP Right Grant
- 2011-10-06 CN CN201180054251.2A patent/CN103262222B/en active Active
- 2011-10-06 WO PCT/JP2011/005626 patent/WO2012063402A1/en active Application Filing
Patent Citations (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4494303A (en) * | 1983-03-31 | 1985-01-22 | At&T Bell Laboratories | Method of making dielectrically isolated silicon devices |
US5009926A (en) * | 1989-05-18 | 1991-04-23 | Oki Electric Industry Co., Ltd. | Method of forming an insulating film |
USRE38674E1 (en) * | 1991-12-17 | 2004-12-21 | Intel Corporation | Process for forming a thin oxide layer |
US5648282A (en) * | 1992-06-26 | 1997-07-15 | Matsushita Electronics Corporation | Autodoping prevention and oxide layer formation apparatus |
US5650353A (en) * | 1992-09-29 | 1997-07-22 | Shin-Etsu Handotai Co., Ltd. | Method for production of SOI substrate |
US5786277A (en) * | 1995-09-29 | 1998-07-28 | Nec Corporation | Method of manufacturing a semiconductor device having an oxide film of a high quality on a semiconductor substrate |
US5738909A (en) * | 1996-01-10 | 1998-04-14 | Micron Technology, Inc. | Method of forming high-integrity ultrathin oxides |
US5962854A (en) * | 1996-06-12 | 1999-10-05 | Ishizuka Electronics Corporation | Infrared sensor and infrared detector |
US5926741A (en) * | 1996-07-12 | 1999-07-20 | Sharp Kabushiki Kaisha | Method of forming gate dielectric films for MOSFETs without generation of natural oxide films |
US6797323B1 (en) * | 1996-11-29 | 2004-09-28 | Sony Corporation | Method of forming silicon oxide layer |
US5851892A (en) * | 1997-05-07 | 1998-12-22 | Cypress Semiconductor Corp. | Fabrication sequence employing an oxide formed with minimized inducted charge and/or maximized breakdown voltage |
US20010017294A1 (en) * | 1997-11-14 | 2001-08-30 | Nobutoshi Aoki | Method and equipment for manufacturing semiconductor device |
US20010050052A1 (en) * | 1998-04-03 | 2001-12-13 | Tsuyoshi Moriyama | Semiconductor device manufacturing apparatus and semiconductor device manufacturing method |
US6281141B1 (en) * | 1999-02-08 | 2001-08-28 | Steag Rtp Systems, Inc. | Process for forming thin dielectric layers in semiconductor devices |
US6537926B1 (en) * | 1999-09-14 | 2003-03-25 | Infineon Technologies, Ag | Process for improving the thickness uniformity of a thin oxide layer in semiconductor wafer fabrication |
US20010052621A1 (en) * | 2000-06-05 | 2001-12-20 | Beaman Kevin L. | PD-SOI substrate with suppressed floating body effect and method for its fabrication |
US6455382B1 (en) * | 2001-05-03 | 2002-09-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multi-step method for forming sacrificial silicon oxide layer |
US20030054596A1 (en) * | 2001-09-17 | 2003-03-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming a uniform ultra-thin gate oxide layer |
JP2004064037A (en) * | 2002-06-03 | 2004-02-26 | Sanyo Electric Co Ltd | Method of manufacturing semiconductor device |
US20040185676A1 (en) * | 2003-01-31 | 2004-09-23 | Nec Electronics Corporation | Semiconductor device and method of manufacturing semiconductor device |
US20040224531A1 (en) * | 2003-05-09 | 2004-11-11 | Samsung Electronics Co., Ltd. | Method of forming an oxide layer and method of forming an oxinitride layer |
US20040235295A1 (en) * | 2003-05-20 | 2004-11-25 | Zhong Dong | Methods for improving quality of high temperature oxide (HTO) formed from halogen-containing precursor and products thereof and apparatus thereof |
US7332448B2 (en) * | 2004-09-10 | 2008-02-19 | Seiko Epson Corporation | Manufacturing method of semiconductor device and semiconductor manufacturing device |
US20100032710A1 (en) * | 2005-10-25 | 2010-02-11 | Peter Steven Bui | Deep Diffused Thin Photodiodes |
US20100144161A1 (en) * | 2008-12-09 | 2010-06-10 | Hitachi-Kokusai Electric Inc. | Semiconductor device manufacturing method and substrate processing apparatus |
US20100184267A1 (en) * | 2009-01-21 | 2010-07-22 | Tokyo Electron Limited | Method of forming silicon oxide film and method of production of semiconductor memory device using this method |
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EP2639819A1 (en) | 2013-09-18 |
WO2012063402A1 (en) | 2012-05-18 |
KR20140015263A (en) | 2014-02-06 |
US9171737B2 (en) | 2015-10-27 |
CN103262222B (en) | 2016-03-30 |
CN103262222A (en) | 2013-08-21 |
EP2639819B1 (en) | 2017-01-04 |
JP5479304B2 (en) | 2014-04-23 |
EP2639819A4 (en) | 2014-04-02 |
JP2012104651A (en) | 2012-05-31 |
KR101725777B1 (en) | 2017-04-11 |
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