US20160124740A1 - Data storage device and method for reducing firmware update time and data processing system including the device - Google Patents
Data storage device and method for reducing firmware update time and data processing system including the device Download PDFInfo
- Publication number
- US20160124740A1 US20160124740A1 US14/865,415 US201514865415A US2016124740A1 US 20160124740 A1 US20160124740 A1 US 20160124740A1 US 201514865415 A US201514865415 A US 201514865415A US 2016124740 A1 US2016124740 A1 US 2016124740A1
- Authority
- US
- United States
- Prior art keywords
- code
- volatile memory
- data
- image
- firmware
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/61—Installation
- G06F8/63—Image based installation; Cloning; Build to order
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Stored Programmes (AREA)
Abstract
A data storage device for reducing a firmware update time includes a non-volatile memory configured to store a firmware update image which will replace a current firmware image, a first volatile memory, and a processor configured to control an operation of the non-volatile memory and an operation of the first volatile memory. When a first code included in the current firmware image is executed by the processor, the first code generates data necessary for an operation of the data storage device and stores the data in the first volatile memory. When a second code included in the firmware update image is executed by the first code, the second code accesses and uses the data that has been stored in the first volatile memory.
Description
- This application claims priority under 35 U.S.C. §119(a) from Korean Patent Application No. 10-2014-0149459 filed on Oct. 30, 2014, the disclosure of which is hereby incorporated by reference in its entirety.
- Embodiments of the application relate to a data storage device, and more particularly, to a data storage device and method for reducing a firmware update time and a data processing system including the device.
- A computing device may update old firmware with new firmware. In an example of the firmware update, when old firmware is updated with new firmware in a computing device, the computing device cuts off and then resumes power supply. In another example, when old firmware is updated with new firmware in a computing device, a code of the old firmware migrates or flushes data from a cache to another memory and writes metadata generated by the code and stored in volatile memory to non-volatile memory; and a code of the new firmware reads the metadata from the non-volatile memory and loads it to the volatile memory. In the time necessary for the firmware update, the time taken to write the metadata stored in the volatile memory to the non-volatile memory and the time taken to load the metadata from the non-volatile memory to the volatile memory are significantly long.
- Moreover, as the capacity of volatile and non-volatile memory in a computing system increases and the size of metadata stored in the volatile memory increases, the time taken to write the metadata stored in the volatile memory to the non-volatile memory and the time taken to load the metadata from the non-volatile memory to the volatile memory also increase. As a result, the time necessary for the firmware update also increases. When the time necessary for the firmware update increases, a user needs to wait for the firmware update to finish for an increasing amount of time.
- According to some embodiments of the application, there is provided a data storage device including a non-volatile memory configured to store a firmware update image which will replace a current firmware image, a first volatile memory, and a processor configured to control an operation of the non-volatile memory and an operation of the first volatile memory.
- When a first code included in the current firmware image is executed by the processor, the first code may generate data necessary for an operation of the data storage device and may store the data in the first volatile memory. When a second code included in the firmware update image is executed by the first code, the second code may access and use the data that has been stored in the first volatile memory.
- The data may include at least one type of data among mapping data for mapping a logical address to a physical address and data about an error occurring during an access operation of the non-volatile memory. The first code may transmit the data stored in the first volatile memory to the non-volatile memory. Alternatively, the first code may not transmit the data stored in the first volatile memory to the non-volatile memory.
- The first code may store the firmware update image in the non-volatile memory to update the current firmware image with the firmware update image. The first code may store the firmware update image in a second volatile memory and when the second code stored in the second volatile memory is executed by the first code, the second code may store the firmware update image, which has been stored in the second volatile memory, in the non-volatile memory to update the current firmware image with the firmware update image.
- When the firmware update image is received, the first code may generate context information and may store the context information in the first volatile memory and the second code may access the data stored in the first volatile memory using the context information stored in the first volatile memory and may use the data. The context information may include a first meta version of the current firmware image. A physical address of a memory region storing the data in the first volatile memory may be included in the context information, the second code, or second data accessed by the second code.
- The second code may compare the first meta version of the current firmware image with a second meta version of the firmware update image. When the first meta version agrees with the second meta version, the second code may access the data stored in the memory region using the physical address and may use the data.
- Alternatively, when the firmware update image is received, the first code may generate context information and may store the context information in the non-volatile memory and the second code may load the context information from the non-volatile memory to the first volatile memory, may access the data using the context information, and may use the data. The context information may include a first meta version of the current firmware image. A physical address of a memory region storing the data in the first volatile memory may be included in the context information, the second code, or second data accessed by the second code.
- The second code may compare the first meta version of the current firmware image with a second meta version of the firmware update image. When the first meta version agrees with the second meta version, the second code may access the data stored in the memory region using the physical address and may use the data.
- According to other embodiments of the application, there is provided a data processing system including a data storage device, a host configured to transmit a firmware update image to the data storage device, and an interface connected between the data storage device and the host.
- The data storage device may include a non-volatile memory configured to store a firmware update image which will replace a current firmware image, a first volatile memory, and a processor configured to control an operation of the non-volatile memory and an operation of the first volatile memory. When a first code included in the current firmware image is executed by the processor, the first code may generate data necessary for an operation of the data storage device and may store the data in the first volatile memory. When a second code included in the firmware update image is executed by the first code, the second code may access and use the data that has been stored in the first volatile memory. The interface may be a serial advanced technology attachment (SATA) interface, a SATA express (SATAe) interface, a serial attached small computer system interface (SCSI) (SAS) interface, a non-volatile memory express (NVMe) interface, or a peripheral component interconnect express (PCIe) interface.
- According to further embodiments of the application, there is provided a method of updating firmware in a data storage device. The method includes generating data necessary for an operation of the data storage device and storing the data in a first volatile memory, using a first code included in a current firmware image being executed in the data storage device; receiving a firmware update image; updating the current firmware image with the firmware update image; accessing the data stored in the first volatile memory using a second code included in the firmware update image when the second code is executed by the first code; and controlling the operation of the data storage device using the data accessed by the second code.
- The updating may include storing the firmware update image, which has been received, in a non-volatile memory using the first code to enable the current firmware image to be updated with the firmware update image. Alternatively, the updating may include storing the firmware update image in a second volatile memory using the first code; and storing the firmware update image, which has been stored in the second volatile memory, in a non-volatile memory using the second code executed by the first code.
- According to further embodiments of the application, there is provided a method, executed by a processor, of updating firmware in a data storage device. The method includes generating, by execution of first program instruction of a current firmware image, data for operation of the data storage device and storing the data in a volatile memory; updating the current firmware image with an update firmware image; and accessing, by execution of second program instruction of the update firmware image, the data stored in the volatile memory.
- In an embodiment, the data for operation of the data storage device maps a logical memory address to a physical memory address. In an embodiment, the data for operation of the data storage device is information of an error occurring in a non-volatile memory access by the processor.
- The method may further include generating, by execution of the first program instruction, a first meta version of the current firmware image, and determining whether the second program instruction may access the data based upon an outcome of comparing the first meta version and a second meta version of the update firmware image.
- In an embodiment, the determination is made by execution of the second program instruction.
- In an embodiment, the first meta version comprises information of a metadata structure. In an embodiment, the processor acquires the first meta version from the volatile memory by execution of the second program instruction. In an embodiment, the second program instruction causes the processor to acquire the first meta version from a nonvolatile memory.
- The method may further include accessing the data while updating the current firmware image with the update firmware image. The data for operation of the data storage device is information of an error occurring in a non-volatile memory access by the processor or maps a logical memory address to a physical memory address.
- In an embodiment, the first program instruction updates the current firmware image with the update firmware image. In an embodiment, the second program instruction updates the current firmware image with the update firmware image.
- According to further embodiments of the application, there is provided a data storage device having a processor that generates data for operation of the data storage device by execution of first program instruction of a current firmware image; a volatile memory that stores the data; and a nonvolatile memory in which the current firmware image is updated with an update firmware image. The processor accesses, by execution of second program instruction of the update firmware image, the data stored in the volatile memory.
- In an embodiment, the processor accesses the data stored in the volatile memory while the current firmware image is updated with the update firmware image, and the data for operation of the data storage device is information of an error occurring during a non-volatile memory access by the processor or maps a logical memory address to a physical memory address.
- The above and other features and advantages of the application will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings in which:
-
FIG. 1 is a block diagram of a data processing system according to some embodiments of the application; -
FIG. 2 is a conceptual diagram of a firmware update of a data storage device illustrated inFIG. 1 according to some embodiments of the application; -
FIG. 3 is a conceptual diagram of a firmware update of the data storage device illustrated inFIG. 1 according to other embodiments of the application; -
FIG. 4 is a conceptual diagram of a firmware update of the data storage device illustrated inFIG. 1 according to still other embodiments of the application; -
FIG. 5 is a conceptual diagram of a firmware update of the data storage device illustrated inFIG. 1 according to other embodiments of the application; -
FIG. 6 is a conceptual diagram of a firmware update of the data storage device illustrated inFIG. 1 according to yet other embodiments of the application; -
FIG. 7 is a conceptual diagram of a firmware update of the data storage device illustrated inFIG. 1 according to further embodiments of the application; -
FIG. 8 is a block diagram of a data processing system according to other embodiments of the application; and -
FIG. 9 is a schematic block diagram of a data center including the data processing system illustrated inFIG. 1 . - The application now will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the application are shown. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like numbers refer to like elements throughout.
- It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items and may be abbreviated as “/”.
- It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first signal could be termed a second signal, and, similarly, a second signal could be termed a first signal without departing from the teachings of the disclosure.
- The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” or “includes” and/or “including” when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
- Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and/or the present application, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
-
FIG. 1 is a block diagram of adata processing system 100A according to some embodiments of the application. Thedata processing system 100A may include ahost 200 and adata storage device 300A, which are connected with each other via aninterface 110. - Each of
data processing systems - The
host 200 may control a data processing operation (e.g., a write or read operation) of thedata storage device 300A. Thehost 200 may also transmit a request to update a current firmware image OFI installed in thedata storage device 300A and a firmware update image NFI to thedata storage device 300A through theinterface 110. The current firmware image OH may be an old firmware image or a current firmware binary image. The firmware update image NFI may be a new firmware image or a new firmware binary image. - The
host 200 may include a central processing unit (CPU) 210 and afirst interface 220. The block diagram of thehost 200 illustrated inFIG. 1 is just an example and the application is not restricted thereto. Thehost 200 may also include other components apart from theCPU 210 and thefirst interface 220. - The
host 200 may be implemented in an integrated circuit (IC), a mother board, or a system on chip (SoC), but the application is not restricted to these examples. The host may be implemented as an application processor (AP) or a mobile AP in other embodiments. - The
CPU 210 may transmit and receive commands and/or data to and from thefirst interface 220 viabus architecture 201. Thebus architecture 201 may be an advanced microcontroller bus architecture (AMBA), advanced extensible interface (AXI), advanced peripheral bus (APB), or advanced high-performance bus (AHB), but the application is not restricted to these examples. - The
CPU 210 may transmit a request to update the current firmware image OFI installed in thedata storage device 300A and the firmware update image NFI to thedata storage device 300A through theinterfaces CPU 210 may be a processor which can execute a program or programs for executing operations according to the current embodiments of the application. - The
first interface 220 may be connected with asecond interface 313 of thedata storage device 300A via theinterface 110. Theinterfaces - The
data storage device 300A may include acontroller 310A, a secondvolatile memory 320, and a non-volatile memory (NVM) 350. Thedata storage device 300A may be implemented as a flash-based memory device, but the application is not restricted to this example. Thedata storage device 300A may be implemented as a solid-state drive or solid-state disk (SSD), a universal flash storage (UFS), a multimedia card (MMC), or an embedded MMC (eMMC). Alternatively, thedata storage device 300A may be implemented as a hard disk drive (HDD). Thedata storage device 300A may be attached to or detached from thehost 200. Thedata storage device 300A may have a form of a memory module. - In a method of updating firmware in the
data storage device 300A, data necessary for the operations of thedata storage device 300A is generated using a first code CODE1 included (or contained) in the current firmware image OFI currently being executed in thedata storage device 300A, the data is stored in avolatile memory host 200, the current firmware image OFI is updated (or replaced) with the firmware update image NFI, a second code CODE2 accesses the data in thevolatile memory data storage device 300A using the accessed data. In other words, the data generated by the first code CODE1 and stored in the firstvolatile memory 317 may be accessed and used by the second code CODE2 executed by the first code CODE1. - The
controller 310A may control a transfer of commands and/or data among thehost 200, the secondvolatile memory 320, and theNVM 350. Thecontroller 310A may include thesecond interface 313, aCPU 315, the firstvolatile memory 317, avolatile memory controller 319, and anNVM controller 321. Thesecond interface 313 may be connected with thefirst interface 220 of thehost 200 via theinterface 110. - The
CPU 315 may control the operations of thesecond interface 313, the firstvolatile memory 317, thevolatile memory controller 319, and theNVM controller 321 viabus architecture 311. TheCPU 315 may be a processor which can execute a program or programs for executing operations according to the current embodiments of the application. The programs may involve the first code CODE1 included in the current firmware image OFI and the second code CODE2 included in the firmware update image NFI. - The
second interface 313, theCPU 315, the firstvolatile memory 317, thevolatile memory controller 319, and theNVM controller 321 may communicate commands and/or data with one another through thebus architecture 311. Thebus architecture 311 may be AMBA, AXI, APB, or AHB, but the application is not restricted to these examples. - The first
volatile memory 317 may store data, e.g., mapping data for mapping a logical address to a physical address and/or data about an error (or positions of memory cells causing the error) occurring in an access operation (such as a write (or program) operation or a read operation) on theNVM 350 according to the control of the first code CODE1 contained in the current firmware image OH. - The first code CODE1 may include instructions that can be executed by the
CPU 315. The first code CODE1 may generate data i.e., metadata such as mapping data for the operations of thedata storage device 300A and/or data about an error and may store the data in the firstvolatile memory 317. - The first
volatile memory 317 may be static random access memory (SRAM), cache, or tightly coupled memory (TCM), but the application is not restricted to these examples. The firstvolatile memory 317 is positioned outside theCPU 315 in the embodiments illustrated inFIG. 1 , but the application is not restricted to the current embodiment. The firstvolatile memory 317 may be positioned inside theCPU 315 in other embodiments. - The
volatile memory controller 319 may write data (or firmware update image) to or read data (or firmware update image) from the secondvolatile memory 320 according to the control of the first code CODE1 contained in the current firmware image OH or the control of the second code CODE2 contained in the firmware update image NFI. - The second
volatile memory 320 may be dynamic random access memory (DRAM), but the application is not restricted to this example. The firstvolatile memory 317 and the secondvolatile memory 320 are separated from each other in the embodiments illustrated inFIG. 1 , but the firstvolatile memory 317 and the secondvolatile memory 320 may be integrated into one memory in other embodiments. At this time, the firstvolatile memory 317 may be part of the secondvolatile memory 320. - Although the
volatile memory controller 319 controls the operations of the secondvolatile memory 320 in the embodiments illustrated inFIG. 1 , thevolatile memory controller 319 may control the operations of at least one of the firstvolatile memory 317 and the secondvolatile memory 320. For example, when the firstvolatile memory 317 and the secondvolatile memory 320 are formed with different types of memory, thevolatile memory controller 319 may control the operations of at least one of the firstvolatile memory 317 and the secondvolatile memory 320 using a different control scheme. Although the secondvolatile memory 320 is positioned outside thecontroller 310A in the embodiments illustrated inFIG. 1 , the secondvolatile memory 320 may be positioned inside thecontroller 310A in other embodiments. - The
NVM controller 321 may write data (or the firmware update image NFI) to or read data (or the firmware update image NFI) from theNVM 350 according to the first or second code CODE1 or CODE2 executed by theCPU 315. TheNVM 350 may be implemented as flash-based memory, but the application is not restricted to this example. The flash-based memory may be NAND or NOR type flash memory. The flash-based memory may include a plurality of memory cells and an access control circuit which controls an access operation (e.g., a program operation or a read operation) on the memory cells. Each of the memory cells may store information of one bit or more. - The
NVM 350 may be implemented as electrically erasable programmable read-only memory (EEPROM), magnetic RAM (MRAM), spin-transfer torque MRAM, ferroelectric RAM (FRAM), phase-change RAM (PRAM), resistive RAM (RRAM), nanotube RRAM, polymer RAM (PoRAM), nano floating gate memory (NFGM), holographic memory, molecular electronics memory device, or insulator resistance change memory. - The
NVM 350 may store the current firmware image OFI. When a firmware update is performed, the current firmware image OFI may be updated with the firmware update image NFI. The current firmware image OFI may include the first code CODE1 and first data DATA1. The first code CODE1 may include a program code or instructions that can be executed by theCPU 315. The first data DATA1 may be data that is accessed or used by the first code CODE1. The first code CODE1 and/or the first data DATA1 may be updated in the firstvolatile memory 317 and/or the secondvolatile memory 320 according to the control of theCPU 315. - The firmware update image NFI may include the second code CODE2 and second data DATA2. The second code CODE2 may include a program code or instructions that can be executed by the
CPU 315. The second data DATA2 may be data that is accessed or used by the second code CODE2. During a firmware update, the second code CODE2 and/or the second data DATA2 may be updated in the firstvolatile memory 317 and/or the secondvolatile memory 320 according to the control of theCPU 315. - In a firmware update, the first code CODE1 may jump to the second code CODE2 or the second code CODE2 may be executed by the first code CODE1. A method of executing the second code CODE2 using the first code CODE1 may be modified in various ways.
-
FIG. 2 is a conceptual diagram of a firmware update of thedata storage device 300A illustrated inFIG. 1 according to some embodiments of the application. Referring toFIGS. 1 and 2 , the current firmware image OFI may be installed in theNVM 350 and the first code CODE1 in the current firmware image OFI may be loaded to thevolatile memory - The first code CODE1 executed by the
CPU 315 may generate data necessary for the operations of thedata storage device 300A and the data may be stored in the firstvolatile memory 317 in operation S110. The data generated by the first code CODE1 may be mapping data for mapping a logical address to a physical address and/or data about an error occurring during an access operation on theNVM 350, but the application is not restricted to the current embodiments. - The first code CODE1 executed by the
CPU 315 may receive a request REQ to update firmware from thehost 200 through thesecond interface 313 in operation S112. For example, when a user inputs a command to update firmware into thehost 200, theCPU 210 may generate the request REQ. The request REQ may be transmitted to theCPU 315 through theinterfaces CPU 315 may prepare for a firmware update in response to the request REQ. - The
data storage device 300A may receive the firmware update image NFI from thehost 200 through theinterface 110 in operation S114. Operations S112 and S114 may be performed using firmware over-the-air (FOTA), but the application is not restricted to this example. The data stored in the firstvolatile memory 317 may or may not be transmitted to theNVM 350 through theNVM controller 321 according to the control of the first code CODE1 executed by theCPU 315 in operation S115. - According to the control of the first code CODE1 executed by the
CPU 315, theNVM controller 321 may store the firmware update image NFI transmitted from thehost 200 in theNVM 350 in operation S116. According to the control of theNVM controller 321, the current firmware image OFI stored in theNVM 350 may be updated or replaced with the firmware update image NFI in operation S118. - The updated firmware update image NFI may be loaded to the second
volatile memory 320 by a bootloader executed by the first code CODE1 in operation S120. Although the updated firmware update image NFI is loaded to the secondvolatile memory 320 in the embodiments illustrated inFIG. 2 , the updated firmware update image NFI may be loaded to the firstvolatile memory 317 by the bootloader in operation S120 in other embodiments. The bootloader may be stored in thevolatile memory NVM 350 and executed by the first code CODE1. - The second code CODE2 included in the firmware update image NFI loaded to the
volatile memory volatile memory 317 in operation S124. Various methods may be used to access the firstvolatile memory 317 using the second code CODE2. One of these methods will be described with reference toFIGS. 4 through 7 . For example, the second code CODE2 or the second data DATA2 accessed by the second code CODE2 may include an address (e.g., a physical address) used to access the data stored in the firstvolatile memory 317. Accordingly, the second code CODE2 executed by the first code CODE1 may access the data stored in the firstvolatile memory 317 using the address. - The
data storage device 300A described with reference toFIG. 2 may omit an operation of writing the data stored in the firstvolatile memory 317 to theNVM 350 and an operation of loading the data from theNVM 350 to the firstvolatile memory 317 during the firmware update, thereby decreasing a firmware update time. When the firmware update time is decreased, a user is allowed to continuously use thedata storage device 300A longer for the amount of time corresponding to the decrease in the firmware update time. - According to the embodiments illustrated in
FIG. 2 , thedata storage device 300A may directly store the firmware update image NFI transmitted from thehost 200 in theNVM 350 according to the control of the first code CODE1 executed by theCPU 315. -
FIG. 3 is a conceptual diagram of a firmware update of thedata storage device 300A illustrated inFIG. 1 according to other embodiments of the application. Referring toFIGS. 1 and 3 , the current firmware image OFI may be installed in theNVM 350 and the first code CODE1 in the current firmware image OFI may be loaded to thevolatile memory - The first code CODE1 of the current firmware image OFI executed by the
CPU 315 may generate data necessary for the operations of thedata storage device 300A and the data may be stored in the firstvolatile memory 317 in operation S210. The data generated by the first code CODE1 may be mapping data for mapping a logical address to a physical address and/or data about an error occurring during an access operation on theNVM 350. - The first code CODE1 executed by the
CPU 315 may receive a request REQ to update firmware from thehost 200 through thesecond interface 313 in operation S212. For example, when a user inputs a command to update firmware into thehost 200, theCPU 210 may generate the request REQ. The request REQ may be transmitted to theCPU 315 through theinterfaces CPU 315 may prepare for a firmware update in response to the request REQ. - The
data storage device 300A may receive the firmware update image NFI from thehost 200 through theinterface 110 in operation S214. Operations S212 and S214 may be performed using FOTA, but the application is not restricted to this example. The data stored in the firstvolatile memory 317 may or may not be transmitted to theNVM 350 through theNVM controller 321 according to the control of the first code CODE1 executed by theCPU 315 in operation S215. - According to the control of the first code CODE1 executed by the
CPU 315, thevolatile memory controller 319 may store the firmware update image NFI transmitted from thehost 200 in the secondvolatile memory 320 in operation S216. The first code CODE1 executed by theCPU 315 may execute the second code CODE2 contained in the firmware update image NFI in operation S218. For example, the first code CODE1 may jump to the second code CODE2, but the application is not restricted to this example. - The second code CODE2 executed by the first code CODE1 may store or write the firmware update image NFI to the
NVM 350 in operation S220. For example, according to the control of the second code CODE2, thevolatile memory controller 319 may read the firmware update image NFI from the secondvolatile memory 320 and transmit the firmware update image NH to theNVM controller 321. According to the control of the second code CODE2, theNVM controller 321 may write the firmware update image NFI to theNVM 350. - According to the control of the
NVM controller 321, the current firmware image OFI stored in theNVM 350 may be updated with the firmware update image NFI in operation S222. When the update is completed, the second code CODE2 executed by the first code CODE1 may access and use the data stored in the firstvolatile memory 317 in operation S224. Various methods may be used to access the firstvolatile memory 317 using the second code CODE2. One of these methods will be described with reference toFIGS. 4 through 7 . - For example, the second code CODE2 or the second data DATA2 accessed by the second code CODE2 may include an address (e.g., a physical address) used to access the data stored in the first
volatile memory 317. Accordingly, the second code CODE2 executed by the first code CODE1 may access the data stored in the firstvolatile memory 317 using the address. - The
data storage device 300A described with reference toFIG. 3 may omit an operation of writing the data stored in the firstvolatile memory 317 to theNVM 350 and an operation of loading the data from theNVM 350 to the firstvolatile memory 317 during the firmware update, thereby decreasing a firmware update time. When the firmware update time is decreased, a user is allowed to continuously use thedata storage device 300A longer for the amount of time corresponding to the decrease in the firmware update time. - According to the embodiments illustrated in
FIG. 3 , thedata storage device 300A may store the firmware update image NFI transmitted from thehost 200 in the secondvolatile memory 320 according to the control of the first code CODE1 executed by theCPU 315 and may store the firmware update image NFI that has been stored in the secondvolatile memory 320 in theNVM 350 according to the control of the second code CODE2 executed by the first code CODE1. -
FIG. 4 is a conceptual diagram of a firmware update of thedata storage device 300A illustrated inFIG. 1 according to still other embodiments of the application. Referring toFIGS. 1 and 4 , the current firmware image OFI may be installed in theNVM 350 and the first code CODE1 in the current firmware image OFI may be loaded to thevolatile memory - The first code CODE1 of the current firmware image OFI executed by the
CPU 315 may generate data necessary for the operations of thedata storage device 300A and the data may be stored in the firstvolatile memory 317 in operation S310. The data may be mapping data for mapping a logical address to a physical address and/or data about an error occurring during an access operation on theNVM 350, but the application is not restricted to the current embodiments. - The first code CODE1 executed by the
CPU 315 may receive a request REQ to update firmware from thehost 200 through thesecond interface 313 in operation S312. For example, when a user inputs a command to update firmware into thehost 200, theCPU 210 may generate the request REQ. The request REQ may be transmitted to theCPU 315 through theinterfaces CPU 315 may prepare for a firmware update in response to the request REQ. - The
data storage device 300A may receive the firmware update image NFI from thehost 200 through theinterface 110 in operation S314. Operations S312 and S314 may be performed using FOTA, but the application is not restricted to this example. The data stored in the firstvolatile memory 317 may or may not be transmitted to theNVM 350 through theNVM controller 321 according to the control of the first code CODE1 executed by theCPU 315 in operation S315. - When the firmware update image NFI is received, the first code CODE1 executed by the
CPU 315 may generate context information CI and store the context information CI in the firstvolatile memory 317 in operation S316. In other embodiments, the context information CI may be stored in the secondvolatile memory 320. Operations S316 and S318 may be performed in parallel. The context information CI may include a meta version of the current firmware image OFI. The meta version may present a metadata structure or information about the metadata structure, but the application is not restricted to this example. - For example, the context information CI may also include a physical address of a memory region in the first
volatile memory 317, in which the data has been stored, in addition to the meta version. Alternatively, when the physical address is contained in the second code CODE2 or the second data DATA2 accessed by the second code CODE2, the context information CI may include only the meta version of the current firmware image OFI. According to the control of the first code CODE1 executed by theCPU 315, theNVM controller 321 may store the firmware update image NFI transmitted from thehost 200 in theNVM 350 in operation S318. Although operation S316 is performed prior to operation S318 in the embodiments illustrated inFIG. 4 , operations S316 and S318 may be performed in parallel or operation S318 may be performed prior to operation S316 in other embodiments. - According to the control of the
NVM controller 321, the current firmware image OFI stored in theNVM 350 may be updated with the firmware update image NFI in operation S320. The updated firmware update image NH may be loaded to the secondvolatile memory 320 by a bootloader executed by the first code CODE1 in operation S322. Although the updated firmware update image NFI is loaded to the secondvolatile memory 320 in the embodiments illustrated inFIG. 4 , the updated firmware update image NFI may be loaded to the firstvolatile memory 317 by the bootloader in operation S322 in other embodiments. The bootloader may be stored in thevolatile memory NVM 350 and executed by the first code CODE1. The second code CODE2 contained in the firmware update image NFI loaded to the secondvolatile memory - The second code CODE2 may read or fetch the context information CI from the first
volatile memory 317 in operation S326 and may compare the meta version of the current firmware image OFI contained in the context information CI with a meta version of the firmware update image NFI. The meta version of the firmware update image NFI may be stored (or contained) in the second code CODE2 or the second data DATA2 accessed by the second code CODE2. - When the meta version of the current firmware image OFI agrees with that of the firmware update image NFI or when the metadata of the current firmware image OFI is compatible with data of the firmware update image NFI in operation S328, the second code CODE2 executed by the first code CODE1 may access the data stored in the first
volatile memory 317 using the physical address of the memory region in which the data is stored in the firstvolatile memory 317 and may use the data in operation S330. The physical address of the memory region may be contained in the context information CI, the second code CODE2, or the second data DATA2 according to embodiments. - When the data is stored in the
NVM 350 in operation S315 and the meta version of the current firmware image OFI does not agree with that of the firmware update image NFI, the second code CODE2 may load the data from theNVM 350 to the firstvolatile memory 317 and may access and use the data loaded to the firstvolatile memory 317. - When the meta version of the current firmware image OFI agrees with that of the firmware update image NFI, the
data storage device 300A described with reference toFIG. 4 may omit an operation of writing the data stored in the firstvolatile memory 317 to theNVM 350 and an operation of loading the data from theNVM 350 to the firstvolatile memory 317 during the firmware update, thereby decreasing a firmware update time. When the firmware update time is decreased, a user is allowed to continuously use thedata storage device 300A longer for the amount of time corresponding to the decrease in the firmware update time. -
FIG. 5 is a conceptual diagram of a firmware update of thedata storage device 300A illustrated inFIG. 1 according to other embodiments of the application. Referring toFIGS. 1 and 5 , the current firmware image OFI may be installed in theNVM 350 and the first code CODE1 in the current firmware image OFI may be loaded to thevolatile memory - The first code CODE1 of the current firmware image OFI executed by the
CPU 315 may generate data necessary for the operations of thedata storage device 300A and the data may be stored in the firstvolatile memory 317 in operation S410. The data may be mapping data for mapping a logical address to a physical address and/or data about an error occurring during an access operation on theNVM 350, but the application is not restricted to the current embodiments. - The first code CODE1 executed by the
CPU 315 may receive a request REQ to update firmware from thehost 200 through thesecond interface 313 in operation S412. For example, when a user inputs a command to update firmware into thehost 200, theCPU 210 may generate the request REQ. The request REQ may be transmitted to theCPU 315 through theinterfaces CPU 315 may prepare for a firmware update in response to the request REQ. - The
data storage device 300A may receive the firmware update image NFI from thehost 200 through theinterface 110 in operation S414. The data stored in the firstvolatile memory 317 may or may not be transmitted to theNVM 350 through theNVM controller 321 according to the control of the first code CODE1 executed by theCPU 315 in operation S415. - When the firmware update image NFI is received, the first code CODE1 executed by the
CPU 315 may generate context information CI and store the context information CI in theNVM 350 in operation S416. The context information CI may include a meta version of the current firmware image OFI. The meta version may present a metadata structure or information about the metadata structure. The context information CI may also include a physical address of a memory region in the firstvolatile memory 317, in which the data has been stored, in addition to the meta version. Alternatively, when the physical address is contained in the second code CODE2 or the second data DATA2, the context information CI may include only the meta version of the current firmware image OFI. - According to the control of the first code CODE1 executed by the
CPU 315, theNVM controller 321 may store the firmware update image NFI transmitted from thehost 200 in theNVM 350 in operation S418. Although operation S416 is performed prior to operation S418 in the embodiments illustrated inFIG. 5 , operations S416 and S418 may be performed in parallel or operation S418 may be performed prior to operation S416 in other embodiments. - According to the control of the
NVM controller 321, the current firmware image OFI stored in theNVM 350 may be updated with the firmware update image NFI in operation S420. The updated firmware update image NFI may be loaded to the secondvolatile memory 320 by a bootloader executed by the first code CODE1 in operation S422. Although the updated firmware update image NFI is loaded to the secondvolatile memory 320 in the embodiments illustrated inFIG. 5 , the updated firmware update image NFI may be loaded to the firstvolatile memory 317 by the bootloader executed by the first code CODE1 in operation S422 in other embodiments. - According the some embodiments, the bootloader may be stored in the
volatile memory NVM 350 and executed by the first code CODE1. The second code CODE2 contained in the firmware update image NFI loaded to the secondvolatile memory operation 424. - The executed second code CODE2 may read or fetch the context information CI from the first
volatile memory 317 in operation S426 and may compare the meta version of the current firmware image OFI contained in the context information CI with a meta version of the firmware update image NH. The meta version (e.g., a meta structure or information about the meta structure) of the firmware update image NFI may be stored (or contained) in the second code CODE2 or the second data DATA2 accessed by the second code CODE2. - When the meta version of the current firmware image OFI agrees with that of the firmware update image NFI in operation S428, the second code CODE2 executed by the first code CODE1 may access the data stored in the first
volatile memory 317 using the physical address of the memory region in which the data is stored in the firstvolatile memory 317 and may use the data in operation S430. The physical address of the memory region may be contained in the context information CI, the second code CODE2, or the second data DATA2 according to embodiments. - When the data is stored in the
NVM 350 in operation S415 and the meta version of the current firmware image OFI does not agree with that of the firmware update image NFI, the second code CODE2 may load the data from theNVM 350 to the firstvolatile memory 317 and may access and use the data loaded to the firstvolatile memory 317. - When the meta version of the current firmware image OFI agrees with that of the firmware update image NFI, the
data storage device 300A described with reference toFIG. 5 may omit an operation of writing the data stored in the firstvolatile memory 317 to theNVM 350 and an operation of loading the data from theNVM 350 to the firstvolatile memory 317 during the firmware update, thereby decreasing a firmware update time. When the firmware update time is decreased, a user is allowed to continuously use thedata storage device 300A longer for the amount of time corresponding to the decrease in the firmware update time. -
FIG. 6 is a conceptual diagram of a firmware update of thedata storage device 300A illustrated inFIG. 1 according to yet other embodiments of the application. Referring toFIGS. 1 and 6 , the current firmware image OFI may be installed in theNVM 350 and the first code CODE1 in the current firmware image OFI may be loaded to thevolatile memory - The first code CODE1 of the current firmware image OFI executed by the
CPU 315 may generate data necessary for the operations of thedata storage device 300A and the data may be stored in the firstvolatile memory 317 in operation S510. The data may be mapping data for mapping a logical address to a physical address and/or data about an error occurring during an access operation on theNVM 350, but the application is not restricted to the current embodiments. - The first code CODE1 executed by the
CPU 315 may receive a request REQ to update firmware from thehost 200 through thesecond interface 313 in operation S512. For example, when a user inputs a command to update firmware into thehost 200, theCPU 210 may generate the request REQ. The request REQ may be transmitted to theCPU 315 through theinterfaces CPU 315 may prepare for a firmware update in response to the request REQ. - The
data storage device 300A may receive the firmware update image NFI from thehost 200 through theinterface 110 in operation S514. The data stored in the firstvolatile memory 317 may or may not be transmitted to theNVM 350 through theNVM controller 321 according to the control of the first code CODE1 executed by theCPU 315 in operation S515. - When the firmware update image NFI is received, the first code CODE1 executed by the
CPU 315 may generate context information CI and store the context information CI in the firstvolatile memory 317 in operation S516. The context information CI may include a meta version of the current firmware image OFI. The meta version may present a metadata structure. The context information CI may also include a physical address of a memory region in the firstvolatile memory 317, in which the data has been stored, in addition to the meta version. Alternatively, when the physical address is contained in the second code CODE2 or the second data DATA2, the context information CI may include only the meta version of the current firmware image OFI. - According to the control of the first code CODE1 executed by the
CPU 315, the volatile memory controller 329 may store the firmware update image NFI transmitted from thehost 200 in the secondvolatile memory 320 in operation S518. The first code CODE1 executed by theCPU 315 may execute the second code CODE2 contained in the firmware update image NFI in operation S520. - The second code CODE2 executed by the first code CODE1 may store the firmware update image NFI in the
NVM 350 in operation S522. For example, according to the second code CODE2, thevolatile memory controller 319 may read the firmware update image NFI from the secondvolatile memory 320 and transmit the firmware update image NFI to theNVM controller 321. According to the control of the second code CODE2, theNVM controller 321 may write the firmware update image NFI to theNVM 350. - Although operation S516 is performed prior to operation S518 in the embodiments illustrated in
FIG. 6 , operations S516 and S518 may be performed in parallel or operation S518 may be performed prior to operation S516 in other embodiments. According to the control of theNVM controller 321, the current firmware image OFI stored in theNVM 350 may be updated with the firmware update image NFI in operation S524. - The second code CODE2 executed by the first code CODE1 may read or fetch the context information CI from the first
volatile memory 317 in operation S526 and may compare the meta version of the current firmware image OFI contained in the context information CI with a meta version of the firmware update image NFI. The meta version (e.g. a metadata structure or information about the metadata structure) of the firmware update image NFI may be stored (or contained) in the second code CODE2 or the second data DATA2 accessed by the second code CODE2. - When the meta version of the current firmware image OFI agrees with that of the firmware update image NFI in operation S528, the second code CODE2 executed by the first code CODE1 may access the data stored in the first
volatile memory 317 using the physical address of the memory region in which the data is stored in the firstvolatile memory 317 and may use the data in operation S530. The physical address of the memory region may be contained in the context information CI, the second code CODE2, or the second data DATA2 according to embodiments. - When the data is stored in the
NVM 350 in operation S515 and the meta version of the current firmware image OFI does not agree with that of the firmware update image NFI, the second code CODE2 may load the data from theNVM 350 to the firstvolatile memory 317 and may access and use the data loaded to the firstvolatile memory 317. - When the meta version of the current firmware image OFI agrees with that of the firmware update image NFI, the
data storage device 300A described with reference toFIG. 6 may omit an operation of writing the data stored in the firstvolatile memory 317 to theNVM 350 and an operation of loading the data from theNVM 350 to the firstvolatile memory 317 during the firmware update, thereby decreasing a firmware update time. When the firmware update time is decreased, a user is allowed to continuously use thedata storage device 300A longer for the amount of time corresponding to the decrease in the firmware update time. -
FIG. 7 is a conceptual diagram of a firmware update of thedata storage device 300A illustrated inFIG. 1 according to further embodiments of the application. Referring toFIGS. 1 and 7 , the current firmware image OFI may be installed in theNVM 350 and the first code CODE1 in the current firmware image OFI may be loaded to thevolatile memory - The first code CODE1 of the current firmware image OFI executed by the
CPU 315 may generate data necessary for the operations of thedata storage device 300A and the data may be stored in the firstvolatile memory 317 in operation S610. The data may be mapping data for mapping a logical address to a physical address and/or data about an error occurring during an access operation on theNVM 350, but the application is not restricted to the current embodiments. - The first code CODE1 executed by the
CPU 315 may receive a request REQ to update firmware from thehost 200 through thesecond interface 313 in operation S612. For example, when a user inputs a command to update firmware into thehost 200, theCPU 210 may generate the request REQ. The request REQ may be transmitted to theCPU 315 through theinterfaces CPU 315 may prepare for a firmware update in response to the request REQ. - The
data storage device 300A may receive the firmware update image NFI from thehost 200 through theinterface 110 in operation S614. The data stored in the firstvolatile memory 317 may or may not be transmitted to theNVM 350 through theNVM controller 321 according to the control of the first code CODE1 executed by theCPU 315 in operation S615. - When the firmware update image NFI is received, the first code CODE1 executed by the
CPU 315 may generate context information CI and store the context information CI in theNVM 350 in operation S616. The context information CI may include a meta version of the current firmware image OFI. The meta version may present a metadata structure. The context information CI may also include a physical address of a memory region in the firstvolatile memory 317, in which the data has been stored, in addition to the meta version. Alternatively, when the physical address is contained in the second code CODE2 or the second data DATA2, the context information CI may include only the meta version of the current firmware image OFI. - According to the control of the first code CODE1 executed by the
CPU 315, the volatile memory controller 329 may store the firmware update image NFI transmitted from thehost 200 in the secondvolatile memory 320 in operation S618. The first code CODE1 executed by theCPU 315 may execute the second code CODE2 contained in the firmware update image NFI in operation S620. - The second code CODE2 executed by the first code CODE1 may store the firmware update image NFI in the
NVM 350 in operation S622. For example, according to the second code CODE2, thevolatile memory controller 319 may read the firmware update image NFI from the secondvolatile memory 320 and transmit the firmware update image NFI to theNVM controller 321. According to the control of the second code CODE2, theNVM controller 321 may write the firmware update image NFI to theNVM 350. - Although operation S616 is performed prior to operation S618 in the embodiments illustrated in
FIG. 7 , operations S616 and S618 may be performed in parallel or operation S618 may be performed prior to operation S616 in other embodiments. According to the control of theNVM controller 321, the current firmware image OFI stored in theNVM 350 may be updated with the firmware update image NFI in operation S624. - The second code CODE2 executed by the first code CODE1 may read or fetch the context information CI from the
NVM 350 in operation S626 and may compare the meta version of the current firmware image OFI contained in the context information CI with a meta version of the firmware update image NFI. The meta version (e.g. a metadata structure or information about the metadata structure) of the firmware update image NFI may be stored (or contained) in the second code CODE2 or the second data DATA2 accessed by the second code CODE2. - When the meta version of the current firmware image OFI agrees with that of the firmware update image NFI in operation S628, the second code CODE2 executed by the first code CODE1 may access the data stored in the first
volatile memory 317 using the physical address of the memory region in which the data is stored in the firstvolatile memory 317 and may use the data in operation S630. The physical address of the memory region may be contained in the context information CI, the second code CODE2, or the second data DATA2 according to embodiments. - When the data is stored in the
NVM 350 in operation S615 and the meta version of the current firmware image OFI does not agree with that of the firmware update image NFI, the second code CODE2 may load the data from theNVM 350 to the firstvolatile memory 317 and may access and use the data loaded to the firstvolatile memory 317. - When the meta version of the current firmware image OFI agrees with that of the firmware update image NFI, the
data storage device 300A described with reference toFIG. 7 may omit an operation of writing the data stored in the firstvolatile memory 317 to theNVM 350 and an operation of loading the data from theNVM 350 to the firstvolatile memory 317 during the firmware update, thereby decreasing a firmware update time. When the firmware update time is decreased, a user is allowed to continuously use thedata storage device 300A longer for the amount of time corresponding to the decrease in the firmware update time. -
FIG. 8 is a block diagram of adata processing system 100B according to other embodiments of the application. Thedata processing system 100B may include thehost 200 and adata storage device 300B, which are connected with each other via theinterface 110. Thedata storage device 300B may include acontroller 310B, the secondvolatile memory 320, and theNVM 350. Thecontroller 310B may include thesecond interface 313, afirst CPU 315A, asecond CPU 315B, the firstvolatile memory 317, thevolatile memory controller 319, and theNVM controller 321. - The
first CPU 315A may control the interactive operations between thehost 200 and thecontroller 310B and thesecond CPU 315B may control the interactive operations between thecontroller 310B and theNVM 350. Thefirst CPU 315A may control the operations of thesecond interface 313 and thesecond CPU 315B may control the operations of theNVM controller 321. -
FIG. 9 is a schematic block diagram of adata center 400 including thedata processing system 100A illustrated inFIG. 1 . Referring toFIGS. 1 through 9 , the data center (or an internet data center) 400 may include a plurality of client computers 400-1 through 400-m (where “m” is a natural number), anetwork 420, aserver 430, and adata processing system 440. Thedata center 400 may be implemented as a system which can provide internet portal services or web portal services. - The client computers 400-1 through 400-m may be connected with the server (or web server) 430 via the
network 420. Thenetwork 420 may be a wireless internet, a wired internet, or a network supporting Wi-Fi. - The
server 430 may be connected with thedata processing system 440 through a network. Thedata processing system 440 may include thehost 200 and a plurality of data storage devices 300-1 through 300-n (where “n” is a natural number). The structure and operations of each of the data storage devices 300-1 through 300-n are substantially the same as or similar to those of thedata storage device FIGS. 1 through 8 . Thus, descriptions of the data storage devices 300-1 through 300-n will be omitted. - The
server 430 and thehost 200 may be implemented in a single server or host. At this time, the server or the host may communicate data with the data storage devices 300-1 through 300-n through an interface appropriate for transmission control protocol/internet protocol (TCP/IP) or Ethernet. - Operations described in the embodiments illustrated in
FIGS. 2 through 7 are provided to explain operations performed in thedata storage device 300A and are not intended to denote the processing order. Accordingly, at least two of the operations in some embodiments may be performed simultaneously or in parallel. Although a first operation is performed prior to a second operation in some embodiments, the second operation may be performed prior to the first operation and the first and second operations may be performed in simultaneously or in parallel in other embodiments. - As described above, according to some embodiments of the application, a data storage device stores data, which is related with the operations of the data storage device and is generated by a first code of a current firmware image, in volatile memory and allows a second code of a firmware update to access and use the data in the volatile memory, thereby decreasing firmware update time. When the firmware update time is decreased, a user of the data storage device is allowed to continuously use the data storage device longer for the amount of time corresponding to the decrease in the firmware update time.
- While the application has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in forms and details may be made therein without departing from the spirit and scope of the application as defined by the following claims.
Claims (24)
1. A data storage device comprising:
a non-volatile memory configured to store a firmware update image which will replace a current firmware image;
a first volatile memory; and
a processor configured to control an operation of the non-volatile memory and an operation of the first volatile memory, wherein:
when a first code included in the current firmware image is executed by the processor, the first code generates data for an operation of the data storage device and stores the data in the first volatile memory; and
when a second code included in the firmware update image is executed by the first code, the second code accesses and uses the data that has been stored in the first volatile memory.
2. The data storage device of claim 1 , wherein the data comprises at least one type of data among mapping data for mapping a logical address to a physical address and data about an error occurring during an access operation on the non-volatile memory.
3. The data storage device of claim 1 , wherein the first code transmits the data stored in the first volatile memory to the non-volatile memory.
4. The data storage device of claim 1 , wherein the first code does not transmit the data stored in the first volatile memory to the non-volatile memory.
5. The data storage device of claim 1 , wherein the first code stores the firmware update image in the non-volatile memory to update the current firmware image with the firmware update image.
6. The data storage device of claim 1 , wherein:
the first code stores the firmware update image in a second volatile memory; and
when the second code stored in the second volatile memory is executed by the first code, the second code stores the firmware update image, which has been stored in the second volatile memory, in the non-volatile memory to update the current firmware image with the firmware update image.
7. The data storage device of claim 1 , wherein:
when the firmware update image is received, the first code generates context information and stores the context information in the first volatile memory and the second code accesses the data stored in the first volatile memory using the context information stored in the first volatile memory and uses the data, and
the context information comprises a first meta version of the current firmware image; and a physical address of a memory region storing the data in the first volatile memory is included in one among the context information, the second code, and second data accessed by the second code.
8. The data storage device of claim 7 , wherein:
the second code compares the first meta version of the current firmware image with a second meta version of the firmware update image; and
when the first meta version agrees with the second meta version, the second code accesses the data stored in the memory region using the physical address and uses the data.
9. The data storage device of claim 1 , wherein:
when the firmware update image is received, the first code generates context information and stores the context information in the non-volatile memory and the second code loads the context information from the non-volatile memory to the first volatile memory, accesses the data using the context information, and uses the data,
the context information comprises a first meta version of the current firmware image; and a physical address of a memory region storing the data in the first volatile memory is included in one among the context information, the second code, and second data accessed by the second code.
10. (canceled)
11. The data storage device of claim 1 , wherein the first volatile memory is random access memory (RAM) and the non-volatile memory is flash-based memory.
12-21. (canceled)
22. A method of updating firmware in a data storage device, the method comprising:
generating data for an operation of the data storage device and storing the data in a first volatile memory, using a first code included in a current firmware image being executed in the data storage device;
receiving a firmware update image;
updating the current firmware image with the firmware update image;
accessing the data stored in the first volatile memory using a second code included in the firmware update image when the second code is executed by the first code; and
controlling the operation of the data storage device using the data accessed by the second code.
23. The method of claim 22 , wherein the updating comprises storing the firmware update image, which has been received, in a non-volatile memory using the first code to enable the current firmware image to be updated with the firmware update image.
24. The method of claim 22 , wherein the updating comprises:
storing the firmware update image in a second volatile memory using the first code; and
storing the firmware update image, which has been stored in the second volatile memory, in a non-volatile memory using the second code executed by the first code.
25. A method, executed by a processor, of updating firmware in a data storage device, the method comprising:
generating, by execution of first program instruction of a current firmware image, data for operation of the data storage device and storing the data in a volatile memory;
updating the current firmware image with an update firmware image; and
accessing, by execution of second program instruction of the update firmware image, the data stored in the volatile memory.
26. The method of claim 25 , wherein the data for operation of the data storage device maps a logical memory address to a physical memory address.
27. The method of claim 25 , wherein the data for operation of the data storage device is information of an error occurring in a non-volatile memory access by the processor.
28. The method of claim 25 , further comprising:
generating, by execution of the first program instruction, a first meta version of the current firmware image, and
determining whether the second program instruction may access the data based upon an outcome of comparing the first meta version and a second meta version of the update firmware image.
29-30. (canceled)
31. The method of claim 25 , wherein the processor acquires the first meta version from the volatile memory by execution of the second program instruction.
32. The method of claim 25 , wherein the second program instruction causes the processor to acquire the first meta version from a nonvolatile memory.
33. The method of claim 25 , further comprising:
accessing the data while updating the current firmware image with the update firmware image, wherein
the data for operation of the data storage device is information of an error occurring in a non-volatile memory access by the processor or maps a logical memory address to a physical memory address.
34-38. (canceled)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/729,159 US10866797B2 (en) | 2014-10-30 | 2017-10-10 | Data storage device and method for reducing firmware update time and data processing system including the device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2014-0149459 | 2014-10-30 | ||
KR1020140149459A KR102261815B1 (en) | 2014-10-30 | 2014-10-30 | Data storage device for reducing firmware update time, and data processing system including the same |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US15/729,159 Division US10866797B2 (en) | 2014-10-30 | 2017-10-10 | Data storage device and method for reducing firmware update time and data processing system including the device |
Publications (2)
Publication Number | Publication Date |
---|---|
US20160124740A1 true US20160124740A1 (en) | 2016-05-05 |
US9817652B2 US9817652B2 (en) | 2017-11-14 |
Family
ID=55852736
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US14/865,415 Active US9817652B2 (en) | 2014-10-30 | 2015-09-25 | Data storage device and method for reducing firmware update time and data processing system including the device |
US15/729,159 Active US10866797B2 (en) | 2014-10-30 | 2017-10-10 | Data storage device and method for reducing firmware update time and data processing system including the device |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US15/729,159 Active US10866797B2 (en) | 2014-10-30 | 2017-10-10 | Data storage device and method for reducing firmware update time and data processing system including the device |
Country Status (3)
Country | Link |
---|---|
US (2) | US9817652B2 (en) |
KR (1) | KR102261815B1 (en) |
CN (1) | CN105573665B (en) |
Cited By (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20170097819A1 (en) * | 2015-10-05 | 2017-04-06 | Samsung Electronics Co., Ltd. | Electronic system with update control mechanism and method of operation thereof |
US20170286090A1 (en) * | 2016-03-31 | 2017-10-05 | Microsoft Technology Licensing, Llc | High performance mobile device flashing |
US20180060607A1 (en) * | 2016-08-30 | 2018-03-01 | Winbond Electronics Corporation | Anti-Rollback Version Upgrade in Secured Memory Chip |
CN108153480A (en) * | 2016-12-05 | 2018-06-12 | 北京京存技术有限公司 | A kind of data processing method based on NAND flash, storage device |
US20190087174A1 (en) * | 2017-09-21 | 2019-03-21 | Western Digital Technologies, Inc. | Background firmware update |
CN109542491A (en) * | 2017-09-21 | 2019-03-29 | 西部数据技术公司 | Backstage firmware update |
US20190179625A1 (en) * | 2017-12-12 | 2019-06-13 | Cypress Semiconductor Corporation | Memory devices, systems, and methods for updating firmware with single memory device |
US20190250838A1 (en) * | 2018-02-09 | 2019-08-15 | Micron Technology, Inc. | Data Storage Device Idle Time Processing |
US10489085B2 (en) | 2018-02-28 | 2019-11-26 | Micron Technology, Inc. | Latency-based scheduling of command processing in data storage devices |
CN111354406A (en) * | 2018-12-20 | 2020-06-30 | 爱思开海力士有限公司 | Memory device, operating method thereof, and memory system including the same |
CN111373368A (en) * | 2018-09-12 | 2020-07-03 | 株式会社Lg化学 | Non-volatile memory update apparatus and method |
US10747483B2 (en) * | 2018-07-31 | 2020-08-18 | Canon Kabushiki Kaisha | Image forming apparatus that updates firmware |
US11216269B2 (en) * | 2020-01-09 | 2022-01-04 | Dell Products L.P. | Systems and methods for update of storage resource firmware |
US11340889B2 (en) | 2019-02-28 | 2022-05-24 | Hewlett Packard Enterprise Development Lp | Updating firmware images on chained input/output (I/O) modules |
US11360837B2 (en) * | 2020-05-15 | 2022-06-14 | Samsung Electronics Co., Ltd. | Handling operation system (OS) in system for predicting and managing faulty memories based on page faults |
US20220350890A1 (en) * | 2021-04-28 | 2022-11-03 | Via Labs, Inc. | Electronic apparatus and secure firmware update method thereof |
US20220405090A1 (en) * | 2021-06-21 | 2022-12-22 | Western Digital Technologies, Inc. | Data Storage Device Firmware Updates in Composable Infrastructure |
US11537389B2 (en) | 2017-12-12 | 2022-12-27 | Infineon Technologies LLC | Memory devices, systems, and methods for updating firmware with single memory device |
US11604635B2 (en) * | 2019-12-06 | 2023-03-14 | Delta Electronics, Inc. | Online program updating method |
US11733909B2 (en) | 2021-06-21 | 2023-08-22 | Western Digital Technologies, Inc. | Secure-erase prediction for data storage devices |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6274174B2 (en) * | 2015-09-29 | 2018-02-07 | コニカミノルタ株式会社 | Image processing apparatus, method, and program |
TWI621017B (en) * | 2017-03-06 | 2018-04-11 | 慧榮科技股份有限公司 | Data storage device and operating method therefor |
US10395038B2 (en) * | 2018-02-01 | 2019-08-27 | Quanta Computer Inc. | System and method for automatic recovery of firmware image |
KR20190118862A (en) * | 2018-04-11 | 2019-10-21 | 에스케이하이닉스 주식회사 | Memory system and operating method of memory controller |
CN111104149A (en) * | 2018-10-25 | 2020-05-05 | 华为技术有限公司 | Firmware upgrading method and device and terminal |
CN113254295B (en) * | 2020-02-11 | 2022-09-13 | 瑞昱半导体股份有限公司 | Verification method and system |
US20210389937A1 (en) * | 2020-06-12 | 2021-12-16 | Western Digital Technologies, Inc. | Systems And Methods For Fixing Incompatibilities In Field Firmware Updates |
KR20220033311A (en) | 2020-09-09 | 2022-03-16 | 삼성전자주식회사 | Electronic device and operating method thereof, and network system |
KR20220045764A (en) | 2020-10-06 | 2022-04-13 | 에스케이하이닉스 주식회사 | Storage device and operating method thereof |
CN113703683B (en) * | 2021-08-28 | 2022-05-13 | 江苏华存电子科技有限公司 | Single device for optimizing redundant storage system |
Citations (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5579522A (en) * | 1991-05-06 | 1996-11-26 | Intel Corporation | Dynamic non-volatile memory update in a computer system |
US6237091B1 (en) * | 1998-10-29 | 2001-05-22 | Hewlett-Packard Company | Method of updating firmware without affecting initialization information |
US20020124243A1 (en) * | 2000-12-13 | 2002-09-05 | Broeksteeg Gerard Henricus | Method of and program for updating software |
US20030177486A1 (en) * | 2002-03-13 | 2003-09-18 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and system for performing SW upgrade in a real-time system |
US20040054883A1 (en) * | 2002-09-13 | 2004-03-18 | International Business Machines Corporation | Firmware updating |
US20040205779A1 (en) * | 2003-04-10 | 2004-10-14 | International Business Machines Corporation | Firmware update mechanism in a multi-node data processing system |
US20050170827A1 (en) * | 2004-02-03 | 2005-08-04 | Nec Corporation | Cellular phone |
US20050188366A1 (en) * | 2004-02-25 | 2005-08-25 | Via Technologies Inc. | Firmware upgrade method |
US20050223372A1 (en) * | 2004-04-01 | 2005-10-06 | Borchers Gregory E | Methods and systems for firmware download configuration |
US20060015861A1 (en) * | 2004-07-15 | 2006-01-19 | Yutaka Takata | Storage system |
US7039799B2 (en) * | 2002-10-31 | 2006-05-02 | Lsi Logic Corporation | Methods and structure for BIOS reconfiguration |
US20060259902A1 (en) * | 2005-05-13 | 2006-11-16 | Fan-Sheng Lin | Embedded system self-updating method and device |
US20070074201A1 (en) * | 2005-09-23 | 2007-03-29 | Samsung Electronics Co., Ltd. | Method and system for updating software and computer readable recording medium storing the method |
US7222338B2 (en) * | 2001-08-18 | 2007-05-22 | Lg-Nortel, Co., Ltd. | Method for upgrading data |
US20080155524A1 (en) * | 2006-12-26 | 2008-06-26 | Fuja Shone | Firmware Updating and Extending Method for Application Specific Integrated Circuit |
US7500235B2 (en) * | 2003-09-05 | 2009-03-03 | Aol Time Warner Interactive Video Group, Inc. | Technique for updating a resident application and associated parameters in a user terminal through a communications network |
US7543118B1 (en) * | 2004-05-07 | 2009-06-02 | Hewlett-Packard Development Company, L.P. | Multiple variance platform for the management of mobile devices |
US20090187900A1 (en) * | 2008-01-22 | 2009-07-23 | Canon Kabushiki Kaisha | Information processing apparatus, system, method, and storage medium |
US7657886B1 (en) * | 2004-06-03 | 2010-02-02 | Hewlett-Packard Development Company, L.P. | Mobile device with a MMU for faster firmware updates in a wireless network |
US20100153468A1 (en) * | 2008-12-17 | 2010-06-17 | Sap Ag | Configuration change without disruption of incomplete processes |
US20100325622A1 (en) * | 2007-12-13 | 2010-12-23 | Derek Morton | Updating Firmware of an Electronic Device |
US20120110562A1 (en) * | 2010-10-27 | 2012-05-03 | David Heinrich | Synchronized firmware update |
US20120117555A1 (en) * | 2010-11-08 | 2012-05-10 | Lsi Corporation | Method and system for firmware rollback of a storage device in a storage virtualization environment |
US8214653B1 (en) * | 2009-09-04 | 2012-07-03 | Amazon Technologies, Inc. | Secured firmware updates |
US20120246442A1 (en) * | 2011-03-23 | 2012-09-27 | Boris Dolgunov | Storage device and method for updating data in a partition of the storage device |
US8468516B1 (en) * | 2008-12-19 | 2013-06-18 | Juniper Networks, Inc. | Creating hot patches for embedded systems |
US8887144B1 (en) * | 2009-09-04 | 2014-11-11 | Amazon Technologies, Inc. | Firmware updates during limited time period |
US20150149989A1 (en) * | 2013-11-26 | 2015-05-28 | Inventec Corporation | Server system and update method thereof |
Family Cites Families (50)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7082549B2 (en) * | 2000-11-17 | 2006-07-25 | Bitfone Corporation | Method for fault tolerant updating of an electronic device |
JP2004536405A (en) * | 2001-07-16 | 2004-12-02 | ユキング レン | Embedded software update system |
US6990577B2 (en) * | 2001-08-10 | 2006-01-24 | Intel Corporation | Updating a BIOS image by replacing a portion of the BIOS image with a portion of another BIOS image |
JP4189570B2 (en) * | 2001-12-28 | 2008-12-03 | コニカミノルタビジネステクノロジーズ株式会社 | Image processing apparatus, firmware transmission method, and image processing apparatus management system |
US7644406B2 (en) * | 2003-01-21 | 2010-01-05 | Hewlett-Packard Development Company, L.P. | Update system capable of updating software across multiple FLASH chips |
US20040230963A1 (en) * | 2003-05-12 | 2004-11-18 | Rothman Michael A. | Method for updating firmware in an operating system agnostic manner |
US7222339B2 (en) * | 2003-06-13 | 2007-05-22 | Intel Corporation | Method for distributed update of firmware across a clustered platform infrastructure |
US20050021968A1 (en) * | 2003-06-25 | 2005-01-27 | Zimmer Vincent J. | Method for performing a trusted firmware/bios update |
US20050144609A1 (en) * | 2003-12-12 | 2005-06-30 | Intel Corporation | Methods and apparatus to provide a robust code update |
JP2007534095A (en) * | 2004-04-20 | 2007-11-22 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Restoring all programmable content and firmware of optical drives |
US7904895B1 (en) * | 2004-04-21 | 2011-03-08 | Hewlett-Packard Develpment Company, L.P. | Firmware update in electronic devices employing update agent in a flash memory card |
US7364087B2 (en) * | 2004-06-24 | 2008-04-29 | Intel Corporation | Virtual firmware smart card |
US9292274B2 (en) * | 2004-08-31 | 2016-03-22 | Smith Micro Software, Inc. | Efficient method and system for reducing the time to apply update package |
TWI259974B (en) | 2004-09-16 | 2006-08-11 | Mediatek Inc | Optical disk drive capable of updating firmware and firmware updating method thereof |
JPWO2006046506A1 (en) * | 2004-10-27 | 2008-05-22 | 松下電器産業株式会社 | Receiver device |
DE102005018910A1 (en) * | 2005-04-22 | 2006-10-26 | Endress + Hauser Gmbh + Co. Kg | A method of upgrading a microprocessor controlled device with new software code over a communication network |
US7870373B2 (en) * | 2005-12-23 | 2011-01-11 | Intel Corporation | System and method for automatic update of embedded data |
US7747848B1 (en) * | 2006-07-31 | 2010-06-29 | American Megatrends, Inc. | Updating the system management information of a computer system |
JP2008046791A (en) * | 2006-08-14 | 2008-02-28 | Fujitsu Ltd | Storage device, firmware update method and control device |
US7823020B2 (en) * | 2006-08-30 | 2010-10-26 | International Business Machines Corporation | System and method for applying a destructive firmware update in a non-destructive manner |
JP2008077474A (en) | 2006-09-22 | 2008-04-03 | Kyocera Mita Corp | Firmware update method, electronic device and firmware update program |
JP2008102761A (en) | 2006-10-19 | 2008-05-01 | Mitsubishi Electric Corp | Method for updating embedded firmware |
US8286156B2 (en) * | 2006-11-07 | 2012-10-09 | Sandisk Technologies Inc. | Methods and apparatus for performing resilient firmware upgrades to a functioning memory |
US20080162787A1 (en) | 2006-12-28 | 2008-07-03 | Andrew Tomlin | System for block relinking |
US7761701B2 (en) * | 2007-03-26 | 2010-07-20 | Intel Corporation | Component firmware integration in distributed systems |
US8726259B2 (en) * | 2007-04-09 | 2014-05-13 | Kyocera Corporation | System and method for preserving device parameters during a FOTA upgrade |
US8185886B2 (en) * | 2007-06-26 | 2012-05-22 | Intel Corporation | Method and apparatus to enable dynamically activated firmware updates |
US20090006834A1 (en) * | 2007-06-29 | 2009-01-01 | Michael Rothman | Proxied firmware updates |
US7793090B2 (en) * | 2007-08-30 | 2010-09-07 | Intel Corporation | Dual non-volatile memories for a trusted hypervisor |
EP2195737B1 (en) * | 2007-10-03 | 2018-07-11 | ABB Schweiz AG | Method for reprogramming applications in embedded devices and related device |
KR100927446B1 (en) | 2007-11-28 | 2009-11-19 | 웹싱크 주식회사 | Transaction unit firmware upgrade method of mobile communication terminal and firmware upgrade system using same |
TWI421765B (en) * | 2008-04-01 | 2014-01-01 | Mstar Semiconductor Inc | Display control device with automatic firmware update and update method thereof |
US9009357B2 (en) | 2008-04-24 | 2015-04-14 | Micron Technology, Inc. | Method and apparatus for field firmware updates in data storage systems |
US8245214B2 (en) | 2008-06-05 | 2012-08-14 | International Business Machines Corporation | Reliably updating computer firmware while performing command and control functions on a power/thermal component in a high-availability, fault-tolerant, high-performance server |
JP5113700B2 (en) | 2008-09-24 | 2013-01-09 | 株式会社日立ソリューションズ | Firmware update apparatus and method |
JP5342302B2 (en) * | 2009-03-30 | 2013-11-13 | 株式会社日立ソリューションズ | Firmware update system, firmware distribution server, and program |
KR101605875B1 (en) | 2009-04-03 | 2016-03-24 | 삼성전자주식회사 | Memory apparatus and method for updating firmware of the memory apparatus |
JP5478986B2 (en) * | 2009-08-21 | 2014-04-23 | 株式会社日立ソリューションズ | Information equipment and program |
CN101667133B (en) * | 2009-09-30 | 2012-09-05 | 威盛电子股份有限公司 | Method for updating firmware and chip updating firmware by using same |
JP5585502B2 (en) | 2011-03-16 | 2014-09-10 | 日本電気株式会社 | Information processing apparatus and firmware update method thereof |
US8595716B2 (en) * | 2011-04-06 | 2013-11-26 | Robert Bosch Gmbh | Failsafe firmware updates |
KR101466560B1 (en) | 2011-06-07 | 2014-11-28 | 엘에스아이 코포레이션 | Management of device firmware update effects as seen by a host |
GB2510091B (en) * | 2011-11-22 | 2020-05-20 | Intel Corp | Collaborative processor and system performance and power management |
US8972966B2 (en) * | 2012-01-05 | 2015-03-03 | Lenovo (Singapore) Pte. Ltd. | Updating firmware in a hybrid computing environment |
US20150199190A1 (en) * | 2012-02-23 | 2015-07-16 | Google Inc. | System and method for updating firmware |
KR20140066535A (en) * | 2012-11-23 | 2014-06-02 | 삼성전자주식회사 | Electronic apparatus, method for update firmware, computer-readable recording medium |
US9027014B2 (en) | 2013-01-17 | 2015-05-05 | Lenovo Enterprise Solutions (Singapore) Pte. Ltd. | Updating firmware compatibility data |
KR101515198B1 (en) * | 2013-04-10 | 2015-05-11 | 주식회사 팬택 | Apparatus and method for firmware upgrade in mobile device |
TWI497415B (en) * | 2013-06-21 | 2015-08-21 | Wistron Neweb Corp | Methods for upgrading firmware and apparatuses using the same |
JP6399797B2 (en) * | 2014-05-02 | 2018-10-03 | キヤノン株式会社 | Information processing apparatus, control method therefor, and program |
-
2014
- 2014-10-30 KR KR1020140149459A patent/KR102261815B1/en active IP Right Grant
-
2015
- 2015-09-25 US US14/865,415 patent/US9817652B2/en active Active
- 2015-10-30 CN CN201510728010.1A patent/CN105573665B/en active Active
-
2017
- 2017-10-10 US US15/729,159 patent/US10866797B2/en active Active
Patent Citations (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5579522A (en) * | 1991-05-06 | 1996-11-26 | Intel Corporation | Dynamic non-volatile memory update in a computer system |
US6237091B1 (en) * | 1998-10-29 | 2001-05-22 | Hewlett-Packard Company | Method of updating firmware without affecting initialization information |
US20020124243A1 (en) * | 2000-12-13 | 2002-09-05 | Broeksteeg Gerard Henricus | Method of and program for updating software |
US7222338B2 (en) * | 2001-08-18 | 2007-05-22 | Lg-Nortel, Co., Ltd. | Method for upgrading data |
US7089550B2 (en) * | 2002-03-13 | 2006-08-08 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and system for performing SW upgrade in a real-time system |
US20030177486A1 (en) * | 2002-03-13 | 2003-09-18 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and system for performing SW upgrade in a real-time system |
US20040054883A1 (en) * | 2002-09-13 | 2004-03-18 | International Business Machines Corporation | Firmware updating |
US7089547B2 (en) * | 2002-09-13 | 2006-08-08 | International Business Machines Corporation | Firmware updating |
US7039799B2 (en) * | 2002-10-31 | 2006-05-02 | Lsi Logic Corporation | Methods and structure for BIOS reconfiguration |
US20040205779A1 (en) * | 2003-04-10 | 2004-10-14 | International Business Machines Corporation | Firmware update mechanism in a multi-node data processing system |
US7500235B2 (en) * | 2003-09-05 | 2009-03-03 | Aol Time Warner Interactive Video Group, Inc. | Technique for updating a resident application and associated parameters in a user terminal through a communications network |
US20050170827A1 (en) * | 2004-02-03 | 2005-08-04 | Nec Corporation | Cellular phone |
US20050188366A1 (en) * | 2004-02-25 | 2005-08-25 | Via Technologies Inc. | Firmware upgrade method |
US20050223372A1 (en) * | 2004-04-01 | 2005-10-06 | Borchers Gregory E | Methods and systems for firmware download configuration |
US7543118B1 (en) * | 2004-05-07 | 2009-06-02 | Hewlett-Packard Development Company, L.P. | Multiple variance platform for the management of mobile devices |
US7657886B1 (en) * | 2004-06-03 | 2010-02-02 | Hewlett-Packard Development Company, L.P. | Mobile device with a MMU for faster firmware updates in a wireless network |
US20060015861A1 (en) * | 2004-07-15 | 2006-01-19 | Yutaka Takata | Storage system |
US20060259902A1 (en) * | 2005-05-13 | 2006-11-16 | Fan-Sheng Lin | Embedded system self-updating method and device |
US20070074201A1 (en) * | 2005-09-23 | 2007-03-29 | Samsung Electronics Co., Ltd. | Method and system for updating software and computer readable recording medium storing the method |
US20080155524A1 (en) * | 2006-12-26 | 2008-06-26 | Fuja Shone | Firmware Updating and Extending Method for Application Specific Integrated Circuit |
US20100325622A1 (en) * | 2007-12-13 | 2010-12-23 | Derek Morton | Updating Firmware of an Electronic Device |
US20090187900A1 (en) * | 2008-01-22 | 2009-07-23 | Canon Kabushiki Kaisha | Information processing apparatus, system, method, and storage medium |
US20100153468A1 (en) * | 2008-12-17 | 2010-06-17 | Sap Ag | Configuration change without disruption of incomplete processes |
US8468516B1 (en) * | 2008-12-19 | 2013-06-18 | Juniper Networks, Inc. | Creating hot patches for embedded systems |
US8214653B1 (en) * | 2009-09-04 | 2012-07-03 | Amazon Technologies, Inc. | Secured firmware updates |
US8887144B1 (en) * | 2009-09-04 | 2014-11-11 | Amazon Technologies, Inc. | Firmware updates during limited time period |
US20120110562A1 (en) * | 2010-10-27 | 2012-05-03 | David Heinrich | Synchronized firmware update |
US20120117555A1 (en) * | 2010-11-08 | 2012-05-10 | Lsi Corporation | Method and system for firmware rollback of a storage device in a storage virtualization environment |
US20120246442A1 (en) * | 2011-03-23 | 2012-09-27 | Boris Dolgunov | Storage device and method for updating data in a partition of the storage device |
US20150149989A1 (en) * | 2013-11-26 | 2015-05-28 | Inventec Corporation | Server system and update method thereof |
Cited By (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9858067B2 (en) * | 2015-10-05 | 2018-01-02 | Samsung Electronics Co., Ltd. | Electronic system with update control mechanism and method of operation thereof |
US10303459B2 (en) * | 2015-10-05 | 2019-05-28 | Samsung Electronics Co., Ltd. | Electronic system with update control mechanism and method of operation thereof |
US20170097819A1 (en) * | 2015-10-05 | 2017-04-06 | Samsung Electronics Co., Ltd. | Electronic system with update control mechanism and method of operation thereof |
US20170286090A1 (en) * | 2016-03-31 | 2017-10-05 | Microsoft Technology Licensing, Llc | High performance mobile device flashing |
US10754988B2 (en) * | 2016-08-30 | 2020-08-25 | Winbond Electronics Corporation | Anti-rollback version upgrade in secured memory chip |
US20180060607A1 (en) * | 2016-08-30 | 2018-03-01 | Winbond Electronics Corporation | Anti-Rollback Version Upgrade in Secured Memory Chip |
CN108153480A (en) * | 2016-12-05 | 2018-06-12 | 北京京存技术有限公司 | A kind of data processing method based on NAND flash, storage device |
US20190087174A1 (en) * | 2017-09-21 | 2019-03-21 | Western Digital Technologies, Inc. | Background firmware update |
CN109542491A (en) * | 2017-09-21 | 2019-03-29 | 西部数据技术公司 | Backstage firmware update |
US20190179625A1 (en) * | 2017-12-12 | 2019-06-13 | Cypress Semiconductor Corporation | Memory devices, systems, and methods for updating firmware with single memory device |
US11061663B2 (en) * | 2017-12-12 | 2021-07-13 | Cypress Semiconductor Corporation | Memory devices, systems, and methods for updating firmware with single memory device |
US10552145B2 (en) * | 2017-12-12 | 2020-02-04 | Cypress Semiconductor Corporation | Memory devices, systems, and methods for updating firmware with single memory device |
US11537389B2 (en) | 2017-12-12 | 2022-12-27 | Infineon Technologies LLC | Memory devices, systems, and methods for updating firmware with single memory device |
US11740812B2 (en) * | 2018-02-09 | 2023-08-29 | Micron Technology, Inc. | Data storage device idle time processing |
US20190250838A1 (en) * | 2018-02-09 | 2019-08-15 | Micron Technology, Inc. | Data Storage Device Idle Time Processing |
CN111684431A (en) * | 2018-02-09 | 2020-09-18 | 美光科技公司 | Data storage device idle time handling |
US20200301592A1 (en) * | 2018-02-09 | 2020-09-24 | Micron Technology, Inc. | Data storage device idle time processing |
US10678458B2 (en) * | 2018-02-09 | 2020-06-09 | Micron Technology, Inc. | Data storage device idle time processing |
US11106393B2 (en) | 2018-02-28 | 2021-08-31 | Micron Technology, Inc. | Latency-based scheduling of command processing in data storage devices |
US11669277B2 (en) | 2018-02-28 | 2023-06-06 | Micron Technology, Inc. | Latency-based scheduling of command processing in data storage devices |
US10489085B2 (en) | 2018-02-28 | 2019-11-26 | Micron Technology, Inc. | Latency-based scheduling of command processing in data storage devices |
US10747483B2 (en) * | 2018-07-31 | 2020-08-18 | Canon Kabushiki Kaisha | Image forming apparatus that updates firmware |
CN111373368A (en) * | 2018-09-12 | 2020-07-03 | 株式会社Lg化学 | Non-volatile memory update apparatus and method |
EP3731083A4 (en) * | 2018-09-12 | 2021-01-27 | Lg Chem, Ltd. | Non-volatile memory updating apparatus and method |
CN111354406A (en) * | 2018-12-20 | 2020-06-30 | 爱思开海力士有限公司 | Memory device, operating method thereof, and memory system including the same |
US11340889B2 (en) | 2019-02-28 | 2022-05-24 | Hewlett Packard Enterprise Development Lp | Updating firmware images on chained input/output (I/O) modules |
US11604635B2 (en) * | 2019-12-06 | 2023-03-14 | Delta Electronics, Inc. | Online program updating method |
US11216269B2 (en) * | 2020-01-09 | 2022-01-04 | Dell Products L.P. | Systems and methods for update of storage resource firmware |
US11360837B2 (en) * | 2020-05-15 | 2022-06-14 | Samsung Electronics Co., Ltd. | Handling operation system (OS) in system for predicting and managing faulty memories based on page faults |
US20220350890A1 (en) * | 2021-04-28 | 2022-11-03 | Via Labs, Inc. | Electronic apparatus and secure firmware update method thereof |
US11874927B2 (en) * | 2021-04-28 | 2024-01-16 | Via Labs, Inc. | Electronic apparatus and secure firmware update method thereof |
US20220405090A1 (en) * | 2021-06-21 | 2022-12-22 | Western Digital Technologies, Inc. | Data Storage Device Firmware Updates in Composable Infrastructure |
US11733909B2 (en) | 2021-06-21 | 2023-08-22 | Western Digital Technologies, Inc. | Secure-erase prediction for data storage devices |
US11900102B2 (en) * | 2021-06-21 | 2024-02-13 | Western Digital Technologies, Inc. | Data storage device firmware updates in composable infrastructure |
Also Published As
Publication number | Publication date |
---|---|
KR20160050707A (en) | 2016-05-11 |
US10866797B2 (en) | 2020-12-15 |
US20180046447A1 (en) | 2018-02-15 |
CN105573665A (en) | 2016-05-11 |
US9817652B2 (en) | 2017-11-14 |
CN105573665B (en) | 2020-06-23 |
KR102261815B1 (en) | 2021-06-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10866797B2 (en) | Data storage device and method for reducing firmware update time and data processing system including the device | |
US10564879B2 (en) | Memory system and operation method for storing and merging data with different unit sizes | |
US20190278518A1 (en) | Memory system and operating method thereof | |
US11036421B2 (en) | Apparatus and method for retaining firmware in memory system | |
US11966329B2 (en) | Address map caching for a memory system | |
KR102649131B1 (en) | Apparatus and method for checking valid data in block capable of large volume data in memory system | |
US11157402B2 (en) | Apparatus and method for managing valid data in memory system | |
US11782840B2 (en) | Memory system, operation method thereof, and database system including the memory system | |
US11645213B2 (en) | Data processing system allocating memory area in host as extension of memory and operating method thereof | |
KR20200113992A (en) | Apparatus and method for reducing cell disturb in open block of the memory system during receovery procedure | |
US11675543B2 (en) | Apparatus and method for processing data in memory system | |
US11144448B2 (en) | Memory sub-system for managing flash translation layers table updates in response to unmap commands | |
US20140325168A1 (en) | Management of stored data based on corresponding attribute data | |
US10614890B2 (en) | Memory system and operating method thereof | |
US10942848B2 (en) | Apparatus and method for checking valid data in memory system | |
KR20200016076A (en) | Memory system and operation method for the same | |
US20230195350A1 (en) | Resequencing data programmed to multiple level memory cells at a memory sub-system | |
US20180321856A1 (en) | Memory system and operation method thereof | |
US11455240B2 (en) | Memory system and operating method of memory system | |
US20190073126A1 (en) | Memory system and operating method of the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: SAMSUNG ELECTRONICS CO., LTD., KOREA, REPUBLIC OF Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHOI, SANG HOON;KIM, SUNG CHUL;KIM, HYUN KOO;AND OTHERS;REEL/FRAME:036663/0649 Effective date: 20150612 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 4 |