US3436255A - Electric resistance heaters - Google Patents

Electric resistance heaters Download PDF

Info

Publication number
US3436255A
US3436255A US469695A US3436255DA US3436255A US 3436255 A US3436255 A US 3436255A US 469695 A US469695 A US 469695A US 3436255D A US3436255D A US 3436255DA US 3436255 A US3436255 A US 3436255A
Authority
US
United States
Prior art keywords
wafer
heating element
recess
legs
wafers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US469695A
Inventor
Darrel M Harris
Donald E Westhoff
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Monsanto Co
Original Assignee
Monsanto Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Monsanto Co filed Critical Monsanto Co
Application granted granted Critical
Publication of US3436255A publication Critical patent/US3436255A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67103Apparatus for thermal treatment mainly by conduction
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/12Substrate holders or susceptors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B3/00Ohmic-resistance heating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B3/00Ohmic-resistance heating
    • H05B3/10Heater elements characterised by the composition or nature of the materials or by the arrangement of the conductor
    • H05B3/12Heater elements characterised by the composition or nature of the materials or by the arrangement of the conductor characterised by the composition or nature of the conductive material
    • H05B3/14Heater elements characterised by the composition or nature of the materials or by the arrangement of the conductor characterised by the composition or nature of the conductive material the material being non-metallic
    • H05B3/148Silicon, e.g. silicon carbide, magnesium silicide, heating transistors or diodes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/006Apparatus

Definitions

  • a heating element having a pair of longitudinally extending legs connected by a bight portion for supporting semiconductor materials in epitaxial deposition furnaces.
  • the heating element is provided with a plurality of recesses, each of which is sized to support a semiconductor Wafer.
  • the recess is slightly diametrally smaller than the wafer so that only the peripheral margin of the wafer bottom wall resides in contact with the upper surface of the heating element.
  • a ring-type insert is provided for removable insertion into each of the recesses so that smaller diameter Wafers can be supported on the ring-type insert.
  • the invention contemplates a number of embodiments where the wafer may be supported in such manner that its upper surface is parallel to the exterior surface of the heating element, where the upper surface is spaced slightly above the upper surface of the heating element and Where the wafer is located in supportive engagement with the upper surface of the heating element.
  • a vertically disposed heating element having the plurality of recesses is also provided.
  • This invention relates in general to certain new and useful improvements in heating devices, and more particularly to an improved method and apparatus used in the formation of single crystal semiconductor bodies having a plurality of layers of different conductivities.
  • semiconductor devices such as silicon controlled rectifiers have found widespread use in the electronics industry. These semiconductor devices are made from semiconductor materials which may have a plurality of layers of semiconductor material having different conductivities and separated by a transition zone. Semiconductor materials of this type having at least two layers of different conductivities with a transition region therebetween are very suitable for use in the formation of electronic members such as diodes, transistors, switches and similar types of electronic structures.
  • One very effective method of producing semiconductor materials is by the epitaxial deposition of silicon on a wafer formed of like material. Generally, the wafers involved must be formed of single crystal silicon with precisely controlled concentrations of doping impurities.
  • silicon wafers are then normally placed on a graphite heating element which is secured to the electrical contacts of an epitaxial silicon furnace, and are heated to a temperature where a monocrystalline silicon layer is grown on the wafer surface.
  • a graphite heating element which is secured to the electrical contacts of an epitaxial silicon furnace, and are heated to a temperature where a monocrystalline silicon layer is grown on the wafer surface.
  • One effective method of producing this silicon epitaxial layer on the silicon substrate is by the reduction of gaseous trichlorosilane.
  • the heating elements are generally U-shaped in horizontal cross section and consist of a pair of legs which are connected by a bight portion.
  • the legs are generally provided with terminal 3,436,255 Patented Apr. 1, 1969 connectors at their free ends, that is the ends remote from the bight portion for ultimate connection to the electrical contacts of the deposition furnace.
  • a suitable amount of electrical current is then passed through the heating element to heat the element to the desired reaction temperature.
  • heating elements of the type employed in epitaxial deposition operations are generally made of silicon or conducting ceramics such as graphite or other similar material which is capable of being heated by the passage of electrical current therethrough.
  • heating elements of this type are rather porous and when subjected to high temperatures will emit considerable amounts of gas. The gas often reacts with the wafer disposed thereupon causing surface imperfections. Moreover, this emitted gas from the heating element tends to interfere with the reaction of the feed gases.
  • the untreated heating elements generally have a rough and coarse outer surface. Moreover, a coating which was deposited on the surface of the heating element to prevent outgassing similarly presented a relatively rough and coarse surface. The same condition existed even if a number of coatings of a layer to prevent outgassing was deposited on the heating element.
  • the material which is deposited on the heating element is generally formed by the reaction of gases which are fed into a reaction chamber in which the heating element is disposed. These gases react to form the desired material for deposition on the surface of the heating element. Inasmuch as elemental material, such as elemental silicon, is deposited on the surface of the heating element, a random deposition occurs and the surface thereof always tends to be rough and coarse.
  • the primary object of the present invention to provide a heating element for epitaxial deposition furnaces and the like which are designed to support wafers in a manner where internal stresses are minimized.
  • FIGURE 1 is a perspective view of a heating element constructed in accordance with and embodying the present invention
  • FIGURE 2 is a vertical fragmentary sectional view partially broken away taken along a longitudinal centerline passing through a leg of the heating element of FIG- UR-E 1 and showing a conventional wafer supported thereon;
  • FIGURE 3 is a perspective view of a wafer supporting plug which is optionally employed with the heating element of FIGURE 2;
  • FIGURE 4 is a vertical sectional view partially broken away and similar to the sectional view of FIGURE 2, showing a modified form of heating element constructed in accordance with and embodying the present invention
  • FIGURE 5 is a perspective view of a wafer supporting plug which can be optionally employed with the heating element of FIGURE 4;
  • FIGURE 6 is a vertical sectional view taken along line 6--6 of FIGURE 5;
  • FIGURE 7 is a vertical sectional view similar to the view of FIGURE 4, and showing the heating element of FIGURE 4 with the supporting plug of FIGURE 5 operatively positioned therein, and a diametrally smaller wafer supported thereon;
  • FIGURE 8 is a vertical sectional view, partially bro-ken away, similar to the sectional view of FIGURE 2 showing another modified form of the heating element constructed in accordance with and embodying the present invention
  • FIGURE 9 is a perspective view of a wafer supporting plug which can be optionally employed with the heating element of FIGURE 8;
  • FIGURE 10 is a vertical sectionalview similar to the view of FIGURE 8, and showing the heating element of FIGURE 8 with the supporting plug of FIGURE 9 0peratively positioned therein and a diametrally smaller wafer supported thereon;
  • FIGURE 11 is a front elevational view, partially broken away, of a vertically disposed heating element constructed in accordance with and embodying the pres ent invention
  • FIGURE 12 is a fragmentary sectional view taken along line 12--12 of FIGURE 11;
  • FIGURE 13 is an enlarged end elevational view of a wafer supporting pin used in the heating element of FIGURE 11;
  • FIGURE 14 is a front elevational view, partially broken away, of a modified form of a vertically disposed heating element constructed in accordance with and embodying the present invention
  • FIGURE 15 is a fragmentary sectional view taken along line 15-15 of FIGURE 10;
  • FIGURE 16 is an enlarged end elevational view of the center wafer supporting pin used in the heating element of FIGURE 14;
  • FIGURE 17 is a reproduction of an optical photomacrograph showing the epitaxial deposition surface on a wafer treated on a heating element of the present invention
  • FIGURE 18 is a reproduction of an optical photomacrograph showing the epitaxial deposition surface on a wafer treated on a conventional heating element
  • FIGURE 19 is a reproduction of an optical photomicrograph showing the interference fringe patterns of the epitaxial surface on the wafer of FIGURE 17;
  • FIGURES 20, 21, and 22 are reproductions of optical photomicrographs showing interference fringe patterns of various surface imperfections in the epitaxial coating on the wafer of FIGURE 18.
  • the present invention relates to a device and a method for producing a plurality of uniform semiconductor bodies having a plurality of layers of semiconductor materials with different conductivities and where each of the layers is separated by a transition region.
  • the various layers are preferably of a single crystal structure, and have different conductivities, either in type or in degree.
  • the present invention contemplates the use of a recess at each Wafer position, where the recess is diametrally smaller than the wafer to be supported in each wafer position.
  • the diametral size of the recess is only slightly smaller than the diametral size of the wafer supported thereon so that only the outer peripheral margin of the bottom wall of the wafer contacts the surface of the heating element.
  • the present invention contemplates a number of embodiments of the heating element which can be used in the scope of the present invention.
  • the first embodiment provides a recess at each wafer position where the wafer is disposed on the upper surface of the heating element and only the peripheral margin of the base of the wafer remains in supported engagement with the surface of the heating element.
  • the second embodiment of the present invention provides a recess which is circumscribed with an upstanding wafer supporting shoulder. However, the shoulder itself is somewhat recessed from the surface of the heating element so that the bottom wall of the wafer is disposed slightly below the upper surface of the heating element. In this embodiment, the upper surface of the wafer, however, remains in a position Where it extends above the surface of the heating element.
  • an upstanding wafer supporting shoulder also circumscribes the recess.
  • the wafer is similarly supported on the upstanding shoulder.
  • the upstanding shoulder is recessed sufficiently s th the pp r s rface of the wafer is coplanar th the surface of the heating element.
  • the efliciency of the epitaxial operation is materially reduced when the upper surface of the wafer is disposed even slightly beneath the surface of the heating element. Therefore the wafer is always positioned so that its upper surface is at least coplanar with the surface of the heating element.
  • the present invention also contemplates a heating element where the legs are designed to accommodate a single row of wafers, and larger heating elements where the legs are designed to accommodate a plurality of rows of wafers.
  • thermally decomposable, thermal decomposition and the associated deposit of a product of decomposition as used herein are intended to be generic to the mechanism of the decomposition of various silicon containing gases such as trichlorosilane and the liberation of silicon atoms through the action of heat on such gases. These terms are also generic to and are included within the concept of the mechanisms of high temperature reactions where high temperature causes interaction between various materials with the liberation of specific materials or atoms.
  • A designates a graphite heating element or so-called bridge which is designed to support semiconductor bodies of substantial area and planarity.
  • the semiconductor bodies produced will have a plurality of layers of different conductivities with transition regions therebetween.
  • the heating element A is of the type described in copending application Ser. No. 415,363, filed Dec. 2, 1964, now US. Patent No. 3,351,742, which has a pair of horizontally disposed legs 1, 2 connected by a bight portion 3.
  • the legs 1, 2 are provided with top and bottom faces 4, 5, interior faces 6 and exterior faces 7.
  • the bridge A is of the double-taper type where the legs are tapered from each of its transverse ends in such manner that they have a slightly smaller cross sectional thickness at each of the ends than in the center portion thereof, when referring to the trasverse dimension of the legs.
  • the thicknesses of each of the legs 1, 2 increases as the distance from the free ends thereof increases.
  • each of the legs 1, 2 is so adjusted so that a proper cross sectional area of each of the legs 1, 2 is maintained in order to provide a substantially constant uniform temperature distribution across each of the legs 1, 2.
  • the bight portion 3 is slightly thicker in the transverse dimension, reference being made to FIGURE 1, than the overall thicknesses of the legs 1, 2.
  • the legs For heating elements having legs with an overall thickness of approximately 22 inches, the legs have an overall thickness of approximately 0.260 inch at the center portion and a thickness of approximately 0.215 inch at each of the ends.
  • the bight portion 3 generally has an overall thickness of approximately 0.500 inch and a relative length of approximately 1% inches.
  • the graphite heater A is similarly provided with a circular recess 8 at the point of connection of each of the two legs 1, 2 with the bight portion 3.
  • the circular recess 8 has a diameter of approximately /2 inch and serves to create a substantially uniform temperature region across the width of the bight portion 3.
  • the recess 8 forms a heat sink for heat dissipation in the region of high current density. In this manner, it can be seen that relatively even resistance characteristics are maintained throughout each of the legs 1, 2 and the bight portion 3 and therefore, it is possible to maintain a substantially uniform temperature distribution across the lengths of each of the legs. It has been found that this substantially increases the uniformity of epitaxial films deposited on the layers.
  • the material of construction of the bridges B is not necessarily limited to graphite, inasmuch as the bridges B can be prepared from any electrically conductive material of high resistance which exhibits a characteristic of becoming heated due to the passage of electrical current therethrough.
  • the bridges may be of material such as silicon, or conducting ceramics such as graphite or refractory metals such as tantalum, molybdenum, or titanium.
  • One important criterion is that the bridge must be made of a material which does not contain impurity atoms, or at least does not interact with the system by introduction of impurity atoms.
  • the bridge may also be surface treated in the manner described in my copending application Ser. No. 423,066, filed Jan. 4, 1965.
  • free silicon which is produced by the reduction of gaseous trichlorosilane, is fused to the surface of the graphite heating element and reacts with the carbon atoms of the heating element to form a tightly adherent, substatnially permanent, gas impervious film.
  • the graphite heating element is heated to a temperature where a portion of the silicon reacts with the carbon of the heating element to form a silicon carbide film and the remainder of the silicon, which becomes liquified, penetrates into the pores of the graphite and becomes fused to the graphite.
  • Wafers w of semiconductor material are prepared in any suitable manner, as for example, slicing or cutting Wafers from commercially available zone refined single crystals of semiconductor material. Both of these methods are well known in the prior art. It is important that the wafers are cut in such a manner that the surface of the wafer to be treated is oriented in a specific crystallographic plane. Generally for the purposes of the present invention, it is preferred that the wafers are cut or sliced in such a manner so that they are oriented in a (l-l-1) plane on the Miller indices. Naturally, the surface of the wafer, which is to receive the epitaxial deposition film is carefully prepared by the generally accepted techniques of grinding, polishing, etching, and cleaning before the epitaxial deposition operation.
  • Each of the legs 1, 2 is provided with a plurality of longitudinally spaced wafer positions 9, which are located so that a wafer w in one wafer position 9 is spaced a slight distance from another wafer w located in the next adjacent wafer position 9. In this manner, the maximum amount of surface area of each leg 1, 2 of the bridge A is employed.
  • Each wafer position 9 is provided with a recess 10, which is slightly smaller in diametral size than the diameter of the wafer w.
  • the wafers w are circular in horizontal cross section and have an overall diametral size of approximately 1 /2 inches.
  • the wafers generally have a thickness of approximately 0.010 inch.
  • the recess 10 with an overall diametral size which is slightly less than 1 /2 inches. It has been found that the recess can be approximately 0.040 inch to 0.060 inch smaller than the overall diametral size of the wafer.
  • the depth of the recess is not particularly critical. However, the minimum depth is 0.003 inch and the recess can be as deep as inch.
  • the only critical limitation on the depth of the recess 10 is that it cannot be too deep to interfere with the resistance characteristics of the heating element or to materially weaken the internal strength of the heating element.
  • recesses which extend beyond A inch in depth tend to materially alter the cross sectional characteristics of the heating element and hence materially alter the resistance characteristics of the heating element. Alteration of these resistance characteristics tends to interfere with linear temperature distribution across the length of the legs 1, 2 and it is sometimes difiicult to compensate for these materially changed resistance characteristics. Therefore, it has been found desirable to form the recesses with a depth not exceeding inch.
  • the upper surface of the wafer w does not pick up the surface imperfections of the heating element A.
  • imperfections in the surface of the heating element would tend to create strains in the wafer w.
  • the various crystal points or imperfections which are relatively small on the bridge surface area tend to engage the underside of the wafer w and this engagement by a relatively small number of points on the surface of the bridge accounts for the support of the entire wafer. Accordingly, the strains were often sufiicient to create an epitaxial coating on the upper surface of the wafer w which was substantially identical to the surface contour of the heating element which is in supportive engagement with the base of the Wafer.
  • the recess 10 is therefore provided with a cylindrical washer, sleeve or so-called plug 11 which has a circumferentially extending side wall 12 and a central aperture 13, the latter of which is approximately 0.040 inch to 0.060 inch smaller than the overall diameter of the wafer to be supported in the wafer position 9.
  • the plug 11 is sized to snugly fit within the recess 10 and to snugly engage the annular wall of the recess 10 so that there is in effect a continuation of electrically resistive material, whereby the plug 11 will also be substantially heated in the same manner as the heating element A.
  • the plug 11 has an overall height which is substantially equal to the height of the recess 10 so that it fits snugly therein in the manner as shown in FIGURE 2. It should be understood in this connection, that a number of plugs 11 can be employed so that the heating element A can be used when treating wafers of different diametral sizes.
  • the plug 11 is preferably though not necessarily constructed of the same electrically resistive material as the heating element A.
  • the plug 11 is preferably formed of a similar graphite material.
  • the plug may be formed of any electrically conductive material of high resistance which exhibits a characteristic of becoming heated due to the passage of electrical current therethrough and may be formed of any of the materials used in the formation of the heating element.
  • the plug 11 is similarly surface treated in the same manner as the overall heating element A so that it similarly has a protective coating on the upper surface thereof. Moreover, when altering the cross sectional area of the heating element A along selective portions of the length thereof, the plug 11 is disposed within the recess 10 in order to measure the original resistance characteristics and to account for the characteristics created by the presence of the plug 11. It should be observed that the plug 11 is easily removable from the recess 10'. A simple element such as a knife blade can be inserted under the bottom wall of the plug 11 for urging the same upwardly and for ultimate dislodgement from the recess 10.
  • heating element B substantially as shown in FIGURE 4 and which is substantially identical to the previously described heating element A.
  • the heating element B is similarly provided with a plurality of longitudinally spaced wafer positions 14 on each of its legs and which are located so that a wafer w in one wafer position is spaced a slight distance from the wafer w located in the next adjacent wafer position 14.
  • Each of the wafer positions 14 is provided with recesses 15 which again are slightly smaller in diametral size than the overall diameter of the wafer w.
  • Each recess 15 is internally provided with a step or large relatively flat wafer supporting shoulder 16, substantially as shown in FIGURE 4.
  • the recess 15' is formed by a bottom wall 17 and annular side wall 18 the latter of which has an overall height within the range of 0.003 inch to approximately 4 inch.
  • the overall diametral size of the bottom wall 17 is slightly less than the overall diametral size of the wafer w.
  • the supporting shoulder 16 has an overall diametral size which is substantially equal to the diametral size of the wafer w. Where the wafer w is approximately 1 /2 inches in horizontal cross section, the peripheral margin of the shoulder 16 measures approximately 1 /2 inches. It can be seen that the shoulder 16 is recessed from the surface of the heating element B by a distance of approximately 0.005 inch to 0.050 inch.
  • the supporting shoulder 16 slightly recessed from the surface of the heating element B. In this manner, if vibration occurs during the operation of the epitaxial deposition furnace, the wafers w will not be vibrated so that they are shaken off of the heating element B. Moreover, in many applications it is desirable to have the wafer a recessed slightly in order to provide an epitaxial depositron of smaller thickness on the side wall of the wafer w.
  • the shoulder 16 integrally merges into an upstanding side wall 19, substantially as shown in FIGURE 3.
  • the plug 20 is similarly formed of the same material employed in the construction of the heating element B and generally consists of a sleeve having an annular wall 21 with a central aperture 22.
  • the central aperture 22 is formed by an internal annular wall 23, which integrally merges at its upper end into a horizontal supporting shoulder or step 24.
  • the aperture 22 is slightly smaller in diametral cross section than the overall diametral size of the wafer w to be supported on the shoulder 24.
  • the diametral size of the shoulder 24 is substantially equal to the overall diametral size of the wafer w supported thereon.
  • the shoulder 24 integrally merges into an upstanding annular wall 25, the height of which is substantially less than the overall thickness of the wafer w, so that the wafer w is supported in a position substantially as shown in FIGURE 7, when the plug 20 is employed.
  • the plug 20 is also provided with an annular notch 26, having a horizontal wall 27 and a vertical wall 28.
  • the horizontal wall 27 engages the shoulder 16 and the vertical wall 28 engages the annular wall 18, when the plug 20 is disposed within the recess 15.
  • the plug 20 is sized so that it snugly fits within the recess 15 and thereby forms a continuation of the heating element B.
  • the plug 20 is easily removable from the recess 15 when it is desired to use the larger wafer w. It should also be understood that the plug 20 is similarly surface treated in the same manner as the remainder of the heating element B. It should be understood in this connection that a number of plugs 20 can be employed so that the heating element B can be used when treating wafers of different diametral size.
  • heating element C substantially as shown in FIGURE 8 and which s substantially similar to the previously described heatmg elements A and B.
  • the heating element C is similarly provided with a plurality of longitudinally spaced wafer positions 29 which are located so that a Wafer w in one wafer position is spaced a slight distance from another wafer w located in the next adjacent wafer position 29.
  • Each wafer position 29 is provided with a recess 30 which is substantially identical to the recess 15 in the heating element B and which is slightly smaller in diametral size than the overall diameter of the wafer w to be supported therein.
  • the overall diameter of the recess 30 is approximately 0.040 to 0.060 inch smaller than the over all diametral size of the wafer w supported therein.
  • the recess 30 is similarly provided with an upstanding shoulder or step 31 which remains in supportive engagement with the bottom wall of the wafer w, substantially ass hown in FIGURE 8.
  • the outer peripheral margin of the shoulder 31 is substantially equal to the size of the peripheral margin formed by the bottom wall of the wafer w.
  • the recess 30 is formed by a bottom wall 32 and an annular side wall 33, the latter of which approximately 0.003 inch to 0.25 inch in height.
  • the overall size of the shoulder 31 is approximately 0.020 to 0.030 inch.
  • the shoulder 31 is recessed from the surface of the heating element C by a distance which is equal to the overall thickness of the wafer w so that when the wafer w is supported on the shoulder 31, the upper surface of the wafer w is substantially coplanar with the upper surface of the heating element C.
  • the heating element C can receive an epitaxial deposition coating where only the upper surface of the wafer w is coated.
  • the supporting shoulder 31 can never be located at a distance below the surface of the heating element C so that the upper surface of the wafer w is disposed below the surface of the heating element C. It has been found that when the upper surface of the wafer w is disposed beneath the upper surface of the heating element C, an uneven epitaxial deposition coating is formed thereon.
  • the heating element C is capable of accommodating a plug 34, which is substantially identical to the previously described plug 20 used in the heating element B.
  • the plug 34 has the same cross sectional shape and fits snugly within the recess 30 in the same manner as the plug 20 was snugly fitted within the recess 15. However, it
  • annular side wall 25 in the plug 34 is substantially equal to the overall thickness of the wafer w, so that the upper surface of the wafer w is substantially coplanar to the surface of the heating element C, when supported on the supporting shoulder 24.
  • heating element D substantially as shown in FIGURES ll-13 and which is designed to be mounted in a vertical or substantially vertical position.
  • the heating element D is somewhat similar to the heating element described in copending application Ser. No. 475,106, filed July 27, 1965, and now Patent No. 3,391,270 which relates to vertically disposed heating elements used in apparatus for the formation of single crystal semiconductor bodies having a plurality of layers of different conductivities.
  • the heating element D has a pair of vertically disposed legs 35, 36 which are connected by a horizontally disposed bight portion 37.
  • the bridge D is of the doubletaper type where the legs are tapered from its upper and lower ends, in such manner that they have a slightly smaller cross sectional thickness at the upper and lower ends than in the center portion thereof, when referring to the transverse dimension of the legs.
  • the angle of taper of each of the legs is so adjusted that a cross sectional area of each of the legs 35, 36 is maintained in order to provide a substantially constant uniform temperature distribution across each of the legs 35, 36.
  • the bight portion 37 is slightly thicker in the transverse dimension, reference being made to FIGURE 11 than the overall thicknesses of the legs 35, 36.
  • the legs For heaters having legs with an overall height of approximately 22 inches, the legs have an overall thickness of approximately 0.260 inch at the center portion and a thickness of approximately 0.215 inch at each of the upper and low ends.
  • the bight portion 37 has an overall thickness of approximately 0.500 inch and a relative height of approximately 1% inches.
  • the heater D is also provided with a circular recess 38 at the point of connection of each of the two legs 35, 36 with the bight portion 37.
  • the circular recess 38 has a diameter of approximately /2 inch and serves to create a substantially uniform temperature region across the width of the bight portion 37.
  • the recess 38 forms a heat sink for heat dissipation in the region of high current density.
  • the bridge D may also be surface treated in the manner described in copending application Ser. No. 423,066, filed Jan. 4, 1965, where a combination of silicon and silicon carbide layers is deposited on the bridge to prevent outgassing thereof.
  • Each of the legs 35, 36 is provided with a plurality of vertically spaced wafer positions 39, which are located so that a wafer w in one wafer position 39 is spaced a slight distance from another wafer w located in the next adjacent wafer position 39. In this manner, a maximum amount of surface area of each leg of the bridge D is employed. Moreover, each side of the legs 35, 36 is provided with marginally registered wafer positions. Each of the wafers w is engaged slightly below its horizontal diameter by a pair of retaining pins 40, which extend transversely through the legs so that they form projected ends 41 on each side of the legs 35, 36.
  • the retaining pins are located along the periphery of the wafer position at an angle of preferably about 20 to 30 below the horizontal centerline of the wafer position.
  • one pair of pins 40 is capable of engaging the wafers w which are horizontally aligned on opposite sides of each of the legs 35, 36.
  • the pins 40 preferably have a diameter of about 0.060 inch and the termial ends thereof extend beyond the surface of the bridge D for a distance between 0.015 inch to 0.030 inch depending upon the relative thickness of the particular wafers to be used on the bridge D.
  • Each of the extended ends 41 is provided with notches 42 which are defined by a base wall 43 and which is coplanar with the surface of the legs 35, 36.
  • the extended ends 41 are further provided with inwardly tapering side walls 44 which are sized to engage the peripheral margin of each of the wafers w in the manner as shown in FIGURE 12.
  • Each of the wafer positions 39 is provided with circular recesses 45, the diameter of which is slightly less than the overall diameter of the wafer w to be positioned in the wafer position 39.
  • the overall diameter of the recess 45 is approximately 0.040 to 0.060 inch smaller than the diameter of the wafer w to be disposed on the wafer position 39.
  • the recess 45 is approximately 0.003 inch to /8 inch deep.
  • the depth of the recess 45 is not critical so long as it is at least 0.003 inch deep,. However, the recess 45 must not be deep enough to interfere with the internal strength of the bridge D and moreover, must not materially interfere with the resistance characteristics of the bridge D.
  • the bridge D is capable of taking advantage of the vertical disposition and employment of maximum surface area and also taking advantage of the recesses which prevent creation of internal strains within the wafers w.
  • the heating element E is substantially similar to the heating element D and comprises legs 46, 47, which are connected by a bight portion 48.
  • the legs 46, 47 are sufficiently wide so that each leg is capable of accommodating at least two rows of wafer w.
  • each of the legs 46, 47 is provided with two rows of vertically extending wafer positions 49.
  • the bridge E may have its cross sectional thickness altered in order to obtain the desired resistance characteristics and hence uniform temperature distribution across the length of each of the legs 46, 47.
  • the bridge E may be surface coated in the manner as described in connection with the surface coating of the bridge D.
  • the inner wafer positions 49 have an inner Wafer in 50 located slightly below the horizontal diameter of the wafer position 49, and the outer wafer positions have a pin 51 located slightly below the horizontal diameter of the wafer position 49.
  • the pins 50, 51 are substantially identical to the previously described pins 40 and moreover, the pins 50, 51 are located along the periphery of the wafer position 49 at an angle of preferably approximately 20 to 30 below the horizontal centerline of the wafer position 49.
  • the outer and inner wafer positions 49 share a common pin 52, which is located approximately at the horizontal diameter of each of the wafer positions 49, substantially as shown in FIGURE 14.
  • the pin 52 is so located that the upper peripheral margin thereof is tangential to the horizontal centerline passing through the wafer positions 49.
  • each of the pins 50, 51 is also provided with notches 53 which are identical to the notches formed within the pin 40. Moreover, the pins 50, 51 have extended ends which extend on both sides of the bridge surface so that each leg of the bridge is capable of accommodating two rows of marginally aligned wafers on the oppositely presented surfaces thereof.
  • the center pin 52 is provided with a pair of opposed notches 54, 55 on each of the transverse sides of the extended ends, which are located on opposite surfaces of the bridge E.
  • each of the notches 54, 55 is provided with base walls 56, 57, which are coplanar with the surfaces of the legs 46, 47 and side walls 58, 59 which are angularly disposed with respect to the base walls 56, 57 and taper inwardly so that a notch having an acute angle is formed in the manner as shown in FIGURE 16.
  • each of the pins 50, 51 and 52 and the pins 40 in the bridge D it is desirable to locate each of the pins 50, 51 and 52 and the pins 40 in the bridge D as close to the horizontal diameter of each of the wafer positions as possible.
  • the pins 40 were disposed slightly beneath the horizontal diameter of the Wafer w to support the wafer w.
  • the center pin 52 which is common to both wafer positions can be placed approximately at the horizontal diameter of the wafer positions inasmuch as each of the wafer positions has one pin 50, 51 located slightly below the horizontal diameter thereof.
  • Each of the wafer positions 49 is similarly provided with circular recesses 60 which are slightly smaller than the overall diametral size of the wafer w to be supported in the wafer position.
  • the recess 60 is approximately 0.040 to 0.060 inch smaller than the wafer w which is supported thereon.
  • the recesses 60 may be at least 0.003 inch deep.
  • the maximum depth of the recess 60 is not critical, but should not extend beyond A; of an inch in order to prevent any interference with the internal strength of the bridge E and moreover, should not interfere with the resistance characteristics of the bridge.
  • semiconductor bodies having a plurality of layers of differing conductivities.
  • the width of each of the layers may be precisely controlled by generally accepted techniques. This allows the transition region or junction to be accurately positioned in the semiconductor body.
  • any desired type of semiconductor device may be made by utilizing the methods and the apparatus of the present invention.
  • the semiconductor device will have at least two layers of semiconductor material with different conductivities and each of the layers being separated by a transition region.
  • the transition region will be a P-N junction, where in other cases, it may be a P-I or an N-I junction.
  • the invention may be employed in the formation of semiconductor bodies having a plurality of layers of semiconductor material of differing conductivities separated by a transition region.
  • each of the layers may be the same semiconductor material and other than silicon, for example, silicon carbide, various group 3-5 compounds, such as gallium arsenide, indium antimonide, gallium phosphide, and similar types of material.
  • silicon carbide various group 3-5 compounds, such as gallium arsenide, indium antimonide, gallium phosphide, and similar types of material.
  • the individual layers of these latter groups of compounds may be formed f different semiconductor materials. It is, however, important that essentially single crystal growth is maintained and hence, strong consideration must be given when depositing layers of dissimilar material to the crystallography of the layer on which the growth occurs in order to preserve the single crystal characteristics to the greatest degree possible.
  • FIG- URES 17 and 18 show a comparison of wafers which received an epitaxial deposition coating on the heating elements which were not provided with recesses and heating elements and wafers which received an epitaxial coating on heating elements of the present invention, respectively.
  • FIGURE 18 where the wafer received a coating on the conventional type of heating element, it can be seen that surface imperfections are present.
  • the photograph of the wafer in FIGURE 17, which was surface treated on a heating element of the type described in the present invention has a substantially clear epitaxial coating which is not marred by pinhole-like recesses. These pinhole-like recesses can sometimes reach dimensions of as much as 19, inch diameter.
  • FIGURES 17 and 18 were taken at approximately a distance of 2 inches from the lens of the camera. Each of the wafers were supported on a pedestal and shifted so that the sample would obtain a shade pattern. Accordingly, a shaded light source had to be employed since the shade pattern was needed to show the imperfections. When referring to FIGURE 18, only a few imperfections are shown along the interface of the shaded por tion and the lighted portion of the wafer. However, a close surface examination of this type of wafer reveals that the entire wafer contains as many as 40 to 50 pinhole-like recesses of the type shown.
  • the wafer illustrated in the photograph of FIGURE 18 was supported on a conventional type of heating element and was purged in nitrogen for approximately ten minutes in a conventional bell jar. Thereafter, the heating element was purged in hydrogen for approximately 20 minutes.
  • base plate water was supplied for cooling the ends of the heating element retained in the clamps.
  • trichlorosilane was fed to the reactor for approximately 30 minutes. Hydrogen was also maintained in a quantity sufiicient to produce a silicon coating.
  • the power supplied to the heating element was approximately 1240 to 1275 amps, and the voltage was maintained at 26.0 to 26.9 volts.
  • the heat was discontinued and the chamber purged with hydrogen for approximately ten minutes. Thereafter, the chamber was purged with nitrogen for approximately minutes and the heating element removed.
  • a substantially identical procedure was employed in the case of the wafer illustrated in FIGURE 17 which was supported on the heating element of the present invention.
  • FIGURE 19 is a reproduction of a photomicrograph of a surface pattern taken on the wafer of FIGURE 17 to show the substantially smooth surface produced by the process and apparatus of the present invention.
  • This photomicrograph is a fringe pattern obtained from a Leitz light wave surface tester. Measurements were made with a monocromatic light so that scratches or imperfections on the surface will disrupt the interference pattern which shows the generally parallel fringes on a smooth surface. The amount of deviation obtained is a measurement of the surface imperfection depth. The depth is a function of the deviation of the fringes expressed in fractions of the fringe spacing with a half wave length of light employed.
  • the surface tester provides light in 0.000022 inch in wave length. Therefore, the distance between the fringes which represents a half of a wave length amounts to approximately 0.000011 inch.
  • FIGURES 20, 21 and 22 are optical photomicrographs of various imperfections taken in the sample of FIGURE 18. These optical photomicrographs illustrate the fringe patterns which are obtained as a result of the irregularity in the surface.
  • a wafer supporting heating element for epitaxial deposition furnaces and the like and being sized to retain wafers which are to receive surface treatment thereon, said wafer supporting element having a relatively flat wall, at least one wafer position formed on said relatively fiat wall, said wafer position defining a recess formed by a sidewall and an outwardly facing wall, shoulder forming means operatively associated with said recess for supporting said wafer with respect to the outwardly facing wall of said wafer supporting element, said wafer having a relatively flat bottom wall of such size so that only a small portion of the bottom wall around the periphery thereof resides in contact with the shoulder forming means and the major surface area of said bottom wall of the wafer is slightly spaced from the outwardly facing wall of said recess.
  • a wafer supporting heating element for epitaxial deposition furnaces and the like and being sized to retain wafers which are to receive surface treatment thereon wafer supporting element having a relatively flat wall, at least one wafer position formed on said relatively flat wall, said wafer position defining a recess formed by a side wall and an outwardly facing wall, said side Wall having a peripheral size which is smaller than the peripheral size of said wafer, said wafer having a relatively flat bottom wall which is slightly larger than the recess so that only a small portion of the bottom wall around the periphery thereof resides in contact with the wafer supporting element and the major surface area of said bottom wall of the wafer is slightly spaced from the outwardly facing wall of said recess.
  • the wafer supporting heating element of claim 1 further characterized in that said heating element is provided with a plurality of wafer positions and each of said positions having a recess therein.
  • the Wafer supporting heating element of claim 1 further characterized in that said heating element is formed of an electrical resistance material so that it is capable of being heated by passage of electrical current therethrough.
  • the wafer supporting heating element of claim 3 further characterized in that the surface treatment is an epitaxial coating.
  • the wafer supporting heating element of claim 4 further characterized in that the wafers are silicon Wafers for receiving an epitaxial silicon coating thereon and the electrical resistance material of the heating element is a carbonaceous resistance material.
  • the wafer supporting heating element of claim 7 further characterized in that the shoulder is located in said recess so that the portion of the Wafer to receive the surface treatment thereon is substantially flush with the relatively flat wall of said heating element.
  • the wafer supporting heating element of claim 7 further characterized in that the shoulder is located in said recess so that said wafer extends partially into said recess and that the portion of the wafer to receive the surface treatment thereon extends above the relatively fiat wall of said heating element.
  • the wafer supporting heating element of claim 1 further characterized in that sleeve supporting means is provided for removable insertion into said recess for supporting a Wafer of smaller size than said recess.
  • the method of providing an epitaxial coating to a wafer in an atmosphere suflicient to cause epitaxial deposition of an epitaxial layer on said wafer comprising supporting the wafer over a recess on a heating element so that only a small portion of the bottom wall of said wafer around the periphery thereof contacts the heating element, maintaining the wafer in such position so that its bottom wall is substantially insulated from the atmosphere in which epitaxial deposition occurs, raising the heating element to the desired reaction temperature and bringing the material forming the epitaxial layer into contact with the exposed surface of said wafer so that the epitaxial layer is deposited thereon.
  • the method of claim 12 further characterized in that the method includes locating the wafer so that the bottom wall of the wafer is substantially flush with the surface of the heating element.
  • the method of claim 12 further characterized in that the method includes locating the wafer so that the exposed surface of the wafer is substantially fiush with the surface of the heating element.
  • the method of claim 12 further characterized in that the method includes locating the wafer so that the bottom wall thereof is below the surface of the heating element and the exposed surface extends above the surface of the heating element.
  • the method of providing an epitaxial coating to a wafer in an atmosphere sufiicient to cause epitaxial deposition of an epitaxial layer on said wafer comprising supporting the wafer over a recess on a substantially vertically positioned heating element so that only a small portion of the bottom wall of said wafer around the periphery thereof contacts the heating element, maintaining the wafer in such substantially vertical position so that its bottom wall is substantially insulated from the atmosphere in which epitaxial deposition occurs, raising the heating element to the desired reaction temperature and bringing the material forming the epitaxial layer into contact with the exposed surface of said wafer so that the epitaxial layer is deposited thereon.

Description

April 1969 :0. M. HARRIS ET AL 3,436,255
ELECTRIC RESISTANCE HEATERS Filed July 6. 1965 Sheet of 4 I lr lll l l lll mvemoas DARREL M. HARRlS FIG. 7 DONALD E. WESTHOFF ATTORNEY April 1969 D. M. HARRIS ET AL ELECTRIC RESISTANCE HEATERS Filed July 6. .1965
l!|"//////////IJ7///////////). 9
FIG. l3
INVENTORS DARREL M. HARRIS DONALD E. WESTHOFF ATTORNEY April 969 D. M. HARRIS ET AL ELECTRIC RESISTANCE HEATERS Sheet Filed July 6, 1965 FIG. l7
FIG
FIG. l9
F INVENTOR.
DAR REL M. HARRIS DONALD E. WESTHOFF ATTORNEY United States Patent 3,436,255 ELECTRIC RESISTANCE HEATERS Darrel M. Harris, Kirkwood, Mo., and Donald E. Westhoff, St. Louis, Mo., assignors to Monsanto Company,
St. Louis, Mo., a corporation of Delaware Filed July 6, 1965, Ser. No. 469,695 Int. Cl. 344d 1/18; C23c 13/00; B05c 7/02 US. Cl. 117-201 16 Claims ABSTRACT OF THE DISCLOSURE A heating element having a pair of longitudinally extending legs connected by a bight portion for supporting semiconductor materials in epitaxial deposition furnaces. The heating element is provided with a plurality of recesses, each of which is sized to support a semiconductor Wafer. The recess is slightly diametrally smaller than the wafer so that only the peripheral margin of the wafer bottom wall resides in contact with the upper surface of the heating element. In order to accommodate wafers of diametrally reduced sizes, a ring-type insert is provided for removable insertion into each of the recesses so that smaller diameter Wafers can be supported on the ring-type insert. Furthermore, the invention contemplates a number of embodiments where the wafer may be supported in such manner that its upper surface is parallel to the exterior surface of the heating element, where the upper surface is spaced slightly above the upper surface of the heating element and Where the wafer is located in supportive engagement with the upper surface of the heating element. In like manner, a vertically disposed heating element having the plurality of recesses is also provided.
This invention relates in general to certain new and useful improvements in heating devices, and more particularly to an improved method and apparatus used in the formation of single crystal semiconductor bodies having a plurality of layers of different conductivities.
In recent years, semiconductor devices such as silicon controlled rectifiers have found widespread use in the electronics industry. These semiconductor devices are made from semiconductor materials which may have a plurality of layers of semiconductor material having different conductivities and separated by a transition zone. Semiconductor materials of this type having at least two layers of different conductivities with a transition region therebetween are very suitable for use in the formation of electronic members such as diodes, transistors, switches and similar types of electronic structures. One very effective method of producing semiconductor materials is by the epitaxial deposition of silicon on a wafer formed of like material. Generally, the wafers involved must be formed of single crystal silicon with precisely controlled concentrations of doping impurities. These silicon wafers are then normally placed on a graphite heating element which is secured to the electrical contacts of an epitaxial silicon furnace, and are heated to a temperature where a monocrystalline silicon layer is grown on the wafer surface. One effective method of producing this silicon epitaxial layer on the silicon substrate is by the reduction of gaseous trichlorosilane. These wafers are then further processed by conventional methods and used in the manufacture of the above solid-state devices.
In recent years, it has become a common practice to employ resistance heating elements formed of graphite in these epitaxial silicon furnaces. The heating elements are generally U-shaped in horizontal cross section and consist of a pair of legs which are connected by a bight portion. The legs are generally provided with terminal 3,436,255 Patented Apr. 1, 1969 connectors at their free ends, that is the ends remote from the bight portion for ultimate connection to the electrical contacts of the deposition furnace. A suitable amount of electrical current is then passed through the heating element to heat the element to the desired reaction temperature.
To be suit-able for use in the subsequent manufacture of semiconductor elements, the wafers which receive an epitaxial coating on the bridges previously described, must have an unusually high degree of purity, However, heating elements of the type employed in epitaxial deposition operations are generally made of silicon or conducting ceramics such as graphite or other similar material which is capable of being heated by the passage of electrical current therethrough. However, heating elements of this type are rather porous and when subjected to high temperatures will emit considerable amounts of gas. The gas often reacts with the wafer disposed thereupon causing surface imperfections. Moreover, this emitted gas from the heating element tends to interfere with the reaction of the feed gases. An additional problem which arises is the fact that the gases which are expelled from the heating elements often carry impurities which maybe contained in the heating element and these impurities may subsequently be transferred to the wafers disposed thereon. In order to overcome these defetcts, there have been attempts to degas the heating element prior to actual use. This has been performed by heating the graphite heating element in an epitaxial furnace for a length of time which is equivalent to the time required to form a deposition coating on the Wafer. Additionally, this operation must be repeated at least five or six times to assure complete degassing of the heating element. This method not only results in unproductive lost time of the epitaxial deposition furnace, but consumes considerable labor cost as well. Furthermore, this method permits the heating element to reabsorb water vapor when exposed to the atmosphere.
In an attempt to overcome this problem, there have been various methods suggested for coating the heating element in order to eliminate these time consuming costly, degassing operations. Generally, the prior art has suggested several techniques for depositing a material on the surface of the heating element which is substantially similar to the material which will be deposited as an epitaxial layer on the wafer. Thus, if it is desired to deposit an epitaxial silicon coating on a silicon wafer, a silicon coating would first be deposited on the heating element. The wafers to be treated are then placed on the surface of the heating element which has been so coated.
The untreated heating elements generally have a rough and coarse outer surface. Moreover, a coating which was deposited on the surface of the heating element to prevent outgassing similarly presented a relatively rough and coarse surface. The same condition existed even if a number of coatings of a layer to prevent outgassing was deposited on the heating element. The material which is deposited on the heating element is generally formed by the reaction of gases which are fed into a reaction chamber in which the heating element is disposed. These gases react to form the desired material for deposition on the surface of the heating element. Inasmuch as elemental material, such as elemental silicon, is deposited on the surface of the heating element, a random deposition occurs and the surface thereof always tends to be rough and coarse.
Attempts to polish the surfaces of these heating elements have not been very effective. In the first place, scrubbing and polishing of the surface of the heating element tends to remove at least some ofthe deposited coating which is necessary to prevent the outgassing. Second- 1y, polishing of the surfaces of a heating element is a rather time-consuming and expensive operation. Nevertheless, it has been found that when wafers are deposited on a coarse surface, various internal strains are created in the wafer, particularly at high temperatures. In fact, microscopic examinations have revealed that an epitaxial coating deposited on a wafer has a surface contour similar to the surface of the heating element which is in supportive engagement with the base of the wafer. In many cases, this is an undesirable characteristic of the wafer for use in various types of semiconductor elements. Accordingly, it was necessary to subject the individual wafer to a post polishing operation. Inasmuch as this is a manual operation which requires a great amount of care, it is relatively time consuming and therefore, materially increased the cost of the final wafer.
It is, therefore, the primary object of the present invention to provide a heating element for epitaxial deposition furnaces and the like which are designed to support wafers in a manner where internal stresses are minimized.
It is another object of the present invention to provide a heating element of the type stated which can be conveniently and inexpensively modified for accommodation to the conditions of the particular epitaxial deposition furnaces.
It is a further object of the present invention to provide a heating element of the type stated for supporting semiconductor bodies which are to receive epitaxial layers with transition regions therebetween.
It is also an object of the present invention to provide heating elements of the type stated which are highly efficient and relatively inexpensive to manufacture.
It is an additional object of the present invention to provide a heating element of the type stated which provides a positive and satisfactory support for the semiconductor materials disposed thereon and which does not interfere with the epitaxial deposition operation.
With the above and other objects in view, our invention resides in the novel features of form, construction, arrangement, and combination of parts presently described and pointed out.
In the accompanying drawings (4) sheets:
FIGURE 1 is a perspective view of a heating element constructed in accordance with and embodying the present invention;
FIGURE 2 is a vertical fragmentary sectional view partially broken away taken along a longitudinal centerline passing through a leg of the heating element of FIG- UR-E 1 and showing a conventional wafer supported thereon;
FIGURE 3 is a perspective view of a wafer supporting plug which is optionally employed with the heating element of FIGURE 2;
FIGURE 4 is a vertical sectional view partially broken away and similar to the sectional view of FIGURE 2, showing a modified form of heating element constructed in accordance with and embodying the present invention;
FIGURE 5 is a perspective view of a wafer supporting plug which can be optionally employed with the heating element of FIGURE 4;
FIGURE 6 is a vertical sectional view taken along line 6--6 of FIGURE 5;
FIGURE 7 is a vertical sectional view similar to the view of FIGURE 4, and showing the heating element of FIGURE 4 with the supporting plug of FIGURE 5 operatively positioned therein, and a diametrally smaller wafer supported thereon;
FIGURE 8 is a vertical sectional view, partially bro-ken away, similar to the sectional view of FIGURE 2 showing another modified form of the heating element constructed in accordance with and embodying the present invention;
FIGURE 9 is a perspective view of a wafer supporting plug which can be optionally employed with the heating element of FIGURE 8;
FIGURE 10 is a vertical sectionalview similar to the view of FIGURE 8, and showing the heating element of FIGURE 8 with the supporting plug of FIGURE 9 0peratively positioned therein and a diametrally smaller wafer supported thereon;
FIGURE 11 is a front elevational view, partially broken away, of a vertically disposed heating element constructed in accordance with and embodying the pres ent invention;
FIGURE 12 is a fragmentary sectional view taken along line 12--12 of FIGURE 11;
FIGURE 13 is an enlarged end elevational view of a wafer supporting pin used in the heating element of FIGURE 11;
FIGURE 14 is a front elevational view, partially broken away, of a modified form of a vertically disposed heating element constructed in accordance with and embodying the present invention;
FIGURE 15 is a fragmentary sectional view taken along line 15-15 of FIGURE 10;
FIGURE 16 is an enlarged end elevational view of the center wafer supporting pin used in the heating element of FIGURE 14;
FIGURE 17 is a reproduction of an optical photomacrograph showing the epitaxial deposition surface on a wafer treated on a heating element of the present invention;
FIGURE 18 is a reproduction of an optical photomacrograph showing the epitaxial deposition surface on a wafer treated on a conventional heating element;
FIGURE 19 is a reproduction of an optical photomicrograph showing the interference fringe patterns of the epitaxial surface on the wafer of FIGURE 17; and
FIGURES 20, 21, and 22 are reproductions of optical photomicrographs showing interference fringe patterns of various surface imperfections in the epitaxial coating on the wafer of FIGURE 18.
GENERAL DESCRIPTION Generally speaking, the present invention relates to a device and a method for producing a plurality of uniform semiconductor bodies having a plurality of layers of semiconductor materials with different conductivities and where each of the layers is separated by a transition region. The various layers are preferably of a single crystal structure, and have different conductivities, either in type or in degree. The present invention contemplates the use of a recess at each Wafer position, where the recess is diametrally smaller than the wafer to be supported in each wafer position. The diametral size of the recess, however, is only slightly smaller than the diametral size of the wafer supported thereon so that only the outer peripheral margin of the bottom wall of the wafer contacts the surface of the heating element.
The present invention contemplates a number of embodiments of the heating element which can be used in the scope of the present invention. The first embodiment provides a recess at each wafer position where the wafer is disposed on the upper surface of the heating element and only the peripheral margin of the base of the wafer remains in supported engagement with the surface of the heating element. The second embodiment of the present invention provides a recess which is circumscribed with an upstanding wafer supporting shoulder. However, the shoulder itself is somewhat recessed from the surface of the heating element so that the bottom wall of the wafer is disposed slightly below the upper surface of the heating element. In this embodiment, the upper surface of the wafer, however, remains in a position Where it extends above the surface of the heating element. In another embodiment of the present invention, an upstanding wafer supporting shoulder also circumscribes the recess. The wafer is similarly supported on the upstanding shoulder. However, the upstanding shoulder is recessed sufficiently s th the pp r s rface of the wafer is coplanar th the surface of the heating element. The efliciency of the epitaxial operation is materially reduced when the upper surface of the wafer is disposed even slightly beneath the surface of the heating element. Therefore the wafer is always positioned so that its upper surface is at least coplanar with the surface of the heating element. It is recognized that when the upper surface of the wafer is disposed beneath the surface of the heating element, the wafer surface is not disposed in the reaction gas flow and consequently uneven deposition occurs on the surface of the wafer. The present invention also contemplates a heating element where the legs are designed to accommodate a single row of wafers, and larger heating elements where the legs are designed to accommodate a plurality of rows of wafers.
The foregoing process may be employed in the formation of semiconductor bodies of known semiconductor material, the only criterion being that a decomposable vapor source of the material is available. The terms thermally decomposable, thermal decomposition and the associated deposit of a product of decomposition as used herein are intended to be generic to the mechanism of the decomposition of various silicon containing gases such as trichlorosilane and the liberation of silicon atoms through the action of heat on such gases. These terms are also generic to and are included within the concept of the mechanisms of high temperature reactions where high temperature causes interaction between various materials with the liberation of specific materials or atoms.
DETAILED DESCRIPTION Referring now in more detail and by reference characters to the drawings which illustrate practical embodiments of the present invention, A designates a graphite heating element or so-called bridge which is designed to support semiconductor bodies of substantial area and planarity. The semiconductor bodies produced will have a plurality of layers of different conductivities with transition regions therebetween.
The heating element A is of the type described in copending application Ser. No. 415,363, filed Dec. 2, 1964, now US. Patent No. 3,351,742, which has a pair of horizontally disposed legs 1, 2 connected by a bight portion 3. The legs 1, 2 are provided with top and bottom faces 4, 5, interior faces 6 and exterior faces 7. The bridge A is of the double-taper type where the legs are tapered from each of its transverse ends in such manner that they have a slightly smaller cross sectional thickness at each of the ends than in the center portion thereof, when referring to the trasverse dimension of the legs. Thus, it can be seen that the thicknesses of each of the legs 1, 2 increases as the distance from the free ends thereof increases. The angle of taper of each of the legs 1, 2 is so adjusted so that a proper cross sectional area of each of the legs 1, 2 is maintained in order to provide a substantially constant uniform temperature distribution across each of the legs 1, 2. The bight portion 3 is slightly thicker in the transverse dimension, reference being made to FIGURE 1, than the overall thicknesses of the legs 1, 2. For heating elements having legs with an overall thickness of approximately 22 inches, the legs have an overall thickness of approximately 0.260 inch at the center portion and a thickness of approximately 0.215 inch at each of the ends. The bight portion 3 generally has an overall thickness of approximately 0.500 inch and a relative length of approximately 1% inches. The graphite heater A is similarly provided with a circular recess 8 at the point of connection of each of the two legs 1, 2 with the bight portion 3. The circular recess 8 has a diameter of approximately /2 inch and serves to create a substantially uniform temperature region across the width of the bight portion 3. In essence, the recess 8 forms a heat sink for heat dissipation in the region of high current density. In this manner, it can be seen that relatively even resistance characteristics are maintained throughout each of the legs 1, 2 and the bight portion 3 and therefore, it is possible to maintain a substantially uniform temperature distribution across the lengths of each of the legs. It has been found that this substantially increases the uniformity of epitaxial films deposited on the layers.
It is also possible to maintain uniform temperature characteristics throughout the lengths of each of the heater legs 1, 2 by selectively altering the cross sectional area in the manner also shown in my copending application Ser. No. 415,363, filed Dec. 2, 1964, and now Patent No. 3,351,742. In this method, it is necessary to measure the temperature produced at various selected portions along the length and width of the heater legs. This can be conveniently accomplished by attaching thermocouples to the heater and connecting the leads thereof to a suitable temperature readout device. An optical pyrometer may also be employed. After the temperature along the selected portions of the length of the heater legs has been recorded, the desired cross sectional area can be obtained by removing the required amount of this cross sectional area. This is conveniently accomplished by drilling small apertures which are sufficiently small so that they do not interfere with the internal strength of the heater, but yet are sufficient in number so that they sufficiently alter the cross sectional area of the legs to provide proper resistance characteristics.
The material of construction of the bridges B is not necessarily limited to graphite, inasmuch as the bridges B can be prepared from any electrically conductive material of high resistance which exhibits a characteristic of becoming heated due to the passage of electrical current therethrough. The bridges may be of material such as silicon, or conducting ceramics such as graphite or refractory metals such as tantalum, molybdenum, or titanium. One important criterion is that the bridge must be made of a material which does not contain impurity atoms, or at least does not interact with the system by introduction of impurity atoms.
The bridge may also be surface treated in the manner described in my copending application Ser. No. 423,066, filed Jan. 4, 1965. In this procedure, free silicon, which is produced by the reduction of gaseous trichlorosilane, is fused to the surface of the graphite heating element and reacts with the carbon atoms of the heating element to form a tightly adherent, substatnially permanent, gas impervious film. The graphite heating element is heated to a temperature where a portion of the silicon reacts with the carbon of the heating element to form a silicon carbide film and the remainder of the silicon, which becomes liquified, penetrates into the pores of the graphite and becomes fused to the graphite. It has also been found possible to deposit a silicon carbide coating on the surface of the bridge which is prepared by the simultaneous reduction of trichlorosilane and chloroform. Here again, the silicon carbide becomes bonded to the surface of the graphite heating element. As a preferred embodiment, it has been found to be very acceptable to produce alternating layers of silicon and silicon carbide and deposit these layers on the surface of the heating element, all in the manner as more fully described in said copending application Ser. No. 423,066, filed I an. 4, 1965.
Wafers w of semiconductor material are prepared in any suitable manner, as for example, slicing or cutting Wafers from commercially available zone refined single crystals of semiconductor material. Both of these methods are well known in the prior art. It is important that the wafers are cut in such a manner that the surface of the wafer to be treated is oriented in a specific crystallographic plane. Generally for the purposes of the present invention, it is preferred that the wafers are cut or sliced in such a manner so that they are oriented in a (l-l-1) plane on the Miller indices. Naturally, the surface of the wafer, which is to receive the epitaxial deposition film is carefully prepared by the generally accepted techniques of grinding, polishing, etching, and cleaning before the epitaxial deposition operation.
Each of the legs 1, 2 is provided with a plurality of longitudinally spaced wafer positions 9, which are located so that a wafer w in one wafer position 9 is spaced a slight distance from another wafer w located in the next adjacent wafer position 9. In this manner, the maximum amount of surface area of each leg 1, 2 of the bridge A is employed. Each wafer position 9 is provided with a recess 10, which is slightly smaller in diametral size than the diameter of the wafer w. Generally, the wafers w are circular in horizontal cross section and have an overall diametral size of approximately 1 /2 inches. Moreover, the wafers generally have a thickness of approximately 0.010 inch. Therefore, it is only necessary to form a recess 10 with an overall diametral size which is slightly less than 1 /2 inches. It has been found that the recess can be approximately 0.040 inch to 0.060 inch smaller than the overall diametral size of the wafer. The depth of the recess is not particularly critical. However, the minimum depth is 0.003 inch and the recess can be as deep as inch. The only critical limitation on the depth of the recess 10 is that it cannot be too deep to interfere with the resistance characteristics of the heating element or to materially weaken the internal strength of the heating element. However, it has been found that recesses which extend beyond A inch in depth tend to materially alter the cross sectional characteristics of the heating element and hence materially alter the resistance characteristics of the heating element. Alteration of these resistance characteristics tends to interfere with linear temperature distribution across the length of the legs 1, 2 and it is sometimes difiicult to compensate for these materially changed resistance characteristics. Therefore, it has been found desirable to form the recesses with a depth not exceeding inch.
It has been found by this type of construction, that the upper surface of the wafer w does not pick up the surface imperfections of the heating element A. Prior to this supporting of the wafer in a position above the surface of the heating element, or at least any position where it does not contact the surface of the heating element, imperfections in the surface of the heating element would tend to create strains in the wafer w. The various crystal points or imperfections which are relatively small on the bridge surface area tend to engage the underside of the wafer w and this engagement by a relatively small number of points on the surface of the bridge accounts for the support of the entire wafer. Accordingly, the strains were often sufiicient to create an epitaxial coating on the upper surface of the wafer w which was substantially identical to the surface contour of the heating element which is in supportive engagement with the base of the Wafer.
In the semiconductor industry, there are large requirerments for wafers which have overall diametral sizes of no greater than 1 inch. Accordingly, such wafers could not be treated on a bridge with a recess having an overall diametral size of slightly less than 1 /2 inches. The recess 10 is therefore provided with a cylindrical washer, sleeve or so-called plug 11 which has a circumferentially extending side wall 12 and a central aperture 13, the latter of which is approximately 0.040 inch to 0.060 inch smaller than the overall diameter of the wafer to be supported in the wafer position 9. The plug 11 is sized to snugly fit within the recess 10 and to snugly engage the annular wall of the recess 10 so that there is in effect a continuation of electrically resistive material, whereby the plug 11 will also be substantially heated in the same manner as the heating element A. The plug 11 has an overall height which is substantially equal to the height of the recess 10 so that it fits snugly therein in the manner as shown in FIGURE 2. It should be understood in this connection, that a number of plugs 11 can be employed so that the heating element A can be used when treating wafers of different diametral sizes. The plug 11 is preferably though not necessarily constructed of the same electrically resistive material as the heating element A. In the case of the present invention, for example, if the heating element is constructed of a graphite material then the plug 11 is preferably formed of a similar graphite material. However, it should be recognized that it is not absolutely necessary to form the plug of the same material as the heating element. The plug may be formed of any electrically conductive material of high resistance which exhibits a characteristic of becoming heated due to the passage of electrical current therethrough and may be formed of any of the materials used in the formation of the heating element.
The plug 11 is similarly surface treated in the same manner as the overall heating element A so that it similarly has a protective coating on the upper surface thereof. Moreover, when altering the cross sectional area of the heating element A along selective portions of the length thereof, the plug 11 is disposed within the recess 10 in order to measure the original resistance characteristics and to account for the characteristics created by the presence of the plug 11. It should be observed that the plug 11 is easily removable from the recess 10'. A simple element such as a knife blade can be inserted under the bottom wall of the plug 11 for urging the same upwardly and for ultimate dislodgement from the recess 10.
It is possible to provide a modified form of heating element B substantially as shown in FIGURE 4 and which is substantially identical to the previously described heating element A. The heating element B is similarly provided with a plurality of longitudinally spaced wafer positions 14 on each of its legs and which are located so that a wafer w in one wafer position is spaced a slight distance from the wafer w located in the next adjacent wafer position 14. Each of the wafer positions 14 is provided with recesses 15 which again are slightly smaller in diametral size than the overall diameter of the wafer w. Each recess 15 is internally provided with a step or large relatively flat wafer supporting shoulder 16, substantially as shown in FIGURE 4. By further reference to FIGURE 4, it can be seen that the recess 15' is formed by a bottom wall 17 and annular side wall 18 the latter of which has an overall height within the range of 0.003 inch to approximately 4 inch. As indicated, the overall diametral size of the bottom wall 17 is slightly less than the overall diametral size of the wafer w. The supporting shoulder 16 has an overall diametral size which is substantially equal to the diametral size of the wafer w. Where the wafer w is approximately 1 /2 inches in horizontal cross section, the peripheral margin of the shoulder 16 measures approximately 1 /2 inches. It can be seen that the shoulder 16 is recessed from the surface of the heating element B by a distance of approximately 0.005 inch to 0.050 inch. In the embodiment of the heating element B it is desirable to have the supporting shoulder 16 slightly recessed from the surface of the heating element B. In this manner, if vibration occurs during the operation of the epitaxial deposition furnace, the wafers w will not be vibrated so that they are shaken off of the heating element B. Moreover, in many applications it is desirable to have the wafer a recessed slightly in order to provide an epitaxial depositron of smaller thickness on the side wall of the wafer w. The shoulder 16 integrally merges into an upstanding side wall 19, substantially as shown in FIGURE 3.
It is possible to use a plug 20, substantially as shown in FIGURES 5 and 6 to accommodate wafers w having an overall diameter of less than 1 /2 inches on the heating element B. The plug 20 is similarly formed of the same material employed in the construction of the heating element B and generally consists of a sleeve having an annular wall 21 with a central aperture 22. The central aperture 22 is formed by an internal annular wall 23, which integrally merges at its upper end into a horizontal supporting shoulder or step 24. The aperture 22 is slightly smaller in diametral cross section than the overall diametral size of the wafer w to be supported on the shoulder 24. Moreover, the diametral size of the shoulder 24 is substantially equal to the overall diametral size of the wafer w supported thereon. The shoulder 24 integrally merges into an upstanding annular wall 25, the height of which is substantially less than the overall thickness of the wafer w, so that the wafer w is supported in a position substantially as shown in FIGURE 7, when the plug 20 is employed. The plug 20 is also provided with an annular notch 26, having a horizontal wall 27 and a vertical wall 28. By reference to FIGURES 5, 6 and 7, it can be seen that the horizontal wall 27 engages the shoulder 16 and the vertical wall 28 engages the annular wall 18, when the plug 20 is disposed within the recess 15. It should also be understood that the plug 20 is sized so that it snugly fits within the recess 15 and thereby forms a continuation of the heating element B. Moreover, it can be seen that the plug 20 is easily removable from the recess 15 when it is desired to use the larger wafer w. It should also be understood that the plug 20 is similarly surface treated in the same manner as the remainder of the heating element B. It should be understood in this connection that a number of plugs 20 can be employed so that the heating element B can be used when treating wafers of different diametral size.
It is possible to provide a modified form of heating element C substantially as shown in FIGURE 8 and which s substantially similar to the previously described heatmg elements A and B. The heating element C is similarly provided with a plurality of longitudinally spaced wafer positions 29 which are located so that a Wafer w in one wafer position is spaced a slight distance from another wafer w located in the next adjacent wafer position 29. Each wafer position 29 is provided with a recess 30 which is substantially identical to the recess 15 in the heating element B and which is slightly smaller in diametral size than the overall diameter of the wafer w to be supported therein. Again in the case of the heating element C, the overall diameter of the recess 30 is approximately 0.040 to 0.060 inch smaller than the over all diametral size of the wafer w supported therein. The recess 30 is similarly provided with an upstanding shoulder or step 31 which remains in supportive engagement with the bottom wall of the wafer w, substantially ass hown in FIGURE 8. The outer peripheral margin of the shoulder 31 is substantially equal to the size of the peripheral margin formed by the bottom wall of the wafer w. The recess 30 is formed by a bottom wall 32 and an annular side wall 33, the latter of which approximately 0.003 inch to 0.25 inch in height. The overall size of the shoulder 31 is approximately 0.020 to 0.030 inch. However, the shoulder 31 is recessed from the surface of the heating element C by a distance which is equal to the overall thickness of the wafer w so that when the wafer w is supported on the shoulder 31, the upper surface of the wafer w is substantially coplanar with the upper surface of the heating element C. In this manner, the heating element C can receive an epitaxial deposition coating where only the upper surface of the wafer w is coated. However, it should be understood in connection with the present invention that the supporting shoulder 31 can never be located at a distance below the surface of the heating element C so that the upper surface of the wafer w is disposed below the surface of the heating element C. It has been found that when the upper surface of the wafer w is disposed beneath the upper surface of the heating element C, an uneven epitaxial deposition coating is formed thereon.
The heating element C is capable of accommodating a plug 34, which is substantially identical to the previously described plug 20 used in the heating element B. The plug 34 has the same cross sectional shape and fits snugly within the recess 30 in the same manner as the plug 20 was snugly fitted within the recess 15. However, it
should be noted that the annular side wall 25 in the plug 34 is substantially equal to the overall thickness of the wafer w, so that the upper surface of the wafer w is substantially coplanar to the surface of the heating element C, when supported on the supporting shoulder 24.
It is possible to provide a modified form of heating element D substantially as shown in FIGURES ll-13 and which is designed to be mounted in a vertical or substantially vertical position. The heating element D is somewhat similar to the heating element described in copending application Ser. No. 475,106, filed July 27, 1965, and now Patent No. 3,391,270 which relates to vertically disposed heating elements used in apparatus for the formation of single crystal semiconductor bodies having a plurality of layers of different conductivities.
The heating element D has a pair of vertically disposed legs 35, 36 which are connected by a horizontally disposed bight portion 37. The bridge D is of the doubletaper type where the legs are tapered from its upper and lower ends, in such manner that they have a slightly smaller cross sectional thickness at the upper and lower ends than in the center portion thereof, when referring to the transverse dimension of the legs. Thus it can be seen that the thickness of each of the legs increase as the distance from the free ends thereof increases. The angle of taper of each of the legs is so adjusted that a cross sectional area of each of the legs 35, 36 is maintained in order to provide a substantially constant uniform temperature distribution across each of the legs 35, 36. The bight portion 37 is slightly thicker in the transverse dimension, reference being made to FIGURE 11 than the overall thicknesses of the legs 35, 36. For heaters having legs with an overall height of approximately 22 inches, the legs have an overall thickness of approximately 0.260 inch at the center portion and a thickness of approximately 0.215 inch at each of the upper and low ends. The bight portion 37 has an overall thickness of approximately 0.500 inch and a relative height of approximately 1% inches. The heater D is also provided with a circular recess 38 at the point of connection of each of the two legs 35, 36 with the bight portion 37. The circular recess 38 has a diameter of approximately /2 inch and serves to create a substantially uniform temperature region across the width of the bight portion 37. In essence, the recess 38 forms a heat sink for heat dissipation in the region of high current density. The bridge D may also be surface treated in the manner described in copending application Ser. No. 423,066, filed Jan. 4, 1965, where a combination of silicon and silicon carbide layers is deposited on the bridge to prevent outgassing thereof.
Each of the legs 35, 36 is provided with a plurality of vertically spaced wafer positions 39, which are located so that a wafer w in one wafer position 39 is spaced a slight distance from another wafer w located in the next adjacent wafer position 39. In this manner, a maximum amount of surface area of each leg of the bridge D is employed. Moreover, each side of the legs 35, 36 is provided with marginally registered wafer positions. Each of the wafers w is engaged slightly below its horizontal diameter by a pair of retaining pins 40, which extend transversely through the legs so that they form projected ends 41 on each side of the legs 35, 36. The retaining pins are located along the periphery of the wafer position at an angle of preferably about 20 to 30 below the horizontal centerline of the wafer position. In this manner, one pair of pins 40 is capable of engaging the wafers w which are horizontally aligned on opposite sides of each of the legs 35, 36. Thus, it is possible to employ both surfaces of the heating element to use the maximum surface area vailable on each leg of the bridge D. The pins 40 preferably have a diameter of about 0.060 inch and the termial ends thereof extend beyond the surface of the bridge D for a distance between 0.015 inch to 0.030 inch depending upon the relative thickness of the particular wafers to be used on the bridge D. Each of the extended ends 41 is provided with notches 42 which are defined by a base wall 43 and which is coplanar with the surface of the legs 35, 36. The extended ends 41 are further provided with inwardly tapering side walls 44 which are sized to engage the peripheral margin of each of the wafers w in the manner as shown in FIGURE 12. Thus, it can be seen that since the pins are located beneath the horizontal diameter of each of the wafers w, they will engage the wafers w so that they can be retained when the bridge D is disposed in a substantially vertical position.
Each of the wafer positions 39 is provided with circular recesses 45, the diameter of which is slightly less than the overall diameter of the wafer w to be positioned in the wafer position 39. The overall diameter of the recess 45 is approximately 0.040 to 0.060 inch smaller than the diameter of the wafer w to be disposed on the wafer position 39. Moreover, the recess 45 is approximately 0.003 inch to /8 inch deep. The depth of the recess 45 is not critical so long as it is at least 0.003 inch deep,. However, the recess 45 must not be deep enough to interfere with the internal strength of the bridge D and moreover, must not materially interfere with the resistance characteristics of the bridge D. It has been found that through the above construction, the maximum surface area of the bridge D is employed in each operation and moreover, the epitaxial coating deposited on the wafers w which are retained on the bridge D do not have the tendency to acquire the surface contour of the bridge D. Accordingly, the bridge D is capable of taking advantage of the vertical disposition and employment of maximum surface area and also taking advantage of the recesses which prevent creation of internal strains within the wafers w.
It is possible to provide a modified form of heating element E which is constructed in accordance with and embodies the present invention, substantially as shown in FIGURES 14-16. The heating element E is substantially similar to the heating element D and comprises legs 46, 47, which are connected by a bight portion 48. The legs 46, 47 are sufficiently wide so that each leg is capable of accommodating at least two rows of wafer w. In this connection it can be seen that each of the legs 46, 47 is provided with two rows of vertically extending wafer positions 49. The bridge E may have its cross sectional thickness altered in order to obtain the desired resistance characteristics and hence uniform temperature distribution across the length of each of the legs 46, 47. Moreover, the bridge E may be surface coated in the manner as described in connection with the surface coating of the bridge D.
In this embodiment the inner wafer positions 49 have an inner Wafer in 50 located slightly below the horizontal diameter of the wafer position 49, and the outer wafer positions have a pin 51 located slightly below the horizontal diameter of the wafer position 49. The pins 50, 51 are substantially identical to the previously described pins 40 and moreover, the pins 50, 51 are located along the periphery of the wafer position 49 at an angle of preferably approximately 20 to 30 below the horizontal centerline of the wafer position 49. The outer and inner wafer positions 49 share a common pin 52, which is located approximately at the horizontal diameter of each of the wafer positions 49, substantially as shown in FIGURE 14. The pin 52 is so located that the upper peripheral margin thereof is tangential to the horizontal centerline passing through the wafer positions 49. Each of the pins 50, 51 is also provided with notches 53 which are identical to the notches formed within the pin 40. Moreover, the pins 50, 51 have extended ends which extend on both sides of the bridge surface so that each leg of the bridge is capable of accommodating two rows of marginally aligned wafers on the oppositely presented surfaces thereof. The center pin 52 is provided with a pair of opposed notches 54, 55 on each of the transverse sides of the extended ends, which are located on opposite surfaces of the bridge E. Thus,
12 each of the notches 54, 55 is provided with base walls 56, 57, which are coplanar with the surfaces of the legs 46, 47 and side walls 58, 59 which are angularly disposed with respect to the base walls 56, 57 and taper inwardly so that a notch having an acute angle is formed in the manner as shown in FIGURE 16.
It is desirable to locate each of the pins 50, 51 and 52 and the pins 40 in the bridge D as close to the horizontal diameter of each of the wafer positions as possible. However, in the bridge D, the pins 40 were disposed slightly beneath the horizontal diameter of the Wafer w to support the wafer w. In the case of the bridge E, the center pin 52, which is common to both wafer positions can be placed approximately at the horizontal diameter of the wafer positions inasmuch as each of the wafer positions has one pin 50, 51 located slightly below the horizontal diameter thereof.
Each of the wafer positions 49 is similarly provided with circular recesses 60 which are slightly smaller than the overall diametral size of the wafer w to be supported in the wafer position. The recess 60 is approximately 0.040 to 0.060 inch smaller than the wafer w which is supported thereon. The recesses 60 may be at least 0.003 inch deep. The maximum depth of the recess 60 is not critical, but should not extend beyond A; of an inch in order to prevent any interference with the internal strength of the bridge E and moreover, should not interfere with the resistance characteristics of the bridge. Thus, it can be seen that in each of the bridges D and B, only the outer peripheral margin of the base of the wafer w remains in contact with the flat surfaces of the bridges. Thus, it has been found that by this type of construction the upper surface of the wafers w do not pick up the surface imperfections of the heating elements D and E.
It should be appreciated that by following the teachings of this invention, it is possible to form semiconductor bodies having a plurality of layers of differing conductivities. Moreover, the width of each of the layers may be precisely controlled by generally accepted techniques. This allows the transition region or junction to be accurately positioned in the semiconductor body. Moreover, it is also possible to-provide in any layer formed, any variation in conductivity desired in a plane which is parallel to the transition region by varying the concentration of vapor source of the active impurity atoms in the flow.
It can also be seen that any desired type of semiconductor device may be made by utilizing the methods and the apparatus of the present invention. In each case, the semiconductor device will have at least two layers of semiconductor material with different conductivities and each of the layers being separated by a transition region. In some instances, the transition region will be a P-N junction, where in other cases, it may be a P-I or an N-I junction. In some cases as desired, there may be a sharp transition region between layers of high and low resistivity material of the same conductivity type. It should also be appreciated that the invention may be employed in the formation of semiconductor bodies having a plurality of layers of semiconductor material of differing conductivities separated by a transition region. It should be understood that each of the layers may be the same semiconductor material and other than silicon, for example, silicon carbide, various group 3-5 compounds, such as gallium arsenide, indium antimonide, gallium phosphide, and similar types of material. Naturally, the individual layers of these latter groups of compounds may be formed f different semiconductor materials. It is, however, important that essentially single crystal growth is maintained and hence, strong consideration must be given when depositing layers of dissimilar material to the crystallography of the layer on which the growth occurs in order to preserve the single crystal characteristics to the greatest degree possible.
The reproduction of optical photomacrographs of FIG- URES 17 and 18 show a comparison of wafers which received an epitaxial deposition coating on the heating elements which were not provided with recesses and heating elements and wafers which received an epitaxial coating on heating elements of the present invention, respectively. In FIGURE 18, where the wafer received a coating on the conventional type of heating element, it can be seen that surface imperfections are present. On the other hand, the photograph of the wafer in FIGURE 17, which was surface treated on a heating element of the type described in the present invention has a substantially clear epitaxial coating which is not marred by pinhole-like recesses. These pinhole-like recesses can sometimes reach dimensions of as much as 19, inch diameter. The photomacrographs of FIGURES 17 and 18 were taken at approximately a distance of 2 inches from the lens of the camera. Each of the wafers were supported on a pedestal and shifted so that the sample would obtain a shade pattern. Accordingly, a shaded light source had to be employed since the shade pattern was needed to show the imperfections. When referring to FIGURE 18, only a few imperfections are shown along the interface of the shaded por tion and the lighted portion of the wafer. However, a close surface examination of this type of wafer reveals that the entire wafer contains as many as 40 to 50 pinhole-like recesses of the type shown.
The wafer illustrated in the photograph of FIGURE 18 was supported on a conventional type of heating element and was purged in nitrogen for approximately ten minutes in a conventional bell jar. Thereafter, the heating element was purged in hydrogen for approximately 20 minutes. In this particular epitaxial silicon furnace, base plate water was supplied for cooling the ends of the heating element retained in the clamps. Thereafter, trichlorosilane was fed to the reactor for approximately 30 minutes. Hydrogen was also maintained in a quantity sufiicient to produce a silicon coating. The power supplied to the heating element was approximately 1240 to 1275 amps, and the voltage was maintained at 26.0 to 26.9 volts. After the wafer had received the desired coating, the heat was discontinued and the chamber purged with hydrogen for approximately ten minutes. Thereafter, the chamber was purged with nitrogen for approximately minutes and the heating element removed. A substantially identical procedure was employed in the case of the wafer illustrated in FIGURE 17 which was supported on the heating element of the present invention.
FIGURE 19 is a reproduction of a photomicrograph of a surface pattern taken on the wafer of FIGURE 17 to show the substantially smooth surface produced by the process and apparatus of the present invention. This photomicrograph is a fringe pattern obtained from a Leitz light wave surface tester. Measurements were made with a monocromatic light so that scratches or imperfections on the surface will disrupt the interference pattern which shows the generally parallel fringes on a smooth surface. The amount of deviation obtained is a measurement of the surface imperfection depth. The depth is a function of the deviation of the fringes expressed in fractions of the fringe spacing with a half wave length of light employed. The surface tester provides light in 0.000022 inch in wave length. Therefore, the distance between the fringes which represents a half of a wave length amounts to approximately 0.000011 inch. Therefore, the depth of an imperfection in the surface is equal to the distance between the fringes times the quantity 1.1 FIGURES 20, 21 and 22 are optical photomicrographs of various imperfections taken in the sample of FIGURE 18. These optical photomicrographs illustrate the fringe patterns which are obtained as a result of the irregularity in the surface. When comparing any of FIGURES 20, 21 and 22 with FIGURE 19, it can be seen that the heating element of the present invention produces substantially improved results.
Having thus described our invention, what we desire to claim and secure by Letters Patent is:
1. A wafer supporting heating element for epitaxial deposition furnaces and the like and being sized to retain wafers which are to receive surface treatment thereon, said wafer supporting element having a relatively flat wall, at least one wafer position formed on said relatively fiat wall, said wafer position defining a recess formed by a sidewall and an outwardly facing wall, shoulder forming means operatively associated with said recess for supporting said wafer with respect to the outwardly facing wall of said wafer supporting element, said wafer having a relatively flat bottom wall of such size so that only a small portion of the bottom wall around the periphery thereof resides in contact with the shoulder forming means and the major surface area of said bottom wall of the wafer is slightly spaced from the outwardly facing wall of said recess.
2. A wafer supporting heating element for epitaxial deposition furnaces and the like and being sized to retain wafers which are to receive surface treatment thereon, wafer supporting element having a relatively flat wall, at least one wafer position formed on said relatively flat wall, said wafer position defining a recess formed by a side wall and an outwardly facing wall, said side Wall having a peripheral size which is smaller than the peripheral size of said wafer, said wafer having a relatively flat bottom wall which is slightly larger than the recess so that only a small portion of the bottom wall around the periphery thereof resides in contact with the wafer supporting element and the major surface area of said bottom wall of the wafer is slightly spaced from the outwardly facing wall of said recess.
3. The wafer supporting heating element of claim 1 further characterized in that said heating element is provided with a plurality of wafer positions and each of said positions having a recess therein.
4. The Wafer supporting heating element of claim 1 further characterized in that said heating element is formed of an electrical resistance material so that it is capable of being heated by passage of electrical current therethrough.
5. The wafer supporting heating element of claim 3 further characterized in that the surface treatment is an epitaxial coating.
6. The wafer supporting heating element of claim 4 further characterized in that the wafers are silicon Wafers for receiving an epitaxial silicon coating thereon and the electrical resistance material of the heating element is a carbonaceous resistance material.
7. A wafer supporting heating element for epitaxial deposition furnaces and the like and being sized to retain wafers which are to receive surface treatment thereon, said wafer supporting element having a relatively fiat wall, at least one wafer position formed on said relatively flat wall, said wafer position defining a recess formed by a side wall and an outwardly facing wall, a wafer supporting shoulder formed in said recess, said side wall having a peripheral size which is sufiicient with respect to the peripheral size of said wafer to accommodate said wafer, said wafer having a bottom wall which is slightly larger than said shoulder so that only a small portion of the bottom wall around the periphery thereof resides in contact with the shoulder and the major surface area of said bottom wall of the wafer is slightly spaced from the outwardly facing wall of said recess.
8. The wafer supporting heating element of claim 7 further characterized in that the shoulder is located in said recess so that the portion of the Wafer to receive the surface treatment thereon is substantially flush with the relatively flat wall of said heating element.
9. The wafer supporting heating element of claim 7 further characterized in that the shoulder is located in said recess so that said wafer extends partially into said recess and that the portion of the wafer to receive the surface treatment thereon extends above the relatively fiat wall of said heating element.
10. A substantially vertically positioned wafer supporting heating element for epitaxial deposition furnaces and the like and being sized to retain wafers which are to receive surface treatment thereon, said wafer supporting element having a relatively fiat wall, at least one wafer position formed on said relatively fiat wall, said Wafer position defining a recess formed by a side wall and an outwardly facing wall, shoulder forming means operatively associated with said recess for supporting said wafer with respect to said wafer supporting element, said wafer having a bottom wall of such size so that only a small portion of the bottom wall around the periphery thereof resides in contact with the shoulder forming means and the major surface area of said bottom wall of the wafer is slightly spaced from the outwardly facing wall of said recess, and means on said wafer supporting element located at each wafer position for holding each of said wafers in a substantially vertical position.
11. The wafer supporting heating element of claim 1 further characterized in that sleeve supporting means is provided for removable insertion into said recess for supporting a Wafer of smaller size than said recess.
12. The method of providing an epitaxial coating to a wafer in an atmosphere suflicient to cause epitaxial deposition of an epitaxial layer on said wafer, said method comprising supporting the wafer over a recess on a heating element so that only a small portion of the bottom wall of said wafer around the periphery thereof contacts the heating element, maintaining the wafer in such position so that its bottom wall is substantially insulated from the atmosphere in which epitaxial deposition occurs, raising the heating element to the desired reaction temperature and bringing the material forming the epitaxial layer into contact with the exposed surface of said wafer so that the epitaxial layer is deposited thereon.
13. The method of claim 12 further characterized in that the method includes locating the wafer so that the bottom wall of the wafer is substantially flush with the surface of the heating element.
14. The method of claim 12 further characterized in that the method includes locating the wafer so that the exposed surface of the wafer is substantially fiush with the surface of the heating element.
15. The method of claim 12 further characterized in that the method includes locating the wafer so that the bottom wall thereof is below the surface of the heating element and the exposed surface extends above the surface of the heating element.
16. The method of providing an epitaxial coating to a wafer in an atmosphere sufiicient to cause epitaxial deposition of an epitaxial layer on said wafer, said method comprising supporting the wafer over a recess on a substantially vertically positioned heating element so that only a small portion of the bottom wall of said wafer around the periphery thereof contacts the heating element, maintaining the wafer in such substantially vertical position so that its bottom wall is substantially insulated from the atmosphere in which epitaxial deposition occurs, raising the heating element to the desired reaction temperature and bringing the material forming the epitaxial layer into contact with the exposed surface of said wafer so that the epitaxial layer is deposited thereon.
References Cited UNITED STATES PATENTS 2,420,724 5/ 1947 Rice 117-106 XR 2,453,141 11/1948 Lange 118-49 XR 2,456,708 12/ 1948 Kellogg 117106 XR 2,532,971 12/1950 Leer et al 117106 3,151,006 9/1964 Grabmaier et a1. 1l7-106 XR 3,164,489 1/1965 Timper 117 -228 XR 3,329,527 7/ 1967 Harris 117228 3,351,742 11/1967 Harris 219-552 FOREIGN PATENTS 1,379,897 10/ 1964 France.
WILLIAM L. JARVIS, Primary Examiner.
US. Cl. X.R.
US469695A 1965-07-06 1965-07-06 Electric resistance heaters Expired - Lifetime US3436255A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US46969565A 1965-07-06 1965-07-06

Publications (1)

Publication Number Publication Date
US3436255A true US3436255A (en) 1969-04-01

Family

ID=23864747

Family Applications (1)

Application Number Title Priority Date Filing Date
US469695A Expired - Lifetime US3436255A (en) 1965-07-06 1965-07-06 Electric resistance heaters

Country Status (2)

Country Link
US (1) US3436255A (en)
GB (1) GB1157421A (en)

Cited By (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3539759A (en) * 1968-11-08 1970-11-10 Ibm Susceptor structure in silicon epitaxy
US3573429A (en) * 1969-01-08 1971-04-06 Mc Donnell Douglas Corp Heating device
US3783822A (en) * 1972-05-10 1974-01-08 J Wollam Apparatus for use in deposition of films from a vapor phase
US3862020A (en) * 1970-12-07 1975-01-21 Dow Corning Production method for polycrystalline semiconductor bodies
US3950479A (en) * 1969-04-02 1976-04-13 Siemens Aktiengesellschaft Method of producing hollow semiconductor bodies
US4113547A (en) * 1976-10-05 1978-09-12 Bell Telephone Laboratories, Incorporated Formation of epitaxial layers on substrate wafers utilizing an inert heat radiation ring to promote uniform heating
US4168998A (en) * 1978-12-06 1979-09-25 Mitsubishi Monsanto Chemical Co. Process for manufacturing a vapor phase epitaxial wafer of compound semiconductor without causing breaking of wafer by utilizing a pre-coating of carbonaceous powder
US4512825A (en) * 1983-04-12 1985-04-23 The United States Of America As Represented By The Secretary Of The Navy Recovery of fragile layers produced on substrates by chemical vapor deposition
EP0160220A1 (en) * 1984-04-02 1985-11-06 International Business Machines Corporation Plasma etching apparatus
US4587928A (en) * 1975-12-24 1986-05-13 Tokyo Shibaura Electric Co., Ltd. Apparatus for producing a semiconductor device
EP0235731A1 (en) * 1986-02-26 1987-09-09 BASF Aktiengesellschaft Device for supporting work pieces on substrate holders
US4714594A (en) * 1984-06-27 1987-12-22 Mircea Andrei S Reactor for vapor phase epitaxy
US4777022A (en) * 1984-08-28 1988-10-11 Stephen I. Boldish Epitaxial heater apparatus and process
US4780174A (en) * 1986-12-05 1988-10-25 Lan Shan Ming Dislocation-free epitaxial growth in radio-frequency heating reactor
US5233163A (en) * 1990-07-05 1993-08-03 Fujitsu Limited Graphite columnar heating body for semiconductor wafer heating
US5242501A (en) * 1982-09-10 1993-09-07 Lam Research Corporation Susceptor in chemical vapor deposition reactors
US5584936A (en) * 1995-12-14 1996-12-17 Cvd, Incorporated Susceptor for semiconductor wafer processing
US5609691A (en) * 1994-11-29 1997-03-11 Nec Corporation Plasma CVD apparatus for forming a thin film of uniform thickness
US5837058A (en) * 1996-07-12 1998-11-17 Applied Materials, Inc. High temperature susceptor
US5951774A (en) * 1995-01-27 1999-09-14 Nec Corporation Cold-wall operated vapor-phase growth system
WO1999050473A1 (en) * 1998-04-01 1999-10-07 Applied Materials, Inc. Multi-ledge substrate support for a thermal processing chamber
US6217662B1 (en) 1997-03-24 2001-04-17 Cree, Inc. Susceptor designs for silicon carbide thin films
US20040187790A1 (en) * 2002-12-30 2004-09-30 Osram Opto Semiconductors Gmbh Substrate holder
US20060035449A1 (en) * 2004-08-10 2006-02-16 Yoo Woo S Method of forming ultra shallow junctions
US20060194059A1 (en) * 2005-02-25 2006-08-31 Honeywell International Inc. Annular furnace spacers and method of using same
US20070023869A1 (en) * 2005-07-29 2007-02-01 Nuflare Technology, Inc. Vapor phase deposition apparatus and vapor phase deposition method
US20120270407A1 (en) * 2011-04-19 2012-10-25 Siltronic Ag Susceptor for supporting a semiconductor wafer and method for depositing a layer on a front side of a semiconductor wafer
US20170278681A1 (en) * 2016-03-25 2017-09-28 Lam Research Corporation Carrier ring wall for reduction of back-diffusion of reactive species and suppression of local parasitic plasma ignition
US20220238363A1 (en) * 2021-01-26 2022-07-28 Enkris Semiconductor, Inc. Graphite Plate

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58182819A (en) * 1982-04-20 1983-10-25 Toshiba Corp Heating base

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2420724A (en) * 1944-09-21 1947-05-20 Bausch & Lomb Method of depositing films of material
US2453141A (en) * 1945-08-07 1948-11-09 Lange Werner Holding fixture for coating optical elements
US2456708A (en) * 1944-05-01 1948-12-21 Rca Corp Apparatus for improving the durability of optical coatings
US2532971A (en) * 1947-04-12 1950-12-05 Pacific Universal Products Cor Method and apparatus for producing optical coatings
US3151006A (en) * 1960-02-12 1964-09-29 Siemens Ag Use of a highly pure semiconductor carrier material in a vapor deposition process
FR1379897A (en) * 1963-12-11 1964-11-27 Int Rectifier Corp heating element for epitaxial deposition of semiconductors
US3164489A (en) * 1961-12-26 1965-01-05 Lear Siegler Inc Silicon impregnated graphite part and process for producing same
US3329527A (en) * 1963-09-13 1967-07-04 Monsanto Co Graphite heating elements and method of conditioning the heating surfaces thereof
US3351742A (en) * 1964-12-02 1967-11-07 Monsanto Co Electric resistance heaters

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2456708A (en) * 1944-05-01 1948-12-21 Rca Corp Apparatus for improving the durability of optical coatings
US2420724A (en) * 1944-09-21 1947-05-20 Bausch & Lomb Method of depositing films of material
US2453141A (en) * 1945-08-07 1948-11-09 Lange Werner Holding fixture for coating optical elements
US2532971A (en) * 1947-04-12 1950-12-05 Pacific Universal Products Cor Method and apparatus for producing optical coatings
US3151006A (en) * 1960-02-12 1964-09-29 Siemens Ag Use of a highly pure semiconductor carrier material in a vapor deposition process
US3164489A (en) * 1961-12-26 1965-01-05 Lear Siegler Inc Silicon impregnated graphite part and process for producing same
US3329527A (en) * 1963-09-13 1967-07-04 Monsanto Co Graphite heating elements and method of conditioning the heating surfaces thereof
FR1379897A (en) * 1963-12-11 1964-11-27 Int Rectifier Corp heating element for epitaxial deposition of semiconductors
US3351742A (en) * 1964-12-02 1967-11-07 Monsanto Co Electric resistance heaters

Cited By (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3539759A (en) * 1968-11-08 1970-11-10 Ibm Susceptor structure in silicon epitaxy
US3573429A (en) * 1969-01-08 1971-04-06 Mc Donnell Douglas Corp Heating device
US3950479A (en) * 1969-04-02 1976-04-13 Siemens Aktiengesellschaft Method of producing hollow semiconductor bodies
US3862020A (en) * 1970-12-07 1975-01-21 Dow Corning Production method for polycrystalline semiconductor bodies
US3783822A (en) * 1972-05-10 1974-01-08 J Wollam Apparatus for use in deposition of films from a vapor phase
US4587928A (en) * 1975-12-24 1986-05-13 Tokyo Shibaura Electric Co., Ltd. Apparatus for producing a semiconductor device
US4113547A (en) * 1976-10-05 1978-09-12 Bell Telephone Laboratories, Incorporated Formation of epitaxial layers on substrate wafers utilizing an inert heat radiation ring to promote uniform heating
US4168998A (en) * 1978-12-06 1979-09-25 Mitsubishi Monsanto Chemical Co. Process for manufacturing a vapor phase epitaxial wafer of compound semiconductor without causing breaking of wafer by utilizing a pre-coating of carbonaceous powder
US5242501A (en) * 1982-09-10 1993-09-07 Lam Research Corporation Susceptor in chemical vapor deposition reactors
US4512825A (en) * 1983-04-12 1985-04-23 The United States Of America As Represented By The Secretary Of The Navy Recovery of fragile layers produced on substrates by chemical vapor deposition
EP0160220A1 (en) * 1984-04-02 1985-11-06 International Business Machines Corporation Plasma etching apparatus
US4714594A (en) * 1984-06-27 1987-12-22 Mircea Andrei S Reactor for vapor phase epitaxy
US4777022A (en) * 1984-08-28 1988-10-11 Stephen I. Boldish Epitaxial heater apparatus and process
EP0235731A1 (en) * 1986-02-26 1987-09-09 BASF Aktiengesellschaft Device for supporting work pieces on substrate holders
US4780174A (en) * 1986-12-05 1988-10-25 Lan Shan Ming Dislocation-free epitaxial growth in radio-frequency heating reactor
US5233163A (en) * 1990-07-05 1993-08-03 Fujitsu Limited Graphite columnar heating body for semiconductor wafer heating
US5609691A (en) * 1994-11-29 1997-03-11 Nec Corporation Plasma CVD apparatus for forming a thin film of uniform thickness
US5951774A (en) * 1995-01-27 1999-09-14 Nec Corporation Cold-wall operated vapor-phase growth system
US5584936A (en) * 1995-12-14 1996-12-17 Cvd, Incorporated Susceptor for semiconductor wafer processing
US5837058A (en) * 1996-07-12 1998-11-17 Applied Materials, Inc. High temperature susceptor
US20080257262A1 (en) * 1997-03-24 2008-10-23 Cree, Inc. Susceptor Designs for Silicon Carbide Thin Films
US6217662B1 (en) 1997-03-24 2001-04-17 Cree, Inc. Susceptor designs for silicon carbide thin films
US6530990B2 (en) 1997-03-24 2003-03-11 Cree, Inc. Susceptor designs for silicon carbide thin films
US6048403A (en) * 1998-04-01 2000-04-11 Applied Materials, Inc. Multi-ledge substrate support for a thermal processing chamber
WO1999050473A1 (en) * 1998-04-01 1999-10-07 Applied Materials, Inc. Multi-ledge substrate support for a thermal processing chamber
US20080276869A1 (en) * 2002-12-30 2008-11-13 Osram Opto Semiconductors Gmbh Substrate holder
US20040187790A1 (en) * 2002-12-30 2004-09-30 Osram Opto Semiconductors Gmbh Substrate holder
US20060035449A1 (en) * 2004-08-10 2006-02-16 Yoo Woo S Method of forming ultra shallow junctions
US20060194059A1 (en) * 2005-02-25 2006-08-31 Honeywell International Inc. Annular furnace spacers and method of using same
US20070023869A1 (en) * 2005-07-29 2007-02-01 Nuflare Technology, Inc. Vapor phase deposition apparatus and vapor phase deposition method
US20120270407A1 (en) * 2011-04-19 2012-10-25 Siltronic Ag Susceptor for supporting a semiconductor wafer and method for depositing a layer on a front side of a semiconductor wafer
US20170278681A1 (en) * 2016-03-25 2017-09-28 Lam Research Corporation Carrier ring wall for reduction of back-diffusion of reactive species and suppression of local parasitic plasma ignition
US10475627B2 (en) * 2016-03-25 2019-11-12 Lam Research Corporation Carrier ring wall for reduction of back-diffusion of reactive species and suppression of local parasitic plasma ignition
US20220238363A1 (en) * 2021-01-26 2022-07-28 Enkris Semiconductor, Inc. Graphite Plate

Also Published As

Publication number Publication date
GB1157421A (en) 1969-07-09

Similar Documents

Publication Publication Date Title
US3436255A (en) Electric resistance heaters
US3243323A (en) Gas etching
KR100527672B1 (en) Suscepter and apparatus for depositing included the same
US5011549A (en) Homoepitaxial growth of Alpha-SiC thin films and semiconductor devices fabricated thereon
US3391270A (en) Electric resistance heaters
US4735821A (en) Method for depositing material on depressions
GB996287A (en) Methods of producing thin films of semiconductor materials
US5471947A (en) Preparation of diamond films on silicon substrates
JPH07176482A (en) Method and apparatus for epitaxial growth
KR950027900A (en) How to form a film in the recess
JP3911518B2 (en) Susceptor for vapor phase growth apparatus and vapor phase growth method
US5550082A (en) Method and apparatus for doping silicon wafers using a solid dopant source and rapid thermal processing
JP2008091615A (en) Processed treatment substrate, its manufacturing method, and its processing method
US3747562A (en) Sliding furnace boat apparatus
US3755017A (en) Method of diffusing an impurity into a semiconductor body
US3524776A (en) Process for coating silicon wafers
NL8400317A (en) SUBSTRATE HEATING DEVICE FOR MOLECULAR BUNDLE EPITAXY.
US3617399A (en) Method of fabricating semiconductor power devices within high resistivity isolation rings
US3936328A (en) Process of manufacturing semiconductor devices
US6916373B2 (en) Semiconductor manufacturing method
KR20050107510A (en) Epitaxial semiconductor deposition methods and structrures
KR20110087440A (en) Susceptor for manufacturing semiconductor and apparatus comprising thereof
JPH07249580A (en) Thin film manufacturing device
JP6948842B2 (en) Annealing equipment and semiconductor wafer manufacturing method
JP3693470B2 (en) Manufacturing method and manufacturing apparatus for silicon wafer with protective film