US3688018A - Electrical device substrates - Google Patents

Electrical device substrates Download PDF

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US3688018A
US3688018A US58578A US3688018DA US3688018A US 3688018 A US3688018 A US 3688018A US 58578 A US58578 A US 58578A US 3688018D A US3688018D A US 3688018DA US 3688018 A US3688018 A US 3688018A
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substrate
electrical
terminals
rods
electrical device
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Stephen Edward Ralph Hiscocks
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TECHNOLOGY UK
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01023—Vanadium [V]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01024—Chromium [Cr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01041—Niobium [Nb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01042—Molybdenum [Mo]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01073—Tantalum [Ta]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/10329—Gallium arsenide [GaAs]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/929—Eutectic semiconductor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12465—All metal or with adjacent metals having magnetic properties, or preformed fiber orientation coordinate with shape

Definitions

  • ABSTRACT An electrical substrate including a plurality of rods of a conducting material embedded in a matrix of an insulating material, the rods extending in the same general direction as each other between two major faces of the substrate.
  • the present invention relates to electrical device substrates.
  • substrates are, for necessity or convenience, mounted on substrates.
  • integrated circuits or single elements such as transistors may be epitaxially grown on substrates and thin film circuits may be deposited on substrates.
  • Other devices may be fabricated independently of s substrate and subsequently mounted on a substrate for reasons of frigidity or strength or for hermetic sealing.
  • an electrical substrate including a plurality or rods of a conductive first material embedded in a matrix of an insulator second material, the rods extending in the same general direction as each other between two major faces of the substrate.
  • an electrical device mounted on a substrate which includes a plurality of rods of a conductive first material embedded in a matrix of an insulator second material, the rods extending in the same general direction as each other between two major faces of the substrate, and in the electrical device is mounted on one of the the two major faces of the substrate and electrical connections are made to the device by way of the other major face of the substrate.
  • FIG. 1 is a cross-sectional diagram of a Stockbarger vertical crystal growing apparatus
  • FIG. 2 is a cross-sectional diagram of an ingot of eutectic material grown in the apparatus described with reference to FIG. 1;
  • FIG. 3 is a cross-sectional diagram of an electrical device mounted on a substrate.
  • a eutectic mixture will typically solidify at a eutectic temperature to form a solid which consists of an intimate mixture of crystals of the two components.
  • the particular morphology adopted by this mixture of the two phases depends upon a number of factors which include the nature of the components, the composition of the eutectic mixture and the conditions of crystallization.
  • the phases are commonly present in the form of lamellae whose thickness varies with the rate of crystallization but is typically of the order of microns. If, however, the eutectic composition differs greatly from equal proportions between the constituents, then the material frequently crystallizes in the form of rods of the minor phase embedded in a matrix of the major phase. The rods are aligned or nearly so in the direction of growth.
  • the embodiment described uses a morphology in which a plurality of rods of a first material are embedded parallel to one another in a matrix of a second material.
  • the first material is an electrical conductor and the second material is an electrical insulator.
  • gallium titanide GaTi in a matrix of gallium arsenide molybdenum arsenide, MoAs, in a matrix of gallium arsenide chromium arsenide, CrAs, in a matrix of gallium arsenide niobium silicide, NbSi in a matrix of silicon tantalum silicide, TaSi in a matrix of silicon molybdenum silicide, MoSi in a matrix of silicon.
  • the matrix material should be as good an insulator as possible in all cases.
  • the gallium arsenide is preferably semi-insulating.
  • the materials may be grown by most processes which involve growth from the melt at a planar interface, such as horizontal or vertical zone melting, pulling in a Czochralski crystal puller, vertical Stockbarger or horizontal Bridgman techniques, Verneuil techniques or float zone preparation.
  • the techniques may, where appropriate, be used in conjunction with liquid encapsulation, as described in United Kingdom Pat. No. 1,113,069 and US. Pat. No. 3,401,023, issued Sept. 10, 1968, to John Brian Mullin.
  • FIG. 1 is a cross-sectional diagram of a Stockbarger vertical crystal growing apparatus.
  • a silica furnace tube 2 is arranged vertically. Inside the tube 2 a silica crucible 4 holds a charge of mixture 6 in eutectic proportions or thereabouts.
  • the lower end 8 of the crucible 4 is pointed and the upper end 10 of the crucible 4 is open and supported on a rod 12.
  • An induction heater 14 surrounds part of the tube 2.
  • the action of the apparatus is as follows. Initially the end 8 of the crucible 4 is located within the induction heater 14 and the heat output of the induction heater 14 is arranged to be sufficient for that part of the charge 6 in the end 8 to be melted. When that part of the charge is melted and thoroughly mixed the crucible 4 is rotated and slowly fed downwards. This causes more of the charge 6 to enter the region of influence of the induction heater 14 and so to melt. At the same time that part of the charge 6 at the end 8 of the crucible 4 will cool and solidify. If the interface 16 between the solid material and the melt is kept planar, then the rods are more likely to be aligned parallel to one another.
  • the size and spacing of the rods varies with the growth rate. Empirically, if s is the average separation of the rods and v is the velocity of growth, then sv is approximately constant. Once s is fixed, the average diameter of the rods follows from the eutectic composition.
  • EXAMPLE 1 A charge of the correct proportions of niobium and silicon to give the eutectic composition of niobium silicide, NbSi in silicon, Si (92 weight percent of silicon) was prepared and put into a crucible in the apparatus described above with reference to FIG. 1. The purity of the starting materials was Nb 99.9 percent, Si 99.99 percent. The charge was heated until melted. The crucible was then rotated at 7 r.p.m. and fed downwards at 1.5 centimeters per hour.
  • the resulting material showed most of the microstructure to be rod-like in character interspersed with lamellae.
  • the rods were several microns in diameter with a uniform size and distribution over the areas examined.
  • the structure was well aligned and continuous.
  • EXAMPLE 2 A charge of the correct proportions of niobium and silicon to give the eutectic composition of niobium silicide, NbSi in silicon, Si (92 weight percent of silicon) was prepared and put into a crucible in the apparatus described above with reference to FIG. 1. The purity of the starting materials was Nb 99.9 percent, Si 99.9999 percent. The charge was heated until melted. The crucible was then rotated at 7 r.p.m. and fed downwards at 1 centimeter per hour.
  • the resulting material showed most of the microstructure to be rod-like in character interspersed with lamellae.
  • the rods were several microns in diameter with a uniform size and distribution over the areas examined.
  • the structure was well aligned and continuous.
  • EXAMPLE 3 A charge of the correct proportions of tantalum and silicon to give the eutectic composition of tantalum silicide, TaSi in silicon, Si (94 weight percent of silicon) was prepared and put into a crucible in the apparatus described above with reference to FIG. 1. The purity of the starting materials was Ta 99.7 percent, Si 99.9999 percent. The charge was heated until melted. The crucible was then rotated at 7 r.p.m. and fed downwards at 1 centimeter per hour.
  • the resulting material showed the microstructure to be rod-like.
  • the rods were generally 1 to 3 microns in diameter, but the microstructure was inferior to that obtained in Examples 1 and 2 in uniformity of diameter and in uniformity of distribution of the rods.
  • EXAMPLE 4 A charge of the correct proportions of molybdenum and silicon to give the eutectic composition of molybdenum silicide, MoSi in silicon, Si (95 weight percent of silicon) was prepared and put in a crucible in the apparatus described above with reference to FIG. 1. The purity of the starting materials was Mo 99.95 percent, Si 99.99 percent. The charge was heated until melted. The crucible was then rotated at 7 r.p.m. and fed downwards at 1 centimeter per hour.
  • the resulting material showed the microstructure to be rod-like interspersed with lamellae.
  • the diameter of the rods was fairly uniform (3 to 4 microns) but the distribution was slightly irregular.
  • FIG. 2 is a cross-sectional diagram of an ingot of eutectic material grown in the apparatus described with reference to FIG. 1.
  • the ingot 18 consists of a plurality of conducting rods 5 embedded in an insulating matrix 7.
  • the rods 5 are aligned in the direction 20 of growth.
  • a slice is taken from the ingot 18 by sawing it in planes 22 perpendicular to the direction 20 of growth.
  • the resulting slice 1 is polished by conventional techniques.
  • FIG. 3 is a cross-sectional diagram of an electrical device mounted on the substrate 1.
  • the device is a circuit 3 which is mounted or deposited (epitaxially or otherwise) on the face of the substrate 1 in such a way as to ensure good electrical contact between terminals of the circuit 3 to which contact is to be made and the rods 5 adjacent to those parts. It is advantageous for the relationship between the density of the rods and the terminal areas to be such that each terminal area is connected to a plurality of rods in order to ensure good contact.
  • External contacts 9 may be made to the underside of the substrate 1 by evaporation or other conventional microelectronic techniques. If the rods 5 are sufficiently good conductors and the matrix 7 a sufficiently good insulator then the arrangement will allow low impedance connections and isolation between adjacent contact areas in the circuit 3.
  • An electrical substrate having two major faces at least one of which is suitable for the epitaxial deposition of electrical components, said substrate including a plurality of rods of a conductive material embedded in an insulator matrix of gallium arsenide, said rods being microscopic in cross section and extending in the same general direction as each other between the two major faces of the substrate.
  • An electrical substrate having two major faces at least one of which is suitable for the epitaxial deposition of electrical components, said substrate including a plurality of rods of a conductive material embedded in an insulator matrix of silicon, said rods being microscopic in cross section and extending in the same general direction as each other between the two major faces of the substrate.
  • An electrical substrate as claimed in claim 9, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.

Abstract

An electrical substrate including a plurality of rods of a conducting material embedded in a matrix of an insulating material, the rods extending in the same general direction as each other between two major faces of the substrate.

Description

United States Patent Hiscocks 1 Aug, 29, 1972 ELECTRICAL DEVICE SUBSTRATES Stephen Edward Ralph Hiscocks, Malvem, England Minister of Technology in Her Britannic Maiestys Government of the United Kingdom of Great Britain and Northern Ireland, 3, Millbank, London, SW. 1, England Filed: July 27, 1970 Appl. No.2 58,578
Inventor:
Assignee:
Foreign Application Priority Data July 30, 1969 Great Britain ..38,241/69 US. Cl ..174/68.5, 29/626, 75/134 R, 148/1.5,148/1.6, 317/101 A, 317/101 CC, 317/234 J Int. Cl. ..H05k 1/18 Field of Search ..174/68.5; 307/101 A, 101C, 307/101 CC, 234 H, 234 G, 235 H; 75/134 R, 134 H; 148/15, 1.6; 29/191.4, 626, 625;
Primary Examiner-Darrell L. Clay Attorney-Hall, Pollock & Vande Sande [57] ABSTRACT An electrical substrate including a plurality of rods of a conducting material embedded in a matrix of an insulating material, the rods extending in the same general direction as each other between two major faces of the substrate.
16 Claims, 3 Drawing Figures RODS of Conductive Material. e.g. GuTig.
e.g. GoAs, or Si BACKGROUND OF THE INVENTION The present invention relates to electrical device substrates.
Many electrical devices are, for necessity or convenience, mounted on substrates. For example, integrated circuits or single elements such as transistors may be epitaxially grown on substrates and thin film circuits may be deposited on substrates. Other devices may be fabricated independently of s substrate and subsequently mounted on a substrate for reasons of frigidity or strength or for hermetic sealing.
It is a feature of such devices that electrical connections can only be made to them at the edge or on the face away from the substrate.
SUMMARY OF THE INVENTION According to the present invention there is provided an electrical substrate including a plurality or rods of a conductive first material embedded in a matrix of an insulator second material, the rods extending in the same general direction as each other between two major faces of the substrate.
According to theinvention in another aspect there is provided an electrical device mounted on a substrate which includes a plurality of rods of a conductive first material embedded in a matrix of an insulator second material, the rods extending in the same general direction as each other between two major faces of the substrate, and in the electrical device is mounted on one of the the two major faces of the substrate and electrical connections are made to the device by way of the other major face of the substrate.
BRIEF DESCRIPTION OF THE DRAWINGS An embodiment of the invention will be described by way of example with reference to the accompanying drawings, in which:
FIG. 1 is a cross-sectional diagram of a Stockbarger vertical crystal growing apparatus;
FIG. 2 is a cross-sectional diagram of an ingot of eutectic material grown in the apparatus described with reference to FIG. 1; and
FIG. 3 is a cross-sectional diagram of an electrical device mounted on a substrate.
DESCRIPTION OF THE PREFERRED EMBODIMENTS In a two-component system in which the component may be either elements or compounds, a eutectic mixture will typically solidify at a eutectic temperature to form a solid which consists of an intimate mixture of crystals of the two components. The particular morphology adopted by this mixture of the two phases depends upon a number of factors which include the nature of the components, the composition of the eutectic mixture and the conditions of crystallization.
If the components are both metal-like and the eutectic composition is in the region of equal proportions between the components, then the phases are commonly present in the form of lamellae whose thickness varies with the rate of crystallization but is typically of the order of microns. If, however, the eutectic composition differs greatly from equal proportions between the constituents, then the material frequently crystallizes in the form of rods of the minor phase embedded in a matrix of the major phase. The rods are aligned or nearly so in the direction of growth.
The embodiment described uses a morphology in which a plurality of rods of a first material are embedded parallel to one another in a matrix of a second material. The first material is an electrical conductor and the second material is an electrical insulator.
Possible materials include:
gallium titanide, GaTi in a matrix of gallium arsenide molybdenum arsenide, MoAs, in a matrix of gallium arsenide chromium arsenide, CrAs, in a matrix of gallium arsenide niobium silicide, NbSi in a matrix of silicon tantalum silicide, TaSi in a matrix of silicon molybdenum silicide, MoSi in a matrix of silicon. The matrix material should be as good an insulator as possible in all cases. The gallium arsenide is preferably semi-insulating.
The materials may be grown by most processes which involve growth from the melt at a planar interface, such as horizontal or vertical zone melting, pulling in a Czochralski crystal puller, vertical Stockbarger or horizontal Bridgman techniques, Verneuil techniques or float zone preparation. The techniques may, where appropriate, be used in conjunction with liquid encapsulation, as described in United Kingdom Pat. No. 1,113,069 and US. Pat. No. 3,401,023, issued Sept. 10, 1968, to John Brian Mullin.
FIG. 1 is a cross-sectional diagram of a Stockbarger vertical crystal growing apparatus. A silica furnace tube 2 is arranged vertically. Inside the tube 2 a silica crucible 4 holds a charge of mixture 6 in eutectic proportions or thereabouts. The lower end 8 of the crucible 4 is pointed and the upper end 10 of the crucible 4 is open and supported on a rod 12. An induction heater 14 surrounds part of the tube 2.
The action of the apparatus is as follows. Initially the end 8 of the crucible 4 is located within the induction heater 14 and the heat output of the induction heater 14 is arranged to be sufficient for that part of the charge 6 in the end 8 to be melted. When that part of the charge is melted and thoroughly mixed the crucible 4 is rotated and slowly fed downwards. This causes more of the charge 6 to enter the region of influence of the induction heater 14 and so to melt. At the same time that part of the charge 6 at the end 8 of the crucible 4 will cool and solidify. If the interface 16 between the solid material and the melt is kept planar, then the rods are more likely to be aligned parallel to one another.
In other words, conventional silicon techniques are used throughout.
It is to be noted that the size and spacing of the rods varies with the growth rate. Empirically, if s is the average separation of the rods and v is the velocity of growth, then sv is approximately constant. Once s is fixed, the average diameter of the rods follows from the eutectic composition.
Results that have been obtained are set out in the following Examples.
EXAMPLE 1 A charge of the correct proportions of niobium and silicon to give the eutectic composition of niobium silicide, NbSi in silicon, Si (92 weight percent of silicon) was prepared and put into a crucible in the apparatus described above with reference to FIG. 1. The purity of the starting materials was Nb 99.9 percent, Si 99.99 percent. The charge was heated until melted. The crucible was then rotated at 7 r.p.m. and fed downwards at 1.5 centimeters per hour.
The resulting material showed most of the microstructure to be rod-like in character interspersed with lamellae. The rods were several microns in diameter with a uniform size and distribution over the areas examined. The structure was well aligned and continuous.
EXAMPLE 2 A charge of the correct proportions of niobium and silicon to give the eutectic composition of niobium silicide, NbSi in silicon, Si (92 weight percent of silicon) was prepared and put into a crucible in the apparatus described above with reference to FIG. 1. The purity of the starting materials was Nb 99.9 percent, Si 99.9999 percent. The charge was heated until melted. The crucible was then rotated at 7 r.p.m. and fed downwards at 1 centimeter per hour.
The resulting material showed most of the microstructure to be rod-like in character interspersed with lamellae. The rods were several microns in diameter with a uniform size and distribution over the areas examined. The structure was well aligned and continuous.
EXAMPLE 3 A charge of the correct proportions of tantalum and silicon to give the eutectic composition of tantalum silicide, TaSi in silicon, Si (94 weight percent of silicon) was prepared and put into a crucible in the apparatus described above with reference to FIG. 1. The purity of the starting materials was Ta 99.7 percent, Si 99.9999 percent. The charge was heated until melted. The crucible was then rotated at 7 r.p.m. and fed downwards at 1 centimeter per hour.
The resulting material showed the microstructure to be rod-like. The rods were generally 1 to 3 microns in diameter, but the microstructure was inferior to that obtained in Examples 1 and 2 in uniformity of diameter and in uniformity of distribution of the rods.
EXAMPLE 4 A charge of the correct proportions of molybdenum and silicon to give the eutectic composition of molybdenum silicide, MoSi in silicon, Si (95 weight percent of silicon) was prepared and put in a crucible in the apparatus described above with reference to FIG. 1. The purity of the starting materials was Mo 99.95 percent, Si 99.99 percent. The charge was heated until melted. The crucible was then rotated at 7 r.p.m. and fed downwards at 1 centimeter per hour.
The resulting material showed the microstructure to be rod-like interspersed with lamellae. The diameter of the rods was fairly uniform (3 to 4 microns) but the distribution was slightly irregular.
FIG. 2 is a cross-sectional diagram of an ingot of eutectic material grown in the apparatus described with reference to FIG. 1.
The ingot 18 consists of a plurality of conducting rods 5 embedded in an insulating matrix 7. The rods 5 are aligned in the direction 20 of growth. In order to prepare a substrate a slice is taken from the ingot 18 by sawing it in planes 22 perpendicular to the direction 20 of growth. The resulting slice 1 is polished by conventional techniques.
FIG. 3 is a cross-sectional diagram of an electrical device mounted on the substrate 1. In this example the device is a circuit 3 which is mounted or deposited (epitaxially or otherwise) on the face of the substrate 1 in such a way as to ensure good electrical contact between terminals of the circuit 3 to which contact is to be made and the rods 5 adjacent to those parts. It is advantageous for the relationship between the density of the rods and the terminal areas to be such that each terminal area is connected to a plurality of rods in order to ensure good contact.
External contacts 9 may be made to the underside of the substrate 1 by evaporation or other conventional microelectronic techniques. If the rods 5 are sufficiently good conductors and the matrix 7 a sufficiently good insulator then the arrangement will allow low impedance connections and isolation between adjacent contact areas in the circuit 3.
I claim:
1. An electrical substrate having two major faces at least one of which is suitable for the epitaxial deposition of electrical components, said substrate including a plurality of rods of a conductive material embedded in an insulator matrix of gallium arsenide, said rods being microscopic in cross section and extending in the same general direction as each other between the two major faces of the substrate.
2. An electrical substrate as claimed in claim 1, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
3. An electrical substrate as claimed in claim 1 in which said conductive material is gallium titanide, GaTi 4. An electrical substrate as claimed in claim 3, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
5. An electrical substrate as claimed in claim 1 in which said conductive material is molybdenum arsenide, MoAs.
6. An electrical substrate as claimed in claim 5, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
7. An electrical substrate as claimed in claim 1 in which said conductive material is chromium arsenide, CrAs.
8. An electrical substrate as claimed in claim 7, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
9. An electrical substrate having two major faces at least one of which is suitable for the epitaxial deposition of electrical components, said substrate including a plurality of rods of a conductive material embedded in an insulator matrix of silicon, said rods being microscopic in cross section and extending in the same general direction as each other between the two major faces of the substrate.
10. An electrical substrate as claimed in claim 9, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
11. An electrical substrate as claimed in claim 9 in which said conductive material is niobium silicide, Nb- Si 12. An electrical substrate as claimed in claim 11, in-
cluding an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
13. An electrical substrate as claimed in claim 9, in which said conductive material is tantalum silicide, TaSi 14. An electrical substrate as claimed in claim 13, including an electrical device mounted on one of the two major faces of the substrate, said electrical device hav ing terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
15. An electrical substrate as claimed in claim 9, in which said conductive material is molybdenum silicide, MOSig.
16. An electrical substrate as claimed in claim 15, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.

Claims (15)

  1. 2. An electrical substrate as claimed in claim 1, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
  2. 3. An electrical substrate as claimed in claim 1 in which said conductive material is gallium titanide, GaTi2.
  3. 4. An electrical substrate as claimed in claim 3, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
  4. 5. An electrical substrate as claimed in claim 1 in which said conductive material is molybdenum arsenide, MoAs.
  5. 6. An electrical substrate as claimed in claim 5, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
  6. 7. An electrical substrate as claimed in claim 1 in which said conductive material is chromium arsenide, CrAs.
  7. 8. An electrical substrate as claimed in claim 7, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
  8. 9. An electrical substrate having two major faces at least one of which is suitable for the epitaxial deposition of electrical components, said substrate including a plurality of rods of a conductive material embedded in an insulator matrix of silicon, said rods being microscopic in cross section and extending in the same general direction as each other between the two major faces of the substrate.
  9. 10. An electrical substrate as claimed in claim 9, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
  10. 11. An electrical substrate as claimed in claim 9 in which said conductive material is niobium silicide, NbSi2.
  11. 12. An electrical substrate as claimed in claim 11, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
  12. 13. An electrical substrate as claimed in claim 9, in which said conductive material is tantalum silicide, TaSi2.
  13. 14. An electrical substrate as claimed in claim 13, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
  14. 15. An electrical substrate as claimed in claim 9, in which said conductive material is molybdenum silicide, MoSi2.
  15. 16. An electrical substrate as claimed in claim 15, including an electrical device mounted on one of the two major faces of the substrate, said electrical device having terminals, electrical connections being made to the terminals of said device via said conductive rods by way of the other major face of the substrate.
US58578A 1969-07-30 1970-07-27 Electrical device substrates Expired - Lifetime US3688018A (en)

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Cited By (9)

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US4457796A (en) * 1981-06-25 1984-07-03 Itt Industries Permanently connecting a set of conductive tracks on a substrate with a co-operating set on a printed circuit
US4745455A (en) * 1986-05-16 1988-05-17 General Electric Company Silicon packages for power semiconductor devices
US4905075A (en) * 1986-05-05 1990-02-27 General Electric Company Hermetic semiconductor enclosure
US5209390A (en) * 1989-07-03 1993-05-11 General Electric Company Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid
US5468997A (en) * 1991-06-10 1995-11-21 Ngk Spark Plug Co., Ltd. Integrated circuit package having a multilayered wiring portion formed on an insulating substrate
US5472487A (en) * 1991-01-18 1995-12-05 United Technologies Corporation Molybdenum disilicide based materials with reduced coefficients of thermal expansion
US5919321A (en) * 1996-08-13 1999-07-06 Hitachi Metals, Ltd. Target material of metal silicide
US6032324A (en) * 1997-08-26 2000-03-07 Lansinger; Jere Rask Windshield heated wiping system
FR2901636A1 (en) * 2006-05-24 2007-11-30 Commissariat Energie Atomique Chip`s upper face and substrate`s lower face connector for e.g. packaging application, has substrate with zone traversed by vias made of conductive material and spaced at regular pace between two faces of substrate

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US5262718A (en) * 1985-08-05 1993-11-16 Raychem Limited Anisotropically electrically conductive article
US5631447A (en) * 1988-02-05 1997-05-20 Raychem Limited Uses of uniaxially electrically conductive articles
US5637925A (en) * 1988-02-05 1997-06-10 Raychem Ltd Uses of uniaxially electrically conductive articles

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US3267405A (en) * 1962-07-31 1966-08-16 Siemens Ag Galvanomagnetic semiconductor devices
US3323198A (en) * 1965-01-27 1967-06-06 Texas Instruments Inc Electrical interconnections
US3325881A (en) * 1963-01-08 1967-06-20 Sperry Rand Corp Electrical circuit board fabrication
US3434827A (en) * 1965-07-16 1969-03-25 United Aircraft Corp Anisotropic monotectic alloys and process for making the same
US3501342A (en) * 1965-01-27 1970-03-17 Texas Instruments Inc Semiconductors having selectively formed conductive or metallic portions and methods of making same
US3541222A (en) * 1969-01-13 1970-11-17 Bunker Ramo Connector screen for interconnecting adjacent surfaces of laminar circuits and method of making

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US3267405A (en) * 1962-07-31 1966-08-16 Siemens Ag Galvanomagnetic semiconductor devices
US3325881A (en) * 1963-01-08 1967-06-20 Sperry Rand Corp Electrical circuit board fabrication
US3323198A (en) * 1965-01-27 1967-06-06 Texas Instruments Inc Electrical interconnections
US3501342A (en) * 1965-01-27 1970-03-17 Texas Instruments Inc Semiconductors having selectively formed conductive or metallic portions and methods of making same
US3434827A (en) * 1965-07-16 1969-03-25 United Aircraft Corp Anisotropic monotectic alloys and process for making the same
US3541222A (en) * 1969-01-13 1970-11-17 Bunker Ramo Connector screen for interconnecting adjacent surfaces of laminar circuits and method of making

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4457796A (en) * 1981-06-25 1984-07-03 Itt Industries Permanently connecting a set of conductive tracks on a substrate with a co-operating set on a printed circuit
US4905075A (en) * 1986-05-05 1990-02-27 General Electric Company Hermetic semiconductor enclosure
US4745455A (en) * 1986-05-16 1988-05-17 General Electric Company Silicon packages for power semiconductor devices
US5209390A (en) * 1989-07-03 1993-05-11 General Electric Company Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid
US5472487A (en) * 1991-01-18 1995-12-05 United Technologies Corporation Molybdenum disilicide based materials with reduced coefficients of thermal expansion
US5468997A (en) * 1991-06-10 1995-11-21 Ngk Spark Plug Co., Ltd. Integrated circuit package having a multilayered wiring portion formed on an insulating substrate
US5919321A (en) * 1996-08-13 1999-07-06 Hitachi Metals, Ltd. Target material of metal silicide
US6032324A (en) * 1997-08-26 2000-03-07 Lansinger; Jere Rask Windshield heated wiping system
FR2901636A1 (en) * 2006-05-24 2007-11-30 Commissariat Energie Atomique Chip`s upper face and substrate`s lower face connector for e.g. packaging application, has substrate with zone traversed by vias made of conductive material and spaced at regular pace between two faces of substrate

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