US3862602A - Contact delay and self-destruct circuit - Google Patents

Contact delay and self-destruct circuit Download PDF

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US3862602A
US3862602A US048589A US4858970A US3862602A US 3862602 A US3862602 A US 3862602A US 048589 A US048589 A US 048589A US 4858970 A US4858970 A US 4858970A US 3862602 A US3862602 A US 3862602A
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Larry G Manning
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    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F42AMMUNITION; BLASTING
    • F42CAMMUNITION FUZES; ARMING OR SAFETY MEANS THEREFOR
    • F42C11/00Electric fuzes
    • F42C11/06Electric fuzes with time delay by electric circuitry

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  • ABSTRACT A circuit for providing a predetermined time delay after missile impact before detonation, and a selfdestruct system controlled by the missile's operation.
  • the circuit utilizes a quad inverter fed by the selfdestruct system and the contact delay system, in paralle1, driving a firing system.
  • the contact delay system is basically a one-shot multivibrator, utilizing pulses from piezoelectric crystals as inputs, and having an RC timing circuit to trigger the firing system.
  • the selfdestruct system utilizes a reduced voltage resulting from an extinquished gas generator to trigger the firing system.
  • the firing system has an SCR gate triggered by the quad inverter output.
  • the invention relates to the field of missile fuzing systems and, in particular, to the missiles hit and miss modes of operation.
  • Missile fuzing devices prior to the present invention. gave a direct pulse to the target detecting device, and fired upon impact with no delay in time.
  • the contact trigger circuits utilize transformer coupling, Shockley diodes and a relatively unregulated power supply. Inherent problems with the circuits are that Shockley diodes are difficult to obtain, and missile warhead misfiring caused by circuit transients can occur due to the relatively unregulated power supply and transformer coupling.
  • the contact delay system utilizes readily available components, no magnetic components and a well regulated power supply. After the missile experiences contact with the target a time delay, controllable by the selection of one resistor and one capacitor, prevents the circuit from delivering a destruct pulse to the target detection device firing circuit until after a predetermined time. has expired-
  • the self-destruct system takes advantage of a reduced-voltage supply caused by a reduction in the revolutions per minute of the missile turbo-generator, resulting from the lack of fuel in the missile gas generator, to provide a trigger pulse to the firing circuit.
  • the target detection device firing circuit was designed to allow broad silicon controlled rectifier selection without reducing effectiveness.
  • FIG. 1 is a block diagram of the complete circuit
  • FIG. 2 is a schematic diagram of the complete circuit
  • FIG. 3 is a schematic diagram of the contact delay circuit
  • FIG. 4 is a schematic diagram of the self-destruct circuit
  • FIG. 5 is a schematic diagram of the target detection device firing circuit.
  • the contact delay and self-destruct circuit consists of a contact delay circuit 10, a self-destruct circuit 12, a quad inverter driver stage 14, and a target detection device firing circuit 16;
  • the contact delay circuit 10, the selfdestruct circuit 12, and the target detection device firing circuit 16 are shown individually in FIGS. 3, 4 and 5, and are not shown individually on FIG. 2 because certaincomponents are shared by two or more of the circuits.
  • Resistor 10 Kilohm 50 Diode 1N753A, 6.2 volt 52 Resistor 2 Kilohm 54 Resistor 1.2l Kilohm, 1%, %watt 56 Capacitor l microfarad 58 Capacitor 0.1 microfarad 60 Resistor 2 Kilohm 62 Resistor 1.5 Kilohm 64 Diode 1N973B, 33 volt 66 Diode lNo45 68 Resistor 221 Kilohm, 1%, Vs watt 70 Diode 1N645 72 Silicon Controlled 2N1 874A 74 Resistor 470 Kilohm, 1%
  • FIG. 3 shows the contact delay portion 10 of FIGS. 1 and 2.
  • the circuit is basically a one-shot multivibrator which is held on by the charge time of resistor 54 and capacitor 56.
  • a quad inverter 14 is used to develop the one-shot circuit.
  • Transistor 40 is employed in the input circuit as a pulse inverter and crystal isolation stage, and provides a high level of rejection to noise on the missile supply line 20.
  • the crystals, or any other means desired for providing inputs 22 and 24, are loaded by the as-required resistors 26 and 28.
  • the switching sensitivity of the input circuit is established by selecting the desired value of the as-required resistors 26 and 28.
  • the final transistor96 in the quad inverter 14 acts as a gate driver and transfers a positive pulse through diode 66 to the silicon controlled rectifier gate (SCR) 72. This pulse is of sufficient amplitude to fire" the SCR 72 over the design temperature range.
  • SCR silicon controlled rectifier gate
  • the total circuit delay can be computed by summing t, and the inherent contact crystal delay.
  • a negative pulse generated by impulse stressing of the crystals, drives the base voltage of transistor 40 toward ground. This pulse is inverted through transistor 40 and appears at the collec-.
  • the positive pulse at the collector of transistor 40 is then coupled by capacitor 42 to the base of transistor 90 which is normally cut-off.
  • the combination of capacitor 42 and resistor 52 acts as a pulse shaping network.
  • the positive pulse at transistor 90 will turn the transistor on if of adequate amplitude.
  • a low impedance path-to-ground is thereby supplied through transistor 90, allowing capacitor 56 to .discharge.
  • the voltage at pin 3 of quad inverter 14 switches sharply negative and cuts off transistor 94.
  • a positive voltage from the collector of transistor 94 is then fed to the base of transistor 92 (normally off) and turns it on.
  • Transistor 92 now acts as the current path-to-ground.
  • the positive voltage from the collector of transistor 94 is simultaneously fed to the differentiator consisting of capacitor 58 and resistor 60.
  • the differentiator produces a positive pulse at the base of transistor 96 (normally on) and simply turns transistor 96 on harder.
  • capacitor 56 is charging at the time rate equal to t,.
  • the circuit remains in the quasi-state described above and the voltage at pin 3 of quad inverter 14 swings slowly positive.
  • transistor 94 turns on.
  • the off time of transistor 94 is the circuit delay mechanism.
  • transistor 94 when transistor 94 switches on, transistor 92 switches off and the voltage at pin 3 of quad inverter 14 returns immediately to its original positive state.
  • the input transistor 90 will remain off due to the absence of an input signal. This causes transistor 94 to saturate, producing a negative pulse out of the differentiator (capacitor 58 and resistor 60).
  • the pulse cuts transistor 96 off and drives the collector voltage of transistor'96 positive. This output pulse is then coupled to the SCR gate 72 through'diode 66, thus firing", the SCR 72. At the completion of the pulse. transistor 96 turns on and the entire circuit cycles back to its original state.
  • the output pulse width at pin 6 is determined by the differentiator (capacitor 58 and resistor 60) discharge time. This pulse is always of adequate amplitude to fire the SCR 72.
  • FIG. 4 shows the sell" destruct portion 12 of FIGS. l and 2.
  • the circuit was designed to remove base drive voltage from transistor 96 upon reaching a reduced value of missile supply voltage 20. Asthe missile gas generator burns out, the missile turbo generator slows down and causes a drop off in supply voltage 20. This voltage reduction feature is used for missile self-destruct.
  • the transistor When the base drive voltage to transistor 96 is sufficiently reduced, the transistor cuts-off and produces a positive voltage at the collector. This positive voltage is then coupled through diode 66 to the SCR gate 72. Theamplitude of this gate voltage is sufficient to cause the SCR 72 to fire over the designed temperature range. The coupling diode 66 is necessaryto prevent the saturation of transistor 96 from firing the SCR 72' at elevated temperatures.
  • the operation of the self-destruct circuit 12 is as follows: with normal supply voltage applied transistor 96 is on and saturated. As the 25 volt supply 20 is lowered, transistor 96 starts out of saturation. When the supply is low enough the zener diode goes out of regulation and passes very low current.
  • the voltage drop across resistor becomes insufficient to maintain transistor 96 on, therefore it shuts off. This causes the collector voltage of transistor 96 to go positive and thus fire the SCR 72.
  • the supply voltage reduction resistor 44 is such that adequate voltage is left across zener diode 46 to produce, at minimum, a l-volt pulse across the SCR gate 72. This circuit will produce an output pulse at supply voltages of 9 12 volts, depending on tolerances and temperatures. This represents a supply voltage reduction of at least 50 percent.
  • FIG. 5 shows the target detection device firing circuit 16 of FIGS. 1 and 2.
  • TDD target detection device
  • the main advantage of the circuit is the reduction of holding current requirements to a point that special SCR selection is no longer necessary. This was accomplished by increasing the value of resistor74 and placing zener diode 64 across the SCR 72 and diode 70. During the charging of capacitor 78, zener diode 64 acts as a high impedance, and the charge path is through resistors 76, 74, and 80. Thetime required to reach a minimum charge of 24 volts is below the maximum specified design value. Therefore, the use of the large series resistance 74 was justified. This large resistancelowered the anode current of the SCR 72 to a value which is below the SCR minimum holding current.
  • the SCR gate resistor 68 was chosen as large as possible without jeopardizing the holding current requirements.
  • the operation of the TDD firing circuit is as follows: upon application of the TDD battery voltage 82 to the circuit, capacitor 78 starts to charge toward a '33 volt final value. The SCR 72 is held off due to the lack of sufficient gate voltage. The capacitor 78 will be charged to 24 volts (minimum) in less than 1.2 seconds.
  • a positive voltage pulse greater than 0.8 volts applied to the SCR gate 72 will turn the SC R 72 on over all conditions.
  • the SCR in the on state, acts as a low impedance path-to-ground and allows capacitor 78 to discharge through the SCR 72 and load attached to the output 84. This discharge forms a negative voltage pulse across the load.
  • Supply voltage 20, in this embodiment. is the missile system filament voltage supply.
  • Prior devices utilize the system gyro power supply 175 VDC) as the supply voltage 20, resulting in possible misfire due to circuit transients since the system gyro power is relatively unregulated.
  • the subject invention eliminates, or at least greatly reduces, the danger of warhead misfire since the filament voltage supply has better regulation.
  • a fuze system for use in a projectile comprising; first electrical means for providing a time delay after a first predetermined event before an electrical signal is provided as an output, wherein said first predetermined event is the projectiles contact with a target, including an input from a source responsive to said contact, a quad inverter coupled to the input and providing a time delayed output after the contact, and a time delay circuit coupled to said quad inverter for delaying the output of said quad inverter;
  • second electrical means for providing a time delay after a second predetermined event before an electrical signal is provided as an output
  • said second electrical means is a means for detonating an explosive charge in said projectile at some time after said projectile's flight has been initiated.
  • said time delay circuit comprises; a resistor and a capacitor.
  • said first electrical means further includes;
  • a one-shot multivibrator connected to said crystal for providing an electric signal to said electrical signal output providing means including said quad inverter; and wherein said electrical signal output providing means includes;
  • a firing circuit electrically connected to said multivibrator and triggerable by said multivibrator for providing an electric signal to said explosive charge.
  • said second electrical means includes;
  • control means for providing :an electric signal to said electrical signal output providing means when said generator voltage output is reduced; and wherein said electrical signal output providing means includes;
  • a firing circuit electrically connected to said control means and triggerable by said control means for providing an electric signal to said explosive charge.
  • said electrical signal output providing means includes a firing circuit electrically connected to said quadinverter and triggerable by said quad inverter and electrically connected to said second electrical means and triggerable by said second electrical means.
  • quad inverter includes first, second, third, and

Abstract

A circuit for providing a predetermined time delay after missile impact before detonation, and a self-destruct system controlled by the missile''s operation. The circuit utilizes a quad inverter fed by the self-destruct system and the contact delay system, in parallel, driving a firing system. The contact delay system is basically a one-shot multivibrator, utilizing pulses from piezoelectric crystals as inputs, and having an RC timing circuit to trigger the firing system. The self-destruct system utilizes a reduced voltage resulting from an extinquished gas generator to trigger the firing system. The firing system has an SCR gate triggered by the quad inverter output.

Description

Manning States Patent [1 1 451 Jan. 28, 19,75
-[22] Filed:
1 1 CONTACT DELAY AND SELF-DESTRUCT CIRCUIT [75] inventor: Larry G. Manning, China Lake,
Calif.
[73] Assignee: United States of America as represented by the Secretary of the Navy, Washington, D.C.
May 14, 1970 [21] Appl. No.: 48,589
3,571,609 3/1971 Knudson 102/702 X I Primary Examiner-Benjamin A. Borchelt Assistant Examiner-C. T. Jordan Attorney, Agent, or Firm-R. S. Sciasciu; Roy Miller;- Robert W. Adams [57] ABSTRACT A circuit for providing a predetermined time delay after missile impact before detonation, and a selfdestruct system controlled by the missile's operation.
. The circuit utilizes a quad inverter fed by the selfdestruct system and the contact delay system, in paralle1, driving a firing system. The contact delay system is basically a one-shot multivibrator, utilizing pulses from piezoelectric crystals as inputs, and having an RC timing circuit to trigger the firing system. The selfdestruct system utilizes a reduced voltage resulting from an extinquished gas generator to trigger the firing system. The firing system has an SCR gate triggered by the quad inverter output.
7 Claims, 5 Drawing Figures "l'ARG ET k DETECTION 84 ER DEVICE OUTPUT GE FIRING CIRCUIT 3,453,496 1/1969 3,559,582 2/1971 3,571,605 3/1971 Dobson et a1 102/702 X I? su| Y PL SELF- voLTAeE DESTRUCT CIRCUIT, I g
t av
22 INPUT st 24 CONTACT DELAY IL CIRCUIT 'PATEMIH] W628 I975 SHEET 10! 2 .PDnE-DO Fm muzmmmmwm M Mm mw 5 KW FMY mN L Mm Mm MM CONTACT DELAY AND SELF-DESTRUCT CIRCUIT GOVERNMENT INTEREST The invention described herein may be manufactured and used by or for the Government of the United States of America for governmental purposes without the payment of any royalties thereon or therefor.
BACKGROUND OF THE INVENTION The invention relates to the field of missile fuzing systems and, in particular, to the missiles hit and miss modes of operation.
Missile fuzing devices, prior to the present invention. gave a direct pulse to the target detecting device, and fired upon impact with no delay in time. The contact trigger circuits utilize transformer coupling, Shockley diodes and a relatively unregulated power supply. Inherent problems with the circuits are that Shockley diodes are difficult to obtain, and missile warhead misfiring caused by circuit transients can occur due to the relatively unregulated power supply and transformer coupling.
SUMMARY OF THE INVENTION The contact delay system utilizes readily available components, no magnetic components and a well regulated power supply. After the missile experiences contact with the target a time delay, controllable by the selection of one resistor and one capacitor, prevents the circuit from delivering a destruct pulse to the target detection device firing circuit until after a predetermined time. has expired- The self-destruct system takes advantage of a reduced-voltage supply caused by a reduction in the revolutions per minute of the missile turbo-generator, resulting from the lack of fuel in the missile gas generator, to provide a trigger pulse to the firing circuit. The target detection device firing circuit was designed to allow broad silicon controlled rectifier selection without reducing effectiveness.
BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a block diagram of the complete circuit;
FIG. 2 is a schematic diagram of the complete circuit;
FIG. 3 is a schematic diagram of the contact delay circuit;
FIG. 4 is a schematic diagram of the self-destruct circuit; and
FIG. 5 is a schematic diagram of the target detection device firing circuit.
DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to FIGS. 1 and 2 wherein the contact delay and self-destruct circuit consists of a contact delay circuit 10, a self-destruct circuit 12, a quad inverter driver stage 14, and a target detection device firing circuit 16; The contact delay circuit 10, the selfdestruct circuit 12, and the target detection device firing circuit 16 are shown individually in FIGS. 3, 4 and 5, and are not shown individually on FIG. 2 because certaincomponents are shared by two or more of the circuits.
Symbol Component Value or type 14 Quad inverter Motorola MC 927 G 20 (Supply Voltage) +25 volts 26 Resistor (as required) 28 Resistor (as required) 30 Resistor 20 Kilohm 32 Resistor (1.8 Kilohm 34 Diode 1N751A 36 Capacitor l microfarad, 20 volt 38 Resistor 820 ohm 4O Transistor 2N929 42 Capacitor 0.1 microfarad 44 Resistor 430 ohm, 3 watt 46 Diode lN7-SOA, 4.7 vol! 48 Resistor 10 Kilohm 50 Diode 1N753A, 6.2 volt 52 Resistor 2 Kilohm 54 Resistor 1.2l Kilohm, 1%, %watt 56 Capacitor l microfarad 58 Capacitor 0.1 microfarad 60 Resistor 2 Kilohm 62 Resistor 1.5 Kilohm 64 Diode 1N973B, 33 volt 66 Diode lNo45 68 Resistor 221 Kilohm, 1%, Vs watt 70 Diode 1N645 72 Silicon Controlled 2N1 874A 74 Resistor 470 Kilohm, 1%
76 Resistor 33 Kilohm 78 Capacitor l0 microtfarad, volt 80 Resistor l Kilohm 82 (TDD reference volts voltage) Referring now to FIG. 3 which shows the contact delay portion 10 of FIGS. 1 and 2. The circuit is basically a one-shot multivibrator which is held on by the charge time of resistor 54 and capacitor 56. A quad inverter 14 is used to develop the one-shot circuit. Transistor 40 is employed in the input circuit as a pulse inverter and crystal isolation stage, and provides a high level of rejection to noise on the missile supply line 20. The crystals, or any other means desired for providing inputs 22 and 24, are loaded by the as-required resistors 26 and 28. in series with the parallel combination of resistor 30, diode 34, and the input impedance of transistor 40. This loading dampens the crystal output and reduces ringing. The switching sensitivity of the input circuit is established by selecting the desired value of the as-required resistors 26 and 28.
The final transistor96 in the quad inverter 14 acts as a gate driver and transfers a positive pulse through diode 66 to the silicon controlled rectifier gate (SCR) 72. This pulse is of sufficient amplitude to fire" the SCR 72 over the design temperature range.
The timing of the circuit is described by equation l below.
t, charge time of capacitor 56 to voltage e,
R timing resistor 54 C timing capacitor 56 e final voltage required to switch transistor 94 e, transistor 94 base voltage at t E supply volts at pin 10 of quad inverter 14 K 1.15 This equation maps the charging rate of capacitor 56 immediately after transistor 90 is switchedon.
The total circuit delay can be computed by summing t, and the inherent contact crystal delay.
The operation is as follows: a negative pulse, generated by impulse stressing of the crystals, drives the base voltage of transistor 40 toward ground. This pulse is inverted through transistor 40 and appears at the collec-.
tor as a positive pulse. The zener diode 34 holds the base of transistor 40 at a positive 5 volt potential when a negative pulse is not present. Negative pulses are limited by the forward characteristics of diode 34 which prevents reverse base-to-emitter (BVeb) breakdown of transistor 40 by limiting the negative excursion at ground potential. v
The positive pulse at the collector of transistor 40 is then coupled by capacitor 42 to the base of transistor 90 which is normally cut-off. The combination of capacitor 42 and resistor 52 acts as a pulse shaping network. The positive pulse at transistor 90 will turn the transistor on if of adequate amplitude. A low impedance path-to-ground is thereby supplied through transistor 90, allowing capacitor 56 to .discharge. The voltage at pin 3 of quad inverter 14 switches sharply negative and cuts off transistor 94.
A positive voltage from the collector of transistor 94 is then fed to the base of transistor 92 (normally off) and turns it on. Transistor 92 now acts as the current path-to-ground. The positive voltage from the collector of transistor 94 is simultaneously fed to the differentiator consisting of capacitor 58 and resistor 60. The differentiator produces a positive pulse at the base of transistor 96 (normally on) and simply turns transistor 96 on harder.
Meanwhile, capacitor 56 is charging at the time rate equal to t,. As capacitor 56 charges, the circuit remains in the quasi-state described above and the voltage at pin 3 of quad inverter 14 swings slowly positive. When adequate base drive is achieved, transistor 94 turns on. The off time of transistor 94 is the circuit delay mechanism.
when transistor 94 switches on, transistor 92 switches off and the voltage at pin 3 of quad inverter 14 returns immediately to its original positive state. The input transistor 90 will remain off due to the absence of an input signal. This causes transistor 94 to saturate, producing a negative pulse out of the differentiator (capacitor 58 and resistor 60). The pulse cuts transistor 96 off and drives the collector voltage of transistor'96 positive. This output pulse is then coupled to the SCR gate 72 through'diode 66, thus firing", the SCR 72. At the completion of the pulse. transistor 96 turns on and the entire circuit cycles back to its original state.
The output pulse width at pin 6 is determined by the differentiator (capacitor 58 and resistor 60) discharge time. This pulse is always of adequate amplitude to fire the SCR 72.
Referring now to FIG. 4 which shows the sell" destruct portion 12 of FIGS. l and 2. The circuit was designed to remove base drive voltage from transistor 96 upon reaching a reduced value of missile supply voltage 20. Asthe missile gas generator burns out, the missile turbo generator slows down and causes a drop off in supply voltage 20. This voltage reduction feature is used for missile self-destruct.
When the base drive voltage to transistor 96 is sufficiently reduced, the transistor cuts-off and produces a positive voltage at the collector. This positive voltage is then coupled through diode 66 to the SCR gate 72. Theamplitude of this gate voltage is sufficient to cause the SCR 72 to fire over the designed temperature range. The coupling diode 66 is necessaryto prevent the saturation of transistor 96 from firing the SCR 72' at elevated temperatures. Using the components listed above, the operation of the self-destruct circuit 12 is as follows: with normal supply voltage applied transistor 96 is on and saturated. As the 25 volt supply 20 is lowered, transistor 96 starts out of saturation. When the supply is low enough the zener diode goes out of regulation and passes very low current. The voltage drop across resistor becomes insufficient to maintain transistor 96 on, therefore it shuts off. This causes the collector voltage of transistor 96 to go positive and thus fire the SCR 72. The supply voltage reduction resistor 44 is such that adequate voltage is left across zener diode 46 to produce, at minimum, a l-volt pulse across the SCR gate 72. This circuit will produce an output pulse at supply voltages of 9 12 volts, depending on tolerances and temperatures. This represents a supply voltage reduction of at least 50 percent.
Referring now to FIG. 5 which shows the target detection device firing circuit 16 of FIGS. 1 and 2. The principle of the target detection device (TDD) firing circuit is the same as in prior missile contact and selfdestruct circuits.
The main advantage of the circuit is the reduction of holding current requirements to a point that special SCR selection is no longer necessary. This was accomplished by increasing the value of resistor74 and placing zener diode 64 across the SCR 72 and diode 70. During the charging of capacitor 78, zener diode 64 acts as a high impedance, and the charge path is through resistors 76, 74, and 80. Thetime required to reach a minimum charge of 24 volts is below the maximum specified design value. Therefore, the use of the large series resistance 74 was justified. This large resistancelowered the anode current of the SCR 72 to a value which is below the SCR minimum holding current. The SCR gate resistor 68 was chosen as large as possible without jeopardizing the holding current requirements. Using the components listed above, the operation of the TDD firing circuit is as follows: upon application of the TDD battery voltage 82 to the circuit, capacitor 78 starts to charge toward a '33 volt final value. The SCR 72 is held off due to the lack of sufficient gate voltage. The capacitor 78 will be charged to 24 volts (minimum) in less than 1.2 seconds.
A positive voltage pulse greater than 0.8 volts applied to the SCR gate 72 will turn the SC R 72 on over all conditions. The SCR, in the on state, acts as a low impedance path-to-ground and allows capacitor 78 to discharge through the SCR 72 and load attached to the output 84. This discharge forms a negative voltage pulse across the load.
Supply voltage 20, in this embodiment. is the missile system filament voltage supply. Prior devices utilize the system gyro power supply 175 VDC) as the supply voltage 20, resulting in possible misfire due to circuit transients since the system gyro power is relatively unregulated. By using the missile system filament voltage supply the subject invention eliminates, or at least greatly reduces, the danger of warhead misfire since the filament voltage supply has better regulation.
What is claimed is: 1'. A fuze system for use in a projectile, comprising; first electrical means for providing a time delay after a first predetermined event before an electrical signal is provided as an output, wherein said first predetermined event is the projectiles contact with a target, including an input from a source responsive to said contact, a quad inverter coupled to the input and providing a time delayed output after the contact, and a time delay circuit coupled to said quad inverter for delaying the output of said quad inverter;
second electrical means for providing a time delay after a second predetermined event before an electrical signal is provided as an output; and
means for providing said electrical signal output after either said first or said second predetermined event.
2. The system of claim 1 wherein .said second electrical means is a means for detonating an explosive charge in said projectile at some time after said projectile's flight has been initiated.
3. The system of claim 1 wherein said time delay circuit comprises; a resistor and a capacitor.
4. The system of claim 1 wherein said first electrical means further includes;
a crystal, which provides an electric pulse when impulse stressed such as by impact, electrically con- Y nected to a one-shot multivibrator;
a one-shot multivibrator connected to said crystal for providing an electric signal to said electrical signal output providing means including said quad inverter; and wherein said electrical signal output providing means includes;
a firing circuit electrically connected to said multivibrator and triggerable by said multivibrator for providing an electric signal to said explosive charge.
5. The system of claim 1 wherein said second electrical means includes;
an electric generator;
means for reducing the voltage output of said generator,
control means for providing :an electric signal to said electrical signal output providing means when said generator voltage output is reduced; and wherein said electrical signal output providing means includes;
a firing circuit electrically connected to said control means and triggerable by said control means for providing an electric signal to said explosive charge.
6. The system of claim 1 wherein said electrical signal output providing means includes a firing circuit electrically connected to said quadinverter and triggerable by said quad inverter and electrically connected to said second electrical means and triggerable by said second electrical means.
7. The system of claim ll wherein said quad inverter includes first, second, third, and
fourth transistors and the base of said first transistor is effectively coupled to said input, the output terminal of said third transistor is coupled to the base of said second transistor, and the output terminals of said first and second transistors and the base of said third transistor are coupled to said time delay circuit.

Claims (7)

1. A fuze system for use in a projectile, comprising; first electrical means for providing a time delay after a first predetermined event before an electrical signal is provided as an output, wherein said first predetermined event is the projectile''s contact with a target, including an input from a source responsive to said contact, a quad inverter coupled to the input and providing a time delayed output after the contact, and a time delay circuit coupled to said quad inverter for delaying the output of said quad inverter; second electrical means for providing a time delay after a second predetermined event before an electrical signal is provided as an output; and means for providing said electrical signal output after either said first or said second predetermined event.
2. The system of claim 1 wherein said second electrical means is a means for detonating an explosive charge in said projectile at some time after said projectile''s flight has been initiated.
3. The system of claim 1 wherein said time delay circuit comprises; a resistor and a capacitor.
4. The system of claim 1 wherein said first electrical means further includes; a crystal, which provides an electric pulse when impulse stressed such as by impact, electrically connected to a one-shot multivibrator; a one-shot multivibrator connectEd to said crystal for providing an electric signal to said electrical signal output providing means including said quad inverter; and wherein said electrical signal output providing means includes; a firing circuit electrically connected to said multivibrator and triggerable by said multivibrator for providing an electric signal to said explosive charge.
5. The system of claim 1 wherein said second electrical means includes; an electric generator, means for reducing the voltage output of said generator, control means for providing an electric signal to said electrical signal output providing means when said generator voltage output is reduced; and wherein said electrical signal output providing means includes; a firing circuit electrically connected to said control means and triggerable by said control means for providing an electric signal to said explosive charge.
6. The system of claim 1 wherein said electrical signal output providing means includes a firing circuit electrically connected to said quad inverter and triggerable by said quad inverter and electrically connected to said second electrical means and triggerable by said second electrical means.
7. The system of claim 1 wherein said quad inverter includes first, second, third, and fourth transistors and the base of said first transistor is effectively coupled to said input, the output terminal of said third transistor is coupled to the base of said second transistor, and the output terminals of said first and second transistors and the base of said third transistor are coupled to said time delay circuit.
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Cited By (8)

* Cited by examiner, † Cited by third party
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US4136617A (en) * 1977-07-18 1979-01-30 The United States Of America As Represented By The Secretary Of The Navy Electronic delay detonator
JPS57164300A (en) * 1981-01-30 1982-10-08 Oerlikon Buehrle Holding Ag Arrival/departure fuse accompanying delay depending on flight time
US4480550A (en) * 1982-07-26 1984-11-06 Motorola, Inc. Relative velocity sensor for void sensing fuzes and the like
US4984519A (en) * 1988-02-16 1991-01-15 Nippon Oil And Fats Company, Limited Delay circuit for use in electric blasting system
US5387257A (en) * 1994-01-05 1995-02-07 The United States Of America As Represented By The Secretary Of The Army Self-destruct fuze for improved conventional munitions
US20040231547A1 (en) * 2003-05-20 2004-11-25 Keil Robert E. Fuze explosive ordance disposal circuit
US8281719B2 (en) * 2008-06-10 2012-10-09 Omnitek Partners LLC. Integrated power source and safety mechanisms for submunitions self-destruct fuze and the like
KR101331360B1 (en) * 2011-09-07 2013-11-19 주식회사 한화 fuse and method for self-destruct for sub-munition

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US3453496A (en) * 1968-03-28 1969-07-01 Us Army Fire control intervalometer
US3559582A (en) * 1968-12-27 1971-02-02 Energy Conversion Devices Inc Squib control circuit
US3571609A (en) * 1969-08-20 1971-03-23 Gen Lab Associates Inc Ignition apparatus selectively operable at different levels of discharge energy
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US3453496A (en) * 1968-03-28 1969-07-01 Us Army Fire control intervalometer
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Cited By (12)

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US4136617A (en) * 1977-07-18 1979-01-30 The United States Of America As Represented By The Secretary Of The Navy Electronic delay detonator
JPS57164300A (en) * 1981-01-30 1982-10-08 Oerlikon Buehrle Holding Ag Arrival/departure fuse accompanying delay depending on flight time
JPH0215799B2 (en) * 1981-01-30 1990-04-13 Berukutsuoiku Mas Fab Erikon Byuure Ag
US4480550A (en) * 1982-07-26 1984-11-06 Motorola, Inc. Relative velocity sensor for void sensing fuzes and the like
US4984519A (en) * 1988-02-16 1991-01-15 Nippon Oil And Fats Company, Limited Delay circuit for use in electric blasting system
US5387257A (en) * 1994-01-05 1995-02-07 The United States Of America As Represented By The Secretary Of The Army Self-destruct fuze for improved conventional munitions
WO1995018950A1 (en) * 1994-01-05 1995-07-13 United States Of America Secretary Of The Army Self-destruct fuse for improved conventional munitions
US20040231547A1 (en) * 2003-05-20 2004-11-25 Keil Robert E. Fuze explosive ordance disposal circuit
US6966261B2 (en) * 2003-05-20 2005-11-22 Alliant Techsystems Inc. Fuze explosive ordnance disposal circuit
US7331290B1 (en) 2003-05-20 2008-02-19 Alliant Techsystems Inc. Fuze explosive ordnance disposal (EOD) circuit
US8281719B2 (en) * 2008-06-10 2012-10-09 Omnitek Partners LLC. Integrated power source and safety mechanisms for submunitions self-destruct fuze and the like
KR101331360B1 (en) * 2011-09-07 2013-11-19 주식회사 한화 fuse and method for self-destruct for sub-munition

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