US5256994A - Programmable secondary clock generator - Google Patents
Programmable secondary clock generator Download PDFInfo
- Publication number
- US5256994A US5256994A US07/948,215 US94821592A US5256994A US 5256994 A US5256994 A US 5256994A US 94821592 A US94821592 A US 94821592A US 5256994 A US5256994 A US 5256994A
- Authority
- US
- United States
- Prior art keywords
- clock signal
- clock
- frequency
- ratio
- divided
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/68—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using pulse rate multipliers or dividers pulse rate multipliers or dividers per se
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation
Abstract
Description
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/948,215 US5256994A (en) | 1992-09-21 | 1992-09-21 | Programmable secondary clock generator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/948,215 US5256994A (en) | 1992-09-21 | 1992-09-21 | Programmable secondary clock generator |
Publications (1)
Publication Number | Publication Date |
---|---|
US5256994A true US5256994A (en) | 1993-10-26 |
Family
ID=25487491
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US07/948,215 Expired - Lifetime US5256994A (en) | 1992-09-21 | 1992-09-21 | Programmable secondary clock generator |
Country Status (1)
Country | Link |
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US (1) | US5256994A (en) |
Cited By (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5371772A (en) * | 1993-09-14 | 1994-12-06 | Intel Corporation | Programmable divider exhibiting a 50/50 duty cycle |
US5535377A (en) * | 1994-01-31 | 1996-07-09 | Dell Usa, L.P. | Method and apparatus for low latency synchronization of signals having different clock speeds |
US5537582A (en) * | 1993-05-21 | 1996-07-16 | Draeger; Jeffrey S. | Bus interface circuitry for synchronizing central processors running at multiple clock frequencies to other computer system circuitry |
US5734877A (en) * | 1992-09-09 | 1998-03-31 | Silicon Graphics, Inc. | Processor chip having on-chip circuitry for generating a programmable external clock signal and for controlling data patterns |
US5768560A (en) * | 1991-08-16 | 1998-06-16 | Cypress Semiconductor Corp. | Dynamically configurable memory system having a programmable controller including a frequency multiplier to maintain memory timing resolution for different bus speeds |
US5812832A (en) * | 1993-01-29 | 1998-09-22 | Advanced Micro Devices, Inc. | Digital clock waveform generator and method for generating a clock signal |
US5821784A (en) * | 1995-12-29 | 1998-10-13 | Intel Corporation | Method and apparatus for generating 2/N mode bus clock signals |
US5826067A (en) * | 1996-09-06 | 1998-10-20 | Intel Corporation | Method and apparatus for preventing logic glitches in a 2/n clocking scheme |
US5834956A (en) * | 1995-12-29 | 1998-11-10 | Intel Corporation | Core clock correction in a 2/N mode clocking scheme |
US5835970A (en) * | 1995-12-21 | 1998-11-10 | Cypress Semiconductor Corp. | Burst address generator having two modes of operation employing a linear/nonlinear counter using decoded addresses |
US5862373A (en) * | 1996-09-06 | 1999-01-19 | Intel Corporation | Pad cells for a 2/N mode clocking scheme |
US5877656A (en) * | 1995-10-30 | 1999-03-02 | Cypress Semiconductor Corp. | Programmable clock generator |
US5914996A (en) * | 1997-02-12 | 1999-06-22 | Intel Corporation | Multiple clock frequency divider with fifty percent duty cycle output |
US5923704A (en) * | 1996-03-25 | 1999-07-13 | Advanced Micro Devices, Inc. | Transmit clock generation system and method |
US6112307A (en) * | 1993-12-30 | 2000-08-29 | Intel Corporation | Method and apparatus for translating signals between clock domains of different frequencies |
US6114887A (en) * | 1995-12-29 | 2000-09-05 | Intel Corporation | Apparatus for generating bus clock signals with a 1/N characteristic in a 2/N mode clocking scheme |
US6188255B1 (en) | 1998-09-28 | 2001-02-13 | Cypress Semiconductor Corp. | Configurable clock generator |
US6377650B1 (en) | 1999-08-26 | 2002-04-23 | Texas Instruments Incorporated | Counter register monitor and update circuit for dual-clock system |
US6393502B1 (en) | 1999-08-31 | 2002-05-21 | Advanced Micro Devices, Inc. | System and method for initiating a serial data transfer between two clock domains |
US20020078273A1 (en) * | 2000-12-20 | 2002-06-20 | Jason Jacobs | Method and apparatus for controlling a multi-mode I/O interface |
US6462593B2 (en) | 1999-07-22 | 2002-10-08 | Sun Microsystems, Inc. | Compensation circuit for low phase offset for phase-locked loops |
US20020196886A1 (en) * | 2001-06-22 | 2002-12-26 | Adkisson Richard W. | SYNC pulse compensation and regeneration in a clock synchronizer controller |
US6584575B1 (en) | 1999-08-31 | 2003-06-24 | Advanced Micro Devices, Inc. | System and method for initializing source-synchronous data transfers using ratio bits |
US20030122630A1 (en) * | 1997-02-05 | 2003-07-03 | Fox Enterprises, Inc., A Florida Corporation | Programmable oscillator circuit |
US6614862B1 (en) | 1999-12-30 | 2003-09-02 | Sun Microsystems, Inc. | Encoded clocks to distribute multiple clock signals to multiple devices in a computer system |
US20040205325A1 (en) * | 1995-08-16 | 2004-10-14 | Microunity Systems Engineering, Inc. | Method and software for store multiplex operation |
US6965272B2 (en) | 1997-02-05 | 2005-11-15 | Fox Enterprises, Inc. | Worldwide marketing logistics network including strategically located centers for frequency programming crystal oscillators to customer specification |
US20070116165A1 (en) * | 2005-10-20 | 2007-05-24 | Fujitsu Limited | Asynchronous transmission device, asynchronous transmission method |
US7242229B1 (en) | 2001-05-06 | 2007-07-10 | Altera Corporation | Phase locked loop (PLL) and delay locked loop (DLL) counter and delay element programming in user mode |
US20080222398A1 (en) * | 1995-08-16 | 2008-09-11 | Micro Unity Systems Engineering, Inc. | Programmable processor with group floating-point operations |
US20090083498A1 (en) * | 1995-08-16 | 2009-03-26 | Craig Hansen | Programmable processor and method with wide operations |
EP2058722A1 (en) * | 2007-11-08 | 2009-05-13 | NEC Electronics Corporation | Signal processing apparatus |
US7849291B2 (en) | 1995-08-16 | 2010-12-07 | Microunity Systems Engineering, Inc. | Method and apparatus for performing improved group instructions |
US8073042B1 (en) | 2005-04-13 | 2011-12-06 | Cypress Semiconductor Corporation | Recursive range controller |
US20130129114A1 (en) * | 2011-11-21 | 2013-05-23 | Wolfson Microelectronics Plc | Clock generator |
US10340904B2 (en) | 2016-06-28 | 2019-07-02 | Altera Corporation | Method and apparatus for phase-aligned 2X frequency clock generation |
CN114397939A (en) * | 2022-01-20 | 2022-04-26 | 无锡驰翔创新科技有限公司 | Chip clock frequency trimming method, burning method and burner |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3383619A (en) * | 1966-12-09 | 1968-05-14 | Navy Usa | High speed digital control system for voltage controlled oscillator |
US4528523A (en) * | 1982-12-20 | 1985-07-09 | Rca Corporation | Fast tuned phase locked loop frequency control system |
US4968950A (en) * | 1989-12-18 | 1990-11-06 | Motorola, Inc. | PLL frequency synthesizer output control circuit |
-
1992
- 1992-09-21 US US07/948,215 patent/US5256994A/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3383619A (en) * | 1966-12-09 | 1968-05-14 | Navy Usa | High speed digital control system for voltage controlled oscillator |
US4528523A (en) * | 1982-12-20 | 1985-07-09 | Rca Corporation | Fast tuned phase locked loop frequency control system |
US4968950A (en) * | 1989-12-18 | 1990-11-06 | Motorola, Inc. | PLL frequency synthesizer output control circuit |
Cited By (73)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5768560A (en) * | 1991-08-16 | 1998-06-16 | Cypress Semiconductor Corp. | Dynamically configurable memory system having a programmable controller including a frequency multiplier to maintain memory timing resolution for different bus speeds |
US5978926A (en) * | 1992-09-09 | 1999-11-02 | Mips Technologies, Inc. | Processor chip for using an external clock to generate an internal clock and for using data transmit patterns in combination with the internal clock to control transmission of data words to an external memory |
US5734877A (en) * | 1992-09-09 | 1998-03-31 | Silicon Graphics, Inc. | Processor chip having on-chip circuitry for generating a programmable external clock signal and for controlling data patterns |
US5812832A (en) * | 1993-01-29 | 1998-09-22 | Advanced Micro Devices, Inc. | Digital clock waveform generator and method for generating a clock signal |
US5537582A (en) * | 1993-05-21 | 1996-07-16 | Draeger; Jeffrey S. | Bus interface circuitry for synchronizing central processors running at multiple clock frequencies to other computer system circuitry |
US5371772A (en) * | 1993-09-14 | 1994-12-06 | Intel Corporation | Programmable divider exhibiting a 50/50 duty cycle |
US6112307A (en) * | 1993-12-30 | 2000-08-29 | Intel Corporation | Method and apparatus for translating signals between clock domains of different frequencies |
US5535377A (en) * | 1994-01-31 | 1996-07-09 | Dell Usa, L.P. | Method and apparatus for low latency synchronization of signals having different clock speeds |
US7660972B2 (en) | 1995-08-16 | 2010-02-09 | Microunity Systems Engineering, Inc | Method and software for partitioned floating-point multiply-add operation |
US7526635B2 (en) | 1995-08-16 | 2009-04-28 | Micounity Systems Engineering, Inc. | Programmable processor and system for store multiplex operation |
US7849291B2 (en) | 1995-08-16 | 2010-12-07 | Microunity Systems Engineering, Inc. | Method and apparatus for performing improved group instructions |
US20040205325A1 (en) * | 1995-08-16 | 2004-10-14 | Microunity Systems Engineering, Inc. | Method and software for store multiplex operation |
US20040210746A1 (en) * | 1995-08-16 | 2004-10-21 | Microunity Systems Engineering, Inc. | Programmable processor and system for store multiplex operation |
US7653806B2 (en) | 1995-08-16 | 2010-01-26 | Microunity Systems Engineering, Inc. | Method and apparatus for performing improved group floating-point operations |
US7987344B2 (en) | 1995-08-16 | 2011-07-26 | Microunity Systems Engineering, Inc. | Multithreaded programmable processor and system with partitioned operations |
US7565515B2 (en) | 1995-08-16 | 2009-07-21 | Microunity Systems Engineering, Inc. | Method and software for store multiplex operation |
US8001360B2 (en) | 1995-08-16 | 2011-08-16 | Microunity Systems Engineering, Inc. | Method and software for partitioned group element selection operation |
US20080222398A1 (en) * | 1995-08-16 | 2008-09-11 | Micro Unity Systems Engineering, Inc. | Programmable processor with group floating-point operations |
US20090083498A1 (en) * | 1995-08-16 | 2009-03-26 | Craig Hansen | Programmable processor and method with wide operations |
US8289335B2 (en) | 1995-08-16 | 2012-10-16 | Microunity Systems Engineering, Inc. | Method for performing computations using wide operands |
US7464252B2 (en) | 1995-08-16 | 2008-12-09 | Microunity Systems Engineering, Inc. | Programmable processor and system for partitioned floating-point multiply-add operation |
US7430655B2 (en) | 1995-08-16 | 2008-09-30 | Microunity Systems Engineering, Inc. | Method and software for multithreaded processor with partitioned operations |
US6433645B1 (en) | 1995-10-30 | 2002-08-13 | Cypress Semiconductor Corp. | Programmable clock generator |
US5877656A (en) * | 1995-10-30 | 1999-03-02 | Cypress Semiconductor Corp. | Programmable clock generator |
US5835970A (en) * | 1995-12-21 | 1998-11-10 | Cypress Semiconductor Corp. | Burst address generator having two modes of operation employing a linear/nonlinear counter using decoded addresses |
US6208180B1 (en) | 1995-12-29 | 2001-03-27 | Intel Corporation | Core clock correction in a 2/N mode clocking scheme |
US6104219A (en) * | 1995-12-29 | 2000-08-15 | Intel Corporation | Method and apparatus for generating 2/N mode bus clock signals |
US5821784A (en) * | 1995-12-29 | 1998-10-13 | Intel Corporation | Method and apparatus for generating 2/N mode bus clock signals |
US6268749B1 (en) | 1995-12-29 | 2001-07-31 | Intel Corporation | Core clock correction in a 2/n mode clocking scheme |
US5834956A (en) * | 1995-12-29 | 1998-11-10 | Intel Corporation | Core clock correction in a 2/N mode clocking scheme |
US6114887A (en) * | 1995-12-29 | 2000-09-05 | Intel Corporation | Apparatus for generating bus clock signals with a 1/N characteristic in a 2/N mode clocking scheme |
US5923704A (en) * | 1996-03-25 | 1999-07-13 | Advanced Micro Devices, Inc. | Transmit clock generation system and method |
US5862373A (en) * | 1996-09-06 | 1999-01-19 | Intel Corporation | Pad cells for a 2/N mode clocking scheme |
US5826067A (en) * | 1996-09-06 | 1998-10-20 | Intel Corporation | Method and apparatus for preventing logic glitches in a 2/n clocking scheme |
US6664860B2 (en) | 1997-02-05 | 2003-12-16 | Fox Enterprises, Inc. | Programmable oscillator circuit and method |
US6954113B2 (en) | 1997-02-05 | 2005-10-11 | Fox Electronics, Inc. | Programmable oscillator circuit |
US20030122630A1 (en) * | 1997-02-05 | 2003-07-03 | Fox Enterprises, Inc., A Florida Corporation | Programmable oscillator circuit |
US6965272B2 (en) | 1997-02-05 | 2005-11-15 | Fox Enterprises, Inc. | Worldwide marketing logistics network including strategically located centers for frequency programming crystal oscillators to customer specification |
US5914996A (en) * | 1997-02-12 | 1999-06-22 | Intel Corporation | Multiple clock frequency divider with fifty percent duty cycle output |
US6188255B1 (en) | 1998-09-28 | 2001-02-13 | Cypress Semiconductor Corp. | Configurable clock generator |
US6388478B1 (en) | 1998-09-28 | 2002-05-14 | Cypress Semiconductor Corp. | Configurable clock generator |
US6462593B2 (en) | 1999-07-22 | 2002-10-08 | Sun Microsystems, Inc. | Compensation circuit for low phase offset for phase-locked loops |
US6377650B1 (en) | 1999-08-26 | 2002-04-23 | Texas Instruments Incorporated | Counter register monitor and update circuit for dual-clock system |
US6505261B1 (en) | 1999-08-31 | 2003-01-07 | Advanced Micro Devices, Inc. | System and method for initiating an operating frequency using dual-use signal lines |
US6668292B2 (en) | 1999-08-31 | 2003-12-23 | Advanced Micro Devices, Inc. | System and method for initiating a serial data transfer between two clock domains |
US6393502B1 (en) | 1999-08-31 | 2002-05-21 | Advanced Micro Devices, Inc. | System and method for initiating a serial data transfer between two clock domains |
US6584575B1 (en) | 1999-08-31 | 2003-06-24 | Advanced Micro Devices, Inc. | System and method for initializing source-synchronous data transfers using ratio bits |
US7065170B2 (en) | 1999-12-30 | 2006-06-20 | Sun Microsystems, Inc. | Encoded clocks to distribute multiple clock signals to multiple devices in a computer system |
US20040013215A1 (en) * | 1999-12-30 | 2004-01-22 | Sun Microsystems, Inc. | Encoded clocks to distribute multiple clock signals to multiple devices in a computer system |
US6614862B1 (en) | 1999-12-30 | 2003-09-02 | Sun Microsystems, Inc. | Encoded clocks to distribute multiple clock signals to multiple devices in a computer system |
US6715094B2 (en) * | 2000-12-20 | 2004-03-30 | Intel Corporation | Mult-mode I/O interface for synchronizing selected control patterns into control clock domain to obtain interface control signals to be transmitted to I/O buffers |
US20040143774A1 (en) * | 2000-12-20 | 2004-07-22 | Jason Jacobs | Method and apparatus for controlling a multi-mode I/O interface |
US20020078273A1 (en) * | 2000-12-20 | 2002-06-20 | Jason Jacobs | Method and apparatus for controlling a multi-mode I/O interface |
US7159135B2 (en) * | 2000-12-20 | 2007-01-02 | Intel Corporation | Method and apparatus for controlling a multi-mode I/O interface to enable an I/O buffer to transmit and receive data according to an I/O protocol |
US7242229B1 (en) | 2001-05-06 | 2007-07-10 | Altera Corporation | Phase locked loop (PLL) and delay locked loop (DLL) counter and delay element programming in user mode |
US20020196886A1 (en) * | 2001-06-22 | 2002-12-26 | Adkisson Richard W. | SYNC pulse compensation and regeneration in a clock synchronizer controller |
US8526558B1 (en) | 2005-04-13 | 2013-09-03 | Cypress Semiconductor Corporation | Recursive range controller |
US8073042B1 (en) | 2005-04-13 | 2011-12-06 | Cypress Semiconductor Corporation | Recursive range controller |
US20070116165A1 (en) * | 2005-10-20 | 2007-05-24 | Fujitsu Limited | Asynchronous transmission device, asynchronous transmission method |
US7602868B2 (en) * | 2005-10-20 | 2009-10-13 | Fujitsu Limited | Asynchronous transmission device, asynchronous transmission method |
US20090121767A1 (en) * | 2007-11-08 | 2009-05-14 | Nec Electronics Corporation | Signal processing apparatus |
CN101431602B (en) * | 2007-11-08 | 2012-04-18 | 瑞萨电子株式会社 | Signal processing apparatus |
EP2058722A1 (en) * | 2007-11-08 | 2009-05-13 | NEC Electronics Corporation | Signal processing apparatus |
US7760001B2 (en) | 2007-11-08 | 2010-07-20 | Nec Electronics Corporation | Signal processing apparatus |
US9281827B2 (en) * | 2011-11-21 | 2016-03-08 | Cirrus Logic International Semiconductor Ltd. | Clock generator |
US20130129114A1 (en) * | 2011-11-21 | 2013-05-23 | Wolfson Microelectronics Plc | Clock generator |
US10003344B2 (en) | 2011-11-21 | 2018-06-19 | Cirrus Logic, Inc. | Clock generator |
US10361709B2 (en) | 2011-11-21 | 2019-07-23 | Cirrus Logic, Inc. | Clock generator |
US10601430B2 (en) | 2011-11-21 | 2020-03-24 | Cirrus Logic, Inc. | Clock generator |
US11146277B2 (en) | 2011-11-21 | 2021-10-12 | Cirrus Logic, Inc. | Clock generator |
US11711086B2 (en) | 2011-11-21 | 2023-07-25 | Cirrus Logic, Inc. | Clock generator |
US10340904B2 (en) | 2016-06-28 | 2019-07-02 | Altera Corporation | Method and apparatus for phase-aligned 2X frequency clock generation |
CN114397939A (en) * | 2022-01-20 | 2022-04-26 | 无锡驰翔创新科技有限公司 | Chip clock frequency trimming method, burning method and burner |
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