US6020760A - I/O buffer circuit with pin multiplexing - Google Patents
I/O buffer circuit with pin multiplexing Download PDFInfo
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- US6020760A US6020760A US08/895,470 US89547097A US6020760A US 6020760 A US6020760 A US 6020760A US 89547097 A US89547097 A US 89547097A US 6020760 A US6020760 A US 6020760A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17736—Structural details of routing resources
- H03K19/17744—Structural details of routing resources for input/output signals
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Abstract
Description
TABLE I ______________________________________ P.sub.2 P.sub.1 P.sub.0 Output Multiplexer Selection ______________________________________ 000 A 001 QA 010B 011 QB 100 A(I/O CLK(0) = 0)/B(I/O CLK(0) = 1) 101 QA(I/O CLK(0) = 0/QB(I/O CLK(0) = 1) 110 A(I/O CLK(0) = 0)/B(I/O CLK(0) = 1) 111 QA(I/O CLK(0) = 0)/QB(I/O CLK(0) = 1) ______________________________________
TABLE II ______________________________________ Multiplexer Inputs CONFIG bits ______________________________________INV 58 2 1 D MUX 34, 44 2 R MUX 42, 52 2 A/B MUX 72, 74 2 enable CE MUX 38, 48 340, 50 3 C MUX OE MUX 62 5 ______________________________________
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Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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US08/895,470 US6020760A (en) | 1997-07-16 | 1997-07-16 | I/O buffer circuit with pin multiplexing |
US09/460,535 US6285211B1 (en) | 1997-07-16 | 1999-12-13 | I/O buffer circuit with pin multiplexing |
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US08/895,470 US6020760A (en) | 1997-07-16 | 1997-07-16 | I/O buffer circuit with pin multiplexing |
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US09/460,535 Continuation US6285211B1 (en) | 1997-07-16 | 1999-12-13 | I/O buffer circuit with pin multiplexing |
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US08/895,470 Expired - Lifetime US6020760A (en) | 1997-07-16 | 1997-07-16 | I/O buffer circuit with pin multiplexing |
US09/460,535 Expired - Lifetime US6285211B1 (en) | 1997-07-16 | 1999-12-13 | I/O buffer circuit with pin multiplexing |
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US09/460,535 Expired - Lifetime US6285211B1 (en) | 1997-07-16 | 1999-12-13 | I/O buffer circuit with pin multiplexing |
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