US6146970A - Capped shallow trench isolation and method of formation - Google Patents
Capped shallow trench isolation and method of formation Download PDFInfo
- Publication number
- US6146970A US6146970A US09/084,280 US8428098A US6146970A US 6146970 A US6146970 A US 6146970A US 8428098 A US8428098 A US 8428098A US 6146970 A US6146970 A US 6146970A
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- Prior art keywords
- trench
- active area
- region
- fill material
- forming
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/42—Simultaneous manufacture of periphery and memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (31)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/084,280 US6146970A (en) | 1998-05-26 | 1998-05-26 | Capped shallow trench isolation and method of formation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/084,280 US6146970A (en) | 1998-05-26 | 1998-05-26 | Capped shallow trench isolation and method of formation |
Publications (1)
Publication Number | Publication Date |
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US6146970A true US6146970A (en) | 2000-11-14 |
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Family Applications (1)
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US09/084,280 Expired - Lifetime US6146970A (en) | 1998-05-26 | 1998-05-26 | Capped shallow trench isolation and method of formation |
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US (1) | US6146970A (en) |
Cited By (146)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6284626B1 (en) * | 1999-04-06 | 2001-09-04 | Vantis Corporation | Angled nitrogen ion implantation for minimizing mechanical stress on side walls of an isolation trench |
US6291312B1 (en) * | 1999-08-02 | 2001-09-18 | Taiwan Semiconductor Manufacturing Co, Ltd. | Method for forming pullback opening above shallow trenc isolation structure |
US6344415B1 (en) * | 1999-09-15 | 2002-02-05 | United Microelectronics Corp. | Method for forming a shallow trench isolation structure |
US6362074B2 (en) * | 1998-12-29 | 2002-03-26 | Intel Corporation | Integrated circuit processing with improved gate electrode fabrication |
US6406976B1 (en) * | 2000-09-18 | 2002-06-18 | Motorola, Inc. | Semiconductor device and process for forming the same |
US6410379B2 (en) * | 1996-03-01 | 2002-06-25 | Sven E. Wahlstrom | Method of forming a submerged semiconductor structure |
US6444523B1 (en) * | 2001-04-04 | 2002-09-03 | Macronix International Co., Ltd. | Method for fabricating a memory device with a floating gate |
US6448135B1 (en) * | 1996-01-22 | 2002-09-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of fabricating same |
US6486038B1 (en) | 2001-03-12 | 2002-11-26 | Advanced Micro Devices | Method for and device having STI using partial etch trench bottom liner |
US6498383B2 (en) | 2001-05-23 | 2002-12-24 | International Business Machines Corporation | Oxynitride shallow trench isolation and method of formation |
US20020197837A1 (en) * | 2001-06-19 | 2002-12-26 | Kwak Noh-Yeal | Method of forming a MOS transistor of a semiconductor device |
US20030006487A1 (en) * | 2001-07-09 | 2003-01-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having element isolation structure |
US6521510B1 (en) | 2001-03-23 | 2003-02-18 | Advanced Micro Devices, Inc. | Method for shallow trench isolation with removal of strained island edges |
WO2003015159A2 (en) * | 2001-08-06 | 2003-02-20 | Infineon Technologies Ag | Trench isolation having a self-adjusting surface seal and method for producing one such trench isolation |
US6524929B1 (en) | 2001-02-26 | 2003-02-25 | Advanced Micro Devices, Inc. | Method for shallow trench isolation using passivation material for trench bottom liner |
US20030042556A1 (en) * | 2001-09-04 | 2003-03-06 | Koninklijke Philips Electronics N.V. | Semiconductor devices and their manufacture |
US6534379B1 (en) | 2001-03-26 | 2003-03-18 | Advanced Micro Devices, Inc. | Linerless shallow trench isolation method |
US6538286B1 (en) * | 1999-04-16 | 2003-03-25 | Hyundai Electronics Industries Co., Ltd. | Isolation structure and method for semiconductor device |
US6576949B1 (en) | 1999-08-30 | 2003-06-10 | Advanced Micro Devices, Inc. | Integrated circuit having optimized gate coupling capacitance |
US6580122B1 (en) * | 2001-03-20 | 2003-06-17 | Advanced Micro Devices, Inc. | Transistor device having an enhanced width dimension and a method of making same |
US6596607B2 (en) * | 2000-12-08 | 2003-07-22 | Samsung Electronics Co., Ltd. | Method of forming a trench type isolation layer |
US6599813B2 (en) * | 2001-06-29 | 2003-07-29 | International Business Machines Corporation | Method of forming shallow trench isolation for thin silicon-on-insulator substrates |
US6610580B1 (en) * | 2000-05-02 | 2003-08-26 | Advanced Micro Devices, Inc. | Flash memory array and a method and system of fabrication thereof |
US6642112B1 (en) * | 2001-07-30 | 2003-11-04 | Zilog, Inc. | Non-oxidizing spacer densification method for manufacturing semiconductor devices |
US6673696B1 (en) * | 2003-01-14 | 2004-01-06 | Advanced Micro Devices, Inc. | Post trench fill oxidation process for strained silicon processes |
US6682978B1 (en) * | 1999-08-30 | 2004-01-27 | Advanced Micro Devices, Inc. | Integrated circuit having increased gate coupling capacitance |
US20040016986A1 (en) * | 2002-07-26 | 2004-01-29 | Russell Meyer | Field isolation structures and methods of forming field isolation structures |
US20040016956A1 (en) * | 2002-07-29 | 2004-01-29 | Jeong-Hyuk Choi | Flash memory devices having a sloped trench isolation structure and methods of fabricating the same |
US20040046229A1 (en) * | 2001-11-08 | 2004-03-11 | Sundt Dirk J. | Structure and method for forming a faceted opening and layer filling therein |
US6737355B2 (en) * | 2001-12-06 | 2004-05-18 | Applied Materials, Inc. | Thick thermal oxide layers and isolation regions in a silicon-containing substrate for high voltage applications |
US20040102016A1 (en) * | 2001-09-20 | 2004-05-27 | Hynix Semiconductor Inc. | Method for forming an isolation region in a semiconductor device |
US20040137742A1 (en) * | 2003-01-14 | 2004-07-15 | Advanced Micro Devices, Inc. | Shallow trench isolation for strained silicon processes |
US20040142964A1 (en) * | 1999-07-02 | 2004-07-22 | Smithkline Beecham P.L.C. | Novel compounds |
US6767813B2 (en) * | 2000-10-28 | 2004-07-27 | Samsung Electronics Co., Ltd. | Integrated circuit devices having active regions with expanded effective widths and methods of manufacturing same |
WO2004066389A2 (en) * | 2003-01-22 | 2004-08-05 | Koninklijke Philips Electronics N.V. | Floating gate isolation and method of making |
US6777733B2 (en) * | 2000-11-03 | 2004-08-17 | International Business Machines Corporation | Method for forming dual workfunction high-performance support MOSFETs in EDRAM arrays |
US20040171271A1 (en) * | 2001-08-09 | 2004-09-02 | Samsung Electronics Co., Ltd. | Structure of trench isolation and a method of forming the same |
US20040180509A1 (en) * | 2003-03-14 | 2004-09-16 | Advanced Micro Devices, Inc. | Shallow trench isolation for strained silicon processes |
US6812115B2 (en) * | 2002-07-26 | 2004-11-02 | Advanced Micro Devices, Inc. | Method of filling an opening in a material layer with an insulating material |
US6825534B2 (en) * | 1999-06-04 | 2004-11-30 | International Business Machines Corporation | Semiconductor device on a combination bulk silicon and silicon-on-insulator (SOI) substrate |
US6828209B1 (en) * | 1999-10-15 | 2004-12-07 | Seiko Epson Corporation | Methods for manufacturing a semiconductor device including a trench isolation region |
US20040248374A1 (en) * | 2003-06-03 | 2004-12-09 | International Business Machines Corporation | Filling high aspect ratio isolation structures with polysilazane based material |
US6841824B2 (en) | 2002-09-04 | 2005-01-11 | Infineon Technologies Ag | Flash memory cell and the method of making separate sidewall oxidation |
US6844240B2 (en) * | 1998-04-16 | 2005-01-18 | Samsung Electronics Co., Ltd. | Semiconductor device having trench isolation |
US20050090072A1 (en) * | 2003-10-22 | 2005-04-28 | International Business Machines Corporation | Method for reducing shallow trench isolation consumption in semiconductor devices |
US20050095794A1 (en) * | 2003-10-22 | 2005-05-05 | Park Je-Min | Method of fabricating recess channel array transistor |
US20050095807A1 (en) * | 2003-01-14 | 2005-05-05 | Advanced Micro Devices, Inc. | Silicon buffered shallow trench isolation for strained silicon processes |
US20050101100A1 (en) * | 2003-11-06 | 2005-05-12 | General Electric Company | Integrated devices with optical and electrical isolation and method for making |
US20050106835A1 (en) * | 2003-11-18 | 2005-05-19 | Agere Systems Inc. | Trench isolation structure and method of manufacture therefor |
US20050151222A1 (en) * | 2004-01-12 | 2005-07-14 | Advanced Micro Devices, Inc. | Shallow trench isolation process and structure with minimized strained silicon consumption |
US6921709B1 (en) | 2003-07-15 | 2005-07-26 | Advanced Micro Devices, Inc. | Front side seal to prevent germanium outgassing |
US6962857B1 (en) | 2003-02-05 | 2005-11-08 | Advanced Micro Devices, Inc. | Shallow trench isolation process using oxide deposition and anneal |
US20050266647A1 (en) * | 2004-05-25 | 2005-12-01 | Kim Tae-Hyun | Method of manufacturing a semiconductor device |
US20060022299A1 (en) * | 2004-07-30 | 2006-02-02 | Hynix Semiconductor, Inc. | Semiconductor device with trench type device isolation layer and method for fabricating the same |
US20060038219A1 (en) * | 2004-08-23 | 2006-02-23 | Tin-Wei Wu | Memory device |
US20060113610A1 (en) * | 2004-11-26 | 2006-06-01 | Samsung Electronics Co., Ltd. | Nonvolatile memory device and method for manufacturing the same |
US20060141740A1 (en) * | 2004-12-23 | 2006-06-29 | Dongbuanam Semiconductor Inc. | Semiconductor device with shallow trench isolation and a manufacturing method thereof |
US20060160322A1 (en) * | 2005-01-17 | 2006-07-20 | International Business Machines Corporation | Nitridation of sti fill oxide to prevent the loss of sti fill oxide during manufacturing process |
US20060160363A1 (en) * | 2005-01-17 | 2006-07-20 | International Business Machines Corporation | Shallow trench isolation formation |
US20060211206A1 (en) * | 2005-03-18 | 2006-09-21 | Freescale Semiconductor, Inc. | Electronic devices including non-volatile memory and processes for forming the same |
US7112975B1 (en) * | 2003-03-26 | 2006-09-26 | Cypress Semiconductor Corporation | Advanced probe card and method of fabricating same |
US20060223272A1 (en) * | 2005-03-29 | 2006-10-05 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
US20060246671A1 (en) * | 2005-05-02 | 2006-11-02 | Jang Se A | Method of fabricating a transistor having a triple channel in a memory device |
US20060261436A1 (en) * | 2005-05-19 | 2006-11-23 | Freescale Semiconductor, Inc. | Electronic device including a trench field isolation region and a process for forming the same |
US20060267134A1 (en) * | 2005-05-10 | 2006-11-30 | Armin Tilke | Deep trench isolation structures and methods of formation thereof |
US20070045707A1 (en) * | 2005-08-31 | 2007-03-01 | Szu-Yu Wang | Memory device and manufacturing method thereof |
US7189628B1 (en) * | 2003-05-20 | 2007-03-13 | Lsi Logic Corporation | Fabrication of trenches with multiple depths on the same substrate |
US20070138518A1 (en) * | 2001-07-11 | 2007-06-21 | Renesas Technology Corp. | Semiconductor device and method of manufacturing thereof |
US20070148938A1 (en) * | 2005-12-23 | 2007-06-28 | Hynix Semiconductor, Inc. | Semiconductor device and method for fabricating the same |
US20070178660A1 (en) * | 2006-01-27 | 2007-08-02 | Gayle Miller | Polish stop and sealing layer for manufacture of semiconductor devices with deep trench isolation |
US20070210403A1 (en) * | 2006-03-07 | 2007-09-13 | Micron Technology, Inc. | Isolation regions and their formation |
US20070262393A1 (en) * | 2006-05-09 | 2007-11-15 | Samsung Electronics Co., Ltd. | Semiconductor devices and methods of forming the same |
US20080017903A1 (en) * | 2001-08-13 | 2008-01-24 | Renesas Technology Corp. | Method of fabricating a semiconductor device with a trench isolation structure and resulting semiconductor device |
US20080110019A1 (en) * | 2004-03-26 | 2008-05-15 | Nulty James E | Probe card and method for constructing same |
US7491622B2 (en) | 2006-04-24 | 2009-02-17 | Freescale Semiconductor, Inc. | Process of forming an electronic device including a layer formed using an inductively coupled plasma |
US7528078B2 (en) | 2006-05-12 | 2009-05-05 | Freescale Semiconductor, Inc. | Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer |
US20090184343A1 (en) * | 2008-01-23 | 2009-07-23 | Macronix International Co., Ltd. | Isolation structure, non-volatile memory having the same, and method of fabricating the same |
US20090224329A1 (en) * | 2008-03-06 | 2009-09-10 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method of semiconductor device |
US20090311854A1 (en) * | 2008-06-11 | 2009-12-17 | Han-Seob Cha | Method for forming gate of semiconductor device |
US7670895B2 (en) | 2006-04-24 | 2010-03-02 | Freescale Semiconductor, Inc | Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer |
US20100062583A1 (en) * | 2008-09-11 | 2010-03-11 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
US20100084706A1 (en) * | 2003-05-20 | 2010-04-08 | Kocon Christopher B | Power Semiconductor Devices and Methods of Manufacture |
US20100117188A1 (en) * | 2007-03-05 | 2010-05-13 | General Electric Company | Method for producing trench isolation in silicon carbide and gallium nitride and articles made thereby |
US7745352B2 (en) | 2007-08-27 | 2010-06-29 | Applied Materials, Inc. | Curing methods for silicon dioxide thin films deposited from alkoxysilane precursor with harp II process |
US20100167496A1 (en) * | 2008-12-26 | 2010-07-01 | Jae-Hyoung Koo | Method for forming device isolation layer of semiconductor device and non-volatile memory device |
US7790634B2 (en) | 2006-05-30 | 2010-09-07 | Applied Materials, Inc | Method for depositing and curing low-k films for gapfill and conformal film applications |
US7803722B2 (en) | 2007-10-22 | 2010-09-28 | Applied Materials, Inc | Methods for forming a dielectric layer within trenches |
US20100252905A1 (en) * | 2009-04-06 | 2010-10-07 | Polar Semiconductor, Inc. | Locos nitride capping of deep trench polysilicon fill |
US20100264497A1 (en) * | 2009-04-21 | 2010-10-21 | International Business Machines Corporation | Multiple Vt Field-Effect Transistor Devices |
US7825038B2 (en) | 2006-05-30 | 2010-11-02 | Applied Materials, Inc. | Chemical vapor deposition of high quality flow-like silicon dioxide using a silicon containing precursor and atomic oxygen |
US7867923B2 (en) | 2007-10-22 | 2011-01-11 | Applied Materials, Inc. | High quality silicon oxide films by remote plasma CVD from disilane precursors |
US7902080B2 (en) | 2006-05-30 | 2011-03-08 | Applied Materials, Inc. | Deposition-plasma cure cycle process to enhance film quality of silicon dioxide |
US7906982B1 (en) | 2006-02-28 | 2011-03-15 | Cypress Semiconductor Corporation | Interface apparatus and methods of testing integrated circuits using the same |
US7935643B2 (en) | 2009-08-06 | 2011-05-03 | Applied Materials, Inc. | Stress management for tensile films |
US20110101488A1 (en) * | 2009-10-30 | 2011-05-05 | Hyung-Hwan Kim | Semiconductor device and fabrication method thereof |
US20110108517A1 (en) * | 2009-11-09 | 2011-05-12 | Tokyo Electron Limited | Deep trench liner removal process |
US7943531B2 (en) | 2007-10-22 | 2011-05-17 | Applied Materials, Inc. | Methods for forming a silicon oxide layer over a substrate |
US20110183492A1 (en) * | 2007-07-09 | 2011-07-28 | Hanson Robert J | Methods of forming oxides, methods of forming semiconductor constructions, and methods of forming isolation regions |
US7989365B2 (en) | 2009-08-18 | 2011-08-02 | Applied Materials, Inc. | Remote plasma source seasoning |
US7994019B1 (en) | 2010-04-01 | 2011-08-09 | Applied Materials, Inc. | Silicon-ozone CVD with reduced pattern loading using incubation period deposition |
US20110250731A1 (en) * | 2010-04-12 | 2011-10-13 | Applied Materials, Inc. | Preferential dielectric gapfill |
US8043972B1 (en) | 2006-06-30 | 2011-10-25 | Novellus Systems, Inc. | Adsorption based material removal process |
US8187486B1 (en) | 2007-12-13 | 2012-05-29 | Novellus Systems, Inc. | Modulating etch selectivity and etch rate of silicon nitride thin films |
US8232176B2 (en) * | 2006-06-22 | 2012-07-31 | Applied Materials, Inc. | Dielectric deposition and etch back processes for bottom up gapfill |
US8236708B2 (en) | 2010-03-09 | 2012-08-07 | Applied Materials, Inc. | Reduced pattern loading using bis(diethylamino)silane (C8H22N2Si) as silicon precursor |
US8304351B2 (en) | 2010-01-07 | 2012-11-06 | Applied Materials, Inc. | In-situ ozone cure for radical-component CVD |
US8318584B2 (en) | 2010-07-30 | 2012-11-27 | Applied Materials, Inc. | Oxide-rich liner layer for flowable CVD gapfill |
US8329262B2 (en) | 2010-01-05 | 2012-12-11 | Applied Materials, Inc. | Dielectric film formation using inert gas excitation |
CN102867825A (en) * | 2005-04-06 | 2013-01-09 | 飞兆半导体公司 | Trenched-gate field effect transistors and methods of forming the same |
US8357435B2 (en) | 2008-05-09 | 2013-01-22 | Applied Materials, Inc. | Flowable dielectric equipment and processes |
FR2979750A1 (en) * | 2011-09-07 | 2013-03-08 | St Microelectronics Crolles 2 | METHOD OF MAKING A TRENCH OF INSULATION |
US20130099329A1 (en) * | 2011-10-25 | 2013-04-25 | Stmicroelectronics (Crolles 2) Sas | Method for manufacturing insulated-gate mos transistors |
US8445078B2 (en) | 2011-04-20 | 2013-05-21 | Applied Materials, Inc. | Low temperature silicon oxide conversion |
US8449942B2 (en) | 2009-11-12 | 2013-05-28 | Applied Materials, Inc. | Methods of curing non-carbon flowable CVD films |
US8450191B2 (en) | 2011-01-24 | 2013-05-28 | Applied Materials, Inc. | Polysilicon films by HDP-CVD |
US8466073B2 (en) | 2011-06-03 | 2013-06-18 | Applied Materials, Inc. | Capping layer for reduced outgassing |
US8524004B2 (en) | 2010-06-16 | 2013-09-03 | Applied Materials, Inc. | Loadlock batch ozone cure |
US20130260532A1 (en) * | 2012-03-29 | 2013-10-03 | Haizhou Yin | Method for Manufacturing Semiconductor Device |
US8551891B2 (en) | 2011-10-04 | 2013-10-08 | Applied Materials, Inc. | Remote plasma burn-in |
US8563445B2 (en) | 2010-03-05 | 2013-10-22 | Applied Materials, Inc. | Conformal layers by radical-component CVD |
US8617989B2 (en) | 2011-09-26 | 2013-12-31 | Applied Materials, Inc. | Liner property improvement |
US8629067B2 (en) | 2009-12-30 | 2014-01-14 | Applied Materials, Inc. | Dielectric film growth with radicals produced using flexible nitrogen/hydrogen ratio |
US8647992B2 (en) | 2010-01-06 | 2014-02-11 | Applied Materials, Inc. | Flowable dielectric using oxide liner |
US8664127B2 (en) | 2010-10-15 | 2014-03-04 | Applied Materials, Inc. | Two silicon-containing precursors for gapfill enhancing dielectric liner |
US20140087540A1 (en) * | 2012-08-28 | 2014-03-27 | Anpec Electronics Corporation | Method for forming trench isolation |
US8716154B2 (en) | 2011-03-04 | 2014-05-06 | Applied Materials, Inc. | Reduced pattern loading using silicon oxide multi-layers |
US8741788B2 (en) | 2009-08-06 | 2014-06-03 | Applied Materials, Inc. | Formation of silicon oxide using non-carbon flowable CVD processes |
US8748279B2 (en) * | 2011-08-16 | 2014-06-10 | Semiconductor Manufacturing International (Beijing) Corporation | Method of manufacturing a semiconductor device |
US8765491B2 (en) | 2010-10-28 | 2014-07-01 | International Business Machines Corporation | Shallow trench isolation recess repair using spacer formation process |
US20140242776A1 (en) * | 2007-06-07 | 2014-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained Isolation Regions |
US8859388B2 (en) | 2012-07-13 | 2014-10-14 | International Business Machines Corporation | Sealed shallow trench isolation region |
US8889566B2 (en) | 2012-09-11 | 2014-11-18 | Applied Materials, Inc. | Low cost flowable dielectric films |
US8916950B2 (en) | 2011-10-18 | 2014-12-23 | International Business Machines Corporation | Shallow trench isolation structure having a nitride plug |
US8980382B2 (en) | 2009-12-02 | 2015-03-17 | Applied Materials, Inc. | Oxygen-doping for non-carbon radical-component CVD films |
US9018108B2 (en) | 2013-01-25 | 2015-04-28 | Applied Materials, Inc. | Low shrinkage dielectric films |
US9285168B2 (en) | 2010-10-05 | 2016-03-15 | Applied Materials, Inc. | Module for ozone cure and post-cure moisture treatment |
US9404178B2 (en) | 2011-07-15 | 2016-08-02 | Applied Materials, Inc. | Surface treatment and deposition for reduced outgassing |
US9412581B2 (en) | 2014-07-16 | 2016-08-09 | Applied Materials, Inc. | Low-K dielectric gapfill by flowable deposition |
US9425041B2 (en) | 2015-01-06 | 2016-08-23 | Lam Research Corporation | Isotropic atomic layer etch for silicon oxides using no activation |
US9431268B2 (en) | 2015-01-05 | 2016-08-30 | Lam Research Corporation | Isotropic atomic layer etch for silicon and germanium oxides |
US9698043B1 (en) | 2016-05-20 | 2017-07-04 | International Business Machines Corporation | Shallow trench isolation for semiconductor devices |
US9759772B2 (en) | 2011-10-28 | 2017-09-12 | Teradyne, Inc. | Programmable test instrument |
US10283321B2 (en) | 2011-01-18 | 2019-05-07 | Applied Materials, Inc. | Semiconductor processing system and methods using capacitively coupled plasma |
US10776233B2 (en) | 2011-10-28 | 2020-09-15 | Teradyne, Inc. | Programmable test instrument |
US11380556B2 (en) | 2018-05-25 | 2022-07-05 | Lam Research Corporation | Thermal atomic layer etch with rapid temperature cycling |
US11637022B2 (en) | 2018-07-09 | 2023-04-25 | Lam Research Corporation | Electron excitation atomic layer etch |
Citations (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4571819A (en) * | 1984-11-01 | 1986-02-25 | Ncr Corporation | Method for forming trench isolation structures |
US4599136A (en) * | 1984-10-03 | 1986-07-08 | International Business Machines Corporation | Method for preparation of semiconductor structures and devices which utilize polymeric dielectric materials |
US4630343A (en) * | 1981-03-16 | 1986-12-23 | Fairchild Camera & Instrument Corp. | Product for making isolated semiconductor structure |
US4630356A (en) * | 1985-09-19 | 1986-12-23 | International Business Machines Corporation | Method of forming recessed oxide isolation with reduced steepness of the birds' neck |
US4631803A (en) * | 1985-02-14 | 1986-12-30 | Texas Instruments Incorporated | Method of fabricating defect free trench isolation devices |
US4656497A (en) * | 1984-11-01 | 1987-04-07 | Ncr Corporation | Trench isolation structures |
US4671851A (en) * | 1985-10-28 | 1987-06-09 | International Business Machines Corporation | Method for removing protuberances at the surface of a semiconductor wafer using a chem-mech polishing technique |
US4671970A (en) * | 1986-02-05 | 1987-06-09 | Ncr Corporation | Trench filling and planarization process |
US4689656A (en) * | 1984-06-25 | 1987-08-25 | International Business Machines Corporation | Method for forming a void free isolation pattern and resulting structure |
US4692992A (en) * | 1986-06-25 | 1987-09-15 | Rca Corporation | Method of forming isolation regions in a semiconductor device |
JPS6388866A (en) * | 1986-10-01 | 1988-04-19 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
US4740480A (en) * | 1984-06-25 | 1988-04-26 | Nec Corporation | Method for forming a semiconductor device with trench isolation structure |
US4791073A (en) * | 1987-11-17 | 1988-12-13 | Motorola Inc. | Trench isolation method for semiconductor devices |
US4824797A (en) * | 1985-10-31 | 1989-04-25 | International Business Machines Corporation | Self-aligned channel stop |
US4839306A (en) * | 1987-03-24 | 1989-06-13 | Oki Electric Industry Co., Ltd. | Method of manufacturing a trench filled with an insulating material in a semiconductor substrate |
US4847214A (en) * | 1988-04-18 | 1989-07-11 | Motorola Inc. | Method for filling trenches from a seed layer |
JPH0254557A (en) * | 1988-08-18 | 1990-02-23 | Seiko Epson Corp | Semiconductor device |
US4980306A (en) * | 1987-11-11 | 1990-12-25 | Seiko Instruments Inc. | Method of making a CMOS device with trench isolation device |
US5064683A (en) * | 1990-10-29 | 1991-11-12 | Motorola, Inc. | Method for polish planarizing a semiconductor substrate by using a boron nitride polish stop |
US5099304A (en) * | 1988-12-08 | 1992-03-24 | Nec Corporation | Semiconductor device with insulating isolation groove |
US5190889A (en) * | 1991-12-09 | 1993-03-02 | Motorola, Inc. | Method of forming trench isolation structure with germanium silicate filling |
US5387540A (en) * | 1993-09-30 | 1995-02-07 | Motorola Inc. | Method of forming trench isolation structure in an integrated circuit |
US5811347A (en) * | 1996-04-29 | 1998-09-22 | Advanced Micro Devices, Inc. | Nitrogenated trench liner for improved shallow trench isolation |
US5837612A (en) * | 1997-08-01 | 1998-11-17 | Motorola, Inc. | Silicon chemical mechanical polish etch (CMP) stop for reduced trench fill erosion and method for formation |
US5994200A (en) * | 1996-12-26 | 1999-11-30 | Lg Semicon Co., Ltd. | Trench isolation structure of a semiconductor device and a method for thereof |
US6020230A (en) * | 1998-04-22 | 2000-02-01 | Texas Instruments-Acer Incorporated | Process to fabricate planarized deep-shallow trench isolation having upper and lower portions with oxidized semiconductor trench fill in the upper portion and semiconductor trench fill in the lower portion |
US6057210A (en) * | 1998-04-21 | 2000-05-02 | Vanguard International Semiconductor Corporation | Method of making a shallow trench isolation for ULSI formation via in-direct CMP process |
US6057209A (en) * | 1997-07-10 | 2000-05-02 | Advanced Micro Devices, Inc. | Semiconductor device having a nitrogen bearing isolation region |
-
1998
- 1998-05-26 US US09/084,280 patent/US6146970A/en not_active Expired - Lifetime
Patent Citations (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4630343A (en) * | 1981-03-16 | 1986-12-23 | Fairchild Camera & Instrument Corp. | Product for making isolated semiconductor structure |
US4689656A (en) * | 1984-06-25 | 1987-08-25 | International Business Machines Corporation | Method for forming a void free isolation pattern and resulting structure |
US4740480A (en) * | 1984-06-25 | 1988-04-26 | Nec Corporation | Method for forming a semiconductor device with trench isolation structure |
US4599136A (en) * | 1984-10-03 | 1986-07-08 | International Business Machines Corporation | Method for preparation of semiconductor structures and devices which utilize polymeric dielectric materials |
US4656497A (en) * | 1984-11-01 | 1987-04-07 | Ncr Corporation | Trench isolation structures |
US4571819A (en) * | 1984-11-01 | 1986-02-25 | Ncr Corporation | Method for forming trench isolation structures |
US4631803A (en) * | 1985-02-14 | 1986-12-30 | Texas Instruments Incorporated | Method of fabricating defect free trench isolation devices |
US4630356A (en) * | 1985-09-19 | 1986-12-23 | International Business Machines Corporation | Method of forming recessed oxide isolation with reduced steepness of the birds' neck |
US4671851A (en) * | 1985-10-28 | 1987-06-09 | International Business Machines Corporation | Method for removing protuberances at the surface of a semiconductor wafer using a chem-mech polishing technique |
US4824797A (en) * | 1985-10-31 | 1989-04-25 | International Business Machines Corporation | Self-aligned channel stop |
US4671970A (en) * | 1986-02-05 | 1987-06-09 | Ncr Corporation | Trench filling and planarization process |
US4692992A (en) * | 1986-06-25 | 1987-09-15 | Rca Corporation | Method of forming isolation regions in a semiconductor device |
JPS6388866A (en) * | 1986-10-01 | 1988-04-19 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
US4839306A (en) * | 1987-03-24 | 1989-06-13 | Oki Electric Industry Co., Ltd. | Method of manufacturing a trench filled with an insulating material in a semiconductor substrate |
US4980306A (en) * | 1987-11-11 | 1990-12-25 | Seiko Instruments Inc. | Method of making a CMOS device with trench isolation device |
US4791073A (en) * | 1987-11-17 | 1988-12-13 | Motorola Inc. | Trench isolation method for semiconductor devices |
US4847214A (en) * | 1988-04-18 | 1989-07-11 | Motorola Inc. | Method for filling trenches from a seed layer |
JPH0254557A (en) * | 1988-08-18 | 1990-02-23 | Seiko Epson Corp | Semiconductor device |
US5099304A (en) * | 1988-12-08 | 1992-03-24 | Nec Corporation | Semiconductor device with insulating isolation groove |
US5064683A (en) * | 1990-10-29 | 1991-11-12 | Motorola, Inc. | Method for polish planarizing a semiconductor substrate by using a boron nitride polish stop |
US5190889A (en) * | 1991-12-09 | 1993-03-02 | Motorola, Inc. | Method of forming trench isolation structure with germanium silicate filling |
US5387540A (en) * | 1993-09-30 | 1995-02-07 | Motorola Inc. | Method of forming trench isolation structure in an integrated circuit |
US5811347A (en) * | 1996-04-29 | 1998-09-22 | Advanced Micro Devices, Inc. | Nitrogenated trench liner for improved shallow trench isolation |
US5994200A (en) * | 1996-12-26 | 1999-11-30 | Lg Semicon Co., Ltd. | Trench isolation structure of a semiconductor device and a method for thereof |
US6057209A (en) * | 1997-07-10 | 2000-05-02 | Advanced Micro Devices, Inc. | Semiconductor device having a nitrogen bearing isolation region |
US5837612A (en) * | 1997-08-01 | 1998-11-17 | Motorola, Inc. | Silicon chemical mechanical polish etch (CMP) stop for reduced trench fill erosion and method for formation |
US6057210A (en) * | 1998-04-21 | 2000-05-02 | Vanguard International Semiconductor Corporation | Method of making a shallow trench isolation for ULSI formation via in-direct CMP process |
US6020230A (en) * | 1998-04-22 | 2000-02-01 | Texas Instruments-Acer Incorporated | Process to fabricate planarized deep-shallow trench isolation having upper and lower portions with oxidized semiconductor trench fill in the upper portion and semiconductor trench fill in the lower portion |
Non-Patent Citations (8)
Title |
---|
B. Guiliaumot et al., "Flash EEPROM Cells using Shallow Trenen Isolator", 1996 IEEE Int'l. Non-Volatile Memory Tech. Conf., pp. 74-75. |
B. Guiliaumot et al., Flash EEPROM Cells using Shallow Trenen Isolator , 1996 IEEE Int l. Non Volatile Memory Tech. Conf., pp. 74 75. * |
Furukawa, et al., Gate Oxide Integrity of Shallow Trench Isolation Tech, Abstract No. 289, Electrochemical Society, Extended Abstracts, vol. 90 2, pp. 415 416. No Date. * |
Furukawa, et al., Gate Oxide Integrity of Shallow-Trench-Isolation Tech, Abstract No. 289, Electrochemical Society, Extended Abstracts, vol. 90-2, pp. 415-416. No Date. |
Lindenberger et al., "Submicron Mechanically Planarized Shallow Trench Isolation With Field Shield", IEEE 1991 VLSI Tech. Symp. Digest of Technical Papers, OISO, pp. 89-90. No Month. |
Lindenberger et al., Submicron Mechanically Planarized Shallow Trench Isolation With Field Shield , IEEE 1991 VLSI Tech. Symp. Digest of Technical Papers, OISO, pp. 89 90. No Month. * |
Simon Deleonibus et al., Differential Body Effect Analysis and Optimization of the LArge Tilt Implanted Sloped Shallow Trench Isolation Process (LATI STI), IEEE Jun. 1996 Proceedings Conf. on Non Volatile Memory Technology Conf., Cat. No. 96th8200, pp. L971 L973. * |
Simon Deleonibus et al., Differential Body Effect Analysis and Optimization of the LArge Tilt Implanted Sloped Shallow Trench Isolation Process (LATI-STI), IEEE Jun. 1996 Proceedings Conf. on Non-Volatile Memory Technology Conf., Cat. No. 96th8200, pp. L971-L973. |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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US6448135B1 (en) * | 1996-01-22 | 2002-09-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of fabricating same |
US6410379B2 (en) * | 1996-03-01 | 2002-06-25 | Sven E. Wahlstrom | Method of forming a submerged semiconductor structure |
US6844240B2 (en) * | 1998-04-16 | 2005-01-18 | Samsung Electronics Co., Ltd. | Semiconductor device having trench isolation |
US6495897B1 (en) | 1998-12-29 | 2002-12-17 | Intel Corporation | Integrated circuit having etch-resistant layer substantially covering shallow trench regions |
US6362074B2 (en) * | 1998-12-29 | 2002-03-26 | Intel Corporation | Integrated circuit processing with improved gate electrode fabrication |
US6284626B1 (en) * | 1999-04-06 | 2001-09-04 | Vantis Corporation | Angled nitrogen ion implantation for minimizing mechanical stress on side walls of an isolation trench |
US6538286B1 (en) * | 1999-04-16 | 2003-03-25 | Hyundai Electronics Industries Co., Ltd. | Isolation structure and method for semiconductor device |
US6933196B2 (en) | 1999-04-16 | 2005-08-23 | Hyundai Electronics Industries Co., Ltd. | Isolation structure and method for semiconductor device |
US6825534B2 (en) * | 1999-06-04 | 2004-11-30 | International Business Machines Corporation | Semiconductor device on a combination bulk silicon and silicon-on-insulator (SOI) substrate |
US7105536B2 (en) | 1999-07-02 | 2006-09-12 | Smithkline Beecham Plc | Compounds |
US20040142964A1 (en) * | 1999-07-02 | 2004-07-22 | Smithkline Beecham P.L.C. | Novel compounds |
US6291312B1 (en) * | 1999-08-02 | 2001-09-18 | Taiwan Semiconductor Manufacturing Co, Ltd. | Method for forming pullback opening above shallow trenc isolation structure |
US6682978B1 (en) * | 1999-08-30 | 2004-01-27 | Advanced Micro Devices, Inc. | Integrated circuit having increased gate coupling capacitance |
US6576949B1 (en) | 1999-08-30 | 2003-06-10 | Advanced Micro Devices, Inc. | Integrated circuit having optimized gate coupling capacitance |
US6344415B1 (en) * | 1999-09-15 | 2002-02-05 | United Microelectronics Corp. | Method for forming a shallow trench isolation structure |
US6828209B1 (en) * | 1999-10-15 | 2004-12-07 | Seiko Epson Corporation | Methods for manufacturing a semiconductor device including a trench isolation region |
US6610580B1 (en) * | 2000-05-02 | 2003-08-26 | Advanced Micro Devices, Inc. | Flash memory array and a method and system of fabrication thereof |
US6406976B1 (en) * | 2000-09-18 | 2002-06-18 | Motorola, Inc. | Semiconductor device and process for forming the same |
US7187032B2 (en) | 2000-10-28 | 2007-03-06 | Samsung Electronics Co., Ltd | Integrated circuit devices having active regions with expanded effective widths |
US20070120183A1 (en) * | 2000-10-28 | 2007-05-31 | Lee Kang-Yoon | Integrated circuit devices having active regions with expanded effective widths |
US6767813B2 (en) * | 2000-10-28 | 2004-07-27 | Samsung Electronics Co., Ltd. | Integrated circuit devices having active regions with expanded effective widths and methods of manufacturing same |
US7521753B2 (en) | 2000-10-28 | 2009-04-21 | Samsung Electronics Co., Ltd. | Integrated circuit devices having active regions with expanded effective widths |
US20040227208A1 (en) * | 2000-10-28 | 2004-11-18 | Lee Kang-Yoon | Integated circuit devices having active regions with expanded effective widths |
US6777733B2 (en) * | 2000-11-03 | 2004-08-17 | International Business Machines Corporation | Method for forming dual workfunction high-performance support MOSFETs in EDRAM arrays |
US20040180492A1 (en) * | 2000-11-03 | 2004-09-16 | International Business Machines Corporation | Method for forming dual workfunction high-performance support MOSFETs in EDRAM arrays |
US6596607B2 (en) * | 2000-12-08 | 2003-07-22 | Samsung Electronics Co., Ltd. | Method of forming a trench type isolation layer |
US6524929B1 (en) | 2001-02-26 | 2003-02-25 | Advanced Micro Devices, Inc. | Method for shallow trench isolation using passivation material for trench bottom liner |
US6747333B1 (en) | 2001-02-26 | 2004-06-08 | Advanced Micro Devices, Inc. | Method and apparatus for STI using passivation material for trench bottom liner |
US6486038B1 (en) | 2001-03-12 | 2002-11-26 | Advanced Micro Devices | Method for and device having STI using partial etch trench bottom liner |
US6580122B1 (en) * | 2001-03-20 | 2003-06-17 | Advanced Micro Devices, Inc. | Transistor device having an enhanced width dimension and a method of making same |
US6521510B1 (en) | 2001-03-23 | 2003-02-18 | Advanced Micro Devices, Inc. | Method for shallow trench isolation with removal of strained island edges |
US6534379B1 (en) | 2001-03-26 | 2003-03-18 | Advanced Micro Devices, Inc. | Linerless shallow trench isolation method |
US6444523B1 (en) * | 2001-04-04 | 2002-09-03 | Macronix International Co., Ltd. | Method for fabricating a memory device with a floating gate |
US20040106267A1 (en) * | 2001-05-23 | 2004-06-03 | International Business Machines Corporation | Oxynitride shallow trench isolation and method of formation |
US6764922B2 (en) | 2001-05-23 | 2004-07-20 | International Business Machines Corporation | Method of formation of an oxynitride shallow trench isolation |
CN1332434C (en) * | 2001-05-23 | 2007-08-15 | 国际商业机器公司 | Oxynitride shallow trench isolation and method of formation |
US6498383B2 (en) | 2001-05-23 | 2002-12-24 | International Business Machines Corporation | Oxynitride shallow trench isolation and method of formation |
US6709951B2 (en) | 2001-05-23 | 2004-03-23 | International Business Machines Corporation | Oxynitride shallow trench isolation and method of formation |
US6699744B2 (en) | 2001-06-19 | 2004-03-02 | Hynix Semiconductor Inc. | Method of forming a MOS transistor of a semiconductor device |
US20020197837A1 (en) * | 2001-06-19 | 2002-12-26 | Kwak Noh-Yeal | Method of forming a MOS transistor of a semiconductor device |
US6599813B2 (en) * | 2001-06-29 | 2003-07-29 | International Business Machines Corporation | Method of forming shallow trench isolation for thin silicon-on-insulator substrates |
US20040152281A1 (en) * | 2001-07-09 | 2004-08-05 | Renesas Technology Corp. | Semiconductor device having element isolation structure |
US20030006487A1 (en) * | 2001-07-09 | 2003-01-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having element isolation structure |
US20100140681A1 (en) * | 2001-07-11 | 2010-06-10 | Renesas Technology Corp. | Semiconductor device and method of manufacturing therefor |
US20070138518A1 (en) * | 2001-07-11 | 2007-06-21 | Renesas Technology Corp. | Semiconductor device and method of manufacturing thereof |
US7683455B2 (en) * | 2001-07-11 | 2010-03-23 | Renesas Technology Corp. | Semiconductor device and method of manufacturing thereof |
US6642112B1 (en) * | 2001-07-30 | 2003-11-04 | Zilog, Inc. | Non-oxidizing spacer densification method for manufacturing semiconductor devices |
US6849510B2 (en) | 2001-07-30 | 2005-02-01 | Zilog, Inc. | Non-oxidizing spacer densification method for manufacturing semiconductor devices |
US20040072397A1 (en) * | 2001-07-30 | 2004-04-15 | Zilog, Inc. | Non-oxidizing spacer densification method for manufacturing semiconductor devices |
WO2003015159A2 (en) * | 2001-08-06 | 2003-02-20 | Infineon Technologies Ag | Trench isolation having a self-adjusting surface seal and method for producing one such trench isolation |
US7294902B2 (en) | 2001-08-06 | 2007-11-13 | Infineon Technologies Ag | Trench isolation having a self-adjusting surface seal and method for producing one such trench isolation |
DE10138510A1 (en) * | 2001-08-06 | 2003-03-06 | Infineon Technologies Ag | Trench isolation with self-adjusting surface sealing and method for producing such trench isolation |
US20050040134A1 (en) * | 2001-08-06 | 2005-02-24 | Infineon Technologies Ag | Trench isolation having a self-adjusting surface seal and method for producing one such trench isolation |
DE10138510B4 (en) * | 2001-08-06 | 2006-08-10 | Infineon Technologies Ag | Trench isolation with self-aligning surface seal and method of making such trench isolation |
WO2003015159A3 (en) * | 2001-08-06 | 2003-10-09 | Infineon Technologies Ag | Trench isolation having a self-adjusting surface seal and method for producing one such trench isolation |
US20040171271A1 (en) * | 2001-08-09 | 2004-09-02 | Samsung Electronics Co., Ltd. | Structure of trench isolation and a method of forming the same |
US7160787B2 (en) * | 2001-08-09 | 2007-01-09 | Samsung Electronics Co., Ltd. | Structure of trench isolation and a method of forming the same |
US7808031B2 (en) * | 2001-08-13 | 2010-10-05 | Renesas Technology Corp. | Method of fabricating a semiconductor device with a trench isolation structure and resulting semiconductor device |
US20080017903A1 (en) * | 2001-08-13 | 2008-01-24 | Renesas Technology Corp. | Method of fabricating a semiconductor device with a trench isolation structure and resulting semiconductor device |
US20030042556A1 (en) * | 2001-09-04 | 2003-03-06 | Koninklijke Philips Electronics N.V. | Semiconductor devices and their manufacture |
US6780714B2 (en) * | 2001-09-04 | 2004-08-24 | Koninklijke Philips Electronics N.V. | Semiconductor devices and their manufacture |
US20040102016A1 (en) * | 2001-09-20 | 2004-05-27 | Hynix Semiconductor Inc. | Method for forming an isolation region in a semiconductor device |
US20040046229A1 (en) * | 2001-11-08 | 2004-03-11 | Sundt Dirk J. | Structure and method for forming a faceted opening and layer filling therein |
US6737355B2 (en) * | 2001-12-06 | 2004-05-18 | Applied Materials, Inc. | Thick thermal oxide layers and isolation regions in a silicon-containing substrate for high voltage applications |
US20040016986A1 (en) * | 2002-07-26 | 2004-01-29 | Russell Meyer | Field isolation structures and methods of forming field isolation structures |
US6812115B2 (en) * | 2002-07-26 | 2004-11-02 | Advanced Micro Devices, Inc. | Method of filling an opening in a material layer with an insulating material |
US6723618B2 (en) * | 2002-07-26 | 2004-04-20 | Micron Technology, Inc. | Methods of forming field isolation structures |
US20050245029A1 (en) * | 2002-07-29 | 2005-11-03 | Jeong-Hyuk Choi | Methods of fabricating flash memory devices having a sloped trench isolation structure |
US20040016956A1 (en) * | 2002-07-29 | 2004-01-29 | Jeong-Hyuk Choi | Flash memory devices having a sloped trench isolation structure and methods of fabricating the same |
US6927447B2 (en) * | 2002-07-29 | 2005-08-09 | Samsung Electronics Co., Ltd. | Flash memory devices having a sloped trench isolation structure |
US7494868B2 (en) | 2002-07-29 | 2009-02-24 | Samsung Electronics Co., Ltd. | Methods of fabricating flash memory devices having a sloped trench isolation structure |
US20050040474A1 (en) * | 2002-09-04 | 2005-02-24 | Danny Shum | Flash memory cell and the method of making separate sidewall oxidation |
US6841824B2 (en) | 2002-09-04 | 2005-01-11 | Infineon Technologies Ag | Flash memory cell and the method of making separate sidewall oxidation |
US7081381B2 (en) | 2002-09-04 | 2006-07-25 | Infineon Technologies Ag | Flash memory cell and the method of making separate sidewall oxidation |
US20050095807A1 (en) * | 2003-01-14 | 2005-05-05 | Advanced Micro Devices, Inc. | Silicon buffered shallow trench isolation for strained silicon processes |
US20040137742A1 (en) * | 2003-01-14 | 2004-07-15 | Advanced Micro Devices, Inc. | Shallow trench isolation for strained silicon processes |
US7238588B2 (en) | 2003-01-14 | 2007-07-03 | Advanced Micro Devices, Inc. | Silicon buffered shallow trench isolation |
US6673696B1 (en) * | 2003-01-14 | 2004-01-06 | Advanced Micro Devices, Inc. | Post trench fill oxidation process for strained silicon processes |
US7648886B2 (en) * | 2003-01-14 | 2010-01-19 | Globalfoundries Inc. | Shallow trench isolation process |
CN100438045C (en) * | 2003-01-22 | 2008-11-26 | Nxp股份有限公司 | Improved floating gate isolation and method of making the same |
WO2004066389A3 (en) * | 2003-01-22 | 2004-10-14 | Koninkl Philips Electronics Nv | Floating gate isolation and method of making |
US20060237769A1 (en) * | 2003-01-22 | 2006-10-26 | Koninklijke Philips Electronics N.V. | Floating gate isolation and method of making the same |
WO2004066389A2 (en) * | 2003-01-22 | 2004-08-05 | Koninklijke Philips Electronics N.V. | Floating gate isolation and method of making |
US7443725B2 (en) | 2003-01-22 | 2008-10-28 | Nxp B.V. | Floating gate isolation and method of making the same |
US6962857B1 (en) | 2003-02-05 | 2005-11-08 | Advanced Micro Devices, Inc. | Shallow trench isolation process using oxide deposition and anneal |
US7713834B2 (en) | 2003-03-14 | 2010-05-11 | Globalfoundries Inc. | Method of forming isolation regions for integrated circuits |
WO2004084299A2 (en) * | 2003-03-14 | 2004-09-30 | Advanced Micro Devices, Inc. | Shallow trench isolation in processes with strained silicon |
WO2004084299A3 (en) * | 2003-03-14 | 2004-11-04 | Advanced Micro Devices Inc | Shallow trench isolation in processes with strained silicon |
US20040180509A1 (en) * | 2003-03-14 | 2004-09-16 | Advanced Micro Devices, Inc. | Shallow trench isolation for strained silicon processes |
US20090047770A1 (en) * | 2003-03-14 | 2009-02-19 | Advanced Micro Devices, Inc. | Method of forming isolation regions for integrated circuits |
US7422961B2 (en) | 2003-03-14 | 2008-09-09 | Advanced Micro Devices, Inc. | Method of forming isolation regions for integrated circuits |
US7112975B1 (en) * | 2003-03-26 | 2006-09-26 | Cypress Semiconductor Corporation | Advanced probe card and method of fabricating same |
US8889511B2 (en) * | 2003-05-20 | 2014-11-18 | Fairchild Semiconductor Corporation | Methods of manufacturing power semiconductor devices with trenched shielded split gate transistor |
US7189628B1 (en) * | 2003-05-20 | 2007-03-13 | Lsi Logic Corporation | Fabrication of trenches with multiple depths on the same substrate |
US20100084706A1 (en) * | 2003-05-20 | 2010-04-08 | Kocon Christopher B | Power Semiconductor Devices and Methods of Manufacture |
US8350317B2 (en) | 2003-05-20 | 2013-01-08 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
US20040248374A1 (en) * | 2003-06-03 | 2004-12-09 | International Business Machines Corporation | Filling high aspect ratio isolation structures with polysilazane based material |
US6869860B2 (en) * | 2003-06-03 | 2005-03-22 | International Business Machines Corporation | Filling high aspect ratio isolation structures with polysilazane based material |
US6921709B1 (en) | 2003-07-15 | 2005-07-26 | Advanced Micro Devices, Inc. | Front side seal to prevent germanium outgassing |
US7361537B2 (en) * | 2003-10-22 | 2008-04-22 | Samsung Electronics Co., Ltd. | Method of fabricating recess channel array transistor |
US20050090072A1 (en) * | 2003-10-22 | 2005-04-28 | International Business Machines Corporation | Method for reducing shallow trench isolation consumption in semiconductor devices |
US6989318B2 (en) | 2003-10-22 | 2006-01-24 | International Business Machines Corporation | Method for reducing shallow trench isolation consumption in semiconductor devices |
US20050095794A1 (en) * | 2003-10-22 | 2005-05-05 | Park Je-Min | Method of fabricating recess channel array transistor |
US20050101100A1 (en) * | 2003-11-06 | 2005-05-12 | General Electric Company | Integrated devices with optical and electrical isolation and method for making |
US7285433B2 (en) * | 2003-11-06 | 2007-10-23 | General Electric Company | Integrated devices with optical and electrical isolation and method for making |
US20050106835A1 (en) * | 2003-11-18 | 2005-05-19 | Agere Systems Inc. | Trench isolation structure and method of manufacture therefor |
US7462549B2 (en) | 2004-01-12 | 2008-12-09 | Advanced Micro Devices, Inc. | Shallow trench isolation process and structure with minimized strained silicon consumption |
US20080213952A1 (en) * | 2004-01-12 | 2008-09-04 | Advanced Micro Devices, Inc. | Shallow trench isolation process and structure with minimized strained silicon consumption |
US20050151222A1 (en) * | 2004-01-12 | 2005-07-14 | Advanced Micro Devices, Inc. | Shallow trench isolation process and structure with minimized strained silicon consumption |
US7732336B2 (en) | 2004-01-12 | 2010-06-08 | Globalfoundries Inc. | Shallow trench isolation process and structure with minimized strained silicon consumption |
US7685705B2 (en) | 2004-03-26 | 2010-03-30 | Cypress Semiconductor Corporation | Method of fabricating a probe card |
US20080110019A1 (en) * | 2004-03-26 | 2008-05-15 | Nulty James E | Probe card and method for constructing same |
US20050266647A1 (en) * | 2004-05-25 | 2005-12-01 | Kim Tae-Hyun | Method of manufacturing a semiconductor device |
US7151043B2 (en) * | 2004-05-25 | 2006-12-19 | Samsung Electronics Co., Ltd. | Method of manufacturing a semiconductor device |
US20060022299A1 (en) * | 2004-07-30 | 2006-02-02 | Hynix Semiconductor, Inc. | Semiconductor device with trench type device isolation layer and method for fabricating the same |
US7579664B2 (en) * | 2004-07-30 | 2009-08-25 | Hynix Semiconductor Inc. | Semiconductor device with trench type device isolation layer and method for fabricating the same |
US7061041B2 (en) * | 2004-08-23 | 2006-06-13 | Winbond Electronics Corp. | Memory device |
US20060038219A1 (en) * | 2004-08-23 | 2006-02-23 | Tin-Wei Wu | Memory device |
US7525148B2 (en) * | 2004-11-26 | 2009-04-28 | Samsung Electronics Co., Ltd. | Nonvolatile memory device |
US20060113610A1 (en) * | 2004-11-26 | 2006-06-01 | Samsung Electronics Co., Ltd. | Nonvolatile memory device and method for manufacturing the same |
US20060141740A1 (en) * | 2004-12-23 | 2006-06-29 | Dongbuanam Semiconductor Inc. | Semiconductor device with shallow trench isolation and a manufacturing method thereof |
US20060220148A1 (en) * | 2005-01-17 | 2006-10-05 | International Business Machines Corporation | Shallow trench isolation formation |
US7087531B1 (en) | 2005-01-17 | 2006-08-08 | International Business Machines Corporation | Shallow trench isolation formation |
US20060160363A1 (en) * | 2005-01-17 | 2006-07-20 | International Business Machines Corporation | Shallow trench isolation formation |
US7652334B2 (en) | 2005-01-17 | 2010-01-26 | International Business Machines Corporation | Shallow trench isolation formation |
US7491563B2 (en) | 2005-01-17 | 2009-02-17 | International Business Machines Corporation | Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process |
US20080017932A1 (en) * | 2005-01-17 | 2008-01-24 | Toshiharu Furukawa | Shallow trench isolation formation |
US7491964B2 (en) * | 2005-01-17 | 2009-02-17 | International Business Machines Corporation | Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process |
US20060160322A1 (en) * | 2005-01-17 | 2006-07-20 | International Business Machines Corporation | Nitridation of sti fill oxide to prevent the loss of sti fill oxide during manufacturing process |
US7348634B2 (en) | 2005-01-17 | 2008-03-25 | International Business Machines Corporation | Shallow trench isolation formation |
US20060211206A1 (en) * | 2005-03-18 | 2006-09-21 | Freescale Semiconductor, Inc. | Electronic devices including non-volatile memory and processes for forming the same |
US7563662B2 (en) | 2005-03-18 | 2009-07-21 | Freescale Semiconductor, Inc. | Processes for forming electronic devices including non-volatile memory |
US20060223272A1 (en) * | 2005-03-29 | 2006-10-05 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
US7741185B2 (en) | 2005-03-29 | 2010-06-22 | Fujitsu Semiconductor Limited | Method of manufacturing semiconductor device |
US7442995B2 (en) * | 2005-03-29 | 2008-10-28 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
CN102867825A (en) * | 2005-04-06 | 2013-01-09 | 飞兆半导体公司 | Trenched-gate field effect transistors and methods of forming the same |
CN102867825B (en) * | 2005-04-06 | 2016-04-06 | 飞兆半导体公司 | Trenched-gate field effect transistors structure and forming method thereof |
US7687361B2 (en) * | 2005-05-02 | 2010-03-30 | Hynix Semiconductor Inc. | Method of fabricating a transistor having a triple channel in a memory device |
US20060246671A1 (en) * | 2005-05-02 | 2006-11-02 | Jang Se A | Method of fabricating a transistor having a triple channel in a memory device |
US20060267134A1 (en) * | 2005-05-10 | 2006-11-30 | Armin Tilke | Deep trench isolation structures and methods of formation thereof |
US20100203703A1 (en) * | 2005-05-10 | 2010-08-12 | Armin Tilke | Deep Trench Isolation Structures and Methods of Formation Thereof |
US8258028B2 (en) | 2005-05-10 | 2012-09-04 | Infineon Technologies Ag | Deep trench isolation structures and methods of formation thereof |
US7679130B2 (en) | 2005-05-10 | 2010-03-16 | Infineon Technologies Ag | Deep trench isolation structures and methods of formation thereof |
US20060261436A1 (en) * | 2005-05-19 | 2006-11-23 | Freescale Semiconductor, Inc. | Electronic device including a trench field isolation region and a process for forming the same |
US20070045707A1 (en) * | 2005-08-31 | 2007-03-01 | Szu-Yu Wang | Memory device and manufacturing method thereof |
US20080108194A1 (en) * | 2005-08-31 | 2008-05-08 | Szu-Yu Wang | Memory device and manufacturing method thereof |
US20070148938A1 (en) * | 2005-12-23 | 2007-06-28 | Hynix Semiconductor, Inc. | Semiconductor device and method for fabricating the same |
US20070178660A1 (en) * | 2006-01-27 | 2007-08-02 | Gayle Miller | Polish stop and sealing layer for manufacture of semiconductor devices with deep trench isolation |
US7435661B2 (en) | 2006-01-27 | 2008-10-14 | Atmel Corporation | Polish stop and sealing layer for manufacture of semiconductor devices with deep trench isolation |
US7906982B1 (en) | 2006-02-28 | 2011-03-15 | Cypress Semiconductor Corporation | Interface apparatus and methods of testing integrated circuits using the same |
US7811935B2 (en) * | 2006-03-07 | 2010-10-12 | Micron Technology, Inc. | Isolation regions and their formation |
US20070210403A1 (en) * | 2006-03-07 | 2007-09-13 | Micron Technology, Inc. | Isolation regions and their formation |
US8269306B2 (en) | 2006-03-07 | 2012-09-18 | Micron Technology, Inc. | Isolation regions |
US7670895B2 (en) | 2006-04-24 | 2010-03-02 | Freescale Semiconductor, Inc | Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer |
US7491622B2 (en) | 2006-04-24 | 2009-02-17 | Freescale Semiconductor, Inc. | Process of forming an electronic device including a layer formed using an inductively coupled plasma |
US20070262393A1 (en) * | 2006-05-09 | 2007-11-15 | Samsung Electronics Co., Ltd. | Semiconductor devices and methods of forming the same |
US7595253B2 (en) * | 2006-05-09 | 2009-09-29 | Samsung Electronics Co., Ltd. | Method of forming the semiconductor device |
US7528078B2 (en) | 2006-05-12 | 2009-05-05 | Freescale Semiconductor, Inc. | Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer |
US7790634B2 (en) | 2006-05-30 | 2010-09-07 | Applied Materials, Inc | Method for depositing and curing low-k films for gapfill and conformal film applications |
US7825038B2 (en) | 2006-05-30 | 2010-11-02 | Applied Materials, Inc. | Chemical vapor deposition of high quality flow-like silicon dioxide using a silicon containing precursor and atomic oxygen |
US7902080B2 (en) | 2006-05-30 | 2011-03-08 | Applied Materials, Inc. | Deposition-plasma cure cycle process to enhance film quality of silicon dioxide |
US8232176B2 (en) * | 2006-06-22 | 2012-07-31 | Applied Materials, Inc. | Dielectric deposition and etch back processes for bottom up gapfill |
TWI400755B (en) * | 2006-06-22 | 2013-07-01 | Applied Materials Inc | Dielectric deposition and etch back processes for bottom up gapfill |
US8043972B1 (en) | 2006-06-30 | 2011-10-25 | Novellus Systems, Inc. | Adsorption based material removal process |
US20100117188A1 (en) * | 2007-03-05 | 2010-05-13 | General Electric Company | Method for producing trench isolation in silicon carbide and gallium nitride and articles made thereby |
US20140242776A1 (en) * | 2007-06-07 | 2014-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained Isolation Regions |
US9564488B2 (en) * | 2007-06-07 | 2017-02-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained isolation regions |
US8962446B2 (en) * | 2007-07-09 | 2015-02-24 | Micron Technology, Inc. | Methods of forming oxides, methods of forming semiconductor constructions, and methods of forming isolation regions |
US20110183492A1 (en) * | 2007-07-09 | 2011-07-28 | Hanson Robert J | Methods of forming oxides, methods of forming semiconductor constructions, and methods of forming isolation regions |
US7745352B2 (en) | 2007-08-27 | 2010-06-29 | Applied Materials, Inc. | Curing methods for silicon dioxide thin films deposited from alkoxysilane precursor with harp II process |
US7867923B2 (en) | 2007-10-22 | 2011-01-11 | Applied Materials, Inc. | High quality silicon oxide films by remote plasma CVD from disilane precursors |
US7803722B2 (en) | 2007-10-22 | 2010-09-28 | Applied Materials, Inc | Methods for forming a dielectric layer within trenches |
US7943531B2 (en) | 2007-10-22 | 2011-05-17 | Applied Materials, Inc. | Methods for forming a silicon oxide layer over a substrate |
US8242031B2 (en) | 2007-10-22 | 2012-08-14 | Applied Materials, Inc. | High quality silicon oxide films by remote plasma CVD from disilane precursors |
US8187486B1 (en) | 2007-12-13 | 2012-05-29 | Novellus Systems, Inc. | Modulating etch selectivity and etch rate of silicon nitride thin films |
US8617348B1 (en) | 2007-12-13 | 2013-12-31 | Novellus Systems, Inc. | Modulating etch selectivity and etch rate of silicon nitride thin films |
US20090184343A1 (en) * | 2008-01-23 | 2009-07-23 | Macronix International Co., Ltd. | Isolation structure, non-volatile memory having the same, and method of fabricating the same |
US8653592B2 (en) | 2008-01-23 | 2014-02-18 | Macronix International Co., Ltd. | Isolation structure, non-volatile memory having the same, and method of fabricating the same |
US8067292B2 (en) * | 2008-01-23 | 2011-11-29 | Macronix International Co., Ltd. | Isolation structure, non-volatile memory having the same, and method of fabricating the same |
US8008728B2 (en) | 2008-03-06 | 2011-08-30 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method of semiconductor device |
US20090224329A1 (en) * | 2008-03-06 | 2009-09-10 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method of semiconductor device |
US8357435B2 (en) | 2008-05-09 | 2013-01-22 | Applied Materials, Inc. | Flowable dielectric equipment and processes |
US8557694B2 (en) * | 2008-06-11 | 2013-10-15 | Magnachip Semiconductor, Ltd. | Method for forming gate of semiconductor device |
US20090311854A1 (en) * | 2008-06-11 | 2009-12-17 | Han-Seob Cha | Method for forming gate of semiconductor device |
US20100062583A1 (en) * | 2008-09-11 | 2010-03-11 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
US8415228B2 (en) | 2008-09-11 | 2013-04-09 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of SOI substrate and semiconductor device |
US20100167496A1 (en) * | 2008-12-26 | 2010-07-01 | Jae-Hyoung Koo | Method for forming device isolation layer of semiconductor device and non-volatile memory device |
US8278185B2 (en) * | 2008-12-26 | 2012-10-02 | Hynix Semiconductor Inc. | Method for forming device isolation layer of semiconductor device and non-volatile memory device |
US8461661B2 (en) | 2009-04-06 | 2013-06-11 | Polar Semiconductor, Inc. | Locos nitride capping of deep trench polysilicon fill |
US20100252905A1 (en) * | 2009-04-06 | 2010-10-07 | Polar Semiconductor, Inc. | Locos nitride capping of deep trench polysilicon fill |
US8110467B2 (en) | 2009-04-21 | 2012-02-07 | International Business Machines Corporation | Multiple Vt field-effect transistor devices |
US20100264497A1 (en) * | 2009-04-21 | 2010-10-21 | International Business Machines Corporation | Multiple Vt Field-Effect Transistor Devices |
US8878298B2 (en) | 2009-04-21 | 2014-11-04 | International Business Machines Corporation | Multiple Vt field-effect transistor devices |
US8741788B2 (en) | 2009-08-06 | 2014-06-03 | Applied Materials, Inc. | Formation of silicon oxide using non-carbon flowable CVD processes |
US7935643B2 (en) | 2009-08-06 | 2011-05-03 | Applied Materials, Inc. | Stress management for tensile films |
US7989365B2 (en) | 2009-08-18 | 2011-08-02 | Applied Materials, Inc. | Remote plasma source seasoning |
CN102054740A (en) * | 2009-10-30 | 2011-05-11 | 海力士半导体有限公司 | Semiconductor device and fabrication method thereof |
US20110101488A1 (en) * | 2009-10-30 | 2011-05-05 | Hyung-Hwan Kim | Semiconductor device and fabrication method thereof |
US8198171B2 (en) * | 2009-10-30 | 2012-06-12 | Hynix Semiconductor Inc. | Semiconductor device and fabrication method thereof |
CN102087974A (en) * | 2009-11-09 | 2011-06-08 | 东京毅力科创株式会社 | Deep trench liner removal process |
CN102087974B (en) * | 2009-11-09 | 2013-09-25 | 东京毅力科创株式会社 | Deep trench liner removal process |
US20110108517A1 (en) * | 2009-11-09 | 2011-05-12 | Tokyo Electron Limited | Deep trench liner removal process |
US8313661B2 (en) * | 2009-11-09 | 2012-11-20 | Tokyo Electron Limited | Deep trench liner removal process |
US8449942B2 (en) | 2009-11-12 | 2013-05-28 | Applied Materials, Inc. | Methods of curing non-carbon flowable CVD films |
US8980382B2 (en) | 2009-12-02 | 2015-03-17 | Applied Materials, Inc. | Oxygen-doping for non-carbon radical-component CVD films |
US8629067B2 (en) | 2009-12-30 | 2014-01-14 | Applied Materials, Inc. | Dielectric film growth with radicals produced using flexible nitrogen/hydrogen ratio |
US8329262B2 (en) | 2010-01-05 | 2012-12-11 | Applied Materials, Inc. | Dielectric film formation using inert gas excitation |
US8647992B2 (en) | 2010-01-06 | 2014-02-11 | Applied Materials, Inc. | Flowable dielectric using oxide liner |
US8304351B2 (en) | 2010-01-07 | 2012-11-06 | Applied Materials, Inc. | In-situ ozone cure for radical-component CVD |
US8563445B2 (en) | 2010-03-05 | 2013-10-22 | Applied Materials, Inc. | Conformal layers by radical-component CVD |
US8236708B2 (en) | 2010-03-09 | 2012-08-07 | Applied Materials, Inc. | Reduced pattern loading using bis(diethylamino)silane (C8H22N2Si) as silicon precursor |
US7994019B1 (en) | 2010-04-01 | 2011-08-09 | Applied Materials, Inc. | Silicon-ozone CVD with reduced pattern loading using incubation period deposition |
US20110250731A1 (en) * | 2010-04-12 | 2011-10-13 | Applied Materials, Inc. | Preferential dielectric gapfill |
US8476142B2 (en) * | 2010-04-12 | 2013-07-02 | Applied Materials, Inc. | Preferential dielectric gapfill |
US8524004B2 (en) | 2010-06-16 | 2013-09-03 | Applied Materials, Inc. | Loadlock batch ozone cure |
US8318584B2 (en) | 2010-07-30 | 2012-11-27 | Applied Materials, Inc. | Oxide-rich liner layer for flowable CVD gapfill |
US9285168B2 (en) | 2010-10-05 | 2016-03-15 | Applied Materials, Inc. | Module for ozone cure and post-cure moisture treatment |
US8664127B2 (en) | 2010-10-15 | 2014-03-04 | Applied Materials, Inc. | Two silicon-containing precursors for gapfill enhancing dielectric liner |
US8765491B2 (en) | 2010-10-28 | 2014-07-01 | International Business Machines Corporation | Shallow trench isolation recess repair using spacer formation process |
US10283321B2 (en) | 2011-01-18 | 2019-05-07 | Applied Materials, Inc. | Semiconductor processing system and methods using capacitively coupled plasma |
US8450191B2 (en) | 2011-01-24 | 2013-05-28 | Applied Materials, Inc. | Polysilicon films by HDP-CVD |
US8716154B2 (en) | 2011-03-04 | 2014-05-06 | Applied Materials, Inc. | Reduced pattern loading using silicon oxide multi-layers |
US8445078B2 (en) | 2011-04-20 | 2013-05-21 | Applied Materials, Inc. | Low temperature silicon oxide conversion |
US8466073B2 (en) | 2011-06-03 | 2013-06-18 | Applied Materials, Inc. | Capping layer for reduced outgassing |
US9404178B2 (en) | 2011-07-15 | 2016-08-02 | Applied Materials, Inc. | Surface treatment and deposition for reduced outgassing |
US8748279B2 (en) * | 2011-08-16 | 2014-06-10 | Semiconductor Manufacturing International (Beijing) Corporation | Method of manufacturing a semiconductor device |
FR2979750A1 (en) * | 2011-09-07 | 2013-03-08 | St Microelectronics Crolles 2 | METHOD OF MAKING A TRENCH OF INSULATION |
US8617989B2 (en) | 2011-09-26 | 2013-12-31 | Applied Materials, Inc. | Liner property improvement |
US8551891B2 (en) | 2011-10-04 | 2013-10-08 | Applied Materials, Inc. | Remote plasma burn-in |
US8916950B2 (en) | 2011-10-18 | 2014-12-23 | International Business Machines Corporation | Shallow trench isolation structure having a nitride plug |
US9443929B2 (en) | 2011-10-18 | 2016-09-13 | International Business Machines Corporation | Shallow trench isolation structure having a nitride plug |
US20130099329A1 (en) * | 2011-10-25 | 2013-04-25 | Stmicroelectronics (Crolles 2) Sas | Method for manufacturing insulated-gate mos transistors |
US8878331B2 (en) * | 2011-10-25 | 2014-11-04 | Stmicroelectronics (Crolles 2) Sas | Method for manufacturing insulated-gate MOS transistors |
US10776233B2 (en) | 2011-10-28 | 2020-09-15 | Teradyne, Inc. | Programmable test instrument |
US9759772B2 (en) | 2011-10-28 | 2017-09-12 | Teradyne, Inc. | Programmable test instrument |
US20130260532A1 (en) * | 2012-03-29 | 2013-10-03 | Haizhou Yin | Method for Manufacturing Semiconductor Device |
US8859388B2 (en) | 2012-07-13 | 2014-10-14 | International Business Machines Corporation | Sealed shallow trench isolation region |
US20140087540A1 (en) * | 2012-08-28 | 2014-03-27 | Anpec Electronics Corporation | Method for forming trench isolation |
US8889566B2 (en) | 2012-09-11 | 2014-11-18 | Applied Materials, Inc. | Low cost flowable dielectric films |
US9018108B2 (en) | 2013-01-25 | 2015-04-28 | Applied Materials, Inc. | Low shrinkage dielectric films |
US9412581B2 (en) | 2014-07-16 | 2016-08-09 | Applied Materials, Inc. | Low-K dielectric gapfill by flowable deposition |
US9431268B2 (en) | 2015-01-05 | 2016-08-30 | Lam Research Corporation | Isotropic atomic layer etch for silicon and germanium oxides |
US9425041B2 (en) | 2015-01-06 | 2016-08-23 | Lam Research Corporation | Isotropic atomic layer etch for silicon oxides using no activation |
US10679868B2 (en) | 2015-01-06 | 2020-06-09 | Lam Research Corporation | Isotropic atomic layer etch for silicon oxides using no activation |
US9698043B1 (en) | 2016-05-20 | 2017-07-04 | International Business Machines Corporation | Shallow trench isolation for semiconductor devices |
US11380556B2 (en) | 2018-05-25 | 2022-07-05 | Lam Research Corporation | Thermal atomic layer etch with rapid temperature cycling |
US11637022B2 (en) | 2018-07-09 | 2023-04-25 | Lam Research Corporation | Electron excitation atomic layer etch |
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