|Número de publicación||US6177729 B1|
|Tipo de publicación||Concesión|
|Número de solicitud||US 09/303,290|
|Fecha de publicación||23 Ene 2001|
|Fecha de presentación||3 Abr 1999|
|Fecha de prioridad||3 Abr 1999|
|También publicado como||US6358627, US20010002330|
|Número de publicación||09303290, 303290, US 6177729 B1, US 6177729B1, US-B1-6177729, US6177729 B1, US6177729B1|
|Inventores||Joseph A. Benenati, Claude L. Bertin, William T. Chen, Thomas E. Dinan, Wayne F. Ellis, Wayne J. Howell, John U. Knickerbocker, Mark V. Pierson, William R. Tonti, Jerzy M. Zalesinski|
|Cesionario original||International Business Machines Corporation|
|Exportar cita||BiBTeX, EndNote, RefMan|
|Citas de patentes (13), Otras citas (3), Citada por (65), Clasificaciones (66), Eventos legales (7)|
|Enlaces externos: USPTO, Cesión de USPTO, Espacenet|
This invention generally relates to electrical connectors for semiconductor components. More particularly, it relates to a connector between an integrated circuit chip and a substrate. Even more particularly, it relates to a connector that provides a high degree of relief from thermal stress to provide a very reliable joint between an integrated circuit chip or package and a thermal expansion mismatched substrate.
Reliable interconnection of semiconductor integrated circuit chips and supporting substrates depends on avoiding stresses, including thermal expansion stresses, that can crack interconnects. Usually integrated circuits are mounted on supporting substrates made of material with a coefficient of thermal expansion that differs from the coefficient of thermal expansion of the material of the integrated circuit. For example, the integrated circuit may be formed of monocrystalline silicon with a coefficient of thermal expansion of 2.5×10−6 per ° C. and the supporting substrate may be formed of a ceramic material, such as alumina, with a coefficient of thermal expansion of 5.8×10−6 per ° C. In operation, the integrated circuit chip generates heat which raises the temperature of both the chip and the supporting substrate. Because of different temperatures and different coefficients of thermal expansion, the chip and substrate expand and contract different amounts. This difference in expansion imposes stresses on connections, such as the relatively rigid C4 solder bumps that are frequently used to provide an area array interconnection between a chip and a substrate. The stress on the solder bumps is directly proportional to (1) the magnitude of the temperature difference, (2) the distance of an individual bump from the neutral or central point of the solder bump array, and (3) the difference in the coefficients of thermal expansion of the material of the semiconductor device and the substrate, and inversely proportional to the height of the solder bond, that is the spacing between the IC chip and the support substrate.
Several factors are currently compounding the problem. As the solder bumps become smaller in diameter in order to accommodate the need for a greater density of interconnects between chip and substrate, the overall height of each solder bump decreases, reducing the fatigue life of the solder bumps. In addition, integrated circuit chip sizes are increasing which increases the distance of the outer solder bumps from the neutral point of the solder bump array, which in turn reduces the fatigue life of the solder bump. Furthermore, chips are now being directly mounted on substrates, such as PC boards, that have substantially larger coefficients of thermal expansion than ceramic, adding substantially to the stress on connectors. Thus, a better solution is needed that provides a way to reduce thermal stress and to provide a more reliable electrical connection, and this solution is provided by the following invention.
It is therefore an object of the present invention to provide a semiconductor assembly having connections with improved reliability.
It is another object of the present invention to provide a semiconductor assembly having connections that reduce thermal expansion mismatch stress and resist thermal fatigue and cracking due to thermal cycling.
It is another object of the present invention to provide an electrical connection between two substrates wherein a solid conductor in the connection is in substantially movable electrical contact with at least one of the substrates.
It is another object of the present invention to provide a pliable conductive material to facilitate the substantially movable conductor.
It is another object of the present invention to provide a movable conductor that can roll or slide.
It is another object of the present invention to provide a movable conductor that can stretch or bend a magnitude exceeding the elastic limit of a uniform metal.
It is a feature of one embodiment of the present invention that the movable contact is substantially elastic movement.
It is a feature of the present invention that the conductive material is an adhesive that bonds and provides electrical connection while permitting elastic movement of the movable conductor.
It is an advantage of the present invention that thermal stress is avoided despite large disparities in thermal expansion coefficient between chip and substrate.
It is an advantage of the present invention that a semiconductor assembly has good electrical connections while thermal stress is avoided despite large disparities in thermal expansion coefficient between chip and substrate.
These and other objects, features, and advantages of the invention are accomplished by providing a semiconductor assembly comprising a first substrate and a second substrate. The first substrate has a first contact pad and the second substrate has a second contact pad. In addition, the assembly includes a solid conductor and a material bonding the solid conductor wherein the solid conductor is in substantially movable contact with the first contact pad.
In one embodiment an integrated circuit chip has pads electrically connected to pads of a substrate through a metal ball and a pliable material. The pliable material bonds the metal ball in substantially movable contact with the pads. Because the ball is relatively free to move through the pliable material, thermal expansion differences that would ordinarily cause stress in an immovable joint simply cause the ball to roll across the pads as the chip and substrate freely expand or contract at their different rates. Thus, stress is avoided and reliability of the connection is substantially improved as compared with fixed connectors of the prior art.
The foregoing and other objects, features, and advantages of the invention will be apparent from the following detailed description of the invention, as illustrated in the accompanying drawings, in which:
FIG. 1 is a cross sectional view showing a chip and substrate electrically connected by ball conductors and conductive paste;
FIG. 2 is a cross sectional view of a ball conductor comprising a core and a highly conductive coating, the core comprising a base metal or a polymer, the highly conductive coating comprising a noble metal, such as gold;
FIG. 3 a is a cross sectional views of an alternate embodiment in which the ball conductor has conductive paste on one side and a stable fillet on the other side, the stable fillet being solder or a cured conductive adhesive;
FIG. 3 b is a cross sectional views of another embodiment in which the ball conductor has stable fillets on both sides, the stable fillet being solder or a cured conductive adhesive;
FIG. 3 c is are a cross sectional view of the embodiment of FIG. 3 b in a stretched configuration in response to differential thermal expansion of chip and substrate;
FIGS. 4 a-4 c are cross sectional views illustrating the steps of fabricating the connection of FIG. 1;
FIG. 5 a is a cross sectional view and FIGS. 5 b-5 c three dimensional views showing the application of the present invention for chip or wafer bum-in.
FIG. 6 a is a cross sectional view showing an embodiment of the invention in which a frame adds mechanical strength;
FIG. 6 b is a cross sectional view showing an embodiment of the invention in which stable fillets, such as C4 solder bumps or cured adhesive, add mechanical strength;
FIG. 7 is a three dimensional view showing chips mounted on cards according to the present invention;
FIG. 8 is a cross sectional view showing an alternate embodiment of the invention in which conductive adhesive is formed as columns, the ball conductor being embedded in each column; and
FIGS. 9 a and 9 b are cross sectional views showing an alternate embodiment of the invention in which a plurality of ball conductors comprising a core and a highly conductive coating are deformed during mounting to ensure connection to all ball conductors.
In one embodiment, the present invention provides an integrated circuit assembly in which pads of a first substrate are electrically connected to pads of a second substrate with rolling metal balls. A pliable material bonds the balls in movable contact with the pads. Because the balls are relatively free to move, thermal expansion differences that would ordinarily cause enormous stresses in the attached joints of the prior art, simply cause rolling of the balls of the present invention, avoiding stress altogether. Thus, reliability of the connections is substantially improved, and silicon chips can be safely directly mounted to such substrates as PC boards, despite substantial thermal expansion mismatch.
Conductive ball 20 and conductive paste 22 are used to connect each pad 24 of chip 26 with pad 27 of substrate 28, as shown in FIG. 1. Conductive ball 20 preferably has a dimension approximately equal to the width of pad 24, the connection between pad 24 and pad 27, or the separation distance between pad 24 and pad 27, as shown in FIG. 1. Conductive ball 20 can be a solid metal ball, formed of a material such as gold or copper. Conductive ball 20′ can also have a layered structure with base 30 and highly conductive coating 32 as shown in FIG. 2. Base 30 is formed of a base metal, such as copper, aluminum, or iron, or it can be formed of a polymer with significantly greater compliance than a metal or solder, such as silicone filled with particles of alumina or silica. The particles improve the mechanical properties of the ball, making it more stiff. Alternatively, base 30 can be formed of a metal filled polymer, such as silicone filled with gold, silver, or graphite. Although coating 32 is preferred, in this case it may not be necessary to provide a highly conductive coating. Highly conductive coating 32 is preferably a noble metal, such as gold, to avoid corrosion and provide low electrical resistance electrical contact, as is well known in the art. Conductive coating 32 can also be formed of copper, copper-nickel-gold, or another metal. Conductive coating 32 is provided with a thickness in the range from 200 A to 100 micrometers, more preferably in the range 0.5 to 5 micrometers.
Conductive paste 22 is formed of a material such as a metal filled conductive paste, for example, Polymer Metal Composite Paste (PMC) and Epo-tek, manufactured by Epoxy Technology. PMC is formed of a high temperature epoxy filled with a metal, such as gold. PMC has an resistivity of 10-30 micro-ohm-cm. and a viscosity of 75,000 to 200,000 Ps.
Conductive paste 22 makes electrical contact with pad 24, pad 27, and with conductive ball 20. While continuing to maintain electrical contact with paste 22, conductive ball 20 can roll or otherwise move through conductive paste 22. Preferably, paste 22 wets to ball 20 and maintains this wetting contact to ball 20 as ball 20 moves. Thus, electrical connection between pads 24 and 27 is maintained through paste 22 and ball 20 while chip 26 moves laterally with respect to substrate 28 in response to differential thermal expansion forces. Ball 20 rolls as chip 26 and substrate 28 move. In addition to providing improved reliability with respect to thermal expansion, this embodiment of the invention also provides advantage in that chips are mounted face down without the use of lead containing solder, avoiding a source of alpha particles that can cause soft errors while chip 26 is operating.
While providing paste 22 on both sides of ball 20 allows free movement for both chip 26 and substrate 28 as ball 20 moves through paste 22, substantial movement and stress-free results can also be achieved by providing conductive paste 22 on only one side of ball 20. Stable fillet 38, such as solder or cured conductive adhesive is used on the other side, as shown in FIG. 3 a. Conductive adhesives include cured PMC and cured Epo-tek. In the case illustrated in FIG. 3 a, conductive ball 20 is fixed to chip 26 with stable fillet 38 while conductive paste is provided between ball 20 and substrate 28. Of course, the roles of chip 26 and substrate 28 can be reversed, and stable fillet 38 can be applied on the side of substrate 28 while paste 22 is applied on the side of chip 26.
Furthermore, if ball 20, 20′ is sufficiently compliant for the size of chip 26, temperature range, and height, stable fillets 38 can be provided on both sides, as shown in FIG. 3 b. The ability of ball 20′ to stretch accommodates differential thermal expansion, as shown in FIG. 3 c. Gold coated polymer ball 20′ provides enormous compliance compared with standard metal ball 20 or standard lead-tin solder bumps. Alternatively, gold coated polymer ball 20′ can be replaced with a gold coated polymer column to further improve reliability. Thus, in many applications, rolling or sliding of ball 20 can be replaced with stretching or bending of gold coated polymer ball 20′, as shown in FIG. 3 c. Because of the enormously greater stretching permitted by polymer ball 20′ as compared with metal ball 20 or a C4 solder bump, a connector formed with polymer ball 20′ is considered to provide a substantially movable contact there between. Ball 20′ can now be attached on both sides with stable fillets 38, such as solder or a cured adhesive while still providing a substantially low-stress, flexible contact. Because of the enormous elastic flexibility of polymer ball 20′, chip 26 and substrate 28 still have substantial freedom to move, the movement stretching gold coated polymer ball 20′ without exceeding its elastic limit. Stable fillets 38 on either side of polymer ball 20′ have advantage in that they provide a strong permanent mechanical connection of chip 26 with substrate 28.
Steps in fabrication of the assembly are illustrated in FIGS. 4 a-4 c. In the first step, conductive paste deposit 40 a, is applied to each pad 24 of chip 26, as shown in FIG. 4 a. Similarly, a conductive paste deposit is applied to each pad of substrate 28 (not shown). In the next step, vacuum holder 42 is used to pick up array 44 of balls 20 corresponding to the location of pads 24 and 27 on chip 26 and substrate 28. Array 44 of balls 20 is pushed down into paste deposits 40 a, as shown in FIG. 4 c, on chip 26 and vacuum is released, providing balls 20 in electrical connection with compressed paste 22, which in turn is electrically connected to pad 24. In the next step, substrate 28, also having paste deposits, is aligned and pressed down on balls 20, as shown in FIG. 1. The mechanical and electrical connection between chip 26 and substrate 28 through ball 20 and paste 22 on either side of ball 20 is now complete. Alternatively, array 44 of balls 20 can first be mounted on substrate 28, and chip 24 mounted thereon.
A fabrication technique similar to that illustrated in FIGS. 4 a-4 c can be used to provide a stable fillet on one or both sides of solder ball 20. Stable fillets include conductive polymeric adhesive, conductive epoxy, and solder. In this case, a curing step or elevated temperature reflow step is provided after the ball has been inserted in the deposit of conductive material shown in FIG. 4 c. For the embodiment of the invention having cured epoxy on both sides of ball 20, a single curing step can be used to cure the epoxy on both sides. Solder paste can be used to provide solder fillets on one or both sides of ball 20, and in this case, an elevated temperature reflow is used in place of a cure.
The present invention is applicable for temporary chip attach for test and burn-in, as shown in FIGS. 5 a-5 d. Individual chips 26 are temporarily mounted on test and burn-in substrates 28′ with the ball 20 and conductive paste 22 connectors of the present invention, as shown in FIGS. 5 a and 5 b. Similarly, entire wafer 46 is mounted on a temporary test head 48 with the ball 20 and conductive paste 22 connectors of the present invention, as shown in FIGS. 5 c and 5 d. Expansion differences as temperature changes for elevated temperature test or burn-in are accommodated by the movable contacts. After testing and burning-in of chips 26 or wafer 46 is complete, chips 26 or wafer 46 can be removed from test and burn-in substrates 28′ or test head 48. Conductive paste 22 permits disassembly after test and burn-in are complete without any damage to chip 26 and substrate 28 or to wafer 46 and test head 48.
While adhesive properties of paste 22 are sufficient to hold chip 26 in place on substrate 28, mechanical hold-down 50 can also be used, as shown in FIG. 6 a to prevent excessive movement of chip 26. Mechanical hold-down 50 is connected to substrate 28 with adhesive or solder layer 52. Space 54 is provided, permitting the small amount of lateral movement of chip 26 needed to accommodate thermal expansion while mechanical hold-down 50 prevents vertical movement. Mechanical hold-down 50 can also serve to electrically shield chip 26 and to provide a heat sink for chip 26. In an alternative embodiment, substantially fixed contacts, such as C4 solder bumps or cured conductive adhesive 56, is used near neutral point 0.000 (or center) of chip 26, providing certain mechanical connection, while rolling ball connectors 20, 20′ are used toward the perimeter of chip 26 to accommodate differential thermal expansion between chip and substrate, as shown in FIG. 6 b.
Multiple chips connected with movable connectors of the present invention can be provided on a single substrate, as shown in FIG. 7. Substrate 28 can be a card, flex, ceramic substrate, lead frame, or any other substrate.
In addition to stable fillets, conductive adhesive can be formed as columns, 60 as shown in FIG. 8, to provide a higher standoff and more reliable joint. Conductive ball 20 serves to stiffen column 60 permitting column 60 to taller. Column 60 is formed of electrically conductive adhesive (ECA), such as polymer metal composite paste, an epoxy filled with metal particles, as described herein above. The ECA is first deposited on substrate 28. Then an array of balls is placed with a technique such as vacuum suction cups. ECA is also deposited on matching pads for chip 26 and the chip is aligned and placed on substrate 28.
In an alternate embodiment, polymer ball 20′ of FIG. 2 is provided as shown in FIG. 9 a, and then compressed and deformed during mounting, as shown in FIG. 9 b, ensuring a good connection as height mismatch among pads is accommodated. Pads 24, 27 are formed of multilevel thin films comprising copper and nickel. The pad surfaces are first roughened by plating palladium dendrites on the nickel pads, as is well known in the art. After ball 20′ is placed between chip pad 24 and substrate pad 27, mechanical force is provided against the roughened pad surfaces to create a reliable interconnection. This technique can be used for a reliable chip-substrate connection or a substrate-printed wiring board connection. Alternatively solder can be used to provide connection between deformable polymer ball 20′ and pads 24, 27. Polymer ball 20′ can also be configured in a shape, such as a column, to increase height and further improve reliability.
While several embodiments of the invention, together with modifications thereof, have been described in detail herein and illustrated in the accompanying drawings, it will be evident that various further modifications are possible without departing from the scope of the invention. Nothing in the above specification is intended to limit the invention more narrowly than the appended claims. The examples given are intended only to be illustrative rather than exclusive.
|Patente citada||Fecha de presentación||Fecha de publicación||Solicitante||Título|
|US3795047||15 Jun 1972||5 Mar 1974||Ibm||Electrical interconnect structuring for laminate assemblies and fabricating methods therefor|
|US4442966||14 Oct 1981||17 Abr 1984||U.S. Philips Corporation||Method of simultaneously manufacturing multiple electrical connections between two electrical elements|
|US4545610||25 Nov 1983||8 Oct 1985||International Business Machines Corporation||Method for forming elongated solder connections between a semiconductor device and a supporting substrate|
|US4604644||28 Ene 1985||5 Ago 1986||International Business Machines Corporation||Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making|
|US4661192||22 Ago 1985||28 Abr 1987||Motorola, Inc.||Low cost integrated circuit bonding process|
|US4744850||9 Dic 1985||17 May 1988||Sharp Kabushiki Kaisha||Method for bonding an LSI chip on a wiring base|
|US5001542 *||30 Nov 1989||19 Mar 1991||Hitachi Chemical Company||Composition for circuit connection, method for connection using the same, and connected structure of semiconductor chips|
|US5090119 *||30 Oct 1990||25 Feb 1992||Matsushita Electric Industrial Co., Ltd.||Method of forming an electrical contact bump|
|US5221417||20 Feb 1992||22 Jun 1993||At&T Bell Laboratories||Conductive adhesive film techniques|
|US5551627 *||29 Sep 1994||3 Sep 1996||Motorola, Inc.||Alloy solder connect assembly and method of connection|
|US5675889||7 Jun 1995||14 Oct 1997||International Business Machines Corporation||Solder ball connections and assembly process|
|US5731636||12 Abr 1996||24 Mar 1998||Lg Semicon Co., Ltd.||Semiconductor bonding package|
|JPH03284857A||Título no disponible|
|1||"High Performance Package", E. Berndlmaier & J. A. Dorler, IBM Technical Disclosure Bulletin, vol. 20, No. 8, Jan. 1978.|
|2||"Semiconductor Device Carrier for Modules", M. T. McMahon, Jr., IBM Technical Disclosure Bulletin, vol. 18, No. 5, Oct. 1975.|
|3||"Thermal Fatigue-Resistant Joint for I/C Packaging Applications", IBM Technical Disclosure Bulletin, vol. 33, No. 2, Jul. 1990.|
|Patente citante||Fecha de presentación||Fecha de publicación||Solicitante||Título|
|US6559666 *||6 Jun 2001||6 May 2003||International Business Machines Corporation||Method and device for semiconductor testing using electrically conductive adhesives|
|US6821888 *||13 Feb 2002||23 Nov 2004||Chartered Semiconductor Manufacturing Ltd.||Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding|
|US6864575 *||16 Jul 2002||8 Mar 2005||Infineon Technologies Ag||Electronic interface structures and methods|
|US6949880||17 Dic 1999||27 Sep 2005||Osram Opto Semiconductors Gmbh||Encapsulation for organic LED device|
|US6952078||17 Dic 1999||4 Oct 2005||Osram Opto Semiconductord Gmbh||Encapsulation for organic LED device|
|US7060613||15 Nov 2004||13 Jun 2006||Chartered Semiconductor Manufacturing Ltd.||Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding|
|US7122460 *||13 Jul 2004||17 Oct 2006||Intel Corporation||Electromigration barrier layers for solder joints|
|US7166007||4 Nov 2004||23 Ene 2007||Osram Opto Semiconductors Gmbh||Encapsulation of electronic devices|
|US7170187 *||31 Ago 2004||30 Ene 2007||International Business Machines Corporation||Low stress conductive polymer bump|
|US7183648 *||4 Jun 2004||27 Feb 2007||Intel Corporation||Method and apparatus for low temperature copper to copper bonding|
|US7221053 *||21 Mar 2005||22 May 2007||Infineon Technologies Ag||Integrated device and electronic system|
|US7242097||30 Jun 2003||10 Jul 2007||Intel Corporation||Electromigration barrier layers for solder joints|
|US7361990 *||17 Mar 2005||22 Abr 2008||Taiwan Semiconductor Manufacturing Company, Ltd.||Reducing cracking of high-lead or lead-free bumps by matching sizes of contact pads and bump pads|
|US7394153 *||20 Nov 2001||1 Jul 2008||Osram Opto Semiconductors Gmbh||Encapsulation of electronic devices|
|US7419842||12 Feb 2007||2 Sep 2008||Osram Gmbh||Encapsulation of electroluminescent devices with shaped spacers|
|US7432533||30 Sep 2002||7 Oct 2008||Osram Gmbh||Encapsulation of electronic devices with shaped spacers|
|US7442878||5 Oct 2006||28 Oct 2008||International Business Machines Corporation||Low stress conductive polymer bump|
|US7452808||15 Nov 2004||18 Nov 2008||Chartered Semiconductor Manufacturing Ltd.||Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding|
|US7825512 *||2 Nov 2010||Hewlett-Packard Development Company, L.P.||Electronic package with compliant electrically-conductive ball interconnect|
|US7973407||5 Jul 2011||Intel Corporation||Three-dimensional stacked substrate arrangements|
|US8203208||19 Jun 2012||Intel Corporation||Three-dimensional stacked substrate arrangements|
|US8344360||1 Ene 2013||Osram Opto Semiconductor Gmbh||Organic electronic devices with an encapsulation|
|US8421225||14 May 2012||16 Abr 2013||Intel Corporation||Three-dimensional stacked substrate arrangements|
|US8552551 *||20 May 2005||8 Oct 2013||Chippac, Inc.||Adhesive/spacer island structure for stacking over wire bonded die|
|US8575732||10 Mar 2011||5 Nov 2013||Utac Thai Limited||Leadframe based multi terminal IC package|
|US8575762||19 Abr 2007||5 Nov 2013||Utac Thai Limited||Very extremely thin semiconductor package|
|US8610266 *||5 Sep 2006||17 Dic 2013||Infineon Technologies Ag||Semiconductor device for radio frequency applications and method for making the same|
|US8623704||11 Sep 2006||7 Ene 2014||Chippac, Inc.||Adhesive/spacer island structure for multiple die package|
|US8722461||15 Feb 2013||13 May 2014||Utac Thai Limited||Leadframe based multi terminal IC package|
|US9000590||27 Mar 2013||7 Abr 2015||Utac Thai Limited||Protruding terminals with internal routing interconnections semiconductor device|
|US9029198||26 Mar 2013||12 May 2015||Utac Thai Limited||Methods of manufacturing semiconductor devices including terminals with internal routing interconnections|
|US9082607||14 Dic 2007||14 Jul 2015||Utac Thai Limited||Molded leadframe substrate semiconductor package|
|US9099294||9 Oct 2009||4 Ago 2015||Utac Thai Limited||Molded leadframe substrate semiconductor package|
|US9196470||10 Feb 2009||24 Nov 2015||Utac Thai Limited||Molded leadframe substrate semiconductor package|
|US9449900 *||12 Jul 2010||20 Sep 2016||UTAC Headquarters Pte. Ltd.||Leadframe feature to minimize flip-chip semiconductor die collapse during flip-chip reflow|
|US9449905||26 Mar 2013||20 Sep 2016||Utac Thai Limited||Plated terminals with routing interconnections semiconductor device|
|US20030032275 *||13 Feb 2002||13 Feb 2003||Yakub Aliyu|
|US20030062518 *||28 Sep 2001||3 Abr 2003||Mark Auch||Method for encapsulation of electronic devices|
|US20030160318 *||30 Sep 2002||28 Ago 2003||Ewald Guenther||Encapsulation of electronic devices with shaped spacers|
|US20040256737 *||7 Jun 2004||23 Dic 2004||Min-Lung Huang||[flip-chip package substrate and flip-chip bonding process thereof]|
|US20040262726 *||30 Jun 2003||30 Dic 2004||Fay Hua||Electromigration barrier layers for solder joints|
|US20040262778 *||13 Jul 2004||30 Dic 2004||Fay Hua||Electromigration barrier layers for solder joints|
|US20050003650 *||2 Jul 2003||6 Ene 2005||Shriram Ramanathan||Three-dimensional stacked substrate arrangements|
|US20050003664 *||4 Jun 2004||6 Ene 2005||Shriram Ramanathan||Method and apparatus for low temperature copper to copper bonding|
|US20050064780 *||4 Nov 2004||24 Mar 2005||Osram Opto Semiconductors Gmbh, A German Corporation||Encapsulation of electronic devices|
|US20050090037 *||29 Oct 2004||28 Abr 2005||Chartered Semiconductor Manufacturing Ltd.|
|US20050090039 *||15 Nov 2004||28 Abr 2005||Chartered Semiconductor Manufacturing Ltd.|
|US20050112799 *||15 Nov 2004||26 May 2005||Chartered Semiconductor Manufacturing Ltd.|
|US20050269676 *||20 May 2005||8 Dic 2005||Chippac, Inc||Adhesive/spacer island structure for stacking over wire bonded die|
|US20060043608 *||31 Ago 2004||2 Mar 2006||International Business Machines Corporation||Low stress conductive polymer bump|
|US20060208357 *||21 Mar 2005||21 Sep 2006||Thorsten Meyer||Integrated device and electronic system|
|US20060220244 *||17 Mar 2005||5 Oct 2006||Lu Szu W||Contact pad and bump pad arrangement for high-lead or lead-free bumps|
|US20070015314 *||11 Sep 2006||18 Ene 2007||Chippac, Inc||Adhesive/Spacer Island Structure for Multiple Die Package|
|US20070057382 *||12 Sep 2005||15 Mar 2007||Weifeng Liu||Electronic package with compliant electrically-conductive ball interconnect|
|US20070075410 *||5 Sep 2006||5 Abr 2007||Kai Chong Chan||Semiconductor device for radio frequency applications and method for making the same|
|US20070084629 *||5 Oct 2006||19 Abr 2007||Bernier William E||Low stress conductive polymer bump|
|US20070128765 *||12 Feb 2007||7 Jun 2007||Osram Gmbh||Encapsulation of electroluminescent devices with shaped spacers|
|US20080142994 *||25 Feb 2008||19 Jun 2008||Szu Wei Lu||Contact Pad And Bump Pad Arrangement for High-Lead Or Lead-Free Bumps|
|US20090174070 *||31 Dic 2008||9 Jul 2009||Shriram Ramanathan||Three-dimensional stacked substrate arrangements|
|US20100127363 *||19 Abr 2007||27 May 2010||Utac Thai Limited||Very extremely thin semiconductor package|
|US20110018111 *||27 Ene 2011||Utac Thai Limited||Leadframe feature to minimize flip-chip semiconductor die collapse during flip-chip reflow|
|US20110076805 *||9 Dic 2010||31 Mar 2011||Utac Thai Limited||Molded leadframe substrate semiconductor package|
|US20120161312 *||23 Dic 2010||28 Jun 2012||Hossain Md Altaf||Non-solder metal bumps to reduce package height|
|CN100428459C||2 Dic 2005||22 Oct 2008||台湾积体电路制造股份有限公司||Contact pad|
|EP1643208A2 *||14 Jul 2005||5 Abr 2006||Carl Zeiss Industrielle Messtechnik GmbH||Feeler head and changeable feeler head holder for a coordinates measuring apparatus|
|Clasificación de EE.UU.||257/738, 257/E21.511, 257/737, 257/778|
|Clasificación internacional||G01R1/04, H05K3/32, H01L21/60, H05K1/11|
|Clasificación cooperativa||H01L2224/05155, H01L2224/05655, H01L2224/05647, H01L2224/05664, H01L2224/05147, H01L2224/05568, H01L2224/05573, H01L2924/15787, H01L2924/351, Y10T428/12472, H01L2924/0105, H01L2924/0781, H01L2924/14, H05K2201/10992, H01L2224/13099, H01L2924/01029, H01L2924/01047, H01L24/83, H05K3/321, H01L2224/1319, H01L2224/2919, H01L2924/01033, H05K2201/10234, H01L24/12, H05K2201/0221, H05K2203/0307, H01L2924/01046, H01L2924/014, H01L2924/01006, H01L2924/01082, H01L2224/11003, G01R1/0483, H01L2924/01005, H01L24/11, H01L2924/0665, H05K2201/0133, H05K2201/0212, H01L2224/13111, H01L2924/01078, H01L24/16, H01L2924/01079, H01L2924/01013, H01L2224/838, H05K2201/10734, H01L24/17, H05K2201/0233, H05K1/111, H01L2224/8319, H01L2924/3025, H01L2924/10253, H01L2224/11334, H01L2224/17051|
|Clasificación europea||H01L24/16, H01L24/11, H01L24/17, H01L24/12, H01L24/83, H05K3/32B|
|30 Abr 1999||AS||Assignment|
Owner name: INTERNATIONAL BUSINESS MACHINES CORPORATION, NEW Y
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:BENENATI, JOSEPH A.;BERTIN, CLAUDE L.;CHEN, WILLIAM T.;AND OTHERS;REEL/FRAME:009936/0955;SIGNING DATES FROM 19990319 TO 19990423
|12 Jul 2004||FPAY||Fee payment|
Year of fee payment: 4
|4 Ago 2008||REMI||Maintenance fee reminder mailed|
|23 Ene 2009||LAPS||Lapse for failure to pay maintenance fees|
|17 Mar 2009||FP||Expired due to failure to pay maintenance fee|
Effective date: 20090123
|3 Sep 2015||AS||Assignment|
Owner name: GLOBALFOUNDRIES U.S. 2 LLC, NEW YORK
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:INTERNATIONAL BUSINESS MACHINES CORPORATION;REEL/FRAME:036550/0001
Effective date: 20150629
|5 Oct 2015||AS||Assignment|
Owner name: GLOBALFOUNDRIES INC., CAYMAN ISLANDS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GLOBALFOUNDRIES U.S. 2 LLC;GLOBALFOUNDRIES U.S. INC.;REEL/FRAME:036779/0001
Effective date: 20150910