US6194961B1 - Microstructure including a circuit integrated in a substrate on one surface of which is arranged a flat coil - Google Patents
Microstructure including a circuit integrated in a substrate on one surface of which is arranged a flat coil Download PDFInfo
- Publication number
- US6194961B1 US6194961B1 US09/342,226 US34222699A US6194961B1 US 6194961 B1 US6194961 B1 US 6194961B1 US 34222699 A US34222699 A US 34222699A US 6194961 B1 US6194961 B1 US 6194961B1
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- United States
- Prior art keywords
- transistors
- coil
- transistor
- collector
- source
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
Definitions
- the present invention concerns a microstructure including a circuit integrated in a substrate on one upper or lower surface of which is arranged a flat coil, in particular a spiral coil galvanically deposited on a passivation layer provided on the surface of the substrate. More particularly, the invention concerns a microstructure including an electronic circuit formed by a plurality of transistors integrated in a semiconductor substrate and a flat coil arranged at the surface of the semiconductor substrate.
- said flat coil is superposed at least partially with said aforementioned electronic circuit.
- the inventor has observed that the magnetic field generated by the flat coil-has an influence on certain sensitive transistors of the integrated electronic circuit under the surface defined by the flat coil.
- the sensitive transistors are those which operate with a relatively low current.
- the magnetic field generated by the flat coil is parallel to the alignment of the source and the collector of each of the transistors of the set of transistors having high sensitivity.
- the electrons forming the electric currents flowing in these transistors between the sources and collectors thereof are not subjected to Lorentz force and, in the case of field effect transistors (FET), the depth of the channel between the source and the collector is not affected by the presence of the coil superposed with the electronic circuit integrated in the substrate acting as a support structure for said coil.
- FIG. 1 is a plane view of an inductive sensor according to the invention
- FIG. 3 is a similar cross-section to FIG. 2 of a preferred variant of the invention.
- FIGS. 4 and 5 are two diagrams showing the electronic circuit of an inductive sensor formed by a differential relaxation oscillator.
- Inductive sensor 2 includes a semiconductor substrate 4 in which is integrated an electronic circuit formed by a plurality of transistors 6 .
- a flat coil 10 and contact pads 12 On the upper face of substrate 4 is arranged a flat coil 10 and contact pads 12 .
- coil 14 is arranged on upper surface 8 and is covered by a passivation or protective layer which has not been shown in FIG. 1 .
- Coil 10 is formed by a conductive wire or conductive path 14 which develops in a spiral.
- coil 10 thus extends in a spiral over a single same plane.
- the coil can be obtained by various methods known to those skilled in the art, in particular by vacuum deposition of a metal layer, as in the case of FIG. 2, or by a galvanic method, as for the variant shown in FIG. 3 .
- Transistor 6 is a field effect transistor (FET) in which a channel 28 of variable depth is generated between source 20 and collector 22 as a function of the electric state applied to the control electrode 30 defining the gate of transistor 6 .
- FET field effect transistor
- source 20 and collector 22 are respectively associated with two electrodes 32 and 34 .
- the current I flowing in channel 28 is substantially parallel to the magnetic field B generated by coil 10 in the vicinity of channel 28 .
- FIG. 3 shows a variant of the invention forming an improvement of the first embodiment described hereinbefore.
- Electric wire 14 of coil 10 is obtained in particular by a galvanic bath.
- This wire 14 has a width L F of several micrometers ( ⁇ m).
- the length L T of transistor 6 is less than width L F of wire 14 .
- each transistor 6 of the set of transistors superposed with surface 26 defined by coil 10 and having high sensitivity is arranged so that each of them is situated under wire 14 .
- the magnetic field generated by a single segment of coil 10 is circular around this segment, the resulting magnetic field in immediate proximity to the segment is substantially parallel to the direction defined by channel 28 between source 20 and collector 22 of transistor 6 situated under wire 14 .
- FIGS. 4 and 5 show an electronic diagram corresponding to an embodiment of the integrated circuit of sensor 2 .
- FIG. 4 shows the general electronic diagram of a differential relaxation oscillator including a reference circuit 40 , a detection circuit 42 including coil 10 electrically defined by an inductance L C . and a resistor R C .
- a comparator 44 has at its inputs a first connection 46 to reference circuit 40 and a second connection 48 to detection circuit 42 .
Abstract
The microstructure includes an electronic circuit formed by a plurality of transistors (6) and a flat coil formed by a conductive wire or a conductive path (14). The coil (10) is arranged on an upper face (8) of the semiconductor substrate (4). The coil (10) generates a magnetic field (B) in this substrate (4) in the vicinity of the transistors (6) which are situated in superposition with said coil (10). The source (20) and the collector (22) of the sensitive transistors (6) are aligned along a direction perpendicular to the wire or path (14) in the portion of the coil situated in proximity to each of said transistors (6). Thus, the electric current (I) flowing in the transistors (6) is substantially parallel to the magnetic field (B).
Description
The present invention concerns a microstructure including a circuit integrated in a substrate on one upper or lower surface of which is arranged a flat coil, in particular a spiral coil galvanically deposited on a passivation layer provided on the surface of the substrate. More particularly, the invention concerns a microstructure including an electronic circuit formed by a plurality of transistors integrated in a semiconductor substrate and a flat coil arranged at the surface of the semiconductor substrate.
Within the scope of the present invention, in order to reduce to the maximum the dimensions of the developed microstructure, said flat coil is superposed at least partially with said aforementioned electronic circuit. However, within the scope of the development of this microstructure of reduced dimensions, the inventor has observed that the magnetic field generated by the flat coil-has an influence on certain sensitive transistors of the integrated electronic circuit under the surface defined by the flat coil. In particular, the sensitive transistors are those which operate with a relatively low current.
In order to overcome this problem detected within the scope of the present invention, the invention concerns a microstructure including an electronic circuit formed by a plurality of transistors integrated in a semiconductor substrate and a flat coil formed by a conductive wire or a conductive path extending in a spiral, this coil being arranged on an upper or lower face of the semiconductor substrate, each of said transistors being formed by at least two regions defining respectively a source and a collector between which an electric current is generated as a function of the electric state of the transistor, this microstructure being characterised in that at least a few transistors of said plurality of transistors and the surface defined by said flat coil are superposed with each other, at least the set of transistors, having high sensitivity when operating with a relatively low current among these few transistors being arranged so that said source and said collector of each of them are aligned along a direction perpendicular to the portion of said conductive wire or said conductive path situated in proximity to the transistor.
As a result of these features, the magnetic field generated by the flat coil is parallel to the alignment of the source and the collector of each of the transistors of the set of transistors having high sensitivity. Thus, the electrons forming the electric currents flowing in these transistors between the sources and collectors thereof are not subjected to Lorentz force and, in the case of field effect transistors (FET), the depth of the channel between the source and the collector is not affected by the presence of the coil superposed with the electronic circuit integrated in the substrate acting as a support structure for said coil.
The present invention will be described in more detail hereinafter with reference to the Figures which are given by way of non limiting example and in which:
FIG. 1 is a plane view of an inductive sensor according to the invention;
FIG. 2 is a cross-section along the line II—II of FIG. 1;
FIG. 3 is a similar cross-section to FIG. 2 of a preferred variant of the invention; and
FIGS. 4 and 5 are two diagrams showing the electronic circuit of an inductive sensor formed by a differential relaxation oscillator.
With reference to FIGS. 1 and 2, a general embodiment of a microstructure according to the invention will be described hereinafter. Inductive sensor 2 includes a semiconductor substrate 4 in which is integrated an electronic circuit formed by a plurality of transistors 6. On the upper face of substrate 4 is arranged a flat coil 10 and contact pads 12. In FIG. 2 coil 14 is arranged on upper surface 8 and is covered by a passivation or protective layer which has not been shown in FIG. 1.
It will be noted in FIG. 1 that the coil is wound in a spiral along rectilinear segments defining a square or rectangular profile of the coil winding. Between the four semi-diagonals 36, 37, 38 and 39, four regions of surface 16 can be defined in which the wire or metallised path 14 defines a set of linear segments which are parallel to each other. Thus, in each of these four regions, the direction perpendicular to that of wire or path 14 is univoque. Preferably, the sensitive transistors of the integrated circuit are each superposed in only one of these four regions, at a certain distance from the semi-diagonals. The direction of magnetic field B passing through the transistor is thus well defined and substantially perpendicular to the direction of the linear segments of wire or path 14. One thus guarantees that magnetic field B is substantially parallel to electric current I in the transistor 6 whose channel 28 is perpendicular to portion 26 of coil 10.
FIG. 3 shows a variant of the invention forming an improvement of the first embodiment described hereinbefore. Electric wire 14 of coil 10 is obtained in particular by a galvanic bath. This wire 14 has a width LF of several micrometers (μm). The length LT of transistor 6 is less than width LF of wire 14. According to the invention, each transistor 6 of the set of transistors superposed with surface 26 defined by coil 10 and having high sensitivity is arranged so that each of them is situated under wire 14. Given that the magnetic field generated by a single segment of coil 10 is circular around this segment, the resulting magnetic field in immediate proximity to the segment is substantially parallel to the direction defined by channel 28 between source 20 and collector 22 of transistor 6 situated under wire 14.
In FIGS. 2 and 3, the electric current J circulating in wire 14 is symbolised by a cross in a circle.
FIGS. 4 and 5 show an electronic diagram corresponding to an embodiment of the integrated circuit of sensor 2. FIG. 4 shows the general electronic diagram of a differential relaxation oscillator including a reference circuit 40, a detection circuit 42 including coil 10 electrically defined by an inductance LC. and a resistor RC. A comparator 44 has at its inputs a first connection 46 to reference circuit 40 and a second connection 48 to detection circuit 42.
FIG. 5 shows in more detail the electronic circuit forming comparator 44, which has cascaded current mirrors and cascaded amplification stages. Connections 46 and 48 are respectively connected to two control electrodes 50 and 52 of two input transistors 54 and 56. These two input transistors 54 and 56 are particularly sensitive when operating with relatively low electric currents. According to the invention, at least these two transistors 54 and 56 are arranged so that the direction of the electric current flowing in the channel between the source and the collector of these transistors is perpendicular to the direction of the wire of the coil situated in proximity to these transistors. Preferably, these two transistors 54 and 56 are arranged according to the preferred variant of FIG. 3.
During the design of the diagram of the integrated circuit, those skilled in the art can also arrange other transistors shown in FIG. 5 in a similar way to input transistors 54 and 56, i.e. according to an orientation defined by the present invention.
Claims (5)
1. A microstructure comprising an electronic circuit formed by a plurality of transistors integrated in a semiconductor substrate, defining a main plane, and by a flat coil formed by a conductive wire or a conductive path extending in a spiral, said coil being arranged on an upper or lower face of said semiconductor substrate, each of said plurality of transistors comprising two regions defining respectively a source and a collector between which a current is generated as a function of an electric state of said each transistor, wherein a set of transistors, among said plurality of transistors, have high sensitivity by operating with a relatively low current, wherein at least one transistor, of said set of transistors, and a surface, defined by said flat coil, are superposed one above the other in projection in said main plane, and wherein said source and said collector of said at least one transistor are aligned along a direction perpendicular to, and in immediate proximity to, a portion of said conductive wire or said conductive path.
2. The microstructure according to claim 1, wherein said set of transistors includes field effect transistors, the channel between the source and the collector of each of said transistors defining said direction perpendicular to said portion of said conductive wire or said conductive path of said coil.
3. The microstructure according to claim 2, being an inductive sensor and including a differential relaxation oscillator comprising a comparator having at inputs thereof a first connection to a reference circuit and a second connection to said coil, said first and second connections being respectively connected to two control electrodes of two input transistors of said set of transistors.
4. The microstructure according to claim 3, wherein said set of transistors further includes transistors forming a current mirror or amplification stage.
5. The microstructure according to claim 1, wherein each transistor of said set of transistors is arranged under said conductive wire or said conductive path of said coil.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP98112052 | 1998-06-30 | ||
EP98112052A EP0969512B1 (en) | 1998-06-30 | 1998-06-30 | Inductive sensor |
Publications (1)
Publication Number | Publication Date |
---|---|
US6194961B1 true US6194961B1 (en) | 2001-02-27 |
Family
ID=8232195
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/342,226 Expired - Lifetime US6194961B1 (en) | 1998-06-30 | 1999-06-29 | Microstructure including a circuit integrated in a substrate on one surface of which is arranged a flat coil |
Country Status (6)
Country | Link |
---|---|
US (1) | US6194961B1 (en) |
EP (1) | EP0969512B1 (en) |
JP (1) | JP4279409B2 (en) |
CN (1) | CN1169221C (en) |
DE (1) | DE69840827D1 (en) |
TW (1) | TW405250B (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001071809A1 (en) * | 2000-03-17 | 2001-09-27 | Robert Bruce Davies | A die attachment surface having pedestals for receiving components and method of using the attachment |
EP1263047A2 (en) * | 2001-05-17 | 2002-12-04 | Broadcom Corporation | Layout technique for C3MOS inductive broadbanding |
US20040213043A1 (en) * | 2003-04-22 | 2004-10-28 | Tuttle Mark E. | Integrated circuit including sensor to sense environmental data, method of compensating an MRAM integrated circuit for the effects of an external magnetic field, MRAM integrated circuit, and method of testing |
WO2004102665A1 (en) * | 2003-05-14 | 2004-11-25 | Ericsson Technology Licensing Ab | High-density circuits that include inductors |
US20050258507A1 (en) * | 2004-05-21 | 2005-11-24 | Taiwan Semiconductor Manufacturing Co. Ltd. | Q-factor with electrically controllable resistivity of silicon substrate layer |
US7148553B1 (en) | 2001-08-01 | 2006-12-12 | Davies Robert B | Semiconductor device with inductive component and method of making |
US20080084201A1 (en) * | 2006-10-06 | 2008-04-10 | Honeywell International Inc. | Method and apparatus for AC integrated current sensor |
US20130099340A1 (en) * | 2008-01-29 | 2013-04-25 | Renesas Electronics Corporation | Semiconductor device, method of manufacturing thereof, signal transmission/reception method using such semiconductor device, and tester apparatus |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005006153A (en) * | 2003-06-13 | 2005-01-06 | Nec Electronics Corp | Voltage controlled oscillator |
DE102005050484B4 (en) * | 2005-10-21 | 2010-01-28 | Atmel Automotive Gmbh | Monolithically integrated circuit arrangement |
CN111430372B (en) * | 2020-03-31 | 2022-08-02 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
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US4157563A (en) * | 1971-07-02 | 1979-06-05 | U.S. Philips Corporation | Semiconductor device |
JPS60182175A (en) | 1984-02-28 | 1985-09-17 | Matsushita Electronics Corp | Semiconductor device for signal switching |
US5095357A (en) * | 1989-08-18 | 1992-03-10 | Mitsubishi Denki Kabushiki Kaisha | Inductive structures for semiconductor integrated circuits |
US5194402A (en) * | 1987-08-14 | 1993-03-16 | Kernforschungszentrum Karlsruhe Gmbh | Method of producing microsensors with integrated signal processing |
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US5726598A (en) * | 1994-04-27 | 1998-03-10 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having voltage sensing element |
US5880506A (en) * | 1994-10-28 | 1999-03-09 | Siemens Aktiengesellschaft | Solid-state switching element with two source electrodes and solid-state switch with such an element |
US5952893A (en) * | 1998-03-06 | 1999-09-14 | International Business Machines Corporation | Integrated circuit inductors for use with electronic oscillators |
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1998
- 1998-06-30 EP EP98112052A patent/EP0969512B1/en not_active Expired - Lifetime
- 1998-06-30 DE DE69840827T patent/DE69840827D1/en not_active Expired - Lifetime
-
1999
- 1999-06-11 TW TW088109838A patent/TW405250B/en not_active IP Right Cessation
- 1999-06-29 CN CNB991089251A patent/CN1169221C/en not_active Expired - Fee Related
- 1999-06-29 JP JP18334299A patent/JP4279409B2/en not_active Expired - Fee Related
- 1999-06-29 US US09/342,226 patent/US6194961B1/en not_active Expired - Lifetime
Patent Citations (12)
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US4157563A (en) * | 1971-07-02 | 1979-06-05 | U.S. Philips Corporation | Semiconductor device |
JPS60182175A (en) | 1984-02-28 | 1985-09-17 | Matsushita Electronics Corp | Semiconductor device for signal switching |
US5194402A (en) * | 1987-08-14 | 1993-03-16 | Kernforschungszentrum Karlsruhe Gmbh | Method of producing microsensors with integrated signal processing |
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Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001071809A1 (en) * | 2000-03-17 | 2001-09-27 | Robert Bruce Davies | A die attachment surface having pedestals for receiving components and method of using the attachment |
EP1263047A2 (en) * | 2001-05-17 | 2002-12-04 | Broadcom Corporation | Layout technique for C3MOS inductive broadbanding |
US20040207040A1 (en) * | 2001-05-17 | 2004-10-21 | Broadcom Corporation | Layout technique for C3MOS inductive broadbanding |
EP1263047A3 (en) * | 2001-05-17 | 2005-09-21 | Broadcom Corporation | Layout technique for C3MOS inductive broadbanding |
US7148553B1 (en) | 2001-08-01 | 2006-12-12 | Davies Robert B | Semiconductor device with inductive component and method of making |
US20040213043A1 (en) * | 2003-04-22 | 2004-10-28 | Tuttle Mark E. | Integrated circuit including sensor to sense environmental data, method of compensating an MRAM integrated circuit for the effects of an external magnetic field, MRAM integrated circuit, and method of testing |
US7227774B2 (en) | 2003-04-22 | 2007-06-05 | Micron Technology, Inc. | MRAM integrated circuits, MRAM circuits, and systems for testing MRAM integrated circuits |
US6999339B2 (en) | 2003-04-22 | 2006-02-14 | Micron Technology, Inc. | Integrated circuit including sensor to sense environmental data, method of compensating an MRAM integrated circuit for the effects of an external magnetic field, MRAM integrated circuit, and method of testing |
US20060077704A1 (en) * | 2003-04-22 | 2006-04-13 | Tuttle Mark E | Integrated circuit including sensor to sense environmental data, and system for testing |
WO2004102665A1 (en) * | 2003-05-14 | 2004-11-25 | Ericsson Technology Licensing Ab | High-density circuits that include inductors |
US20050258507A1 (en) * | 2004-05-21 | 2005-11-24 | Taiwan Semiconductor Manufacturing Co. Ltd. | Q-factor with electrically controllable resistivity of silicon substrate layer |
US7268409B2 (en) * | 2004-05-21 | 2007-09-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Spiral inductor with electrically controllable resistivity of silicon substrate layer |
US20080084201A1 (en) * | 2006-10-06 | 2008-04-10 | Honeywell International Inc. | Method and apparatus for AC integrated current sensor |
US7622910B2 (en) | 2006-10-06 | 2009-11-24 | Honeywell International Inc. | Method and apparatus for AC integrated current sensor |
US20130099340A1 (en) * | 2008-01-29 | 2013-04-25 | Renesas Electronics Corporation | Semiconductor device, method of manufacturing thereof, signal transmission/reception method using such semiconductor device, and tester apparatus |
US8729651B2 (en) * | 2008-01-29 | 2014-05-20 | Renesas Electronics Corporation | Semiconductor device, method of manufacturing thereof, signal transmission/reception method using such semiconductor device, and tester apparatus |
US9105501B2 (en) | 2008-01-29 | 2015-08-11 | Renesas Electronics Corporation | Semiconductor device, method of manufacturing thereof, signal transmission/reception method using such semiconductor device, and tester apparatus |
Also Published As
Publication number | Publication date |
---|---|
EP0969512A1 (en) | 2000-01-05 |
CN1169221C (en) | 2004-09-29 |
JP4279409B2 (en) | 2009-06-17 |
TW405250B (en) | 2000-09-11 |
EP0969512B1 (en) | 2009-05-13 |
CN1242605A (en) | 2000-01-26 |
DE69840827D1 (en) | 2009-06-25 |
JP2000031384A (en) | 2000-01-28 |
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