US6335280B1 - Tungsten silicide deposition process - Google Patents
Tungsten silicide deposition process Download PDFInfo
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- US6335280B1 US6335280B1 US08/783,815 US78381597A US6335280B1 US 6335280 B1 US6335280 B1 US 6335280B1 US 78381597 A US78381597 A US 78381597A US 6335280 B1 US6335280 B1 US 6335280B1
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
- H01L21/28562—Selective deposition
Definitions
- the present invention relates to microelectronic device fabrication, and more particularly, to a method of forming tungsten or tungsten silicide layers for use in gate metallizations and local interconnects in a semiconductor integrated circuit.
- a field effect transistor 10 is formed in a semiconductor 11 by interposing a gate 12 of the transistor between heavily doped regions comprising the source 14 and drain 16 of the transistor as shown in FIG. 1 .
- the gate 12 comprised doped polycrystalline silicon (poly) over the gate dielectric 20 .
- the high resistivity of doped poly adversely impacts the switching speed of field effect transistors 10 .
- the gate 12 of a current transistor 10 typically comprises a multilayer structure 18 on top of a thin silicon oxide layer 20 in contact with the silicon semiconductor 11 .
- the multilayer structure 18 comprises a doped poly layer 22 in contact with the silicon oxide layer 20 and a metallic layer 24 comprising W or WSi 2 in contact with the poly layer 22 .
- a metallic W or WSi 2 layer may be deposited either selectively or nonselectively.
- Moslehi, et al. disclose several selective and nonselective methods for depositing a W layer using a cold wall single wafer thermal/microwave remote plasma multiprocessing reactor.
- selective deposition of W or WSi 2 proceeds by the following well known chemical reactions:
- Reactions 1 and 2 describe the formation of tungsten. After the tungsten has been formed by either reaction 1 or 2, it can react further with the underlying Si to form WSi 2 (reaction 3). Reaction 4 describes the direct formation of WSi 2 .
- the basic reaction is the silicon (Si) reduction of tungsten hexafluoride (WF 6 ) gas, a displacement reaction where exposed Si is converted to a solid layer of W thereby releasing the displaced Si in the volatile gases SiF 2 and SiF 4 .
- these reactions cause selective deposition of W because only those Si regions exposed to WF 6 on the semiconductor 11 react to form a deposited W layer. There is no conversion to W of regions of the semiconductor 11 having exposed regions comprising materials other than Si, such as silicon oxide (SiO 2 ) or silicon nitride (Si 3 N 4 ).
- FIG. 2 a illustrates a cross sectional view of a semiconductor wafer prepared for the substitution of undoped poly by W.
- An oxide layer 32 resides on the silicon substrate 30 .
- a barrier layer 34 comprising titanium nitride (TiN) resides on the silicon oxide layer 32 and within the contact aperture 38 , where the TiN barrier layer 34 contacts the silicon substrate 30 .
- a conformal poly layer 36 is deposited over the TiN barrier layer 34 .
- an etch back of the poly layer 36 is performed to remove poly from the TiN barrier layer 34 .
- the etch back step slightly over etches the poly layer 34 so that the remaining poly 36 is slightly recessed within the aperture 38 .
- a thin chemical oxide layer 40 is formed over the poly 36 within the aperture 38 . This chemical oxide layer 40 enhances the subsequent selective deposition of W.
- substitution of poly 36 by W using WF 6 gas occurs to form a W plug 42 as shown in FIG. 2 d . Note that the entire volume of poly 36 (FIG. 2 c ) within the contact aperture 38 is replaced by W so as to form a W plug 42 .
- the TiN barrier layer 34 serves to stop the substitution of Si by W during the selective deposition of a contact. Moreover, this technique is also well adapted to via fills in multilevel metal layer interconnections. However, the TiN barrier layer 34 is not needed in a via fill process as the lower level metal serves to stop the Si substitution by W. Thus, selective deposition of W techniques have found only limited application in contact formation and via fill because of the desire to avoid consumption of exposed Si regions in other device fabrication applications.
- the nonselective WSi 2 deposition results in deposition of WSi 2 on the reactor walls and other areas exposed to the WF 6 and SiH 4 gas.
- this WSi 2 reactor chamber requires downtime for frequent etching (cleaning) to remove the WSi 2 buildup on exposed areas.
- microelectronic device manufacturers require fabrication methods and systems that enable them to perform multiple processing steps in reactor chambers of substantially similar configuration. Similarly, manufacturers require fabrication methods and systems that enable them to reduce the amount of cleanroom floorspace needed by fabrication equipment. Manufacturers likewise require fabrication methods and systems that reduce the amount of equipment downtime for cleaning and maintenance. In addition, manufacturers require fabrication methods and systems that reduce the need to manage a substantial number of different spares and consumables inventories for multiple different reactors. Moreover, manufacturers require fabrication methods and systems that facilitate continuous improvement of their fabrication equipment by their equipment vendors. Lastly, manufacturers require fabrication methods and systems that reduce the number of multiple different reactors so as to also reduce the amount of capital finds needed to procure fabrication equipment.
- the present invention enables manufacturers to improve their operations by applying an integrated process to deposit poly or amorphous silicon and tungsten or tungsten silicide for use in the formation of multilayer gate metallizations in semiconductor integrated circuits.
- the present invention eliminates the need to use different reactors to form poly, tungsten and tungsten silicide layers in a gate structure and reduces the risk of contamination from reactor deposits and incompatible materials.
- the present invention likewise reduces equipment downtime for cleaning and maintenance operations associated with deposits on reactor walls and other exposed areas thereby improving equipment throughput.
- the present invention permits a manufacturer to form the poly, tungsten and tungsten silicide layers of a gate structure in the same reactor, in another reactor of substantially similar configuration to the reactor used to form the poly layer or in a reaction chamber of a cluster tool of substantially similar configuration to the reactor chamber used to form the poly layer.
- manufacturers can reduce the costs of procuring a variety of different reactors to form these layers.
- manufacturers can reduce the cleanroom floorspace occupied by a variety of different reactors to deposit poly, tungsten and tungsten silicide.
- the present invention reduces the associated costs to manage spares inventories related to a variety of different reactors.
- the present invention produces gate metallization structures with improved adhesion between the tungsten or tungsten silicide layers and the poly layer thereby enabling the reduction of gate dimensions to increase circuit densities.
- One aspect of the present invention includes a method of forming a gate in a semiconductor integrated circuit comprising the steps of forming a silicon layer over a gate dielectric layer on a substrate and forming a tungsten layer by converting a portion of said silicon layer to tungsten.
- Another aspect of the present invention includes a method of forming a gate in a semiconductor integrated circuit device comprising the steps of forming a silicon layer over a gate dielectric layer on a substrate, forming a tungsten layer by converting a portion of said silicon layer to tungsten and annealing said substrate so as to convert a portion of said tungsten layer to a tungsten silicide layer.
- Yet another aspect of the present invention includes a method of forming a gate in a semiconductor integrated circuit device comprising the steps of forming a silicon layer over a gate dielectric layer on a substrate and forming a tungsten silicide layer by converting a portion of said silicon layer to tungsten silicide.
- FIG. 1 is a cross sectional illustration of a prior art field effect transistor having a multilayer gate structure.
- FIG. 2 a is a cross sectional illustration of a substrate prepared for the formation of a tungsten contact.
- FIG. 2 b is a cross sectional illustration of the substrate of FIG. 2 a after etchback of the polysilicon layer.
- FIG. 2 c is a cross sectional illustration of the substrate of FIG. 2 b after formation of a chemical oxide layer.
- FIG. 2 d is a cross sectional illustration of the substrate of FIG. 2 c after conversion of tungsten to form a tungsten contact (plug).
- FIG. 3 is a cross sectional illustration of a substrate prepared for the formation of a gate.
- FIG. 4 is a cross sectional illustration of the substrate of FIG. 3 after deposition of a polysilicon layer.
- FIG. 5 is a cross sectional illustration of the substrate of FIG. 4 after forming a tungsten layer by conversion of a portion of the polysilicon layer to tungsten.
- FIG. 6 is a cross sectional illustration of the substrate of FIG. 5 after removing selected portions of the tungsten and polysilicon layers so as to define a gate.
- FIG. 7 is a cross sectional illustration of the substrate of FIG. 5 after sufficient annealing to convert a portion of the tungsten layer to a tungsten silicide layer.
- FIG. 8 is a cross sectional illustration of the substrate of FIG. 7 after removing selected portions of the tungsten, tungsten silicide and polysilicon layers so as to define a gate.
- FIG. 9 is a cross sectional illustration of the substrate of FIG. 4 after forming a tungsten layer by conversion of the polysilicon layer to tungsten.
- FIG. 10 is a cross sectional illustration of the substrate of FIG. 9 after removing selected portions of the tungsten layer so as to define a gate.
- FIG. 11 is a cross sectional illustration of the substrate of FIG. 4 after forming a tungsten silicide layer by conversion of a portion of the polysilicon layer to tungsten silicide.
- FIG. 11 also illustrates the substrate of FIG. 5 after sufficient annealing to convert the tungsten layer to a tungsten silicide layer.
- FIG. 12 is a cross sectional illustration of the substrate of FIG. 11 after removing selected portions of the tungsten silicide and polysilicon layers so as to define a gate.
- FIG. 13 is a cross sectional illustration of the substrate of FIG. 4 after forming a tungsten silicide layer by conversion of the polysilicon layer to tungsten silicide.
- FIG. 14 is a cross sectional illustration of the substrate of FIG. 13 after removing selected portions of the tungsten silicide layer so as to define a gate.
- a substrate 100 is prepared for the formation of a gate.
- the term substrate refers to one or more semiconductor layers or structures which include active or operable portions of semiconductor devices.
- a gate dielectric 104 has been grown over the entire substrate 100 in preparation for formation of transistor gate structures.
- the substrate 100 comprises a silicon semiconductor wafer having a lightly doped single crystal silicon top layer 102 wherein the microelectronic circuits are fabricated.
- the gate dielectric 104 comprises a thin layer of silicon oxide having a thickness of about 10 nanometers.
- a silicon layer 112 has been deposited over the gate dielectric 104 .
- a polycrystalline silicon (poly) layer 112 is formed over the gate dielectric 104 by exposing the substrate 110 to silane (SiH 4 ) gas at a temperature in the range of 575° C. to 800° C. and at a pressure in the range of 0.1 torr to 760 torr for a time sufficient to form a thickness in the range of 100 nanometers to 800 nanometers.
- a poly layer 112 is formed over the gate dielectric 104 by exposing the substrate 110 to disilane (Si 2 H 6 ) gas at a temperature in the range of 575° C. to 800° C.
- an amorphous silicon (a-Si) layer 112 is formed over the gate dielectric 104 by exposing the substrate 110 to SiH 4 or Si 2 H 6 gas at a temperature in the range of 500° C. to 575° C. and at a pressure in the range of 0.1 torr to 760 torr for a time sufficient to form a thickness in the range of 100 nanometers to 800 nanometers.
- the a-Si layer formed may include some polycrystalline silicon regions. Note that deposited a-Si layers often have smoother surfaces and better uniformity as compared to deposited poly layers.
- the silicon layer 112 may be doped in situ during its formation.
- dopant gases such as AsH 3 , PH 3 and B 2 H 6 , are added to the SiH 4 or Si 2 H 6 flow during formation of the poly or a-Si layer.
- the dopant profiles within the silicon layer 112 may be defined by adjustment of the dopant gas flowrate during formation of the silicon layer 112 . For example, if the dopant gas flow is shut off prior to that for the SiH 4 , the top portion of the silicon layer 112 will be undoped while the bottom portion is doped.
- the top portion of the silicon layer 112 will be more heavily doped than the bottom portion.
- the ability to fabricate a silicon layer 112 having a tailored dopant concentration profile facilitates subsequent device processing.
- a tungsten layer is formed from a portion of the poly layer 112 using the displacement reaction.
- formation of a tungsten layer 124 proceeds by exposing the poly layer 112 (FIG. 4) of the substrate 110 (FIG. 4) to tungsten hexafluoride (WF 6 ) gas at a temperature in the range of 300° C. to 400° C. and at a pressure in the range of 0.1 to 760 torr.
- WF 6 tungsten hexafluoride
- the WF 6 will be diluted in a carrier gas, such as argon (Ar) or nitrogen (N 2 ).
- any gas may be selected as a carrier gas so long as the carrier gas does not react with WF 6 to deposit W on top of the poly layer 112 instead of converting a portion of the poly layer 112 to form a tungsten layer 124 .
- a tungsten layer 124 of a selected self-limiting thickness is formed over the poly layer 122 .
- Self-limiting refers to a condition where the growth of the tungsten layer 124 stops after a certain time, even though sufficient quantities of WF 6 are still available for reaction with Si.
- a self-limiting tungsten film of about 20 nm is formed in approximately 10 seconds.
- the growth of the tungsten layer 124 is maintained by Si diffusion from the poly layer 122 until the reaction abruptly stops due to the self-limiting effect.
- the reaction rate is determined by the WF 6 gas diffusion through a boundary layer that forms above the top surface of the tungsten layer 124 in the gas phase.
- the growth rate of the tungsten layer 124 is proportional to the WF 6 pressure and inversely proportional to the total pressure.
- the self-limiting effect occurs when the reaction rate becomes limited by the supply of Si atoms from the poly layer 122 to the top surface of the tungsten layer 124 . At this moment, the fast diffusion paths for Si are blocked rapidly and the growth stops. As the diffusion of Si to the top surface of the tungsten layer 124 is thermally activated, the thickness of the tungsten layer 124 can be engineered by selecting the proper temperature, WF 6 and total pressure. In another preferred embodiment, the formation of a tungsten layer 124 occurs in the same reactor used to form the poly layer 112 (FIG. 4 ). In yet another preferred embodiment, the formation of a tungsten layer 124 occurs in another reactor of substantially similar configuration to the reactor used to form the poly layer 112 (FIG. 4 ).
- formation of a tungsten layer 124 occurs in a reaction chamber of a cluster tool of substantially similar configuration to the reactor chamber used to form the poly layer 112 (FIG. 4 ).
- a multilayer gate structure 136 is subsequently defined by removing selected portions of the poly layer 122 and the tungsten layer 124 as shown in FIG. 6 . Note that the gate 136 includes a tungsten layer 134 over a poly layer 132 .
- a tungsten silicide layer may be formed by conversion of a portion of the remaining poly layer 112 .
- a portion of the tungsten layer 124 (FIG. 5) has been converted to a tungsten silicide layer 146 by annealing the substrate 120 (FIG. 5) under an inert atmosphere, such as Argon, at a temperature in the range of 600° C. to 1000° C. to form a tungsten silicide layer 146 .
- the substrate 120 FIG.
- the substrate 120 (FIG. 5) is annealed in the same reactor used to form the poly layer 112 (FIG. 4) and to form the tungsten layer 124 (FIG. 5 ).
- the substrate 120 (FIG. 5) is annealed in another reactor of substantially similar configuration to the reactor used to form the poly layer 112 (FIG. 4) and to form the tungsten layer 124 (FIG. 5 ).
- the substrate 120 (FIG. 5) is annealed in a reaction chamber of a cluster tool of substantially similar configuration to the reactor chamber used to form the poly layer 112 (FIG. 4) and to form the tungsten layer 124 (FIG. 5 ).
- a multilayer gate structure 158 is subsequently defined by removing selected portions of the poly layer 142 , the tungsten silicide layer 146 and the tungsten layer 144 as shown in FIG. 8 .
- the gate 158 includes a tungsten layer 154 over a tungsten silicide layer 156 over a poly layer 152 .
- the entire poly layer 112 (FIG. 4) is converted into a tungsten layer 162 by using either a higher total pressure, a lower WF 6 partial pressure or a higher temperature. Under these conditions, all of the poly layer 112 is consumed before the self-limiting thickness is reached.
- formation of a tungsten layer 162 proceeds by exposing the poly layer 112 (FIG. 4) of the substrate 110 (FIG. 4) to tungsten hexafluoride (WF 6 ) gas at a temperature in the range of 300° C. to 400° C. and at a total pressure in the range of 0.1 to 760 torr for a time sufficient to convert the entire poly layer 112 (FIG.
- tungsten For example, at a temperature of 370° C., a total pressure of 4.0 torr, a WF 6 flow of 50 sccm and an Ar flow of 2000 sccm, a 300 nm poly layer is entirely consumed to form a tungsten film of about 150 nm thickness in approximately 160 seconds. As noted above, there is no self-limiting effect here because the entire poly layer 112 (FIG. 4 ) is already consumed before the self-limiting thickness is reached.
- a 300 nm poly layer is entirely consumed to form a tungsten film of about 150 nm thickness in approximately 180 seconds.
- formation of a tungsten layer 162 proceeds by exposing the poly layer 112 (FIG. 4) of the substrate 110 (FIG. 4) to tungsten hexafluoride (WF 6 ) gas at a temperature in the range of 300° C. to 400° C.
- a WF 6 partial pressure in the range of 0.0025 torr to 76 torr for a time sufficient convert the entire poly layer 112 (FIG. 4) to tungsten.
- a temperature of 370° C. a total pressure of 0.5 torr, a WF 6 flow of 12.5 sccm and an Ar flow of 2000 sccm, a 300 nm poly layer is entirely consumed to form a tungsten film of about 150 nm thickness in approximately 160 seconds.
- formation of a tungsten layer 162 occurs in the same reactor used to form the poly layer 112 (FIG. 4 ).
- formation of a tungsten layer 162 occurs in another reactor of substantially similar configuration to the reactor used to form the poly layer 112 (FIG. 4 ). In yet another preferred embodiment, formation of a tungsten layer 162 occurs in a reaction chamber of a cluster tool of substantially similar configuration to the reactor chamber used to form the poly layer 112 (FIG. 4 ). A tungsten gate structure 174 is subsequently defined by removing selected portions of the tungsten layer 162 as shown in the substrate 170 in FIG. 10 .
- a tungsten silicide layer may also be formed from a portion of the poly layer 112 (FIG. 4 ).
- formation of a tungsten silicide layer 184 proceeds by exposing the poly layer 112 (FIG. 4) of the substrate 110 (FIG. 4) to tungsten hexafluoride (WF 6 ) gas at temperatures generally above 450° C. and at a pressure in the range of 0.1 to 760 torr. Under these conditions, the self limiting effect does not occur.
- WF 6 tungsten hexafluoride
- a WSi 2 layer of 145 nm thickness is formed when the WF 6 flow is terminated in approximately 50 seconds.
- the tungsten silicide layer 184 formed may be in the metastable hexagonal high resistivity phase.
- the substrate 180 is annealed under an inert atmosphere, such as Argon, at a temperature in the range of 600° C. to 1000° C. for a time sufficient to convert the entire hexagonal tungsten silicide phase to the lower resistivity tetragonal tungsten silicide phase.
- formation of a tungsten silicide layer 184 occurs in the same reactor used to form the poly layer 112 (FIG. 4 ). In yet another preferred embodiment, formation of a tungsten silicide layer 184 occurs in another reactor of substantially similar configuration to the reactor used to form the poly layer 112 (FIG. 4 ). In yet another preferred embodiment, formation of a tungsten silicide layer 184 occurs in a reaction chamber of a cluster tool of substantially similar configuration to the reactor chamber used to form the poly layer 112 (FIG. 4 ).
- FIG. 11 also illustrates the substrate 120 (FIG. 5) after sufficient annealing to convert the tungsten layer 124 (FIG. 5) and a portion of the poly layer 122 (FIG. 5) to a tungsten silicide layer 184 .
- the substrate 120 (FIG. 5) having a tungsten layer 124 over a poly layer 122 (FIG. 5) is annealed under an inert atmosphere, such as Argon, at a temperature in the range of 600° C. to 1000° C. for a time sufficient to convert the entire tungsten layer 124 (FIG. 5) to tungsten silicide 184 .
- the substrate 120 (FIG. 5) is annealed under an inert atmosphere, such as Argon, at a temperature in the range of 600° C. to 1000° C. for a time sufficient to convert the entire tungsten layer 124 (FIG. 5) to tungsten silicide 184 .
- the substrate 120 (FIG. 5) is
- the substrate 120 (FIG. 5) is annealed in the same reactor used to form the poly layer 112 (FIG. 4) and to form the tungsten layer 124 (FIG. 5 ).
- the substrate 120 (FIG. 5) is annealed in another reactor of substantially similar configuration to the reactor used to form the poly layer 112 (FIG. 4) and to form the tungsten layer 124 (FIG. 5 ).
- the substrate 120 (FIG. 5) is annealed in a reaction chamber of a cluster tool of substantially similar configuration to the reactor chamber used to form the poly layer 112 (FIG. 4) and to form the tungsten layer 124 (FIG. 5 ).
- a multilayer gate structure 196 is subsequently defined by removing selected portions of the poly layer 182 and the tungsten silicide layer 184 as shown in the substrate 190 in FIG. 12 . Note that the gate 196 includes a tungsten silicide layer 194 over a poly layer 192 .
- the entire poly layer 112 (FIG. 4) is converted into a tungsten silicide layer 202 .
- formation of a tungsten silicide layer 202 proceeds by exposing the poly layer 112 (FIG. 4) of the substrate 110 (FIG. 4) to tungsten hexafluoride (WF 6 ) gas at temperatures generally above 450° C. and at a pressure in the range of 0.1 to 760 torr until the entire poly layer 112 (FIG. 4) has been consumed.
- WF 6 tungsten hexafluoride
- a 450 nm poly layer is entirely consumed to form a tungsten silicide film of about 250 nm thickness in approximately 250 seconds.
- the tungsten silicide layer 202 formed may be in the metastable hexagonal high resistivity phase.
- the substrate 180 is annealed under an inert atmosphere, such as Argon, at a temperature in the range of 600° C. to 1000° C. for a time sufficient to convert the entire hexagonal tungsten silicide phase to the lower resistivity tetragonal tungsten silicide phase.
- formation of a tungsten silicide layer 202 occurs in the same reactor used to form the poly layer 112 (FIG. 4 ). In yet another preferred embodiment, formation of a tungsten silicide layer 202 occurs in another reactor of substantially similar configuration to the reactor used to form the poly layer 112 (FIG. 4 ). In yet another preferred embodiment, formation of a tungsten silicide layer 202 occurs in a reaction chamber of a cluster tool of substantially similar configuration to the reactor chamber used to form the poly layer 112 (FIG. 4 ). A tungsten silicide gate structure 214 is subsequently defined by removing selected portions of the tungsten silicide layer 202 to leave a patterned tungsten silicide layer 212 as shown in FIG. 14 .
- the present invention advantageously overcomes several limitations of existing technologies and alternatives.
- a reducing agent such as H 2 or SiH 4 is added to the WF 6 flow
- the WF 6 Si conversion reaction produces no deposits or coatings on the reactor walls.
- a semiconductor device manufacturer using the present invention to form gate metallizations avoids contamination from reactor coatings and deposits.
- the manufacturer can improve the throughput of its reactors by avoiding frequent reactor cleans required for present deposition methods.
- use of the present invention to form a multilayer gate structure produces improved adhesion between the tungsten or tungsten silicide layers and the poly layer as compared to the adhesion of a traditionally deposited tungsten silicide layer on the poly layer, which exhibit cracking followed by delamination with narrower gate dimensions.
- the present invention eliminates the need to use different reactors to form the poly layer and the tungsten or tungsten silicide layer.
- a manufacturer can form a poly layer followed by a tungsten or tungsten silicide layer in the same reactor, in another reactor of substantially similar configuration to the reactor used to form the poly layer or in a reaction chamber of a cluster tool of substantially similar configuration to the reactor chamber used to form the poly layer.
- This flexibility allows the manufacturer to save costs related to the procurement, installation, use and maintenance of multiple different reactors.
- a manufacturer thus realizes certain economies of scale as reactors share the same parts, require the same maintenance and the same training to operate.
- the present invention enables the metallization of a full batch of poly deposited wafers at once with tungsten or tungsten silicide.
Abstract
Description
Claims (37)
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6489208B2 (en) * | 1997-02-25 | 2002-12-03 | Tokyo Electron Limited | Method of forming a laminated structure to enhance metal silicide adhesion on polycrystalline silicon |
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US6693022B2 (en) * | 1997-02-20 | 2004-02-17 | Infineon Technologies Ag | CVD method of producing in situ-doped polysilicon layers and polysilicon layered structures |
US20040088273A1 (en) * | 2002-10-21 | 2004-05-06 | Canon Kabushiki Kaisha | Information processing device and method |
US20040224089A1 (en) * | 2002-10-18 | 2004-11-11 | Applied Materials, Inc. | Silicon-containing layer deposition with silicon compounds |
US20040247788A1 (en) * | 2001-10-10 | 2004-12-09 | Hongbin Fang | Method for depositing refractory metal layers employing sequential deposition techniques |
US20050009325A1 (en) * | 2003-06-18 | 2005-01-13 | Hua Chung | Atomic layer deposition of barrier materials |
US6849545B2 (en) | 2001-06-20 | 2005-02-01 | Applied Materials, Inc. | System and method to form a composite film stack utilizing sequential deposition techniques |
US20050079691A1 (en) * | 2003-10-10 | 2005-04-14 | Applied Materials, Inc. | Methods of selective deposition of heavily doped epitaxial SiGe |
US20050186765A1 (en) * | 2004-02-23 | 2005-08-25 | Yi Ma | Gate electrode dopant activation method for semiconductor manufacturing |
US20050287807A1 (en) * | 2001-07-16 | 2005-12-29 | Applied Materials, Inc. | Formation of composite tungsten films |
US20060089007A1 (en) * | 1998-10-01 | 2006-04-27 | Applied Materials, Inc. | In situ deposition of a low K dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application |
US20060094196A1 (en) * | 2004-10-29 | 2006-05-04 | Fujitsu Limited | Method of fabricating semiconductor device, and semiconductor device |
US20060115933A1 (en) * | 2004-12-01 | 2006-06-01 | Applied Materials, Inc. | Use of CL2 and/or HCL during silicon epitaxial film formation |
US20060115934A1 (en) * | 2004-12-01 | 2006-06-01 | Yihwan Kim | Selective epitaxy process with alternating gas supply |
US20060121733A1 (en) * | 2004-10-26 | 2006-06-08 | Kilpela Olli V | Selective formation of metal layers in an integrated circuit |
US20060128132A1 (en) * | 2000-06-28 | 2006-06-15 | Applied Materials, Inc. | Method and system for controlling the presence of fluorine in refractory metal layers |
US20060128150A1 (en) * | 2004-12-10 | 2006-06-15 | Applied Materials, Inc. | Ruthenium as an underlayer for tungsten film deposition |
US20060148253A1 (en) * | 2001-09-26 | 2006-07-06 | Applied Materials, Inc. | Integration of ALD tantalum nitride for copper metallization |
US20060166414A1 (en) * | 2004-12-01 | 2006-07-27 | Carlson David K | Selective deposition |
US20060169669A1 (en) * | 2005-01-31 | 2006-08-03 | Applied Materials, Inc. | Etchant treatment processes for substrate surfaces and chamber surfaces |
US7132338B2 (en) | 2003-10-10 | 2006-11-07 | Applied Materials, Inc. | Methods to fabricate MOSFET devices using selective deposition process |
US20060264031A1 (en) * | 2000-06-28 | 2006-11-23 | Ming Xi | Method for depositing tungsten-containing layers by vapor deposition techniques |
US20060286776A1 (en) * | 2005-06-21 | 2006-12-21 | Applied Materials, Inc. | Method for forming silicon-containing materials during a photoexcitation deposition process |
US20060286774A1 (en) * | 2005-06-21 | 2006-12-21 | Applied Materials. Inc. | Method for forming silicon-containing materials during a photoexcitation deposition process |
US20060292864A1 (en) * | 2002-01-26 | 2006-12-28 | Yang Michael X | Plasma-enhanced cyclic layer deposition process for barrier layers |
US20070009658A1 (en) * | 2001-07-13 | 2007-01-11 | Yoo Jong H | Pulse nucleation enhanced nucleation technique for improved step coverage and better gap fill for WCVD process |
US20070014919A1 (en) * | 2005-07-15 | 2007-01-18 | Jani Hamalainen | Atomic layer deposition of noble metal oxides |
US20070020924A1 (en) * | 2002-02-26 | 2007-01-25 | Shulin Wang | Tungsten nitride atomic layer deposition processes |
US20070026654A1 (en) * | 2005-03-15 | 2007-02-01 | Hannu Huotari | Systems and methods for avoiding base address collisions |
US20070066023A1 (en) * | 2005-09-20 | 2007-03-22 | Randhir Thakur | Method to form a device on a soi substrate |
US20070065578A1 (en) * | 2005-09-21 | 2007-03-22 | Applied Materials, Inc. | Treatment processes for a batch ALD reactor |
US20070099422A1 (en) * | 2005-10-28 | 2007-05-03 | Kapila Wijekoon | Process for electroless copper deposition |
US20070119371A1 (en) * | 2005-11-04 | 2007-05-31 | Paul Ma | Apparatus and process for plasma-enhanced atomic layer deposition |
US7238552B2 (en) | 2001-07-16 | 2007-07-03 | Applied Materials, Inc. | Method and apparatus for depositing tungsten after surface treatment to improve film characteristics |
US20070202254A1 (en) * | 2001-07-25 | 2007-08-30 | Seshadri Ganguli | Process for forming cobalt-containing materials |
US20070207624A1 (en) * | 2006-03-02 | 2007-09-06 | Applied Materials, Inc. | Multiple nitrogen plasma treatments for thin SiON dielectrics |
US20070259112A1 (en) * | 2006-04-07 | 2007-11-08 | Applied Materials, Inc. | Gas manifolds for use during epitaxial film formation |
US20070283886A1 (en) * | 2001-09-26 | 2007-12-13 | Hua Chung | Apparatus for integration of barrier layer and seed layer |
US20080026549A1 (en) * | 2006-07-31 | 2008-01-31 | Applied Materials, Inc. | Methods of controlling morphology during epitaxial layer formation |
US20080022924A1 (en) * | 2006-07-31 | 2008-01-31 | Applied Materials, Inc. | Methods of forming carbon-containing silicon epitaxial layers |
US20080124484A1 (en) * | 2006-11-08 | 2008-05-29 | Asm Japan K.K. | Method of forming ru film and metal wiring structure |
US20080135914A1 (en) * | 2006-06-30 | 2008-06-12 | Krishna Nety M | Nanocrystal formation |
US20080146042A1 (en) * | 2000-05-15 | 2008-06-19 | Asm International N.V. | Method of growing electrical conductors |
US20080171436A1 (en) * | 2007-01-11 | 2008-07-17 | Asm Genitech Korea Ltd. | Methods of depositing a ruthenium film |
US20080206987A1 (en) * | 2007-01-29 | 2008-08-28 | Gelatos Avgerinos V | Process for tungsten nitride deposition by a temperature controlled lid assembly |
US20080268636A1 (en) * | 2001-07-25 | 2008-10-30 | Ki Hwan Yoon | Deposition methods for barrier and tungsten materials |
US20080268635A1 (en) * | 2001-07-25 | 2008-10-30 | Sang-Ho Yu | Process for forming cobalt and cobalt silicide materials in copper contact applications |
US20080280438A1 (en) * | 2000-06-28 | 2008-11-13 | Ken Kaung Lai | Methods for depositing tungsten layers employing atomic layer deposition techniques |
US20080318417A1 (en) * | 2006-09-01 | 2008-12-25 | Asm Japan K.K. | Method of forming ruthenium film for metal wiring structure |
US20090053893A1 (en) * | 2005-01-19 | 2009-02-26 | Amit Khandelwal | Atomic layer deposition of tungsten materials |
US20090053426A1 (en) * | 2001-07-25 | 2009-02-26 | Jiang Lu | Cobalt deposition on barrier surfaces |
US20090087339A1 (en) * | 2007-09-28 | 2009-04-02 | Asm Japan K.K. | METHOD FOR FORMING RUTHENIUM COMPLEX FILM USING Beta-DIKETONE-COORDINATED RUTHENIUM PRECURSOR |
US20090155997A1 (en) * | 2007-12-12 | 2009-06-18 | Asm Japan K.K. | METHOD FOR FORMING Ta-Ru LINER LAYER FOR Cu WIRING |
US20090163024A1 (en) * | 2007-12-21 | 2009-06-25 | Asm Genitech Korea Ltd. | Methods of depositing a ruthenium film |
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US7648927B2 (en) | 2005-06-21 | 2010-01-19 | Applied Materials, Inc. | Method for forming silicon-containing materials during a photoexcitation deposition process |
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US7695563B2 (en) | 2001-07-13 | 2010-04-13 | Applied Materials, Inc. | Pulsed deposition process for tungsten nucleation |
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US20170263455A1 (en) * | 2016-03-09 | 2017-09-14 | Tokyo Electron Limited | Mask structure forming method and film forming apparatus |
Citations (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4528744A (en) * | 1982-04-08 | 1985-07-16 | Tokyo Shibaura Denki Kabushiki Kaisha | Method of manufacturing a semiconductor device |
US4629635A (en) | 1984-03-16 | 1986-12-16 | Genus, Inc. | Process for depositing a low resistivity tungsten silicon composite film on a substrate |
US4751101A (en) | 1987-04-30 | 1988-06-14 | International Business Machines Corporation | Low stress tungsten films by silicon reduction of WF6 |
US4851295A (en) | 1984-03-16 | 1989-07-25 | Genus, Inc. | Low resistivity tungsten silicon composite film |
EP0328970A2 (en) | 1988-02-18 | 1989-08-23 | International Business Machines Corporation | Method of depositing tungsten on silicon in a non-self-limiting CVD process and semi-conductor device manufactured thereby |
US4888087A (en) | 1988-12-13 | 1989-12-19 | The Board Of Trustees Of The Leland Stanford Junior University | Planarized multilevel interconnection for integrated circuits |
US4913929A (en) | 1987-04-21 | 1990-04-03 | The Board Of Trustees Of The Leland Stanford Junior University | Thermal/microwave remote plasma multiprocessing reactor and method of use |
JPH02114641A (en) * | 1988-10-25 | 1990-04-26 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
US4966869A (en) | 1990-05-04 | 1990-10-30 | Spectrum Cvd, Inc. | Tungsten disilicide CVD |
US4968644A (en) | 1986-06-16 | 1990-11-06 | At&T Bell Laboratories | Method for fabricating devices and devices formed thereby |
US4985372A (en) * | 1989-02-17 | 1991-01-15 | Tokyo Electron Limited | Method of forming conductive layer including removal of native oxide |
US5043299A (en) | 1989-12-01 | 1991-08-27 | Applied Materials, Inc. | Process for selective deposition of tungsten on semiconductor wafer |
JPH03248574A (en) * | 1990-02-27 | 1991-11-06 | Nippon Seiki Co Ltd | Manufacture of polysilicon resistor |
US5071788A (en) * | 1988-02-18 | 1991-12-10 | International Business Machines Corporation | Method for depositing tungsten on silicon in a non-self-limiting CVD process and semiconductor device manufactured thereby |
US5084417A (en) | 1989-01-06 | 1992-01-28 | International Business Machines Corporation | Method for selective deposition of refractory metals on silicon substrates and device formed thereby |
US5147820A (en) * | 1991-08-26 | 1992-09-15 | At&T Bell Laboratories | Silicide formation on polysilicon |
US5173438A (en) | 1991-02-13 | 1992-12-22 | Micron Technology, Inc. | Method of performing a field implant subsequent to field oxide fabrication by utilizing selective tungsten deposition to produce encroachment-free isolation |
US5212400A (en) | 1988-02-18 | 1993-05-18 | International Business Machines Corporation | Method of depositing tungsten on silicon in a non-self-limiting CVD process and semiconductor device manufactured thereby |
US5231056A (en) | 1992-01-15 | 1993-07-27 | Micron Technology, Inc. | Tungsten silicide (WSix) deposition process for semiconductor manufacture |
US5322809A (en) | 1993-05-11 | 1994-06-21 | Texas Instruments Incorporated | Self-aligned silicide process |
US5338398A (en) | 1991-03-28 | 1994-08-16 | Applied Materials, Inc. | Tungsten silicide etch process selective to photoresist and oxide |
US5341016A (en) * | 1993-06-16 | 1994-08-23 | Micron Semiconductor, Inc. | Low resistance device element and interconnection structure |
US5356835A (en) | 1991-03-29 | 1994-10-18 | Applied Materials, Inc. | Method for forming low resistance and low defect density tungsten contacts to silicon semiconductor wafer |
US5391394A (en) | 1990-01-08 | 1995-02-21 | Lsi Logic Corporation | Tungsten deposition process for low contact resistivity to silicon |
US5434110A (en) * | 1992-06-15 | 1995-07-18 | Materials Research Corporation | Methods of chemical vapor deposition (CVD) of tungsten films on patterned wafer substrates |
JPH07230957A (en) * | 1994-02-15 | 1995-08-29 | Nippon Steel Corp | Forming method of boron-containing polysilicon film |
JPH07297150A (en) * | 1994-04-22 | 1995-11-10 | Nec Corp | Fabrication of semiconductor device |
EP0689232A2 (en) | 1989-08-25 | 1995-12-27 | Applied Materials, Inc. | Process for deposition of a tungsten layer on a semiconductor wafer |
US5482749A (en) | 1993-06-28 | 1996-01-09 | Applied Materials, Inc. | Pretreatment process for treating aluminum-bearing surfaces of deposition chamber prior to deposition of tungsten silicide coating on substrate therein |
US5500249A (en) | 1992-12-22 | 1996-03-19 | Applied Materials, Inc. | Uniform tungsten silicide films produced by chemical vapor deposition |
US5510297A (en) | 1993-06-28 | 1996-04-23 | Applied Materials, Inc. | Process for uniform deposition of tungsten silicide on semiconductor wafers by treatment of susceptor having aluminum nitride surface thereon with tungsten silicide after cleaning of susceptor |
US5558910A (en) | 1992-12-22 | 1996-09-24 | Applied Materials, Inc. | Uniform tungsten silicide films produced by chemical vapor deposition |
US5565382A (en) | 1993-10-12 | 1996-10-15 | Applied Materials, Inc. | Process for forming tungsten silicide on semiconductor wafer using dichlorosilane gas |
EP0746027A2 (en) | 1995-05-03 | 1996-12-04 | Applied Materials, Inc. | Polysilicon/tungsten silicide multilayer composite formed on an integrated circuit structure, and improved method of making same |
US5767004A (en) * | 1996-04-22 | 1998-06-16 | Chartered Semiconductor Manufacturing, Ltd. | Method for forming a low impurity diffusion polysilicon layer |
-
1997
- 1997-01-13 US US08/783,815 patent/US6335280B1/en not_active Expired - Fee Related
Patent Citations (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4528744A (en) * | 1982-04-08 | 1985-07-16 | Tokyo Shibaura Denki Kabushiki Kaisha | Method of manufacturing a semiconductor device |
US4851295A (en) | 1984-03-16 | 1989-07-25 | Genus, Inc. | Low resistivity tungsten silicon composite film |
US4629635A (en) | 1984-03-16 | 1986-12-16 | Genus, Inc. | Process for depositing a low resistivity tungsten silicon composite film on a substrate |
US4968644A (en) | 1986-06-16 | 1990-11-06 | At&T Bell Laboratories | Method for fabricating devices and devices formed thereby |
US4913929A (en) | 1987-04-21 | 1990-04-03 | The Board Of Trustees Of The Leland Stanford Junior University | Thermal/microwave remote plasma multiprocessing reactor and method of use |
US4751101A (en) | 1987-04-30 | 1988-06-14 | International Business Machines Corporation | Low stress tungsten films by silicon reduction of WF6 |
EP0328970A2 (en) | 1988-02-18 | 1989-08-23 | International Business Machines Corporation | Method of depositing tungsten on silicon in a non-self-limiting CVD process and semi-conductor device manufactured thereby |
US5071788A (en) * | 1988-02-18 | 1991-12-10 | International Business Machines Corporation | Method for depositing tungsten on silicon in a non-self-limiting CVD process and semiconductor device manufactured thereby |
US5212400A (en) | 1988-02-18 | 1993-05-18 | International Business Machines Corporation | Method of depositing tungsten on silicon in a non-self-limiting CVD process and semiconductor device manufactured thereby |
JPH02114641A (en) * | 1988-10-25 | 1990-04-26 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
US4888087A (en) | 1988-12-13 | 1989-12-19 | The Board Of Trustees Of The Leland Stanford Junior University | Planarized multilevel interconnection for integrated circuits |
US5084417A (en) | 1989-01-06 | 1992-01-28 | International Business Machines Corporation | Method for selective deposition of refractory metals on silicon substrates and device formed thereby |
US4985372A (en) * | 1989-02-17 | 1991-01-15 | Tokyo Electron Limited | Method of forming conductive layer including removal of native oxide |
EP0689232A2 (en) | 1989-08-25 | 1995-12-27 | Applied Materials, Inc. | Process for deposition of a tungsten layer on a semiconductor wafer |
EP0689231A2 (en) | 1989-08-25 | 1995-12-27 | Applied Materials, Inc. | Process for deposition of a tungsten layer on a semi-conductor wafer |
US5043299A (en) | 1989-12-01 | 1991-08-27 | Applied Materials, Inc. | Process for selective deposition of tungsten on semiconductor wafer |
US5043299B1 (en) | 1989-12-01 | 1997-02-25 | Applied Materials Inc | Process for selective deposition of tungsten on semiconductor wafer |
US5391394A (en) | 1990-01-08 | 1995-02-21 | Lsi Logic Corporation | Tungsten deposition process for low contact resistivity to silicon |
JPH03248574A (en) * | 1990-02-27 | 1991-11-06 | Nippon Seiki Co Ltd | Manufacture of polysilicon resistor |
US4966869A (en) | 1990-05-04 | 1990-10-30 | Spectrum Cvd, Inc. | Tungsten disilicide CVD |
US5173438A (en) | 1991-02-13 | 1992-12-22 | Micron Technology, Inc. | Method of performing a field implant subsequent to field oxide fabrication by utilizing selective tungsten deposition to produce encroachment-free isolation |
US5338398A (en) | 1991-03-28 | 1994-08-16 | Applied Materials, Inc. | Tungsten silicide etch process selective to photoresist and oxide |
US5356835A (en) | 1991-03-29 | 1994-10-18 | Applied Materials, Inc. | Method for forming low resistance and low defect density tungsten contacts to silicon semiconductor wafer |
US5147820A (en) * | 1991-08-26 | 1992-09-15 | At&T Bell Laboratories | Silicide formation on polysilicon |
US5231056A (en) | 1992-01-15 | 1993-07-27 | Micron Technology, Inc. | Tungsten silicide (WSix) deposition process for semiconductor manufacture |
US5434110A (en) * | 1992-06-15 | 1995-07-18 | Materials Research Corporation | Methods of chemical vapor deposition (CVD) of tungsten films on patterned wafer substrates |
US5558910A (en) | 1992-12-22 | 1996-09-24 | Applied Materials, Inc. | Uniform tungsten silicide films produced by chemical vapor deposition |
US5500249A (en) | 1992-12-22 | 1996-03-19 | Applied Materials, Inc. | Uniform tungsten silicide films produced by chemical vapor deposition |
US5322809A (en) | 1993-05-11 | 1994-06-21 | Texas Instruments Incorporated | Self-aligned silicide process |
US5341016A (en) * | 1993-06-16 | 1994-08-23 | Micron Semiconductor, Inc. | Low resistance device element and interconnection structure |
US5482749A (en) | 1993-06-28 | 1996-01-09 | Applied Materials, Inc. | Pretreatment process for treating aluminum-bearing surfaces of deposition chamber prior to deposition of tungsten silicide coating on substrate therein |
US5510297A (en) | 1993-06-28 | 1996-04-23 | Applied Materials, Inc. | Process for uniform deposition of tungsten silicide on semiconductor wafers by treatment of susceptor having aluminum nitride surface thereon with tungsten silicide after cleaning of susceptor |
US5565382A (en) | 1993-10-12 | 1996-10-15 | Applied Materials, Inc. | Process for forming tungsten silicide on semiconductor wafer using dichlorosilane gas |
JPH07230957A (en) * | 1994-02-15 | 1995-08-29 | Nippon Steel Corp | Forming method of boron-containing polysilicon film |
JPH07297150A (en) * | 1994-04-22 | 1995-11-10 | Nec Corp | Fabrication of semiconductor device |
US5851581A (en) * | 1994-04-22 | 1998-12-22 | Nec Corporation | Semiconductor device fabrication method for preventing tungsten from removing |
EP0746027A2 (en) | 1995-05-03 | 1996-12-04 | Applied Materials, Inc. | Polysilicon/tungsten silicide multilayer composite formed on an integrated circuit structure, and improved method of making same |
US5767004A (en) * | 1996-04-22 | 1998-06-16 | Chartered Semiconductor Manufacturing, Ltd. | Method for forming a low impurity diffusion polysilicon layer |
Non-Patent Citations (18)
Title |
---|
G.J. Leusink, C.R. Kleijn, T.G.M. Oosterlake, G.C.A.M. Janssen, S. Radelaar, "Growth kinetics and inhibition of growth of chemical vapor deposited thin tungsten films on silicon from tungsten hexafluoride," J. Appl. Phys., vol. 7, pp. 490-498. |
John E. J. Schmitz, Chemical Vapor Deposition of Tungsten and Tungsten Silicides for VLSI/ULSI Applications; (NP, Park Ridge, New Jersey, 1992). |
Kobayashi, et al. IEEE Trans, Electron Devices, 37 pp 577-582, Mar. 1990.* |
M. E. Tracy, Tungsten and Other Refractory Metals for VLSI Applications; edited by R. S. Blewer (MRS, Pittsburgh, PA, 1986), pp. 211-219. |
M. Hathaway, S. Mehta, T. Trowbridge, and C. S. Lai, Advanced Metallization for ULSI Applications 1992; edited by T. S. Cale and F. S. Pintchovsky (MRS, Pittsburgh, PA, 1993), pp. 333-339. |
M. L. Green, Y. S. Ali, T. Boone, B. A. Davidson, L. C. Feldman and S. Nakahara, Tungsten and Other Refractory Metals for VLSI Applications II; edited by E. K. Broadbent (MRS, Pittsburgh, PA, 1987), pp. 85-92. |
M. M. Moslehi, M. Wong, K. C. Saraswat and S. C. Shatas, 1987 Symposium on VLSI Technology; (Japan Society of Applied Physics, Tokyo, Japan, 1987), pp. 21-22. |
M. Wong, N. Kobayashi, R. Browning, D. Paine, and K.C. Saraswat, Journal of the Electrochemical Society vol. 134, No. 9 Sep. 1987. |
N. Kobayashi, M. Susuki, M. Saitou, "Tungsten Plug Technology Using Substitution of W for Si, " IEEE trans., Electron Devices, 37 (1990), pp. 577-582 (Mar. 1990). |
N. Kobayashi, M. Suzuki and M. Saitou, Tungsten and Other Refractory Metals for VLSI Applications IV; edited by R. S. Blewer and C. M. McConica (MRS, Pittsburgh, PA, 1989), pp. 143-149. |
R J. Mianowski, K. Y. Tao and H. A. Waggener, Tungsten and Other Refractory Metals for VLSI Appilcations; edited by R. S. Blewer (MRS, Pittsburgh, PA, 1986), pp. 145-158. |
R. H. Wilson , R. W. Stoll and M.A. Calacone, Tungsten and Other Refractory Metals for VLSI Applications; edited by R. S. Blewer (MRS, Pittsburgh, PA, 1986), pp. 35-42. |
R. V. Joshi et al "Characteristics of selective SPCVD W films by silicon reduction" Mat. Issues in Si IC Processing Symp. p. 309-14, Apr. 1986.* |
T. Kaga, Y. Sudoh, H. Goto, K. Shoji, T. Kisu, H. Yamashita, R. nagai, S. Iijima, M. Ohkura, F. Murai, T. Tanaka, Y. Goto, N. Yokoyama, M. Horiguchi, M. Isoda, T. Nishida, E. Takeda, "A 0.29-mum2 MIM-CROWN Cell and Process Technologies for 1-Gigabit DRAMs,", IEDM 94, pp. 927-929. |
T. Kaga, Y. Sudoh, H. Goto, K. Shoji, T. Kisu, H. Yamashita, R. nagai, S. Iijima, M. Ohkura, F. Murai, T. Tanaka, Y. Goto, N. Yokoyama, M. Horiguchi, M. Isoda, T. Nishida, E. Takeda, "A 0.29-μm2 MIM-CROWN Cell and Process Technologies for 1-Gigabit DRAMs,", IEDM 94, pp. 927-929. |
Wen-Kuan Yeh, Yeu-Cherng Shiau, and Mao-Chieh Chen, A New Tungsten Gate Metal Oxide Semiconductor Capacitor Using a Chemical Vapor Deposition Process; J. Electrochem. Soc., vol. 144, No. 1, Jan. 1997 (C)The Electrochemical Society, Inc., pp. 214-217. |
Wen-Kuan Yeh, Yeu-Cherng Shiau, and Mao-Chieh Chen, A New Tungsten Gate Metal Oxide Semiconductor Capacitor Using a Chemical Vapor Deposition Process; J. Electrochem. Soc., vol. 144, No. 1, Jan. 1997 ©The Electrochemical Society, Inc., pp. 214-217. |
Y. Nakamura, N. Kobayashi, D. Hisamoto, K. Umesa and R. Nagai, Jpn. J. Appl. Phys. vol. 35 (1996) pp. 1082-1085, Part 1, No. 2B, Feb. 1996. |
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US20060094196A1 (en) * | 2004-10-29 | 2006-05-04 | Fujitsu Limited | Method of fabricating semiconductor device, and semiconductor device |
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US7572715B2 (en) | 2004-12-01 | 2009-08-11 | Applied Materials, Inc. | Selective epitaxy process with alternating gas supply |
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US20060115933A1 (en) * | 2004-12-01 | 2006-06-01 | Applied Materials, Inc. | Use of CL2 and/or HCL during silicon epitaxial film formation |
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US20060115934A1 (en) * | 2004-12-01 | 2006-06-01 | Yihwan Kim | Selective epitaxy process with alternating gas supply |
US7312128B2 (en) | 2004-12-01 | 2007-12-25 | Applied Materials, Inc. | Selective epitaxy process with alternating gas supply |
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US7960256B2 (en) | 2004-12-01 | 2011-06-14 | Applied Materials, Inc. | Use of CL2 and/or HCL during silicon epitaxial film formation |
US7732305B2 (en) | 2004-12-01 | 2010-06-08 | Applied Materials, Inc. | Use of Cl2 and/or HCl during silicon epitaxial film formation |
US20060260538A1 (en) * | 2004-12-01 | 2006-11-23 | Applied Materials, Inc. | Use of Cl2 and/or HCl during silicon epitaxial film formation |
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US20060128150A1 (en) * | 2004-12-10 | 2006-06-15 | Applied Materials, Inc. | Ruthenium as an underlayer for tungsten film deposition |
US7964505B2 (en) | 2005-01-19 | 2011-06-21 | Applied Materials, Inc. | Atomic layer deposition of tungsten materials |
US20090053893A1 (en) * | 2005-01-19 | 2009-02-26 | Amit Khandelwal | Atomic layer deposition of tungsten materials |
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US20070224830A1 (en) * | 2005-01-31 | 2007-09-27 | Samoilov Arkadii V | Low temperature etchant for treatment of silicon-containing surfaces |
US8093154B2 (en) | 2005-01-31 | 2012-01-10 | Applied Materials, Inc. | Etchant treatment processes for substrate surfaces and chamber surfaces |
US8445389B2 (en) | 2005-01-31 | 2013-05-21 | Applied Materials, Inc. | Etchant treatment processes for substrate surfaces and chamber surfaces |
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US8492284B2 (en) | 2005-01-31 | 2013-07-23 | Applied Materials, Inc. | Low temperature etchant for treatment of silicon-containing surfaces |
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US20080200019A9 (en) * | 2005-03-15 | 2008-08-21 | Hannu Huotari | Selective Deposition of Noble Metal Thin Films |
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US20060286774A1 (en) * | 2005-06-21 | 2006-12-21 | Applied Materials. Inc. | Method for forming silicon-containing materials during a photoexcitation deposition process |
US20100018460A1 (en) * | 2005-06-21 | 2010-01-28 | Applied Materials, Inc. | Method for forming silicon-containing materials during a photoexcitation deposition process |
US20060286776A1 (en) * | 2005-06-21 | 2006-12-21 | Applied Materials, Inc. | Method for forming silicon-containing materials during a photoexcitation deposition process |
US8387557B2 (en) | 2005-06-21 | 2013-03-05 | Applied Materials | Method for forming silicon-containing materials during a photoexcitation deposition process |
US7648927B2 (en) | 2005-06-21 | 2010-01-19 | Applied Materials, Inc. | Method for forming silicon-containing materials during a photoexcitation deposition process |
US7651955B2 (en) | 2005-06-21 | 2010-01-26 | Applied Materials, Inc. | Method for forming silicon-containing materials during a photoexcitation deposition process |
US20070014919A1 (en) * | 2005-07-15 | 2007-01-18 | Jani Hamalainen | Atomic layer deposition of noble metal oxides |
US20070066023A1 (en) * | 2005-09-20 | 2007-03-22 | Randhir Thakur | Method to form a device on a soi substrate |
US20070065578A1 (en) * | 2005-09-21 | 2007-03-22 | Applied Materials, Inc. | Treatment processes for a batch ALD reactor |
US20070099422A1 (en) * | 2005-10-28 | 2007-05-03 | Kapila Wijekoon | Process for electroless copper deposition |
US7850779B2 (en) | 2005-11-04 | 2010-12-14 | Applied Materisals, Inc. | Apparatus and process for plasma-enhanced atomic layer deposition |
US20070128862A1 (en) * | 2005-11-04 | 2007-06-07 | Paul Ma | Apparatus and process for plasma-enhanced atomic layer deposition |
US20070128864A1 (en) * | 2005-11-04 | 2007-06-07 | Paul Ma | Apparatus and process for plasma-enhanced atomic layer deposition |
US20080268171A1 (en) * | 2005-11-04 | 2008-10-30 | Paul Ma | Apparatus and process for plasma-enhanced atomic layer deposition |
US20070119370A1 (en) * | 2005-11-04 | 2007-05-31 | Paul Ma | Apparatus and process for plasma-enhanced atomic layer deposition |
US20070128863A1 (en) * | 2005-11-04 | 2007-06-07 | Paul Ma | Apparatus and process for plasma-enhanced atomic layer deposition |
US20070119371A1 (en) * | 2005-11-04 | 2007-05-31 | Paul Ma | Apparatus and process for plasma-enhanced atomic layer deposition |
US9032906B2 (en) | 2005-11-04 | 2015-05-19 | Applied Materials, Inc. | Apparatus and process for plasma-enhanced atomic layer deposition |
US7682946B2 (en) | 2005-11-04 | 2010-03-23 | Applied Materials, Inc. | Apparatus and process for plasma-enhanced atomic layer deposition |
US20070207624A1 (en) * | 2006-03-02 | 2007-09-06 | Applied Materials, Inc. | Multiple nitrogen plasma treatments for thin SiON dielectrics |
US7674337B2 (en) | 2006-04-07 | 2010-03-09 | Applied Materials, Inc. | Gas manifolds for use during epitaxial film formation |
US20070259112A1 (en) * | 2006-04-07 | 2007-11-08 | Applied Materials, Inc. | Gas manifolds for use during epitaxial film formation |
US20080135914A1 (en) * | 2006-06-30 | 2008-06-12 | Krishna Nety M | Nanocrystal formation |
US7588980B2 (en) | 2006-07-31 | 2009-09-15 | Applied Materials, Inc. | Methods of controlling morphology during epitaxial layer formation |
US20080022924A1 (en) * | 2006-07-31 | 2008-01-31 | Applied Materials, Inc. | Methods of forming carbon-containing silicon epitaxial layers |
US8029620B2 (en) | 2006-07-31 | 2011-10-04 | Applied Materials, Inc. | Methods of forming carbon-containing silicon epitaxial layers |
US20080026549A1 (en) * | 2006-07-31 | 2008-01-31 | Applied Materials, Inc. | Methods of controlling morphology during epitaxial layer formation |
US20080318417A1 (en) * | 2006-09-01 | 2008-12-25 | Asm Japan K.K. | Method of forming ruthenium film for metal wiring structure |
US20080124484A1 (en) * | 2006-11-08 | 2008-05-29 | Asm Japan K.K. | Method of forming ru film and metal wiring structure |
US20080171436A1 (en) * | 2007-01-11 | 2008-07-17 | Asm Genitech Korea Ltd. | Methods of depositing a ruthenium film |
US20080206987A1 (en) * | 2007-01-29 | 2008-08-28 | Gelatos Avgerinos V | Process for tungsten nitride deposition by a temperature controlled lid assembly |
US20090087339A1 (en) * | 2007-09-28 | 2009-04-02 | Asm Japan K.K. | METHOD FOR FORMING RUTHENIUM COMPLEX FILM USING Beta-DIKETONE-COORDINATED RUTHENIUM PRECURSOR |
US8273408B2 (en) | 2007-10-17 | 2012-09-25 | Asm Genitech Korea Ltd. | Methods of depositing a ruthenium film |
US20090155997A1 (en) * | 2007-12-12 | 2009-06-18 | Asm Japan K.K. | METHOD FOR FORMING Ta-Ru LINER LAYER FOR Cu WIRING |
US7655564B2 (en) | 2007-12-12 | 2010-02-02 | Asm Japan, K.K. | Method for forming Ta-Ru liner layer for Cu wiring |
US20090163024A1 (en) * | 2007-12-21 | 2009-06-25 | Asm Genitech Korea Ltd. | Methods of depositing a ruthenium film |
US20090209101A1 (en) * | 2008-02-19 | 2009-08-20 | Asm Japan K.K. | Ruthenium alloy film for copper interconnects |
US7799674B2 (en) | 2008-02-19 | 2010-09-21 | Asm Japan K.K. | Ruthenium alloy film for copper interconnects |
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US20110020546A1 (en) * | 2009-05-15 | 2011-01-27 | Asm International N.V. | Low Temperature ALD of Noble Metals |
US8329569B2 (en) | 2009-07-31 | 2012-12-11 | Asm America, Inc. | Deposition of ruthenium or ruthenium dioxide |
US20110027977A1 (en) * | 2009-07-31 | 2011-02-03 | Asm America, Inc. | Deposition of ruthenium or ruthenium dioxide |
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US10199234B2 (en) | 2015-10-02 | 2019-02-05 | Asm Ip Holding B.V. | Methods of forming metal silicides |
US20170263455A1 (en) * | 2016-03-09 | 2017-09-14 | Tokyo Electron Limited | Mask structure forming method and film forming apparatus |
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