US6816385B1 - Compliant laminate connector - Google Patents
Compliant laminate connector Download PDFInfo
- Publication number
- US6816385B1 US6816385B1 US09/714,373 US71437300A US6816385B1 US 6816385 B1 US6816385 B1 US 6816385B1 US 71437300 A US71437300 A US 71437300A US 6816385 B1 US6816385 B1 US 6816385B1
- Authority
- US
- United States
- Prior art keywords
- connector
- contacts
- electronic device
- substrate
- coefficient
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/114—Pad being close to via, but not surrounding the via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0707—Shielding
- H05K2201/0715—Shielding provided by an outer layer of PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
Description
Claims (43)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/714,373 US6816385B1 (en) | 2000-11-16 | 2000-11-16 | Compliant laminate connector |
JP2001332261A JP2002237553A (en) | 2000-11-16 | 2001-10-30 | Electronic device having flexible connector |
KR10-2001-0068361A KR100495581B1 (en) | 2000-11-16 | 2001-11-03 | Compliant laminate connector background of the invention |
EP01309534A EP1207727B1 (en) | 2000-11-16 | 2001-11-12 | Compliant laminate connector |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/714,373 US6816385B1 (en) | 2000-11-16 | 2000-11-16 | Compliant laminate connector |
Publications (1)
Publication Number | Publication Date |
---|---|
US6816385B1 true US6816385B1 (en) | 2004-11-09 |
Family
ID=24869779
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/714,373 Expired - Lifetime US6816385B1 (en) | 2000-11-16 | 2000-11-16 | Compliant laminate connector |
Country Status (4)
Country | Link |
---|---|
US (1) | US6816385B1 (en) |
EP (1) | EP1207727B1 (en) |
JP (1) | JP2002237553A (en) |
KR (1) | KR100495581B1 (en) |
Cited By (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050146030A1 (en) * | 2003-12-30 | 2005-07-07 | Hiroshi Miyazaki | Solder ball pad structure |
US20050146003A1 (en) * | 2003-12-31 | 2005-07-07 | O'connor Michael | Microdisplay packaging system |
US20050265008A1 (en) * | 2004-05-28 | 2005-12-01 | International Business Machines Corporation | Method and structures for implementing enhanced reliability for printed circuit board high power dissipation applications |
US20060202322A1 (en) * | 2003-09-24 | 2006-09-14 | Ibiden Co., Ltd. | Interposer, and multilayer printed wiring board |
US20060238207A1 (en) * | 2005-04-21 | 2006-10-26 | Endicott Interconnect Technologies, Inc. | Interposer for use with test apparatus |
US20070026743A1 (en) * | 2005-07-29 | 2007-02-01 | Minich Steven E | Electrical connector stress relief at substrate interface |
US20080014416A1 (en) * | 2006-07-12 | 2008-01-17 | Ramesh Govinda Raju | Microfabrication method |
US20080093115A1 (en) * | 2006-10-20 | 2008-04-24 | Industrial Technology Research Institute | Interposer, electrical package, and contact structure and fabricating method thereof |
US20080142996A1 (en) * | 2006-12-19 | 2008-06-19 | Gopalakrishnan Subramanian | Controlling flow of underfill using polymer coating and resulting devices |
US20080157352A1 (en) * | 2006-12-28 | 2008-07-03 | Shripad Gokhale | Reducing underfill keep out zone on substrate used in electronic device processing |
US20110127664A1 (en) * | 2009-11-30 | 2011-06-02 | Timothy Antesberger | Electronic package including high density interposer and circuitized substrate assembly utilizing same |
US20110126408A1 (en) * | 2009-12-01 | 2011-06-02 | Timothy Antesberger | Method of making high density interposer and electronic package utilizing same |
US20140138823A1 (en) * | 2012-11-21 | 2014-05-22 | Nvidia Corporation | Variable-size solder bump structures for integrated circuit packaging |
US9272371B2 (en) | 2013-05-30 | 2016-03-01 | Agc Automotive Americas R&D, Inc. | Solder joint for an electrical conductor and a window pane including same |
EP2543229B1 (en) | 2010-03-02 | 2017-01-25 | Saint-Gobain Glass France | Pane with electric connection element |
EP2708091B1 (en) | 2011-05-10 | 2017-12-20 | Saint-Gobain Glass France | Disk having an electric connecting element |
US10263362B2 (en) | 2017-03-29 | 2019-04-16 | Agc Automotive Americas R&D, Inc. | Fluidically sealed enclosure for window electrical connections |
US10305239B2 (en) | 2011-05-10 | 2019-05-28 | Saint-Gobain Glass France | Pane comprising an electrical connection element |
US10355378B2 (en) | 2011-05-10 | 2019-07-16 | Saint-Gobain Glass France | Pane having an electrical connection element |
US10849192B2 (en) | 2017-04-26 | 2020-11-24 | Agc Automotive Americas R&D, Inc. | Enclosure assembly for window electrical connections |
US10943874B1 (en) * | 2019-08-29 | 2021-03-09 | Juniper Networks, Inc | Apparatus, system, and method for mitigating warpage of integrated circuits during reflow processes |
US11971758B2 (en) | 2020-12-16 | 2024-04-30 | Samsung Electronics Co., Ltd. | Insertable electronic device and method for the same |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008527649A (en) * | 2005-01-04 | 2008-07-24 | グリフィクス インコーポレーティッド | Fine pitch electrical interconnect assembly |
EP1701383A1 (en) * | 2005-03-10 | 2006-09-13 | Optium Care International Tech. Inc. | Contact pad adapter for semiconductor package |
EP1727408A1 (en) * | 2005-05-13 | 2006-11-29 | Eidgenössische Technische Hochschule Zürich | Textile with conductor pattern and method for its production |
TWI546911B (en) * | 2012-12-17 | 2016-08-21 | 巨擘科技股份有限公司 | Package structure and package method |
JP6514610B2 (en) * | 2014-09-09 | 2019-05-15 | 積水化学工業株式会社 | Method of manufacturing connection structure |
CN113826451A (en) * | 2019-04-15 | 2021-12-21 | 惠普发展公司, 有限责任合伙企业 | Printed circuit board with electrical contacts and higher melting temperature solder joints |
GB2585219A (en) * | 2019-07-03 | 2021-01-06 | Landa Labs 2012 Ltd | Method and apparatus for mounting and cooling a circuit component |
WO2021235263A1 (en) * | 2020-05-21 | 2021-11-25 | 株式会社村田製作所 | Signal transmission line |
Citations (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02252250A (en) | 1989-03-27 | 1990-10-11 | Nippon Telegr & Teleph Corp <Ntt> | Film for semiconductor chip terminal connection and connection method for semiconductor chip terminal |
US5219794A (en) | 1991-03-14 | 1993-06-15 | Hitachi, Ltd. | Semiconductor integrated circuit device and method of fabricating same |
US5311402A (en) | 1992-02-14 | 1994-05-10 | Nec Corporation | Semiconductor device package having locating mechanism for properly positioning semiconductor device within package |
JPH06291165A (en) | 1993-04-01 | 1994-10-18 | Nec Corp | Flip chip connecting construction |
US5477933A (en) | 1994-10-24 | 1995-12-26 | At&T Corp. | Electronic device interconnection techniques |
JPH08273726A (en) | 1995-03-29 | 1996-10-18 | Shin Etsu Polymer Co Ltd | Electric connector and manufacture thereof |
US5634268A (en) | 1995-06-07 | 1997-06-03 | International Business Machines Corporation | Method for making direct chip attach circuit card |
JPH1079281A (en) | 1996-07-11 | 1998-03-24 | Sony Corp | Socket structure for semiconductor device testing |
US5759737A (en) | 1996-09-06 | 1998-06-02 | International Business Machines Corporation | Method of making a component carrier |
US5834848A (en) * | 1996-12-03 | 1998-11-10 | Kabushiki Kaisha Toshiba | Electronic device and semiconductor package |
US5894410A (en) | 1996-03-28 | 1999-04-13 | Intel Corporation | Perimeter matrix ball grid array circuit package with a populated center |
US5900675A (en) * | 1997-04-21 | 1999-05-04 | International Business Machines Corporation | Organic controlled collapse chip connector (C4) ball grid array (BGA) chip carrier with dual thermal expansion rates |
US6014317A (en) * | 1996-11-08 | 2000-01-11 | W. L. Gore & Associates, Inc. | Chip package mounting structure for controlling warp of electronic assemblies due to thermal expansion effects |
WO2000011755A1 (en) | 1998-08-17 | 2000-03-02 | Infineon Technologies Ag | Contact device mainly intended for contact between electric components and circuit supports and method for producing said device |
US6050832A (en) * | 1998-08-07 | 2000-04-18 | Fujitsu Limited | Chip and board stress relief interposer |
JP2000216302A (en) | 1999-01-22 | 2000-08-04 | Sumitomo Bakelite Co Ltd | Interposer with reinforced plate and its manufacture |
US6104093A (en) * | 1997-04-24 | 2000-08-15 | International Business Machines Corporation | Thermally enhanced and mechanically balanced flip chip package and method of forming |
US6177728B1 (en) * | 1998-04-28 | 2001-01-23 | International Business Machines Corporation | Integrated circuit chip device having balanced thermal expansion |
US6191952B1 (en) * | 1998-04-28 | 2001-02-20 | International Business Machines Corporation | Compliant surface layer for flip-chip electronic packages and method for forming same |
US6284569B1 (en) * | 1998-02-05 | 2001-09-04 | Asat, Limited | Method of manufacturing a flexible integrated circuit package utilizing an integrated carrier ring/stiffener |
US6309915B1 (en) * | 1998-02-05 | 2001-10-30 | Tessera, Inc. | Semiconductor chip package with expander ring and method of making same |
US6317331B1 (en) * | 1998-08-19 | 2001-11-13 | Kulicke & Soffa Holdings, Inc. | Wiring substrate with thermal insert |
US6333563B1 (en) * | 2000-06-06 | 2001-12-25 | International Business Machines Corporation | Electrical interconnection package and method thereof |
JP2002141121A (en) | 2000-11-06 | 2002-05-17 | Hitachi Ltd | Anisotropic conductive film, semiconductor device using the film, and its manufacturing method |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5491303A (en) * | 1994-03-21 | 1996-02-13 | Motorola, Inc. | Surface mount interposer |
JP2864984B2 (en) * | 1994-05-18 | 1999-03-08 | 日立電線株式会社 | Method of manufacturing ball grid array |
US5738531A (en) * | 1996-09-09 | 1998-04-14 | International Business Machines Corporation | Self-alligning low profile socket for connecting ball grid array devices through a dendritic interposer |
JP3497680B2 (en) * | 1996-11-29 | 2004-02-16 | 株式会社東芝 | Circuit module having semiconductor package and electronic device mounted with circuit module |
US5953816A (en) * | 1997-07-16 | 1999-09-21 | General Dynamics Information Systems, Inc. | Process of making interposers for land grip arrays |
JPH1154884A (en) * | 1997-08-06 | 1999-02-26 | Nec Corp | Mounting structure for semiconductor device |
US6163462A (en) * | 1997-12-08 | 2000-12-19 | Analog Devices, Inc. | Stress relief substrate for solder ball grid array mounted circuits and method of packaging |
JPH11204173A (en) * | 1997-12-19 | 1999-07-30 | Molex Inc | Connector for bga |
FR2796497B1 (en) * | 1999-07-13 | 2001-09-07 | Thomson Csf Detexis | PERFECTED INTERCONNECTION BETWEEN AN ELECTRONIC COMPONENT AND A CARD |
-
2000
- 2000-11-16 US US09/714,373 patent/US6816385B1/en not_active Expired - Lifetime
-
2001
- 2001-10-30 JP JP2001332261A patent/JP2002237553A/en active Pending
- 2001-11-03 KR KR10-2001-0068361A patent/KR100495581B1/en not_active IP Right Cessation
- 2001-11-12 EP EP01309534A patent/EP1207727B1/en not_active Expired - Lifetime
Patent Citations (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02252250A (en) | 1989-03-27 | 1990-10-11 | Nippon Telegr & Teleph Corp <Ntt> | Film for semiconductor chip terminal connection and connection method for semiconductor chip terminal |
US5219794A (en) | 1991-03-14 | 1993-06-15 | Hitachi, Ltd. | Semiconductor integrated circuit device and method of fabricating same |
US5311402A (en) | 1992-02-14 | 1994-05-10 | Nec Corporation | Semiconductor device package having locating mechanism for properly positioning semiconductor device within package |
JPH06291165A (en) | 1993-04-01 | 1994-10-18 | Nec Corp | Flip chip connecting construction |
US5477933A (en) | 1994-10-24 | 1995-12-26 | At&T Corp. | Electronic device interconnection techniques |
JPH08273726A (en) | 1995-03-29 | 1996-10-18 | Shin Etsu Polymer Co Ltd | Electric connector and manufacture thereof |
US5634268A (en) | 1995-06-07 | 1997-06-03 | International Business Machines Corporation | Method for making direct chip attach circuit card |
US5894410A (en) | 1996-03-28 | 1999-04-13 | Intel Corporation | Perimeter matrix ball grid array circuit package with a populated center |
JPH1079281A (en) | 1996-07-11 | 1998-03-24 | Sony Corp | Socket structure for semiconductor device testing |
US5759737A (en) | 1996-09-06 | 1998-06-02 | International Business Machines Corporation | Method of making a component carrier |
US6014317A (en) * | 1996-11-08 | 2000-01-11 | W. L. Gore & Associates, Inc. | Chip package mounting structure for controlling warp of electronic assemblies due to thermal expansion effects |
US5834848A (en) * | 1996-12-03 | 1998-11-10 | Kabushiki Kaisha Toshiba | Electronic device and semiconductor package |
US5900675A (en) * | 1997-04-21 | 1999-05-04 | International Business Machines Corporation | Organic controlled collapse chip connector (C4) ball grid array (BGA) chip carrier with dual thermal expansion rates |
US6104093A (en) * | 1997-04-24 | 2000-08-15 | International Business Machines Corporation | Thermally enhanced and mechanically balanced flip chip package and method of forming |
US6309915B1 (en) * | 1998-02-05 | 2001-10-30 | Tessera, Inc. | Semiconductor chip package with expander ring and method of making same |
US6284569B1 (en) * | 1998-02-05 | 2001-09-04 | Asat, Limited | Method of manufacturing a flexible integrated circuit package utilizing an integrated carrier ring/stiffener |
US6177728B1 (en) * | 1998-04-28 | 2001-01-23 | International Business Machines Corporation | Integrated circuit chip device having balanced thermal expansion |
US6191952B1 (en) * | 1998-04-28 | 2001-02-20 | International Business Machines Corporation | Compliant surface layer for flip-chip electronic packages and method for forming same |
US6050832A (en) * | 1998-08-07 | 2000-04-18 | Fujitsu Limited | Chip and board stress relief interposer |
WO2000011755A1 (en) | 1998-08-17 | 2000-03-02 | Infineon Technologies Ag | Contact device mainly intended for contact between electric components and circuit supports and method for producing said device |
US6317331B1 (en) * | 1998-08-19 | 2001-11-13 | Kulicke & Soffa Holdings, Inc. | Wiring substrate with thermal insert |
JP2000216302A (en) | 1999-01-22 | 2000-08-04 | Sumitomo Bakelite Co Ltd | Interposer with reinforced plate and its manufacture |
US6333563B1 (en) * | 2000-06-06 | 2001-12-25 | International Business Machines Corporation | Electrical interconnection package and method thereof |
JP2002141121A (en) | 2000-11-06 | 2002-05-17 | Hitachi Ltd | Anisotropic conductive film, semiconductor device using the film, and its manufacturing method |
Non-Patent Citations (2)
Title |
---|
Nakamura et al., 2000 International Symposium on Microelect, "Multilayer Substrate with Low Coefficent of Thermal Expansion," pp. 235-240. |
Peterson et al., IBM Technical Disclosure Bulletin, "Thermally Enhanced Three-Dimensional Flex Interconnectof Multi-Chip Modules," vol. 36, No. 12, Dec. 1993, p. 39. |
Cited By (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060202322A1 (en) * | 2003-09-24 | 2006-09-14 | Ibiden Co., Ltd. | Interposer, and multilayer printed wiring board |
US20080026559A1 (en) * | 2003-12-30 | 2008-01-31 | Texas Instruments Incorporated | Solder Ball Pad Structure |
US20050146030A1 (en) * | 2003-12-30 | 2005-07-07 | Hiroshi Miyazaki | Solder ball pad structure |
US7294929B2 (en) * | 2003-12-30 | 2007-11-13 | Texas Instruments Incorporated | Solder ball pad structure |
US20050146003A1 (en) * | 2003-12-31 | 2005-07-07 | O'connor Michael | Microdisplay packaging system |
US20080233667A1 (en) * | 2003-12-31 | 2008-09-25 | Intel Corporation | Microdisplay packaging system |
US7397067B2 (en) * | 2003-12-31 | 2008-07-08 | Intel Corporation | Microdisplay packaging system |
US8680572B2 (en) | 2003-12-31 | 2014-03-25 | Intel Corporation | Microdisplay packaging system |
US8044431B2 (en) | 2003-12-31 | 2011-10-25 | Intel Corporation | Microdisplay packaging system |
US20050265008A1 (en) * | 2004-05-28 | 2005-12-01 | International Business Machines Corporation | Method and structures for implementing enhanced reliability for printed circuit board high power dissipation applications |
US7180752B2 (en) * | 2004-05-28 | 2007-02-20 | International Business Machines Corporation | Method and structures for implementing enhanced reliability for printed circuit board high power dissipation applications |
US20060238207A1 (en) * | 2005-04-21 | 2006-10-26 | Endicott Interconnect Technologies, Inc. | Interposer for use with test apparatus |
US7292055B2 (en) | 2005-04-21 | 2007-11-06 | Endicott Interconnect Technologies, Inc. | Interposer for use with test apparatus |
US7511518B2 (en) | 2005-04-21 | 2009-03-31 | Endicott Interconnect Technologies, Inc. | Method of making an interposer |
US7258551B2 (en) | 2005-07-29 | 2007-08-21 | Fci Americas Technology, Inc. | Electrical connector stress relief at substrate interface |
US20070026743A1 (en) * | 2005-07-29 | 2007-02-01 | Minich Steven E | Electrical connector stress relief at substrate interface |
US20080014416A1 (en) * | 2006-07-12 | 2008-01-17 | Ramesh Govinda Raju | Microfabrication method |
US8012566B2 (en) * | 2006-07-12 | 2011-09-06 | Hewlett-Packard Development Company, L.P. | Microneedles formed by electroplating and selectively releasing temperature sensitive layers |
US20080093115A1 (en) * | 2006-10-20 | 2008-04-24 | Industrial Technology Research Institute | Interposer, electrical package, and contact structure and fabricating method thereof |
US7968799B2 (en) * | 2006-10-20 | 2011-06-28 | Industrial Technology Research Institute | Interposer, electrical package, and contact structure and fabricating method thereof |
US20080142996A1 (en) * | 2006-12-19 | 2008-06-19 | Gopalakrishnan Subramanian | Controlling flow of underfill using polymer coating and resulting devices |
US20110084388A1 (en) * | 2006-12-28 | 2011-04-14 | Shripad Gokhale | Reducing underfill keep out zone on substrate used in electronic device processing |
US7875503B2 (en) * | 2006-12-28 | 2011-01-25 | Intel Corporation | Reducing underfill keep out zone on substrate used in electronic device processing |
US20080157352A1 (en) * | 2006-12-28 | 2008-07-03 | Shripad Gokhale | Reducing underfill keep out zone on substrate used in electronic device processing |
US8362627B2 (en) * | 2006-12-28 | 2013-01-29 | Intel Corporation | Reducing underfill keep out zone on substrate used in electronic device processing |
US20110127664A1 (en) * | 2009-11-30 | 2011-06-02 | Timothy Antesberger | Electronic package including high density interposer and circuitized substrate assembly utilizing same |
US8405229B2 (en) | 2009-11-30 | 2013-03-26 | Endicott Interconnect Technologies, Inc. | Electronic package including high density interposer and circuitized substrate assembly utilizing same |
US20110126408A1 (en) * | 2009-12-01 | 2011-06-02 | Timothy Antesberger | Method of making high density interposer and electronic package utilizing same |
US8245392B2 (en) | 2009-12-01 | 2012-08-21 | Endicott Interconnect Technologies, Inc. | Method of making high density interposer and electronic package utilizing same |
EP2543229B1 (en) | 2010-03-02 | 2017-01-25 | Saint-Gobain Glass France | Pane with electric connection element |
US10305239B2 (en) | 2011-05-10 | 2019-05-28 | Saint-Gobain Glass France | Pane comprising an electrical connection element |
EP2708091B1 (en) | 2011-05-10 | 2017-12-20 | Saint-Gobain Glass France | Disk having an electric connecting element |
EP2708091B2 (en) † | 2011-05-10 | 2021-06-23 | Saint-Gobain Glass France | Disk having an electric connecting element |
US10355378B2 (en) | 2011-05-10 | 2019-07-16 | Saint-Gobain Glass France | Pane having an electrical connection element |
US11456546B2 (en) | 2011-05-10 | 2022-09-27 | Saint-Gobain Glass France | Pane having an electrical connection element |
US11217907B2 (en) | 2011-05-10 | 2022-01-04 | Saint-Gobain Glass France | Disk having an electric connecting element |
US9385098B2 (en) * | 2012-11-21 | 2016-07-05 | Nvidia Corporation | Variable-size solder bump structures for integrated circuit packaging |
US20140138823A1 (en) * | 2012-11-21 | 2014-05-22 | Nvidia Corporation | Variable-size solder bump structures for integrated circuit packaging |
US9272371B2 (en) | 2013-05-30 | 2016-03-01 | Agc Automotive Americas R&D, Inc. | Solder joint for an electrical conductor and a window pane including same |
US10263362B2 (en) | 2017-03-29 | 2019-04-16 | Agc Automotive Americas R&D, Inc. | Fluidically sealed enclosure for window electrical connections |
US10849192B2 (en) | 2017-04-26 | 2020-11-24 | Agc Automotive Americas R&D, Inc. | Enclosure assembly for window electrical connections |
US10943874B1 (en) * | 2019-08-29 | 2021-03-09 | Juniper Networks, Inc | Apparatus, system, and method for mitigating warpage of integrated circuits during reflow processes |
US11971758B2 (en) | 2020-12-16 | 2024-04-30 | Samsung Electronics Co., Ltd. | Insertable electronic device and method for the same |
Also Published As
Publication number | Publication date |
---|---|
EP1207727B1 (en) | 2012-09-12 |
KR100495581B1 (en) | 2005-06-16 |
JP2002237553A (en) | 2002-08-23 |
EP1207727A2 (en) | 2002-05-22 |
KR20020038480A (en) | 2002-05-23 |
EP1207727A3 (en) | 2003-08-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6816385B1 (en) | Compliant laminate connector | |
US6586274B2 (en) | Semiconductor device, substrate for a semiconductor device, method of manufacture thereof, and electronic instrument | |
US6028358A (en) | Package for a semiconductor device and a semiconductor device | |
US7361972B2 (en) | Chip packaging structure for improving reliability | |
US6294831B1 (en) | Electronic package with bonded structure and method of making | |
CN107978569B (en) | Chip packaging structure and manufacturing method thereof | |
US20080119029A1 (en) | Wafer scale thin film package | |
US20080157327A1 (en) | Package on package structure for semiconductor devices and method of the same | |
US20090045508A1 (en) | Oblong peripheral solder ball pads on a printed circuit board for mounting a ball grid array package | |
JP2001520460A (en) | Method and structure for improving heat dissipation characteristics of package for microelectronic device | |
KR20080014004A (en) | Interposer and semiconductor device | |
JP2000031327A (en) | Semiconductor device and its manufacture | |
JP4494249B2 (en) | Semiconductor device | |
CN103839897A (en) | Integrated circuit package and method of manufacture | |
US8102046B2 (en) | Semiconductor device and method of manufacturing the same | |
US7838333B2 (en) | Electronic device package and method of manufacturing the same | |
US6444494B1 (en) | Process of packaging a semiconductor device with reinforced film substrate | |
US6465745B1 (en) | Micro-BGA beam lead connection | |
US6266249B1 (en) | Semiconductor flip chip ball grid array package | |
US7190056B2 (en) | Thermally enhanced component interposer: finger and net structures | |
US6965162B2 (en) | Semiconductor chip mounting substrate and semiconductor device using it | |
US7514798B2 (en) | Arrangement for the protection of three-dimensional structures on wafers | |
US11670574B2 (en) | Semiconductor device | |
JPH10154768A (en) | Semiconductor device and its manufacturing method | |
JP3063733B2 (en) | Semiconductor package |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: INTERNATIONAL BUSINESS MACHINES CORPORATION, NEW Y Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ALCOE, DAVID J.;REEL/FRAME:011328/0909 Effective date: 20001114 |
|
FEPP | Fee payment procedure |
Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
REMI | Maintenance fee reminder mailed | ||
FPAY | Fee payment |
Year of fee payment: 8 |
|
SULP | Surcharge for late payment |
Year of fee payment: 7 |
|
AS | Assignment |
Owner name: GLOBALFOUNDRIES U.S. 2 LLC, NEW YORK Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:INTERNATIONAL BUSINESS MACHINES CORPORATION;REEL/FRAME:036550/0001 Effective date: 20150629 |
|
AS | Assignment |
Owner name: GLOBALFOUNDRIES INC., CAYMAN ISLANDS Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GLOBALFOUNDRIES U.S. 2 LLC;GLOBALFOUNDRIES U.S. INC.;REEL/FRAME:036779/0001 Effective date: 20150910 |
|
FPAY | Fee payment |
Year of fee payment: 12 |
|
AS | Assignment |
Owner name: WILMINGTON TRUST, NATIONAL ASSOCIATION, DELAWARE Free format text: SECURITY AGREEMENT;ASSIGNOR:GLOBALFOUNDRIES INC.;REEL/FRAME:049490/0001 Effective date: 20181127 |
|
AS | Assignment |
Owner name: GLOBALFOUNDRIES U.S. INC., CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:GLOBALFOUNDRIES INC.;REEL/FRAME:054633/0001 Effective date: 20201022 |
|
AS | Assignment |
Owner name: GLOBALFOUNDRIES INC., CAYMAN ISLANDS Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:WILMINGTON TRUST, NATIONAL ASSOCIATION;REEL/FRAME:054636/0001 Effective date: 20201117 |
|
AS | Assignment |
Owner name: GLOBALFOUNDRIES U.S. INC., NEW YORK Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:WILMINGTON TRUST, NATIONAL ASSOCIATION;REEL/FRAME:056987/0001 Effective date: 20201117 |