US6930056B1 - Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for integrated circuit structure - Google Patents
Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for integrated circuit structure Download PDFInfo
- Publication number
- US6930056B1 US6930056B1 US09/884,736 US88473601A US6930056B1 US 6930056 B1 US6930056 B1 US 6930056B1 US 88473601 A US88473601 A US 88473601A US 6930056 B1 US6930056 B1 US 6930056B1
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- layer
- dielectric material
- low
- densified
- openings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/7681—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving one or more buried masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
Abstract
Description
Claims (10)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/884,736 US6930056B1 (en) | 2001-06-19 | 2001-06-19 | Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for integrated circuit structure |
US10/422,270 US6790784B2 (en) | 2001-06-19 | 2003-04-24 | Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for intergrated circuit structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/884,736 US6930056B1 (en) | 2001-06-19 | 2001-06-19 | Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for integrated circuit structure |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/422,270 Division US6790784B2 (en) | 2001-06-19 | 2003-04-24 | Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for intergrated circuit structure |
Publications (1)
Publication Number | Publication Date |
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US6930056B1 true US6930056B1 (en) | 2005-08-16 |
Family
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Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
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US09/884,736 Expired - Fee Related US6930056B1 (en) | 2001-06-19 | 2001-06-19 | Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for integrated circuit structure |
US10/422,270 Expired - Lifetime US6790784B2 (en) | 2001-06-19 | 2003-04-24 | Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for intergrated circuit structure |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/422,270 Expired - Lifetime US6790784B2 (en) | 2001-06-19 | 2003-04-24 | Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for intergrated circuit structure |
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US (2) | US6930056B1 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040157453A1 (en) * | 2002-12-31 | 2004-08-12 | Applied Materials, Inc. | Method of forming a low-K dual damascene interconnect structure |
US20040214427A1 (en) * | 2003-04-24 | 2004-10-28 | Kloster Grant M. | Forming thin hard mask over air gap or porous dielectric |
US7144606B2 (en) * | 1999-06-18 | 2006-12-05 | Applied Materials, Inc. | Plasma treatment to enhance adhesion and to minimize oxidation of carbon-containing layers |
US20060281301A1 (en) * | 2005-06-08 | 2006-12-14 | Jong Shin E | Method for manufacturing dual damascene pattern |
US20100109155A1 (en) * | 2008-11-05 | 2010-05-06 | Chartered Semiconductor Manufacturing, Ltd. | Reliable interconnect integration |
CN105336680A (en) * | 2014-08-13 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device, manufacturing method thereof and electronic device |
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US7804115B2 (en) | 1998-02-25 | 2010-09-28 | Micron Technology, Inc. | Semiconductor constructions having antireflective portions |
US6274292B1 (en) | 1998-02-25 | 2001-08-14 | Micron Technology, Inc. | Semiconductor processing methods |
US6828683B2 (en) | 1998-12-23 | 2004-12-07 | Micron Technology, Inc. | Semiconductor devices, and semiconductor processing methods |
US7067414B1 (en) * | 1999-09-01 | 2006-06-27 | Micron Technology, Inc. | Low k interlevel dielectric layer fabrication methods |
US6440860B1 (en) * | 2000-01-18 | 2002-08-27 | Micron Technology, Inc. | Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride |
TWI288443B (en) | 2002-05-17 | 2007-10-11 | Semiconductor Energy Lab | SiN film, semiconductor device, and the manufacturing method thereof |
KR100478498B1 (en) * | 2003-01-30 | 2005-03-28 | 동부아남반도체 주식회사 | Formation method of metal line in semiconductor device |
CN100499035C (en) * | 2003-10-03 | 2009-06-10 | 株式会社半导体能源研究所 | Method for manufacturing semiconductor device |
US7081407B2 (en) * | 2003-12-16 | 2006-07-25 | Lam Research Corporation | Method of preventing damage to porous low-k materials during resist stripping |
JP2005217142A (en) * | 2004-01-29 | 2005-08-11 | Semiconductor Leading Edge Technologies Inc | Process for fabricating semiconductor device |
US20060205232A1 (en) * | 2005-03-10 | 2006-09-14 | Lih-Ping Li | Film treatment method preventing blocked etch of low-K dielectrics |
US7763538B2 (en) | 2006-01-10 | 2010-07-27 | Freescale Semiconductor, Inc. | Dual plasma treatment barrier film to reduce low-k damage |
US20070232048A1 (en) * | 2006-03-31 | 2007-10-04 | Koji Miyata | Damascene interconnection having a SiCOH low k layer |
TWI306288B (en) * | 2006-08-18 | 2009-02-11 | Promos Technologies Inc | Memory structure and method for preparing the same |
US8227339B2 (en) * | 2009-11-02 | 2012-07-24 | International Business Machines Corporation | Creation of vias and trenches with different depths |
US8697508B2 (en) * | 2012-04-19 | 2014-04-15 | United Microelectronics Corp. | Semiconductor process |
US9640385B2 (en) * | 2015-02-16 | 2017-05-02 | Applied Materials, Inc. | Gate electrode material residual removal process |
US9934984B2 (en) | 2015-09-09 | 2018-04-03 | International Business Machines Corporation | Hydrofluorocarbon gas-assisted plasma etch for interconnect fabrication |
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2001
- 2001-06-19 US US09/884,736 patent/US6930056B1/en not_active Expired - Fee Related
-
2003
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