Número de publicación | US7394296 B1 |

Tipo de publicación | Concesión |

Número de solicitud | US 11/621,106 |

Fecha de publicación | 1 Jul 2008 |

Fecha de presentación | 8 Ene 2007 |

Fecha de prioridad | 8 Ene 2007 |

Tarifa | Pagadas |

También publicado como | US20080164915 |

Número de publicación | 11621106, 621106, US 7394296 B1, US 7394296B1, US-B1-7394296, US7394296 B1, US7394296B1 |

Inventores | Jacky Chen, Yu-Sheng Chen |

Cesionario original | Delta Electronics, Inc. |

Exportar cita | BiBTeX, EndNote, RefMan |

Citas de patentes (2), Clasificaciones (6), Eventos legales (3) | |

Enlaces externos: USPTO, Cesión de USPTO, Espacenet | |

US 7394296 B1

Resumen

An apparatus and method for automatically offsetting the linear deviation of a V/F converter, the offset adjust pin of which is connected to a fixed resistance, and the frequency output pin of which is connected to a microcontroller unit (MCU) via an opto-isolator, a standard V/F transfer function being pre-stored in the MCU, wherein standard frequencies F**1** and F**0** (i.e., two coordination points (V**1**, F**1**) and (V**0**, F**0**)) are output by the V/F converter, when V**1** and V**0** are input as standard voltages, and the MCU may detect an error status in the V/F converter, when the V/F converter obtains real output frequencies F**1**′ and F**0**′ from real input voltages V**1** and V**2**, and standard coordination points (F**1**, K**1**) and (F**0**, K**0**) will be corrected to (F**1**′, K**1**) and (F**0**′, K**0**′), from which a transfer function of offsetting frequency down is obtained, when the MCU processes a frequency down procedure.

Reclamaciones(1)

a) setting up a standard V/F transfer function and a standard frequency down function, both standard functions having a corresponding relationship between (V**1**, F**1**), (V**0**, F**0**) and (F**1**, K**1**), (F**0**, K**0**);

b) inputting a first voltage V**1**, thus a real first frequency F**1**′ being obtained;

c) inputting a second voltage V**0**, thus a real second frequency F**0**′ being obtained;

d) comparing above two corresponding value sets, namely, F**1**′ with F**1**, and F**0**′ with F**0**;

e) in step d, if any corresponding values are different, namely, F**1**≠F**1**′ or F**0**≠F**0**′, frequency down values K**1** and K**0** are set correspondingly to F**1**′ and F**0**′ respectively;

f) according to two coordinate points (F**1**′, K**1**) and (F**0**′, K**0**), calculating an offset frequency down function, figure of which is a straight line passing through said two coordinate points in a Cartesian coordinate.

Descripción

1. Field of the Invention

The present invention generally relates to a V/F converter, in particular, to a V/F converter for power inverter.

2. Description of Prior Art

Following the increasing maturity of frequency conversion technology, the application of frequency converter is very popular currently, not only frequently seen in various domestic appliances (e.g., air conditioner, refrigerator, and washing machine), but also applied prevalently in each industrial control.

In frequency conversion application, a V/F converter is usually used, such as: TC9400 series manufactured by MICROCHIP Company and ADVFC32 manufactured by ANALOG DEVICE Company, which are all IC products that convert analogical voltage signal into digital frequency signal, such that the digitization of precision control may be processed conveniently. In said V/F converters, the relationship between input voltage and output frequency is a linear transfer function, which implies a direct proportion relationship between these two values. In all these V/F converters of IC products, an offset adjust pin (e.g., the second leg of TC9400 series and the first leg of ADVFC32) is usually arranged and connected to a variable resistance, the adjustment of which may change the slope of said transfer function during frequency conversion procedure, and thus a more accurate corresponding between the frequency output value and the voltage output value may be obtained.

However, such offsetting adjustment must be handled one by one through artificial manner, which is very uneconomical in a mass production of frequency converter, because it consumes substantial manpower and time. Furthermore, in the mobile structure of a variable resistance, its accuracy and endurance are all inferior to those of a fixed resistance, so the phenomenon of resistance floating is occurred frequently and also influences the accuracy of V/F conversion.

On the other hand, it has been very popular that a microcontroller unit is used in a frequency converter for processing digital control, but the prior frequency converter did not use the microcontroller unit for offsetting the transfer deviation of V/F converter. Therefore, if an existent microcontroller unit is used for automatically offsetting linear deviation of a V/F conversion, not only the cost of manpower and time needed by previously artificial adjustment can be completely saved without additional element cost, but also the unstable problem generated from the usage of variable resistance may be prevented.

Regarding aforementioned drawbacks, the present invention is to provide an apparatus and method for automatically offsetting linear deviation of V/F converter, the error of which may be automatically offset by a microcontroller unit (MCU) without artificial operation, thus manufacturing cost being reduced effectively.

The present invention is to provide an apparatus and method for automatically offsetting linear deviation of V/F converter, which uses fixed resistance instead of variable resistance, which is more expansive and less stable, thus the lifetime and stability of frequency controller being able to be promoted notably.

To achieve the objectives, the invention provides a V/F converter, the offset adjust pin of which is connected to a fixed resistance, and the frequency output pin of which is connected to a microcontroller unit (MCU) via an opto-isolator, a standard V/F transfer function being pre-stored in the MCU, wherein standard frequencies F**1** and F**0** (i.e., two coordination points (V**1**, F**1**) and (V**0**, F**0**)) are output by the V/F converter, when V**1** and V**0** are input as standard voltages, but the MCU may detect an error status in the V/F converter, when the V/F converter obtains real output frequencies F**1**′ and F**0**′ from real input voltages V**1** and V**2**, and standard coordination points (F**1**, K**1**) and (F**0**, K**0**) will be corrected to (F**1**′, K**1**) and (F**0**′, K**0**′), from which a transfer function of offsetting frequency down may be obtained, when the MCU processes a frequency down procedure.

The features of the invention believed to be novel are set forth with particularity in the appended claims. The invention itself, however, may be best understood by reference to the following detailed description of the invention, which describes an exemplary embodiment of the invention, taken in conjunction with the accompanying drawings, in which:

In cooperation with attached drawings, the technical contents and detailed description of the present invention will be as follows.

Firstly, please refer **1** and a microcontroller unit **2** (MCU). The frequency signal output sides **13**, **14** of the V/F converter **1** are electrically connected to the input sides **21**, **22** of the MCU **2** preferably in series via an opto-isolator **3**, which may filter DC component in the frequency signal output from the V/F converter **1**.

The voltage input side **11** of V/F converter **1** is electrically connected to a voltage signal source Vin to be transferred, while its offsetting adjust pin **12** is connected to a fixed resistance **15** for the provision of a fixed offsetting value to the V/F converter **1**.

In this case, the MCU **2** processes offsetting procedure and frequency down management to the frequency signal input from the V/F converter **1**. Since the output frequency of all IC products in general V/F converters **1** is in the level of kHz, for example the full scale frequencies 10 kHz, 100 kHz, and 500 kHz of said ADVFC 32, and the full scale frequency 100 kHz of said TC9400, which substantially exceed the frequency band 060 Hz needed by the control of an inverter, so it is necessary for the MCU **2** to process frequency down procedure to the high frequency signals input from the V/F converter **1**, and thus the frequency down signals output from the output side **23** of MCU **2** may fulfill the controlling requirement of subsequent inverter.

Therefore, the relationship between the output and input of both V/F converter **1** and MCU **2** may be expressed respectively as a V/F transfer function and a frequency down transfer function, both of which are linear functions; that is, the V/F transfer function may be expressed as F(V)=aV+b, and the frequency down transfer function may be expressed as K(F)=cF+d, wherein a, b, c, and d are constants.

Step 1 (S1): firstly, a standard V/F transfer function and a standard frequency down transfer function are established in the MCU **2**, two transfer functions possessing two corresponding relationships of (V**1**, F**1**), (V**0**, F**0**) and (F**1**, K**1**), (F**0**, K**0**), respectively; that is, when the input voltage is V**1**, the corresponding frequency from the V/F converter is F**1**, which is frequency down to K**1**; while the input voltage is V**0**, the frequency from V/F converter should be F**0**, which is further frequency down to K**0**.

Step 2 (S2): the first voltage V**1** is really input into the V/F converter **1**, which then outputs a real first frequency F**1**′ to the MCU **2**.

Step 3 (S3): the second voltage V**0** is really input into the V/F converter **1**, which again outputs a real second frequency F**0**′ to the MCU **2**.

Step 4 (S4): after receiving the two real frequencies F**1**′ and F**0**′, the MCU **2** compares both frequencies with standard frequencies F**1** and F**0**; that is, judge if (F**1**, F**0**) is exactly same as (F**1**′, F**0**′)?

Step 5 (S5): if any frequency set is different (i.e., F**1**≠F**1**′ or F**0**≠F**0**′), then the frequencies F**1** are F**0** are down to K**1** and K**0**.

Step 6 (S6): in other words, after two coordinate points (F**1**′,K**1**) and (F**0**′, K**0**) are generated at a Cartesian coordinate, an offsetting frequency down transfer function is then calculated from these two coordinate points. At the Cartesian coordinate, the figure of this offsetting frequency down transfer function, which is a linear function, is a straight line passing through said two coordinate points. Subsequently, with this offsetting frequency down transfer function, the MCU **2** offsets the linear deviation of the V/F converter **1** during frequency down conversion.

Step 7 (S7): in step 6 (S6), if F**1**=F**1**′ and F**0**=F**0**′, then original standard frequency down transfer function is still valid, any further offset being unnecessary, because there is no transferring deviation existed in V/F converter.

Please refer to **1**. In **1**, F**1**′) and (V**0**, F**0**′). **1**, while the ordinate represents the frequency down output of the MCU **2**. In **1**′, K**1**) and (F**0**′, K**0**′).

Aforementioned description is only preferable embodiment according to the present invention, being not used to limit its executing scope. Any equivalent variation and modification made according to appended claims is all covered by the claims claimed by the present invention.

Citas de patentes

Patente citada | Fecha de presentación | Fecha de publicación | Solicitante | Título |
---|---|---|---|---|

US4232192 * | 1 May 1978 | 4 Nov 1980 | Starkey Labs, Inc. | Moving-average notch filter |

US4592785 * | 21 Feb 1985 | 3 Jun 1986 | General Electric Company | Proteinaceous soil removal process |

Clasificaciones

Clasificación de EE.UU. | 327/101, 327/102 |

Clasificación internacional | H03C3/00 |

Clasificación cooperativa | H03M1/60, H03M1/1019 |

Clasificación europea | H03M1/10C1M |

Eventos legales

Fecha | Código | Evento | Descripción |
---|---|---|---|

8 Ene 2007 | AS | Assignment | Owner name: DELTA ELECTRONICS, INC., TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHEN, JACK;CHEN, YU-SHENG;REEL/FRAME:018726/0200 Effective date: 20061206 |

20 Sep 2011 | FPAY | Fee payment | Year of fee payment: 4 |

16 Dic 2015 | FPAY | Fee payment | Year of fee payment: 8 |

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