USRE45462E1 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
- Publication number
- USRE45462E1 USRE45462E1 US13/569,604 US201213569604A USRE45462E US RE45462 E1 USRE45462 E1 US RE45462E1 US 201213569604 A US201213569604 A US 201213569604A US RE45462 E USRE45462 E US RE45462E
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- semiconductor device
- semiconductor
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 56
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims abstract description 45
- 230000006835 compression Effects 0.000 claims abstract description 23
- 238000007906 compression Methods 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims description 25
- 238000002955 isolation Methods 0.000 claims description 21
- 239000012535 impurity Substances 0.000 claims description 8
- 239000010408 film Substances 0.000 description 84
- 238000000034 method Methods 0.000 description 35
- 239000010409 thin film Substances 0.000 description 14
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 9
- 229920005591 polysilicon Polymers 0.000 description 9
- 238000001039 wet etching Methods 0.000 description 9
- 238000001020 plasma etching Methods 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- 238000001459 lithography Methods 0.000 description 6
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000002708 enhancing effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910003811 SiGeC Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7848—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
Abstract
Description
Claims (14)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/569,604 USRE45462E1 (en) | 2007-03-29 | 2012-08-08 | Semiconductor device |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007-088836 | 2007-03-29 | ||
JP2007088836A JP4896789B2 (en) | 2007-03-29 | 2007-03-29 | Manufacturing method of semiconductor device |
US12/056,909 US8013398B2 (en) | 2007-03-29 | 2008-03-27 | Semiconductor device |
US13/569,604 USRE45462E1 (en) | 2007-03-29 | 2012-08-08 | Semiconductor device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/056,909 Reissue US8013398B2 (en) | 2007-03-29 | 2008-03-27 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE45462E1 true USRE45462E1 (en) | 2015-04-14 |
Family
ID=39792741
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/056,909 Ceased US8013398B2 (en) | 2007-03-29 | 2008-03-27 | Semiconductor device |
US13/205,950 Active US8124472B2 (en) | 2007-03-29 | 2011-08-09 | Manufacturing method of a semiconductor device |
US13/569,604 Active 2030-01-15 USRE45462E1 (en) | 2007-03-29 | 2012-08-08 | Semiconductor device |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/056,909 Ceased US8013398B2 (en) | 2007-03-29 | 2008-03-27 | Semiconductor device |
US13/205,950 Active US8124472B2 (en) | 2007-03-29 | 2011-08-09 | Manufacturing method of a semiconductor device |
Country Status (2)
Country | Link |
---|---|
US (3) | US8013398B2 (en) |
JP (1) | JP4896789B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9634002B1 (en) | 2016-02-03 | 2017-04-25 | United Microelectronics Corp. | Semiconductor device and method of manufacturing the same |
US10037915B1 (en) | 2017-09-10 | 2018-07-31 | United Microelectronics Corp. | Fabricating method of a semiconductor structure with an epitaxial layer |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5211689B2 (en) * | 2007-12-28 | 2013-06-12 | 富士通セミコンダクター株式会社 | Semiconductor device and manufacturing method thereof |
JP4635062B2 (en) * | 2008-03-11 | 2011-02-16 | 株式会社東芝 | Manufacturing method of semiconductor device |
JP5329835B2 (en) * | 2008-04-10 | 2013-10-30 | 株式会社東芝 | Manufacturing method of semiconductor device |
DE102008045034B4 (en) * | 2008-08-29 | 2012-04-05 | Advanced Micro Devices, Inc. | Forward current adjustment for transistors fabricated in the same active region by locally providing an embedded strain-inducing semiconductor material in the active region |
JP2010103142A (en) * | 2008-10-21 | 2010-05-06 | Toshiba Corp | Method for fabricating semiconductor device |
JP2010157570A (en) * | 2008-12-26 | 2010-07-15 | Toshiba Corp | Method of manufacturing semiconductor device |
US9041082B2 (en) * | 2010-10-07 | 2015-05-26 | International Business Machines Corporation | Engineering multiple threshold voltages in an integrated circuit |
TWI605592B (en) | 2012-11-22 | 2017-11-11 | 三星電子股份有限公司 | Semiconductor devices including a stressor in a recess and methods of forming the same |
KR102059526B1 (en) | 2012-11-22 | 2019-12-26 | 삼성전자주식회사 | Method of forming semiconductor device having embedded stressor and related device |
US9214395B2 (en) * | 2013-03-13 | 2015-12-15 | United Microelectronics Corp. | Method of manufacturing semiconductor devices |
CN103346124B (en) * | 2013-06-04 | 2015-08-26 | 上海华力微电子有限公司 | Improve the method for semiconductor device yield |
Citations (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010045604A1 (en) * | 2000-05-25 | 2001-11-29 | Hitachi, Ltd. | Semiconductor device and manufacturing method |
US20030127663A1 (en) * | 2000-06-15 | 2003-07-10 | Fumitoshi Ito | Semiconductor integrated circuit device and a method of manufacturing the same |
US6621131B2 (en) | 2001-11-01 | 2003-09-16 | Intel Corporation | Semiconductor transistor having a stressed channel |
US20040132249A1 (en) * | 2002-12-19 | 2004-07-08 | Katsuhiro Mitsuda | Semiconductor device and a method of manufacturing the same |
US20050059196A1 (en) * | 2003-07-31 | 2005-03-17 | Takafumi Noda | Method for manufacturing semiconductor devices |
US20050280098A1 (en) | 2004-06-22 | 2005-12-22 | Samsung Electronics Co., Ltd. | Method of fabricating CMOS transistor and CMOS transistor fabricated thereby |
JP2006121074A (en) | 2004-10-20 | 2006-05-11 | Samsung Electronics Co Ltd | Semiconductor device and manufacturing method of the same |
US20060134873A1 (en) * | 2004-12-22 | 2006-06-22 | Texas Instruments Incorporated | Tailoring channel strain profile by recessed material composition control |
JP2006228958A (en) | 2005-02-17 | 2006-08-31 | Toshiba Corp | Semiconductor device and manufacturing method thereof |
JP2006253317A (en) | 2005-03-09 | 2006-09-21 | Fujitsu Ltd | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND p-CHANNEL MOS TRANSISTOR |
US20060214225A1 (en) * | 2005-03-24 | 2006-09-28 | International Business Machines Corporation | High performance field effect transistors on SOI substrate with stress-inducing material as buried insulator and methods |
JP2006303451A (en) | 2005-03-23 | 2006-11-02 | Renesas Technology Corp | Semiconductor device and method for manufacturing the same |
US7132338B2 (en) | 2003-10-10 | 2006-11-07 | Applied Materials, Inc. | Methods to fabricate MOSFET devices using selective deposition process |
JP2006332337A (en) | 2005-05-26 | 2006-12-07 | Toshiba Corp | Semiconductor device and its manufacturing method |
US20070018205A1 (en) * | 2005-07-21 | 2007-01-25 | International Business Machines Corporation | STRUCTURE AND METHOD FOR IMPROVED STRESS AND YIELD IN pFETS WITH EMBEDDED SiGe SOURCE/DRAIN REGIONS |
JP2007036205A (en) | 2005-06-22 | 2007-02-08 | Fujitsu Ltd | Semiconductor device and its manufacturing method |
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US20070257321A1 (en) * | 2006-04-06 | 2007-11-08 | Shyh-Fann Ting | Semiconductor structure and fabrication thereof |
US20080119031A1 (en) * | 2006-11-21 | 2008-05-22 | Rohit Pal | Stress enhanced mos transistor and methods for its fabrication |
US20080179627A1 (en) * | 2007-01-31 | 2008-07-31 | Meikei Ieong | Strained MOS devices using source/drain epitaxy |
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US7579248B2 (en) * | 2006-02-13 | 2009-08-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Resolving pattern-loading issues of SiGe stressor |
US7608489B2 (en) * | 2006-04-28 | 2009-10-27 | International Business Machines Corporation | High performance stress-enhance MOSFET and method of manufacture |
-
2007
- 2007-03-29 JP JP2007088836A patent/JP4896789B2/en active Active
-
2008
- 2008-03-27 US US12/056,909 patent/US8013398B2/en not_active Ceased
-
2011
- 2011-08-09 US US13/205,950 patent/US8124472B2/en active Active
-
2012
- 2012-08-08 US US13/569,604 patent/USRE45462E1/en active Active
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US6621131B2 (en) | 2001-11-01 | 2003-09-16 | Intel Corporation | Semiconductor transistor having a stressed channel |
US20040132249A1 (en) * | 2002-12-19 | 2004-07-08 | Katsuhiro Mitsuda | Semiconductor device and a method of manufacturing the same |
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JP2006303451A (en) | 2005-03-23 | 2006-11-02 | Renesas Technology Corp | Semiconductor device and method for manufacturing the same |
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Title |
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First Office Action issued by the Japanese Patent Office on Jun. 18, 2013, in counterpart Japanese Patent Application No. 2011-233122. |
Notice of Reasons for Rejection mailed by Japanese Patent Office on Aug. 18, 2009, for Japanese Application No. 2007-088836 and English translation thereof. |
Notice of Reasons for Rejection mailed by the Japanese Patent Office on Jun. 8, 2010, for Japanese Applicaiton No. 2007-088836 and English translation thereof. |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9634002B1 (en) | 2016-02-03 | 2017-04-25 | United Microelectronics Corp. | Semiconductor device and method of manufacturing the same |
US9779998B2 (en) | 2016-02-03 | 2017-10-03 | United Microelectronics Corp. | Semiconductor device and method of manufacturing the same |
US10037915B1 (en) | 2017-09-10 | 2018-07-31 | United Microelectronics Corp. | Fabricating method of a semiconductor structure with an epitaxial layer |
Also Published As
Publication number | Publication date |
---|---|
US8124472B2 (en) | 2012-02-28 |
US20080237732A1 (en) | 2008-10-02 |
JP2008251688A (en) | 2008-10-16 |
JP4896789B2 (en) | 2012-03-14 |
US20110294271A1 (en) | 2011-12-01 |
US8013398B2 (en) | 2011-09-06 |
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