|Número de publicación||WO1990004853 A1|
|Tipo de publicación||Solicitud|
|Número de solicitud||PCT/GB1989/001273|
|Fecha de publicación||3 May 1990|
|Fecha de presentación||25 Oct 1989|
|Fecha de prioridad||25 Oct 1988|
|Número de publicación||PCT/1989/1273, PCT/GB/1989/001273, PCT/GB/1989/01273, PCT/GB/89/001273, PCT/GB/89/01273, PCT/GB1989/001273, PCT/GB1989/01273, PCT/GB1989001273, PCT/GB198901273, PCT/GB89/001273, PCT/GB89/01273, PCT/GB89001273, PCT/GB8901273, WO 1990/004853 A1, WO 1990004853 A1, WO 1990004853A1, WO 9004853 A1, WO 9004853A1, WO-A1-1990004853, WO-A1-9004853, WO1990/004853A1, WO1990004853 A1, WO1990004853A1, WO9004853 A1, WO9004853A1|
|Inventores||George Arthur Abbott Chilton, Richard Arthur Kirk, Peter Brian Hart|
|Solicitante||Prp Optoelectronics Limited|
|Exportar cita||BiBTeX, EndNote, RefMan|
|Citas de patentes (2), Otras citas (3), Citada por (2), Clasificaciones (8), Eventos legales (2)|
|Enlaces externos: Patentscope, Espacenet|
A PRINT HEAD
The present invention relates to a print head and more particularly to a print head having light emitting diodes (LE.D.'s).
Previous photo-printing techniques used in laser printers and photocopies have typically employed a light source, such as a laser, to print upon photostatic paper. The light source is scanned across a sheet of paper using a relatively complex optical system of mirrors and lenses. The use of such an optical system limits the size of image that can be printed and print quality is relatively poor as the image consists of toned dots distributed to give shading. Furthermore, higher quality laser printing is expensive.
Light emitting diodes (L.E.D.'s) can be fabricated at very small sizes, such as lOμm or less, giving high resolution and so good print quality. Furthermore, scanning is not necessary if a static print head can be fabricated to span a whole sheet of paper, so removing the necessity of a complicated optical scanning system.
Print heads using LED's have two principal problems. Firstly, to fabricated a print head to span a whole sheet of paper i.e. A3, A4 etc, it is usually necessary to use several LED array chips accurately aligned with one another in order to ensure consistence of LED spacing across the print head. Secondly, to fully exploit the possibilities of high resolution from small LED's it is conventionally necessary to make thousands of minute wire connections to each LED's contacts upon each chip. Both accurate alignment through conventional mechanical manipulation and minute wire connection of LED's is time consuming and expensive. Figure 1 illustrates, in cross section, a known print head comprising a substrate 2 having a row 4 of LED chips 6, the chips being disposed in staggered array with each chip disposed at an angle to the direction of row 4. Each chip comprises eight LED's 8 arranged in four rows 10, the rows being disposed so as to present four long rows of parallel leads with 600 LED's per inch in the assembled row of chips. Each led is electrically connected to control chips 12 by wire bonds (not shown).
A chip 6 is shown in partial cross-section in Figure 2, wherein a single LED 8 is illustrated. Chip 6 comprises a substrate 20 of a material such as GaAs having n-type doping therein, having on its lower surface a sheet electrode 22 forming a cathode for all LED's bonded to substrate 2 of the print head by a conductive expoxy 54, substrate 2 carrying a metallised region 26 for securing the cathode to a reference potential.
The upper surface of chip 6 has formed therein a p-type diffusion region 28 in an n-type substrate 30, to form a p-n junction 32 in which light can be generated. Conductive pad regions 34, overlying insulative regions 36 make contact with diffusion region 28. A wire providing connection 38 is made between pad 34 and an external terminal 40 of chip 12. Light is emitted from LED 6 through a transparent optical window 52. It will be appreciated that for high resolution LED print heads as shown with, 600 or more LED's per inch (25mm), then a similar number of wire connections are required. This is a lengthy and time consuming manual operation.
A further disadvantage of the conventional LED configuration illustrated in Figure 2 is that a significant proportion of any light generated by the junction 1 is masked by the contact 5. Light is thus only radiated through a limited window 9 and so effective output light intensity is reduced. In addition, the junction 1 is relatively remote from the print head substrate 4 and consequently the substrate 4 heatsink effect is reduced, so limiting the efficiency of the LED.
These problems with LED print heads have substantially prevented their use upon a wide commercial scale due to their expense of manufacture.
It is an objective of the present invention to principally overcome the necessity of using wire connections to individual LED's . and provide an LED configuration where effective output light intensity is increased.
According to the present invention there is provided a print head comprising at least one chip mounted upon a print head substrate, the print head substrate having a defined arrangement of contact pads upon its upper surface, the or each chip having a plurality of light emitting diodes (LEDs), each LED comprising a doped junction formed adjacent a lower surface of the chip and being electrically connected to first contact means and to a respective second contact, the second contacts of the LED's being arranged upon a said lower surface of the chip, each second contact including a solder wettable pad, the solder wettable pads of the second contacts forming an array which corresponds with said defined arrangement of contact pads upon the print head substrate, each solder wettable pad being electrically connected to the defined arrangement of contact pads upon the print head substrate by a respective solder bump so that each solder bump provides electrical connection for its respective second contact whereby the solder bumps secure each chip upon the print head substrate and light generated by each LED propagates through the chip to be radiated through an upper surface of the chip.
Preferably, the chip is transparent to visible light although the substrate may be etched to prevent catastrophic attenuation of light generated by each LED prior to radiation from the upper surface increased power.
The first electrode may be a common cathode for all LED's and possibly ring shaped upon the upper surface of the chip. The doped junction may be a P-N junction and formed in a Gallium Arsenide substrate.
An embodiment of the present invention will now . be described, by way of example only, with reference to the accompanying drawings, in which :-
Figure 3 illustrates, in cross-section, an LED configuration according to the present invention;
Figure 4 illustrates, in plan, a first electrode according to the present invention in common contact ring shape;
Figure 5 illustrates, in side elevation, a chip according to the present invention; and,
Figure 6 illustrates, in plan view, the chip as illustrated in" Figure 4.
Consider Figure 3. A chip substrate 21 is doped to provide doped junctions 23 (only one is illustrated) "whilst a first contact 3 is electrically connected to the chip substrate 21. The chip substrate 21 may be formed of a light transmissive material such as Gallium Phosphide and doped with an n type material such as sulphur to provide the junction 23. However, the chip substrate 21 may be etched above the junction 23 to provide a cavity 30 to allow other materials of a lower light transmissivity to be use. Each junction 23 is electrically connected to a second contact 27 arranged upon a lower surface 24 of the chip 21. Each second contact 27 is electrically connected to a chip solder wettable pad 29 which may be directly attached or connected through a conductive track (not shown) upon the chip 21 to its respective second contact 27. A print head substrate 31 has a defined arrangement of print head solder wettable contact pads 41 and at least one wire contact pad 42. Each chip solder wettable pad 29 of the chip substrate 21 corresponds to a print head solder wettable pad 41 of the print head substrate 31. A solder bump 37 electrically connects chip solder wettable pads 29 and print head solder wettable pads 41 without any connections. Each first contact 33 is connected to each wire contact pad 42 by a wire connection 39. It will be appreciated that the first contact 33 may be common for all LED's in the chip substrate 21 , consequently only one wire connection 39 would be required. A single wire connection 39 has great advantages in cost and fabrication time reduction. Furthermore, the removal in the present print head of the necessity of a vast number of wire connections allows a reduction in LED pitch spacing so increasing print head resolution and printed image quality.
In Figure 3 it will be seen that light generated by the LED junction 23 is radiated as a beam 35 through an upper surface 50 of the chip substrate 21 or through the etched cavity 30. It will be appreciated the present print head LED configuration illustrated in Figure 2 does not "mask" the beam 35 with contacts upon its upper surface 50. The first contact 33 is placed well away from the upper surface 50 area were the beam 35 radiates and therefore does not mask the beam 35. In addition the junction 23 in the present print head is arranged in much closer proximity to the print head substrate 31. The junction 23 is thus better positioned for thermal stabilisation with the print head substrate 31 acting as an effective heat sink. This allows the LED to be operated at greater light power outputs. The combination of no masking of radiated beam 35 and the possibility of greater light power output mean that the present print head can operate at greater printing speeds or a reduced electrical current for the same light power output.
In a specific practical embodiment of the present invention, the LED doped junction 23 may be a PN junction with a N side upper most upon the chip 21. The first contact 33 is a cathode (N contact) whilst the second contact 27 is an anode (P contact). As light does not have to "pass through" a window in the second or p contact 27 in the present print head. The contact 27 can be spread completely over the junction 23. This gives greater electrical contact with the junction 23 and allows the solder wettable pad 29 to be attached directly below the junction 23.
It will be appreciated that the effect of solder bump 37, in a molten state, is to align the print head substrate pad 41 with the pad 29 through minimisation of surface tension. As the chip substrate 21 has a plurality of LED's with solder wettable pads 29. corresponding with print head solder wettable pads 41 can be located upon each chip substrate 21 and the print head substrate 31 respectively.
A first contact 33 and second contacts 27 according to a preferred embodiment of the present print head are illustrated in Figures 3 to 5. In Figure 3, a common first (or cathode) contact 33 for all LED's in the chip substrate 21 is illustrated as a ring about the edge of the chip 21. A single wire connection 39 (figure 2) can be made to that ring. In Figures 4 and 5, the lower surface of the chip 21 is illustrated prior to electrical connection with the print head substrate through solder bumps 37. Solder bumps 37 are arranged in the defined arrangement.
It will be appreciated that prior to electrical connection between a respective chip solder wettable pad 29 and a respective print head solder wettable pad 41 upon the print head substrate 31 that the solder bump 37 may be integral with either the pad 29 or the pad 41. Furthermore, a proportion of the solder bump 37 may be upon both pad 29 and pad 41.
It will be understood that the print head substrate 31 may be a thin film of silicon with conductive tracking or an integrated driver chip arranged to operate each LED.
|Patente citada||Fecha de presentación||Fecha de publicación||Solicitante||Título|
|GB2099221A *||Título no disponible|
|US4039890 *||16 Oct 1975||2 Ago 1977||Monsanto Company||Integrated semiconductor light-emitting display array|
|1||*||IBM Technical Disclosure Bulletin, Vol. 26, No. 2, July 1983, New York (US) P.E. CADE et al.: "Input/Output Device Interconnections", pages 572-57|
|2||*||Journal of Applied Physics, Vol. 48, No. 1, January 1977, American Institute of Physics, New York (US) M. KITADA: "Upside-Down Fabricated GaP Monolithic Display", pages 279-281|
|3||*||Proceeding of the Society for Information-Display, Vol. 18, No. 2, 1977 Los Angeles (US) M. IUOUE et al.: "A GaP Monolithic Numeric Display with Internal Reflection Facets", pages 195-198|
|Patente citante||Fecha de presentación||Fecha de publicación||Solicitante||Título|
|WO2013117760A1 *||11 Feb 2013||15 Ago 2013||University College Cork, National University Of Ireland, Cork||Light emitting diode chip|
|US9472594||11 Feb 2013||18 Oct 2016||Oculus Vr, Llc||Light emitting diode chip|
|Clasificación internacional||H01L27/15, B41J2/45|
|Clasificación cooperativa||H01L2924/12041, H01L2224/73265, H01L27/153, B41J2/45|
|Clasificación europea||H01L27/15B, B41J2/45|
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