WO1992009073A1

WO1992009073A1 - Device for recording digital picture signal

Info

Publication number: WO1992009073A1
Application number: PCT/JP1991/000755
Authority: WO
Inventors: Keiji Kanota; Hajime Inoue; Akihiro Uetake; Moriyuki Kawaguchi; Yukio Kubota; Kazunobu Chiba
Original assignee: Sony Corporation
Priority date: 1990-11-14
Filing date: 1991-06-05
Publication date: 1992-05-29
Also published as: CA2073194C; JPH04179380A; CA2073194A1

Abstract

A device for recording digital picture signals has a circuit for converting the input digital picture signals into blocks of data comprising a plurality of picture element data, an encoding circuit which encodes the output of the converting circuit in compressed data for every block, and a channel-encoding circuit which channel-encodes the encoded data outputted from the encoding circuit. The data outputted from the channel-encoding circuit is recorded on a magnetic tape by magnetic heads installed on a rotating drum. In the device, the pitch of the tracks formed on the magnetic tape by the magnetic heads is 5.5 νm or less, the diameter of the rotating drum is 25 mm or less, and the track length per unit time is made to be a predetermined one by setting the rotating speed of the rotating drum at 150 rps or more. Thereby, long recording time is possible by a mechanism part of a small size and further, the error relative to the linearity of the track can be reduced.

Description

Specification

Title of invention

Magnetic recording device for digital image signals

Technical field

The present invention relates to a device for recording a digital image signal such as a digital video signal on a magnetic tape, and in particular, it is possible to record for a long time by selecting the azimuth angle of a magnetic head to a predetermined value. Magnetic recording device for digital image signals

Background art

In recent years, digital VTRs that digitize color video signals and record them on recording media such as magnetic tape have been used as D1 format component VTRs for broadcast stations and D2 format combo digital VTRs. Digital VTRs have been put into practical use.

The former digital VTR of the D1 format converts the luminance signal and the first and second color difference signals into AZD signals at 13.5 MHz and 6.75 MHz sampling frequencies, respectively, and then performs predetermined signal processing. The recording is performed on a tape by performing the above method. Since the sampling frequency ratio of these component components is 4: 2: 2, it is also called a 4: 2: 2 system.

The latter D2 format digital VTR performs AZD conversion by sampling a composite color video signal with a signal having a frequency four times the frequency fsc of the color subcarrier signal, and performing predetermined signal processing. After that, record it on magnetic tape. ing.

These digital VTRs are designed on the premise that they are used for broadcasting stations, so the highest priority is placed on image quality.One sample is a digital color video signal that is AZD-converted to, for example, 8 bits. They are recorded without any substantial compression.

— As an example, the data volume of the former D1 format digital VTR will be described.

The information amount of the color video signal is approximately 2 16 Mps (megabit Z seconds) when the AZD conversion is performed at 8 bits per sample at the sampling frequency described above. Excluding the data in the horizontal and vertical blanking periods, the number of effective pixels of the luminance signal in one horizontal period is 720, the number of effective pixels of the color difference signal is 360, and the number of effective scanning lines in each field is In the NTSC system (5 2 5 Z 60), it is 250, so the data amount D v of the video signal per second is

D V = (720 + 360 + 360) X 8 x 250 x 60

= 172.8 Mb p s

Becomes

Considering that the number of effective scanning lines per field is 300 and that the number of fields per second is 50 even in the PAL system (625Z50), the data amount is equal to that of the NTSC system. It turns out that. When redundant components for error correction and formatting are added to these data, the total bit rate of image data is about 205.8 Mb ps. The audio data D a is about 12.8 Mb ps, and the additional data D 0 such as editing gap, preamble, post ampoule, etc. is about 6.6 Mb ps. The amount of information D t for the whole evening is as follows.

D t = D v + D a + D o

= 172.8 + 12.8+ 6.6 = 192.2 M b p s

In order to record data with this amount of information, the D1 format digital VTR uses a track pattern as a track pattern, and the NTSC system uses 10 tracks per field, and the PAL system uses 12 tracks. The method is adopted.

As the recording tape, a tape with a width of 19 faces is used, and there are two types of tapes, 13 / m and 16〃m. The cassettes for storing these tapes are large (L), medium ( M) and small (S) are available. Since information data is recorded on these tapes in the format described above, the data recording density is about {20.4i}. If the recording density is high, errors in reproduced output data are likely to occur due to intersymbol interference or waveform deterioration due to nonlinearity of the electromagnetic conversion system of the head / tape. The above-mentioned numerical value was the limit of the conventional recording density even if error correction coding was performed.

Summarizing the above parameters, the playback time of a cassette of each size of a digital VTR in D1 format is as follows. Size z Tape thickness 1 3 thickness 16 m thickness s 1 3 minutes 1 1 minute

M 4 2 minutes 3 4 minutes

L 9 4 minutes 76 minutes As described above, the D1 format digital video VTR is sufficient for a broadcaster's VTR for which the highest priority is given to image quality, but it is 19 mm wide. Even if a large cassette with a tape having a tape is used, the playback time is only about 1.5 hours at most, which is extremely inappropriate for use as a home VTR. To improve the recording density, it is effective to reduce the track pitch. However, in conventional VTRs, if the track pitch is reduced, errors in the reproduced data increase due to the track linearity and tracking errors, and there is a limit in reducing the track pitch. and _t particularly, compatibility between VTR devices had depleted signal problem.

—On the other hand, ^ VHS, VHS, 8mm, etc. are now in practical use as home VTRs, but all record and play back in the form of analog signals. However, if you try to copy and copy what was captured and recorded with a camera, for example, However, if this is repeated several times, there is a drawback that the image quality is almost unbearable. Disclosure of the invention

Accordingly, it is an object of the present invention to provide a recording apparatus for a digital surface image signal which has good track linearity, is less likely to cause a tracking error, and can reduce the track pitch. is there.

Another object of the present invention is to provide a recording apparatus of a digital image signal with little image quality deterioration even when dubbing is repeated a plurality of times.

The present invention relates to a block circuit for converting an input digital image signal into data of a block unit including a plurality of pixel data.

(5, 6), an encoding circuit (8) for compressing and encoding the output data of the blocking circuit (5, 6) in block units, and encoding the output encoded data of the encoding circuit (8). A channel coding circuit (11) for performing channel coding.

The output data of (11) is recorded on a magnetic tape (78) by a magnetic head (13A, 13B) mounted on a rotating drum (76). In a magnetic recording device, a magnetic tape (13A, 13B)

The pitch of the track formed on (78) is set to 5.5〃m or less, the diameter of the rotating drum (76) is selected to 25 or less, and the rotating speed of the rotating drum (76) is set to 1 This is a magnetic recording apparatus for digital image signals, characterized in that a track length per unit time is set to a predetermined value by setting it to 50 rps or more. Because track linearity can be improved and tracking errors can be reduced, tracks can be formed at a narrow track pitch without magnetic bands on the magnetic tape 78, and long-time recording can be performed. It becomes possible.

BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a block diagram showing the configuration on the recording side of a signal processing unit in one embodiment of the present invention, FIG. 2 is a block diagram showing the configuration on the reproduction side of the signal processing unit, and FIG. 3 is block encoding. FIG. 4 is a schematic diagram illustrating a sub-sampling and a sub-line, FIG. 5 is a block diagram of an example of a block coding circuit, and FIG. Is a block diagram schematically showing an example of a channel encoder, FIG. 7 is a block diagram schematically showing an example of a channel decoder, FIG. 8 is a schematic diagram used for explaining a head arrangement, and FIG. 9 is a head diagram. FIG. 10 is a schematic diagram used to explain the azimuth of a disk, FIG. 10 is a schematic diagram used to describe a recording pattern, FIG. 11 is a top view and a side view showing an example of a tape / head system, and FIG. The figure is an abbreviated diagram for explaining that tape vibration occurs due to drum eccentricity. Fig first 3 Figure schematic diagram Ru employed in the description of the magnetic tape manufacturing method, the first 4 figures are a perspective view showing an example of the structure of the head to the magnetic.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, an embodiment of the present invention will be described. This description will be made in the following order.

a. Signal processing section

b. Block encoding C. Channel encoder and channel decoder

d.Head.Tape type

e. Electromagnetic conversion system

a. Signal processing section

First, the signal processing section of the digital VTR in this embodiment will be described.

FIG. 1 shows the configuration on the recording side as a whole. Input terminals indicated by 1 Y, 1 U, 1 V are supplied with digital luminance signals Y, digital color difference signals U, V formed from three primary color signals R, G, B from a color video camera, for example. You. In this case, the clock rate of each signal is the same as the frequency of each component signal in the D1 format described above. That is, each sampling frequency is 13.5 MHz. 6.75 MHz, and the number of bits per sample is 8 bits. Therefore, as described above, the data amount of the signal supplied to the input terminals 1Y, 1U, and IV is approximately 2 16 Mbps. The data amount is compressed to about 167 Mbps by the effective information extraction circuit 2 which removes the data of the blanking period from this signal and extracts only the information of the effective area. The luminance signal Y from the output of the effective information extraction circuit 2 is supplied to the frequency conversion circuit 3, and the sampling frequency is converted from 13.5 MHz to 3/4 thereof. For example, a thinning filter is used as the frequency conversion circuit 3 so that aliasing distortion does not occur. The output signal of the frequency conversion circuit 3 is supplied to the blocking circuit 5, and the order of the luminance data is converted to the order of the blocks. Block The encoding circuit 5 is provided for a block encoding circuit 8 provided at a subsequent stage.

FIG. 3 shows the structure of a block as an encoding unit. This example is a three-dimensional block. For example, by dividing a surface that straddles two frames, many unit blocks (4 lines x 4 pixels x 2 frames) are formed as shown in Fig. 3. Is done. In FIG. 3, a solid line indicates a line of an odd field, and a broken line indicates a line of an even field.

After the two color difference signals U and V of the output of the effective information extraction circuit 2 are supplied to the sub-sampling and sub-line circuit 4, and the sampling frequency is converted from 6.75 MHz to half thereof, respectively. Two digital chrominance signals are alternately selected for each line and combined into one channel of data. Accordingly, the sub-sampling and sub-line circuit 4 provides a line-sequential digital color difference signal. FIG. 4 shows the pixel configuration of the signal sub-sampled and sub-lined by the circuit 4. In FIG. 4, 〇 indicates a sampling pixel of the first chrominance signal U, △ indicates a sampling pixel of the second chrominance signal V, and X indicates a position of a pixel decimated by the subsample. O

The line-sequential output signal of the sub-sampling and sub-line circuit 4 is supplied to the blocking circuit 6. In the blocking circuit 6, similarly to the blocking circuit 5, the color difference data in the scanning order of the television signal is converted into the data in the block order. This block forming circuit 6 is similar to the blocking circuit 5 in that the color difference data Is converted into a block structure of (4 lines x 4 pixels x 2 frames). The output signals of the blocking circuits 5 and 6 are supplied to the synthesizing circuit 7.

In the synthesizing circuit 7, the luminance signal and the chrominance signal converted in the block order are converted into one-channel data, and the output signal of the synthesizing circuit 7 is supplied to the block encoding circuit 8. As the block coding circuit 8, a coding circuit (referred to as an ADC) adapted to a dynamic range for each block, a DCT (Discrete Cosine Transform) circuit, or the like can be applied as described later. The output signal of the block encoding circuit 8 is supplied to the framing circuit 9 and is converted into data having a frame structure. In the framing circuit 9, switching between the image system clock and the recording system clock is performed.

The output signal of the framing circuit 9 is supplied to an error correction code parity generation circuit 10 to generate an error correction code parity. The output signal of the parity generation circuit 10 is supplied to the channel coder 11, and the channel coding is performed so as to reduce the low-frequency portion of the recording data. The output signal of the channel coder 11 is supplied to the magnetic heads 13A and 13B via the recording amplifiers 12A and 12B and the rotating transformer (not shown), and is recorded on the magnetic tape. Is done.

The audio signal is compression-encoded separately from the video signal, not shown, and is supplied to the channel encoder.

By the signal processing described above, the input data amount 2 16 Mb ps is reduced to about 1 67 Mb ps by extracting only the effective scanning period. s, and this is further reduced to 84 Mbps by frequency transformation and sub-sampling, sub-line. This data is compressed to about 25 bs by compression encoding in the block encoding circuit 8, and after adding additional information such as parity and audio signals, the recording data amount becomes 31 1 It will be about 5 Mbps.

Next, the configuration of the reproducing side will be described with reference to FIG. In FIG. 2, the reproduction data from the magnetic heads 13A and 13B is supplied to a channel decoder 22 via a rotary transformer (not shown) and reproduction amplifiers 21A and 21B. In the channel decoder 22, the channel coding is demodulated, and the output signal of the channel decoder 22 is supplied to a TBC circuit (time axis correction circuit) 23. According to this circuit 23, the time axis fluctuation component of the reproduction signal is removed. The reproduced data from the TBC circuit 23 is supplied to the ECC circuit 24, and error correction and error correction using an error correction code are performed. The output signal of ECC circuit 24 is supplied to frame decomposition circuit 25 0

Each component of the block coded data is separated by the frame decomposition circuit 25, and the clock of the recording system is switched to the clock of the image system. Each data separated by the frame decomposition circuit 25 is supplied to the block decoding circuit 26, and the original data and the restored data corresponding to each block are decoded. The decoded data is supplied to the distribution circuit 27. In the distribution circuit 27, the decoded data is separated into a luminance signal and a chrominance signal. Luminance signal The signal and the color difference signal are supplied to block decomposition circuits 28 and 29, respectively. The block decomposing circuits 28 and 29 convert the decoded data in the block order in the order of raster scanning, contrary to the blocking circuits 5 and 6 on the transmission side.

The decoded luminance signal from the block decomposition circuit 28

Supplied to 30. The interpolation filter 30 converts the luminance signal sampling rate from 3 fs to 4 fs (4 fs = 13.5 MHz). The digital luminance signal Y from the interpolation filter 30 is taken out to the output terminal 33Y.

On the other hand, the digital color difference signals from the block separation circuit 29 are supplied to the distribution circuit 31, and the line-sequential digitized color difference signals U and V are separated into digital color difference signals U and V, respectively. You. The digital color difference signals U and V from the distribution circuit 31 are supplied to the interpolation circuit 32 and are interpolated respectively. The interpolator 32 interpolates the thinned line and pixel data using the restored pixel data.The interpolator 32 provides digital color difference signals U and V with a sampling rate of 4 fs. Are obtained at the output terminals 33 U and 33 V, respectively.

b. Block coding

The block encoding circuit 8 in FIG. 1 described above is disclosed in Japanese Patent Application No. 59-26664 and Japanese Patent Application No. 59-2669866 previously filed by the present applicant. For example, an ADRC (Adaptive Dynamic Range Coding) encoder shown in FIG. This AD RC encoder detects the maximum value MAX and the minimum value MIN of multiple pixel data contained in each block, and detects the maximum value MA The dynamic range DR of the block is detected from X and the minimum value MIN, encoding is performed in accordance with the dynamic range DR, and requantization is performed using a smaller number of bits than the original pixel data. As another example of the block encoding circuit 8, after performing DCT (Discrete Cosine Transform) on the surface element data of each block, the coefficient data obtained by the DCT is quantized, and the quantized data is run-length Huffman. A configuration for encoding and compression encoding may be used.

Here, an example of an encoder that uses an ADRC encoder and that does not cause surface quality deterioration even when multi-dubbing is performed will be described with reference to FIG.

In FIG. 5, a digital video signal (or a digital color difference signal) in which one sample is quantized to 8 bits, for example, is input to an input terminal indicated by 41 from the synthesizing circuit 7 in FIG. The block data from the input terminal 41 is supplied to a maximum value / minimum value detection circuit 43 and a delay circuit 44. The maximum / minimum value detection circuit 43 detects the minimum value MIN and the maximum value MAX for each block. The delay circuit 44 delays the input data for the time required for detecting the maximum value and the minimum value. The pixel data from the delay circuit 44 is supplied to the comparison circuits 45 and 46.

^

The maximum value MAX from the maximum value / minimum value detection circuit 43 is supplied to the subtraction circuit 47, and the minimum value MIN is supplied to the addition circuit 48. The subtraction circuit 47 and the addition circuit 48 have a fixed length of 4 bits from the bit shift circuit 49 and a non-edge matching amount. The value of one quantization step width when the quantization is performed (room = 1/16 DR) is supplied. The bit shift circuit 49 is configured to shift the dynamic range DR by 4 bits so as to divide by (1 × 16). From the subtraction circuit 47, a threshold value of (MAX- △) is obtained, and from the addition circuit 48, a threshold value of (MIN + △) is obtained. The threshold values from the subtraction circuit 47 and the addition circuit 48 are supplied to comparison circuits 45 and 46, respectively.

The value する defining the threshold value is not limited to the quantization step width, and may be a fixed value corresponding to a noise level. The output signal of the comparison circuit 45 is supplied to the AND gate 50, and the output signal of the comparison circuit 46 is supplied to the AND gate 51. The input data from the delay circuit 44 is supplied to the AND gates 50 and 51. The output signal of the comparison circuit 45 becomes high level when the input data is larger than the threshold value. Therefore, the output terminal of the AND gate 50 is included in the maximum level range of (MAX to MAX— △). The pixel data of the input data to be extracted is extracted. The output signal of the comparison circuit 46 becomes high level when the input data is smaller than the threshold value. Therefore, the output terminal of the AND gate 51 has the minimum value of (Μ Ι Ν to Μ Ι Ν + Δ). Pixel data of the input data included in the level range is extracted.

The output signal of the AND gate 50 is supplied to the averaging circuit 52, and the output signal of the AND gate 51 is supplied to the averaging circuit 53. These averaging circuits 52 and 53 calculate the average value for each block. Are supplied to averaging circuits 52 and 53. From the averaging circuit 52, an average value MAX 'of the pixel data belonging to the maximum level range of (MAX to MAX- △) is obtained, and from the averaging circuit 53, the average value of (MIN to MIN + m) is obtained. The average value MIN 'of the pixel data belonging to the minimum level range is obtained. The average value MIN 'is subtracted from the average value MAX' by the subtraction circuit 55, and the dynamic range DR 'is obtained from the subtraction circuit 55.

The average value MIN 'is supplied to the subtraction circuit 56, the average value MIN' is subtracted from the input data passed through the delay circuit 57 in the subtraction circuit 56, and the data PD 1 after the minimum value is removed. Is formed. The data PD 1 and the modified dynamic range DR ′ are supplied to the quantization circuit 58. In this embodiment, the number n of bits allocated to quantization is a variable length variable of 0 bit (no code signal is transmitted), 1 bit, 2 bits, 3 bits, or 4 bits. ADR C, where edge matching quantization is performed. The number n of allocated bits is determined by the bit number determination circuit 59 for each block, and the data of the number n of bits is supplied to the quantization circuit 58.

Variable-length ADRC reduces the number of allocated bits n for blocks with a small dynamic range DR ', and increases the number of allocated bits n for blocks with a large dynamic range DR', resulting in efficient codes. Can be implemented. That is, if the thresholds for determining the number of bits n are T1 to T4 (Τ1 く 2Τ3Τ4), the block of (DR 'く T1) Is not transmitted and the dynamic range DR , The block of (T 1 ≤DR <T 2) is (n = l), the block of (T 2≤DR 'T 3) is (n = 2), The block of (T 3 ≤ DR 'and T 4) is (n = 3), and the block of (DR' ≥ T 4) is (n = 4).

By changing the threshold values T1 to T4 in such a variable length ADRC, it is possible to control the amount of generated information (so-called buffering). Therefore, the variable length ADC can be applied to a transmission line such as the digital VTR of the present invention in which the amount of generated information per field or per frame is required to be a predetermined value.

In FIG. 5, reference numeral 60 denotes a buffering circuit that determines thresholds T1 to T4 for setting the amount of generated information to a predetermined value. In the buffering circuit 60, a set of thresholds is used. (T l, Τ 2, Τ 3, Τ 4) are prepared in plurals, for example, 32 sets, and the set of these thresholds is a parameter overnight code P i (i = 0, 1, 2,. , 31). No ,. It is set so that the amount of generated information monotonously decreases as the number i of the lame overnight code Pi increases. However, as the amount of generated information decreases, the image quality of the restored image deteriorates.

The threshold values T1 to T4 from the reference circuit 60 are supplied to the comparison circuit 61, and the dynamic range DR 'via the delay circuit 62 is supplied to the comparison circuit 61. . The delay circuit 62 delays DR ′ for the time required for the pairing of the thresholds to be determined in the reference 60. In the comparison circuit 61, the block The dynamic range DR ′ is compared with each of the threshold values, and the comparison output is supplied to the bit number determination circuit 59 to determine the allocated bit number n of the block. In the quantization circuit 58, the data PDI after the minimum value removal through the delay circuit 63 is subjected to edge matching quantization using the dynamic range DR 'and the number of allocated bits n, thereby obtaining the code signal DT. Is converted to The quantization circuit 58 is constituted by, for example, a ROM.

The modified dynamic range DR 'and average value MIN' are output via the delay circuits 62 and 64, respectively, and the parameter code Pi indicating the combination of the code signal DT and the threshold is output. It is. In this example, since the signal once subjected to non-edge-match quantization is edge-match-quantized based on the new dynamic range information, the surface image degradation when dubbing is small.

c. Channel encoder and channel decoder

Next, the channel encoder 11 and the channel decoder 22 of FIG. 1 will be described. The details of these circuits are disclosed in Japanese Patent Application No. 11-34491 filed by the applicant of the present invention, and the schematic structure is described with reference to FIGS. 6 and 7. Will be explained.

In FIG. 6, reference numeral 71 denotes an adaptive scrambling circuit to which the output of the parity generation circuit 10 of FIG. 1 is supplied, and a plurality of M-sequence scrambling circuits are prepared. It is configured such that an M-sequence that can obtain an output with a small amount of high-frequency components and DC components is selected. 7 2 is Pasha ・ Response · Pre-coder for class 4 detection method performs 1 / 1-D ² (D is a unit delay circuit) arithmetic processing. This precoder output is recorded / reproduced by the magnetic heads 13Α and 13 を via the recording amplifiers 12A and 12B, and the playback output is amplified by the playback amplifiers 21 1 and 21 1. Has been made to be 0

In FIG. 7 showing the configuration of the channel decoder 22, reference numeral 73 denotes an arithmetic processing circuit on the reproduction side of the partial response class 4, and the operation of 1 + D is performed with respect to the output of the reproduction amplifiers 21 Α and 2 IB. Done. Numeral 74 denotes a so-called Viterbi decoding circuit, which decodes data resistant to noise by performing an arithmetic operation on the output of the arithmetic processing circuit 73 using data correlation and certainty. The output of the Viterbi decoding circuit 74 is supplied to a descrambling circuit 75, and the data rearranged by the scrambling process on the recording side is returned to the original stream, and the original data is restored. With the video decoding circuit 74 used in this embodiment, an improvement of 3 dB in reproduction CZN conversion can be obtained as compared with the case of performing decoding for each bit.

d. Tape / Head system

As shown in FIG. 8A, the magnetic heads 13A and 13B are attached to the rotating drum 76 at an interval of 180 ° facing each other. Alternatively, as shown in FIG. 8B, the magnetic heads 13A and 13B are attached to the drum 76 in a form of a body. Magnetic tape (not shown) with a winding angle slightly larger than 180 ° or slightly smaller than 180 ° Is wound diagonally. In the head arrangement shown in FIG. 8A, the magnetic heads 13A and 13B substantially alternately contact the magnetic tape, and in the head arrangement shown in FIG. Heads 1338 and 13B scan the magnetic tape simultaneously.

Extension direction of each gap of magnetic heads 13 A and 13 B

(Referred to as azimuth angle). For example, as shown in FIG. 9, an azimuth angle of ± 20 ° is set between the magnetic heads 13A and 13B. Due to this difference in azimuth angle, a recording pattern as shown in FIG. 10 is formed on the magnetic tape. As can be seen from FIG. 10, the adjacent tracks TA and TB formed on the magnetic tape are formed by the magnetic heads 13A and 13B having different azimuth angles, respectively. Become. Therefore, at the time of reproduction, the amount of crosstalk between adjacent tracks can be reduced due to azimuth loss. FIGS. 11A and 11B show a more specific configuration in the case where the magnetic heads 13A and 13B have an integral structure (a so-called double azimuth head). For example, integrated magnetic heads 13A and 13B are attached to the upper drum 76 that rotates at a high speed of 150 rps (the number of rotations common to the NTSC and PAL systems). The lower drum 7 is fixed. Therefore, on the magnetic tape 78, in the case of the NTSC system, the data of one field is recorded by being divided into five tracks. With this segmentation method, the track length can be shortened, and errors in track linearity can be reduced. The winding angle 0 of the magnetic tape 78 is, for example, 16 °, and the drum system ø is 25 ° or less. For example, it is 16.5 mm below.

When realizing track pitches as small as 5.5 m, mechanical errors in the head drum mechanism related to device compatibility can result in static track linearity errors. A dynamic tracking error; a pair of magnetic heads 13A and 13B;

Static track linearity errors are caused by non-linearities in the leads on the drum, poor adjustment of the tape running system, and tilting of the rotation axis of the drum 76. The non-linearity of the lead and the poor adjustment of the tape running system are related to the track length, and the inclination of the rotating shaft is related to the diameter of the drum 76. In other words, the tracking function that shows static track linearity is proportional to the track pitch and inversely proportional to the product of the track length and the drum diameter. In the above example, as compared with the conventional 8 mm VTR, the drum diameter is reduced from 40 mm to 16.5 mm, and the track length is reduced from 74 to 26, so the track pitch is reduced. Even if it is as small as 5.5 // m, a tracking function of 8 mm VTR or more can be obtained. Therefore, static track linearity errors do not increase more than before.

Simultaneous recording is performed using a double azimuth head. Normally, the magnetic tape 78 vibrates due to the eccentricity of the rotating portion of the upper drum 76, and a dynamic tracking error occurs. As shown in Fig. 12A, does the magnetic tape 78 hold down? Also, as shown in FIG. 12B, the magnetic tape 78 is pulled upward, which vibrates the magnetic tape 78 and degrades the linearity of the track. However, 180 ° By performing simultaneous recording with a double azimuth head as compared with a magnetic head in which a pair of magnetic heads are opposed to each other, the tracking error can be reduced. Furthermore, the double azimuth head has the advantage that the pairing adjustment can be performed more accurately because the distance between the heads is small. With such a tape-head system, it is possible to record / reproduce a narrow track.

As described above, since errors occurring in the tape head mechanism can be reduced, it is possible to achieve recording at a small track pitch such as 5.5 m.

e. Electromagnetic conversion system

Next, the electromagnetic conversion system used in the present invention will be described. First, a magnetic tape as a recording medium is manufactured by the following method.

That is, a solution containing an emulsion containing acrylate latex as a main component is applied to a base consisting of a polyethylene phthalate (PET) film having a thickness of 7 zm, followed by drying. On one main surface, minute projections composed of the above-mentioned emulsion fine particles are formed. Based surface roughness subjected to such processing, the density of the center line average roughness R, in 0. 0 0 1 5 / zm, or microprojections was about 5 0 0 thousands thigh ^2.

Thereafter, using a vacuum evaporation apparatus shown in FIG. 13, a magnetic layer mainly composed of C0 is formed on the base by oblique evaporation in an oxygen atmosphere as follows.

In FIG. 13, reference numerals 81a and 81b denote vacuum chambers, and reference numeral 82 denotes a vacuum chamber. The partition plate 83 is an evacuation valve. Reference numeral 84 denotes a supply roll of the base 、, reference numeral 85 denotes a take-up roll, reference numeral 86 denotes a guide roll, and reference numerals 87a and 87b denote cylindrical cooling cans for guiding the base B. Reference numerals 88a and 88b denote Co evaporation sources, and .89a and 89b are electron beams for heating the evaporation sources 88a and 88b, respectively. 90 a and 90 b are shielding plates for controlling the incident angle of the evaporating beam entering the base B, and 91 a and 91 b are oxygen gas introduction pipes.

In the vacuum evaporation apparatus configured as described above, the base B is transferred from the supply roll 84 to the cooling can 87a, the guide roll 86, the cooling can 87b, and the winding roll 85 in this order. At this time, in the cooling cans 87a and 87, a magnetic layer composed of two C0 layers is formed by oblique evaporation in an oxygen atmosphere.

In this vacuum deposition, the vacuum chambers 81a and 81b are introduced into these vacuum chambers 81a and 81b while maintaining the degree of vacuum at 1 x 10-'Torr. This is performed while introducing oxygen gas at a rate of 250 cc / min using Eve 91a and 91b. In this case, the angle of incidence of the evaporation beam on the base B is in the range of 45 to 90 °. The Co layer is deposited to a thickness of 1000 A on the cooling cans 87a and 87b, respectively, so that the total thickness of the magnetic layer is 2000 A.

The base B, on which the magnetic layer composed of two C 0. Layers is formed in this manner, is coated with a back coat composed of carbon and an epoxy-based binder and a lubricant composed of perfluoropolyether. After applying a top coat, this is cut into eight thighs to produce a magnetic tape.

The characteristics of the finally obtained magnetic tape are the residual magnetic flux density B _r

= 415 G, coercive force He = 1600 e, R _s = 79. The surface roughness of the magnetic tape was extremely small, with a center line average roughness R, of 0, reflecting the surface roughness of the base B.

The measurement of the surface roughness is usually performed according to JIS B 0601, but the measurement was performed under the following conditions.

Measuring device: Taristep (Rank Taylor)

Needle diameter: 0.2 x 0.2 m, square needle

Needle pressure: 2 mg

Neupass filter: 0.33 Hz

FIG. 14 shows a recording magnetic head used in the present invention. As shown in Fig. 14, this magnetic head is composed of Fe-Ga-S formed on the single-crystal Mn-Zn ferrite cores 101A and 101B by the sputtering method. A gap 104 is provided between the i—Ru-based soft magnetic layers 102 and 103. Glasses 105 and 106 are filled on both sides of the gap 104 in the track width direction, thereby restricting the track width to about 4 / zm. Reference numeral 107 denotes a winding hole, and a recording coil (not shown) is wound around the winding hole 107. The effective gap length of this magnetic head is 0.

This magnetic head has a saturation magnetic flux density B, in the vicinity of the gap 104, and a Fe-Ga-Si-Ru soft magnetic layer 14.5 kG. Since 0.2.103 is used, recording can be performed on a magnetic tape having a high coercive force without causing magnetic saturation of the head.

Using a tape and a magnetic head as described above, a recording density of 1.25 m ² Zbit or less can be realized. That is, as described above, by recording a signal having a shortest wavelength of 0.5 μm with respect to a track width of 5 μm, 1.25 ^ m ² Zbit is realized. However, it is known that the CZN of the reproduction output deteriorates as the recording wavelength and the track width decrease, and the tape and the head having the above-described configuration are used to suppress the deterioration.

The present applicant prototyped a digital VTR with a track pitch of 15 ピッチ m and a shortest wavelength of 0.5〃m in 1988 using 8 marauding ME tapes. At this time, recording and reproduction were performed by rotating this drum at 60 rpm using a rotary drum having a diameter of 40 mm. In this system, a C ^/ N of 51 dB was obtained for a recording wavelength of 1 m. Bit 'Erare bets of the system was 4 X 1 0 one ^5.

When a track having a width of 5 m is used as in the embodiment of the present invention, only about 44 dB C / N can be obtained with the same specification, and the image quality deteriorates. In order to compensate for this 7 dBC / N degradation, the above-described configuration of the present invention is used.

That is, it is generally known that as the spacing between the tape and the head during recording and reproduction increases, the signal output level decreases. The amount of this spacing depends on the flatness of the tape. It is also known to exist. In the case of a coating type tape, it is known that the flatness of a tape depends on a coating agent, whereas in the case of a vapor deposition tape, it depends on the flatness of a base itself. In the above example, an experimental result was obtained in which CZN was increased by 1 dB by selecting the surface roughness of the base film as small as possible. Further, by using the vapor deposition material and the vapor deposition method of the above-described embodiment, a 3 dB improvement in CZN was obtained as an experimental result with respect to the tape used in the trial production in 1998. From the above, by using the head and the tape of the present invention, it was possible to obtain an increase in C / N of 4 dB over the previous prototype.

Also, in the present invention, since the video decoding is used for the channel decoding, it has been confirmed that an increase of 3 dB can be obtained with respect to the decoding for each bit used in the previous prototype. .

As a result, it is possible to compensate for the 7 dB degradation of CZN as a whole, and at the recording density of 1.25 μm ² bits, an error rate equivalent to that of the prototype of 1998 can be obtained. . And about the reproduction output, when the error rate of the previous stage of the correction process of the error correction code is needed to be at 1 0 _ ⁴ below, using the error correction code redundancy of about 2 0% correction This is to reduce errors to the extent possible.

According to the present invention, since a digital image signal can be recorded at a small track pitch, the recording density can be increased, and long-time recording and reproduction can be performed using a small cassette. Also, since the diameter of the rotating drum is small, the size of the mechanism can be reduced. 93

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Claims

The scope of the claims

1. Blocking means for converting an input digital image signal into a block of data consisting of a plurality of pixel data, and coding means for compression-encoding the output data of the blocking means in the block. And channel encoding means for channel-encoding the output encoded data of the encoding means. The output data of the channel encoding means is magnetically converted by a magnetic head mounted on a rotating drum. In a magnetic recording device for digital surface image signals recorded on a tape,

The pitch of the track formed on the magnetic tape by the magnetic head is set to 5.5 m or less, the diameter of the rotary drum is selected to be 25 mm or less, and the rotation speed of the rotary drum is set to 1 A magnetic recording device for digital image signals, characterized in that a track length per unit time is set to a predetermined value by setting it to 50 rps or more.

2. The magnetic recording apparatus for digital image signals according to claim 1, wherein said compression encoding means is a DCT (Discrete Cosmine Transform).

3. The digital image signal magnetic recording apparatus according to claim 1, wherein said channel encoding means is an adaptive scrambling circuit.

4. The digital image signal magnetic recording apparatus according to claim 3, wherein said channel encoding means further comprises a precoder for a partial response 'class 4 detection method.

5. The above adaptive scrambling circuit consists of multiple M sequences, 4. The magnetic recording apparatus for digital image signals according to claim 3, wherein a Μ-sequence from which an output with the least high-frequency component and DC component with respect to the input signal is obtained is selected.