WO1996002946A1 - High-frequency traveling wave field-effect transistor - Google Patents

High-frequency traveling wave field-effect transistor

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Publication number
WO1996002946A1
WO1996002946A1 PCT/US1995/008829 US9508829W WO9602946A1 WO 1996002946 A1 WO1996002946 A1 WO 1996002946A1 US 9508829 W US9508829 W US 9508829W WO 9602946 A1 WO9602946 A1 WO 9602946A1
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Prior art keywords
electrode
gate electrode
depletion region
drain electrode
source electrode
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PCT/US1995/008829
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French (fr)
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WO1996002946B1 (en
Inventor
Alison Schary
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Alison Schary
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Publication of WO1996002946A1 publication Critical patent/WO1996002946A1/en
Publication of WO1996002946B1 publication Critical patent/WO1996002946B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

A method of improving the performance of a traveling wave field-effect transistor operated at frequencies in the microwave range or above the microwave range comprising th steps of forming a depletion region (18) beneath a gate electrode (16) wherein, in a plane transverse to the direction of signal propagation, a depletion region edge (20) has a first end portion located between the gate electrode and a drain electode (12) and a second end portion located between gate electrode and a source electrode (10); and separating the depletion region edge from the drain electrode. Further improvements in the operation of the TWFET include adjusting the first end portion of the depletion region edge to be closer to thet gate and the gate electrode, controlling an effective conductivity of a semiconductor of the traveling-wave field effect transistor, and setting the length of the gate electrode at substantially 1.0 micron.

Description

HIGH-FREQUENCY TRAVELING WAVE FIELD-EFFECT TRANSISTOR
BACKGROUND OF THE INVENTION
1. Field of the Invention.
This invention relates to field-effect transistors, and in particular to traveling wave field-effect transistors (TWFETs) for use at frequencies in the microwave range and above the microwave range.
2. Description of the Prior Art.
The prior art concepts for the design of high frequency semiconductor transistors, in particular field effect transistors (FETs), have obtained limited improvements in transistor performance in the aspects of signal power output and signal power gain at these high frequencies. Previous attempts to improve the performance of FETs for operation at these high frequencies have included the use of TWFETs. U.S. Patent No. 4,065,782 presents the TWFET as an FET in which some of the FET's electrodes are adapted for use as coupled transmission lines. This concept was extended in U.S. Patent No. 4,675,712, which presents a TWFET with a drain electrode that includes a meander segment. In U.S. Patent No. 4,733,195, a TWFET is designed with unmatched termination impedances on the input and output transmission lines.
A TWFET comprises parallel elongated source, gate and drain electrodes disposed on a substrate of semiconductor material with an active channel connecting the electrodes. The direction of signal propagation is along the axis of these parallel electrodes. In the plane transverse to this direction of signal propagation, i.e. the cross-section of the TWFET, the arrangement of the electrodes and channel form an FET. In other attempts to improve the performance of TWFETs at high frequencies, this cross-section of the TWFET has been modified. For example, in U.S. Patent No. 4,297,718 the TWFETs cross-section is designed as a vertical FET. In U.S. Patent No. 4,587,541, the TWFETs cross-section is designed as dual-FETs.
All of these devices, however, achieve moderate increases in signal power output and signal power gain, particularly at high frequencies. SUMMARY OF THE INVENTION
It is therefore a primary object of the present invention to provide signal power gain in a TWFET, operated at frequencies in the microwave range and above the microwave range, above the maximum frequency for which signal amplification would be possible for the FET contained in the cross-section of the TWFET.
It is another object of the present invention to increase the signal power amplification capability in a TWFET, operated at frequencies in the microwave range and above the microwave range, above the signal power amplification capability of the FET contained in the cross-section of the TWFET. It is a further object of the present invention to provide signal power gain in a TWFET, operated at frequencies in the microwave range and above the microwave range, above the maximum signal power gain that would be possible for the FET contained in the cross-section of the TWFET.
These and other objects of the present invention are attained by forming a depletion region beneath a gate electrode wherein, in a plane transverse to the direction of signal propagation, a depletion region edge has a first end portion located between the gate electrode and a drain electrode and a second end portion located between the gate electrode and a source electrode; and separating the depletion region edge from the drain electrode. Further improvements in the operation of the TWFET include adjusting the first end portion of the depletion region edge to be closer to the gate electrode relative to the distance between the second end portion of the depletion region edge and the gate electrode, controlling an effective conductivity of a semiconductor of the traveling-wave field effect transistor, and setting the length of the gate electrode at substantially 1.0 micron.
BRIEF DESCRIPTION OF THE DRAWING
For a better understanding of these and other objects of the present invention, reference is made to the detailed description of the invention which is to be read in conjunction with the following figures of the drawing, wherein: FIG. 1 is a schematic cross-section of a prior art FET.
FIG. 2 is an schematic cross-section of an FET that embodies the present invention.
FIG. 3 is a top- view of a TWFET in a coplanar transmission line. FIG. 4 is a schematic cross-section of an FET that embodies the present invention and depicts various parameters of the FET.
FIG. 5 is an schematic cross-section of an FET that embodies the present invention and depicts various parameters of the FET's depletion region.
FIGS. 6-8 are contour plots of donor density for an FET that embodies the present invention.
FIGS. 9-12 are contour plots of DC electron concentration for an FET that embodies the present invention.
FIGS. 13-36 show the variation in the AC charge matrix for specific FETs of the present invention in the "forward" configuration. FIGS. 37-60 show the variation in the AC admittance matrix for specific
FETs of the present invention in the "forward" configuration.
FIGS. 61-72 show the variation in the AC charge matrix for specific FETs of the present invention in the "reverse" configuration.
FIGS. 73-84 show the variation in the AC admittance matrix for specific FETs of the present invention in the "reverse" configuration.
DESCRIPTION OF THE PREFERRED EMBODIMENT
The present invention makes use of a physical effect in the structure of a TWFET called non-reciprocal inductive coupling. The description of the preferred embodiment begins the discussion of non-reciprocal inductive coupling with a description of ideal coupled transmission lines. This includes a description of the inductance and admittance coupling matrices in ideal coupled transmission lines, using the TEM mode analysis. The description of the preferred embodiment then uses the TEM mode analysis to discuss the operation of the TWFET structure, in which the inductance and admittance coupling matrices can be non-reciprocal. The TEM mode analysis provides a good approximation to the distribution of transverse electric and magnetic fields of the propagating mode in the TWFET. These transverse electric and magnetic fields are the equivalent, in the TWFET structure, to the voltage and current waves of the transmission line.
In the case of ideal transmission lines, perfectly conducting rods are used to guide the propagating wave. These rods are imbedded in a homogeneous, linear medium, are aligned along the direction of wave propagation, and are uniform along this axis. A transmission line structure of n coupled transmission lines is formed from (n+1) conducting rods. The TEM mode which propagates along this transmission line structure can be considered to provide a voltage wave in the plane orthogonal to the direction of propagation. This voltage wave arises from the nature of the TEM mode which allows an electrostatic potential to be defined in the plane orthogonal to the direction of propagation. Consequently, in this transverse plane, each of the n conductors can have a potential defined relative to a reference potential on the (/ι+l)rst conductor. This (/ι+l)rst conductor is often designated as the ground conductor of the coupled transmission lines.
Accompanying this voltage configuration within this plane is a distribution of charge quantities on the («+l) conductors. This charge distribution propagates with the voltage wave, varying with time and along the direction of propagation, to provide the current wave of the TEM mode. In the case of a single transmission line formed from two conducting rods, the voltage and current distributions are what is commonly known as the voltage and current of the transmission line. In a system of n coupled transmission lines, any propagating TEM wave can be formed from a superposition of the eigenmodes of voltage and current waves for the system of transmission lines. The equation for the propagation of the voltage wave of an eigenmode for the system of transmission lines provides an important relationship between the charge coupling and the inductive coupling of the transmission lines. The voltage eigenmode is defined as:
where v is a vector of the voltages on the n conductors relative to the (π+l)rst reference conductor, j is */-l, ω is the angular frequency, z is the direction of propagation, t is time, and γ is the propagation constant of the voltage wave eigenmode.
The charge matrix, K, which relates the voltage and charge distribution for the n transmission lines, is defined as: q = Kv
where q is a vector of charges on the n conductors, and K is an n x n matrix relating the charge vector, q, to the voltage vector v.
Based on the preceding notation, the relationship between the voltage and current eigenmodes is defined as:
- v dz
= -yK-lq
= - ωμ^K 1/
Figure imgf000007_0001
where v and i represent voltage and current vectors, and ε and μ0 represent the dielectric constant and permeability of the medium surrounding the transmission lines. In this equation, the permeability of the surrounding medium is assumed to be the permeability of free space. Therefore, μ = μ0 is used. This result can be recognized as the transmission line equation for the z-derivative of the voltage eigenvector. It can be seen to follow from the relationship between the inductive coupling matrix, L and the charge matrix, K:
L = μ K-1 = (- )JT»
where ve is the speed of light in the medium containing the transmission lines. In this case of ideal transmission lines, the impedance coupling matrix, Z, is equated to the product jωL.
The preceding relationship between voltage and current vectors provides one of the two well-known transmission line equations. The other equation is defined as:
Figure imgf000008_0001
= - Yv
This last equation implies a definition for the admittance matrix of the coupled transmission lines which can be stated as:
r = (- ε + s*)κ
In these equations, σ is the conductivity of the surrounding medium, and ε is its dielectric constant.
In this case of ideal transmission lines, the Y matrix can be seen to describe the transverse current flow between the electrodes of the transmission lines with the presence of an inter-electrode potential in this transverse plane. For example, consider the case of ideal transmission lines imbedded in a homogeneous medium with finite conductivity. The Y matrix would describe the shunt conductance of an equivalent parallel R-C circuit element model for a differential length section of the structure, with conductance given by the term
ε
and capacitive coupling of these lines given by the term
Ok A)
The Z matrix, which is contained in the other transmission line equation for the z-derivative of the voltage eigenvector, describes the change in the voltage with longitudinal direction as related to current flow along the electrodes in the direction of signal propagation in the coupled transmission lines. The i vector corresponds to the surface current flow along the electrodes, which arises with the presence of surface charges on these conductors. In view of this fact, it can be seen that Z, L, and K matrices all pertain to the longitudinal current flow, which is present in all transmission line structures.
In this case of ideal transmission lines (assuming the surrounding medium is linear and reciprocal), it is important to note that the charge matrix of the ideal (passive) transmission line structure is reciprocal and provides reciprocal inductive coupling in these structures. This can be defined in terms of a matrix element, mu, in which mu - mΛ. This means that the charge induced on conductor / by the presence of a voltage on conductor k is equal to the charge induced on conductor k by the presence of the same voltage on conductor /. The equivalences between voltage and current on a transmission line to transverse electric and magnetic fields in non-ideal transmission line structures allows the use of the same equations for ideal coupled transmission lines for the analysis of the TWFET. A detailed derivation of these transmission line equations is presented in Appendix A. In addition, the TEM mode analysis provides a good approximation to the transverse electric and magnetic fields. Therefore, it will be used here to describe the operation of the present invention.
In the present TWFET invention, the Y and Z matrices are considered as 2 x 2 matrices for the 3 conductors formed by the elongated source, gate, and drain electrodes. While a common source configuration is assumed, it will be obvious to those skilled in the art that the analysis can include other configurations.
In a TWFET, the Y matrix elements are complex valued and describe the FET activity in the plane transverse to the direction of signal propagation by relating the inter-electrode transverse current flow to AC potential difference between the electrodes. Most often, this activity is evaluated using circuit models. An important difference of the Y matrix of the TWFET structure as compared to that of the ideal transmission lines is the nonreciprocity in the Y matrix of the TWFET. At low frequencies, this property appears in the transconductance component of circuit element models for the FET. The presence of this transconductance provides non-reciprocity in that the AC gate voltage transfers an AC particle current to the drain electrode, but an AC drain voltage does not transfer an approximately equal AC particle current to the gate electrode. This is an approximate description of the non-reciprocity feature of the Y matrix of the conventional FET which is made use of in both the present invention and prior art TWFET structures.
The important difference in the present invention, as compared to that of the prior art, is in the design of the properties of the Z matrix. This design difference is found in the inductive coupling matrix which provides part of the Z matrix, with the series resistance on the gate and drain electrodes providing the remaining component:
Z = R + ωL
In the case of the 3 conductor system of the source, gate, and drain electrodes, R is a 2 x 2 diagonal matrix containing the gate and drain electrode series resistances, and L is the 2 x 2 inductive coupling matrix for the TWFET. In the present invention, the inductive coupling matrix is designed to have a significant non-reciprocal property.
In the prior art, the inductive coupling matrices have been left as an unspecified component of the TWFET design, or have been analyzed as having reciprocal properties. This reciprocal inductive coupling has been obtained through calculations of the passive electrodes of the TWFET, or has also been obtained with calculations that include capacitances of circuit models for the active FET structure. The prior art FIG. 1 is used to explain how this reciprocal inductive coupling is obtained with these calculations. In prior art FIG. 1, the FET 120 formed in the cross-section of a TWFET in the plane transverse to the direction of signal propagation comprises a semiconductor material 104, a source electrode 100, a drain electrode 102 and a gate electrode 106. The gate electrode 106 can be either metallic-in which case it forms a Schottky contact to the semiconductor material 104, or it can be formed as a semiconductor of opposite type to the semiconductor material 104. When the semiconductor material 104 is an n-type material and the gate electrode 106 is formed as a p-type semiconductor, the gate electrode 106 is reveree-biased—forming a rectifying contact to the semiconductor material 104 and changing the FET 120 to a junction FET (JFET). In either configuration, either metallic or formed as a semiconductor, the gate electrode 106 is reverse-biased so that little or no DC current flows into the semiconductor material 104 and so that a depletion region 108 is formed under the gate electrode 106.
In prior art FIG. 1, a source electrode region 112 and a drain electrode region 114 can be metals making ohrnic contact with the semiconductor material 104 or formed with semiconductor doping. For example, when semiconductor material 104 is n-type, the source electrode region 112 and the drain electrode region 114 are highly doped n+ regions— forming quasi-metallic ohmic regions. These n+-ohmic regions provide an extension to the metallic conductors 116 that contact the source electrode region 112 and the drain electrode region 114. A depletion region edge 110 is in contact with the source electrode region 112 of the source electrode 100 and the drain electrode region 114 of the drain electrode 102.
The calculation of the inductive coupling matrix for this prior art structure proceeds from the calculation of the K matrix, as described earlier for the case of the ideal transmission lines. In this calculation, two AC-bias cases are considered: (a) An AC bias, v<>, applied to the gate electrode 106 with the source electrode 100 and the drain electrode 102 maintained at an AC bias of 0 volts; and (b) An AC bias, VQ, applied to the drain electrode 102 with the source electrode 100 and the gate electrode 106 maintained at an AC bias of 0 volts. For the common source configuration, an AC bias, v0, refers to an AC excitation of complex value maintained between one electrode relative to the source electrode 100, while an AC bias of 0 volts means that the electrode is kept at the same AC potential as the source electrode 100.
In case (a), the charge induced on the gate electrode 106 and the drain electrode 102 is respectively:
In case (b), the charge induced on the gate electrode 106 and the drain electrode 102 is respectively:
Figure imgf000012_0001
In these equations, q^. refers to the AC charge on the gate electrode 106 with AC bias case(a), q^, refers to the AC charge on the drain electrode 102 with AC bias case(a), q^,, refers to the AC charge on the gate electrode 106 with AC bias case(b), and q4b refers to the AC charge on the drain electrode 102 with AC bias case(b). Kg.s, Kg^, K^, and Kd.g are the elements of the charge matrix, K. The elements of the first column of the K matrix are Kg.s and Kd.g. These correspond respectively to the ratio of the charge induced on the gate electrode 106 and the drain electrode 102 to the voltage applied to the gate electrode 106 with AC-bias case(a). The elements of the second column of the K matrix are K^ and Kd.s These correspond respectively to the ratio of the charge induced on the gate electrode 106 and the drain electrode 102 to the voltage applied to the drain electrode 102 with AC-bias case(b). The off-diagonal elements of the K matrix are K^ and Kg l. As prior art FIG. 1 suggests, the interaction of the gate electrode 106 and the drain electrode 102 in these two cases is well-approximated by a simple capacitive coupling between the electrodes. In particular, the charge induced on the drain electrode 102 with the AC bias applied to the gate electrode 106 [case (a)] is approximately equal to the charge induced on the gate electrode 106 with the AC bias applied to the drain electrode 102 [case (b)]. This shows that the off -diagonal elements of the K matrix, Kg ) and K^, are approximately equal to each other. As a result, the K, L, and Z matrices are approximately reciprocal.
The preceding analysis of the K matrix calculation shows that the simple capacitive coupling of the gate electrode 106 and the drain electrode 102 of the prior art TWFET structure leads to reciprocal charge transfer and reciprocal K, L, and Z matrices. In a similar manner, when the K matrix is calculated using capacitances taken from a circuit model for the active FET, while omitting series resistance components of this circuit model, the charge transfer is also reciprocal, as are the K, L and Z matrices resulting from this analysis.
In FIG. 2, the FET 5 formed in the cross-section of a TWFET in the plane transverse to the direction of signal propagation comprises a semiconductor material 14, a source electrode 10, a drain electrode 12 and a gate electrode 16. The gate electrode 16 can be either metallic —in which case it forms a Schottky contact to the semiconductor material 14, or it can be formed as a semiconductor of opposite type to the semiconductor material 14. In either configuration, either metallic or formed as a semiconductor, the gate electrode 16 is reverse-biased so that little or no DC current flows into the semiconductor material 14, and so that a depletion region 18 is formed under the gate electrode 16.
In the same manner as the gate electrode 16, a source electrode region 22 and a drain electrode region 24 can be metals making ohmic contact with the semiconductor material 14 or formed with semiconductor doping. For example, when semiconductor material 14 is n-type, the source electrode region 22 and the drain electrode region 24 are highly doped n+ regions— forming quasi-metallic ohmic regions. These n+-ohmic regions provide an extension to the metallic conductors 2 that contact the source electrode region 22 and the drain electrode region 24. In FIG. 2, a depletion region edge 20 is in contact with the source electrode region 22 of the source electrode 10, but it need not make contact with the source electrode region 22. However, as shown in FIG. 2, the depletion region edge 20 cannot make contact with the drain electrode region 24.
An AC potential difference applied between the gate electrode 16 and the drain electrode 12 is distributed across the depletion region 18 and a neutral region 26 in the plane of FIG. 2. This part of the FET 5 can be considered to act as an R- C series circuit. The gate electrode 16 and the depletion region edge 20 form a capacitor 30, while the neutral region 26 provides a small series resistance 32 between the depletion region edge 20 and the drain electrode 12. The conductivity of the semiconductor material 14, and the distance of separation of the depletion region edge 20 and the drain electrode 12, can be selected so that most of the AC voltage which appears between the gate electrode 16 and the drain electrode 12 will appear across the depletion region 18, represented by the capacitor 30, and a comparatively small voltage will appear across the neutral region 26, represented by the resistor 32. In this case, almost all of the AC charge which appears on the gate electrode 16 is accompanied by changes in the depth of the depletion region 18. The comparatively small amount of AC voltage which is distributed across the neutral region 26 causes a correspondingly small AC charge to appear on the surface of the drain electrode 12.
In calculating the K matrix, the preceding argument shows that the charge induced on the drain electrode 12 with the AC bias of case(a) will be significantly less than the charge induced on the gate electrode 16 with the AC bias of case(b). As a result, the off-diagonal elements of the K matrix, Kg^ and K^, have significantly different values. Consequently, in the present invention, the K, L, and Z matrices are significantly non-reciprocal. In the description of the present invention, this effect shall be referred to as non-reciprocal inductive coupling.
The present invention obtains non-reciprocal inductive coupling by means of the separation of the depletion region edge 20 and the drain electrode 12. The separation is created by maintaining a region of semiconductor material 28 which provides a large enough distance between the depletion region edge 20 and the drain electrode 12, such that the depletion region edge 20 can screen the electric field from the drain electrode 12, as described above. The region of semiconductor material 28 between the depletion region edge 20 and the drain electrode 12 should also have sufficiently low conductivity— to establish a distinction between the region of semiconductor material 28 and the drain electrode region 24 of the drain electrode 12. As this separation between the depletion region edge 20 and the drain electrode 12 is decreased, or as the conductivity of the region of semiconductor material 28 is increased, the limit of reciprocal inductive coupling is obtained.
The preceding description of the present invention has used a TEM mode analysis to describe non-reciprocal inductive coupling by means of non-reciprocal charge transfer. As noted earlier, the TEM mode analysis provides an approximate description for transverse electric and magnetic fields in the structure of a TWFET. The surface charge on ideal transmission line electrodes is proportional to the tangential magnetic fields at the surface of these conductors. Consequently, the non- reciprocal charge transfer of the preceding TEM mode analysis of FIG. 2 corresponds to non-reciprocity in the transverse magnetic fields at the surface of the gate electrode 16 or drain electrode 12. The non-reciprocal inductive coupling of the present invention can thus be understood in terms of non-reciprocity in the charge transfer and associated non-reciprocity in the K matrix, or as an equivalence in non- reciprocity of the transverse magnetic fields which also correspond to non-reciprocity in the L and Z matrices due to the non-reciprocity of the longitudinal currents. An important consequence of the design of TWFETs with non-reciprocal inductive coupling is the increase in the signal power gain in the transistor. This is shown in the following pair of differential equations governing the TWFET structure:
- / = - Yv dz ir—
In these equations, Z is defined as the sum of the diagonal series resistance matrix, R and the product of jω with L, the inductive coupling matrix. As noted earlier,
R allows for series resistance on the transmission line electrodes. The parallel roles of Y and Z in these equations indicate that non-reciprocity in the inductance matrix can be just as important as non-reciprocity in the admittance matrix in providing power gain for signal amplification in the TWFET.
An important special consequence of the use of non-reciprocal inductive coupling in TWFETs is that it can increase the range of frequency of signal gain in the TWFET above that which is possible when only the effect of the non-reciprocal admittance matrix is available, such as in previous TWFET designs. In conventional transistors, i.e. those not designed as a part of an active coupled transmission line structure, there is a maximum frequency of operation above which the transistor cannot be used to provide gain to signals. In this discussion, this frequency limit is referred to as f^x for the transistor. In the case of the conventional FET which forms the cross-section of the TWFET, f^x represents the upper frequency limit for obtaining signal gain from the Y matrix in the TWFET. When non-reciprocal inductive coupling is present, TWFETs can provide signal power gain at frequencies above f^x of the conventional FET which lies in the plane transverse to the direction of signal propagation in the TWFET. The power gain at frequencies above *MAX c311 occur when the Z coupling matrix exhibits the mathematical property that Z^,, the hermitian part of Z, defined as Z^ - V_>(Z + Z*), (where Z* denotes the complex conjugate transpose of Z), must have the negative definite property which is defined as x'Z^, x < 0 for any complex valued vector, x, with complex conjugate transpose x*. It should be noted that this is a πiiniinal requirement for power gain in the TWFET. As will be obvious to those of ordinary skill in the art, the success of the design depends on the relative sizes of matrix elements in the Z and Y coupling matrices, in addition to this minimal requirement that the hermitian part of either Y or Z must have the negative definite property defined above. A detailed analysis of the conditions which allow an increase in average power flow along a pair of coupled transmission lines is presented in Appendix B.
While non-reciprocal inductive coupling has been discussed in the TWFET structure, it can be obtained in similar distributed circuit elements based on the combination of an active semiconductor transistor with coupled transmission lines. The essential requirement is that the cross-section of the distributed circuit element sustain AC surface charges on the electrodes or have transverse magnetic fields near the electrode surfaces which exhibit non-reciprocity as described above.
In the present invention, the TWFET designs are based on the use of a dual-FET structure, as disclosed U.S. Patent No. 4,587,541. The dual-FET structure allows the design of a single conventional FET with the understanding that the symmetry of the propagating signal in this structure has the effect of doubling the contact area of the electrodes. This doubled area implies that transforming the results of a single FET to those of a symmetric dual-FET requires doubling the calculated values for the admittance and charge matrix elements of a single FET and reducing the electrode series resistance values by a factor of 2.
The symmetry of the dual-FET allows the designs of the present invention to be developed with a 2-dimensional simulation of a single FET structure. This simulation is based on the finite element solution of the standard semiconductor equations using a TEM analysis of the TWFET. The semiconductor equations used for the present invention are those of an n-type semiconductor, neglecting generation and recombination effects:
- V* ε Vφ - \q\(Nd - n) = 0
\l\γ* ~ • = 0
JB = -|? * v + \g\Da n
In these equations, | q | represents the magnitude of the electronic charge, ε represents the dielectric constant, n represents the electron concentration, Nd represents the donor concentration, and φ represents the electrostatic potential, as would be consistent with a TEM analysis of the TWFET. In addition, JD represents the electron current, with an electron mobility of μn, and an electron diffusion coefficient of D„. The simulation calculates the small-signal AC semiconductor device behavior in accordance with a method which is almost identical to the sinusoidal steady state analysis method in S. E. Laux, "Techniques for Small-Signal Analysis of Semiconductor Devices," IEEE Transactions on Electron Devices Vol. ED-32(10), pp. 2028-2037 (October, 1985). Following the method described earlier for the AC charge matrix calculations, two AC bias cases are used to calculate the total AC surface charge on the gate electrode and drain electrode, and to calculate the total AC current flowing into these electrodes. In each AC bias case, the AC voltage is applied to one electrode while the remaining two electrodes are maintained at an AC voltage of 0. These calculations yield admittance and charge matrices by the method which was described in detail earlier for the charge matrix calculation.
In this sinusoidal steady state analysis, the complex phasor notation is used so that the time derivative in the semiconductor equations is replaced by a factor of
(/ω), and complex valued admittance and charge matrices are obtained. The results for admittance and charge matrices are converted to the inductance and admittance coupling matrices of the distributed dual-FET using the formulas given earlier for obtaining the inductance matrix from the charge matrix and the use of the factor of two scaling noted above. The coupling matrices are combined with selected values of series resistance for the dual-FET electrodes. In this way, the use of the 2-dimensional semiconductor device simulation of a fully specified FET in combination with series resistance values yields the complete coupling matrix information for the dual-FET structure.
In FIG. 3, the TWFET is designed with open circuit terminations at the ends of the gate electrodes 16, 16' and the drain electrode 12, which are opposite to the attachments to first coplanar transmission lines 34 or second coplanar transmission lines 36. A 2-port impedance and admittance matrix can be calculated for the TWFET of FIG. 3 as a function of the coupling length, Zo, using an extension of the method of V. K. Tripathi, "Asymmetric Coupled Transmission Lines in an Inhomogeneous Medium," IEEE Trans. Microwave Theory Tech. Vol. MTT-23(9), pp. 734-739 (September, 1975) to treat the case of general (non-reciprocal) Y and Z TWFET coupling matrices. In the present invention, the 2-port admittance matrix was calculated for the coupling lengths, Zo, ranging from 5 x 10"4 cm to 5 x 10"2 cm. This admittance matrix data allows the calculation of maximum unilateral gain (U), maximum available gain (MAG), maximum stable gain (MSG), and the stability parameter (k) for the TWFET, using the standard formulas for these quantities as a function of the admittance or impedance matrix elements.
In the present invention, the electrode series resistance is calculated from the skin depth of the conductors. The resistance-per-unit length, which can be defined as the ratio of resistivity to cross-sectional area, uses the cross-sectional area formed by the product of skin depth and electrode width (or circumference). With this definition, a metallic resistivity of 10"6 ohm-cm combined with an electrode width of 10"* cm and a skin depth of 10 s cm provides a series resistance of 103 ohm/cm or lk-ohm/cm. When the dual-FET structure is used, this series resistance value would reduce to 500 ohm/cm.
It should be noted that the capacitive effects due to the abrupt termination of the end of the gate electrode and drain electrode, and the inter-electrode capacitive coupling from the transverse electric fields above the surface of the semiconductor have been omitted from the present analysis. A person of ordinary skill in the art would understand that the corrections for these effects would be small.
In FIG. 4, Sjo represents the source-to-gate inter-electrode separation distance, SQU represents the gate-to-drain inter-electrode separation distance, and a represents the depth of a channel 38.
The n-type material used for the FET semiconductor has a conductivity of approximately 1.6 Siemens/cm for most of the semiconductor region. For example, an n-type semiconductor with a donor concentration of 1016cm"3 and a constant electron mobility of K^cmVV-sec could be used. This conductivity could be obtained with n-type GaAs composed of a net donor density to obtain this equilibrium electron concentration, but with an electron mobility which is reduced by means of some partial compensation of the n-type material with p-type acceptors or by some damage to the material. Those of ordinary skill in the art will recognize that when n-type silicon is used little or no modification to the donor density or electron mobility is needed. Since actual electron mobility in semiconductor devices is a function of many physical parameters, including the electric field strength, the specified conductivity of 1.6 mhos/cm can be obtained by locally adjusting the net donor concentration, as needed.
In addition to the TWFET examples with uniform conductivity and uniform net donor density of 1016cm"3, three examples with local regions of increased doping density (and correspondingly increased conductivity) were used for the present invention. These TWFET structures with noή-uniform doping density used distributions of net donor concentrations as shown in FIGS. 6 through 8. FIGS. 6 through 8 show the contours of net donor concentrations in the FET in the plane transverse to the direction of signal propagation in the TWFET. In FIG. 6, a solid- line contour 40 has a value of 1.5 x 1016cm'3 and a dashed-line contour 42 has a value of 3.5 x 10l6cm"3. The contour lines 40 and 42 indicate the local region of increased donor density with the rest of the semiconductor of the FET having a background donor concentration of 1016cm"3. The maximum value of the net donor concentration in the local region of increased donor density is approximately 3.9 x 1016cm 3, located within the dashed-line contour 42.
In FIG. 7, a similar donor density contour plot for a different donor density distribution is shown. As in the case of FIG. 6, FIG. 7 indicates a local region of increased net donor density with the rest of the semiconductor of the FET having a background donor concentration of 1016cm 3. In FIG. 7, a solid-line contour
44 has a value of 1.5 x 1016cm"3 and a dashed-line contour 46 has a value of 4.0 x 1016cm"3. The maximum value of the net donor concentration in the local region of increased donor density is approximately 5.2 x 1016cm"3, located within the dashed- line contour 46. In FIG. 8, another similar donor density contour plot for a third donor density distribution is shown. As in the cases of FIG. 6 and FIG. 7, FIG. 8 indicates a local region of increased net donor density with the rest of the semiconductor having a background donor concentration of 1016cm"3. In FIG. 8, a solid-line contour 54 has a value of 1.5 x 10,6cm"3 and a dashed-line contour 56 has a value of 4.0 x 1016cm"3. The maximum net donor concentration in the region of increased donor density is approximately 4.2 x 1016cm"3, located within the dashed-line contour 56. These local regions of increased net donor density, shown in FIGS. 6-8, can be created using typical device fabrication techniques. For example, the local regions can be formed with ion implantation through a mask window on the surface of a semiconductor of uniform donor density of 10l6cm'3. In the present invention, the Schottky barrier height used for the TWFET structures was 0.7505 eV. This barrier height value corresponds to the value of built-in potential obtained with the abrupt depletion model of the junction of the Schottky contact with the n-type semiconductor. As a result, it specifies a built-in potential for the Schottky contact to the semiconductor, not a true barrier height value.
In FIG. 5, the general features of the depletion region 18, as used in the TWFETs of the present invention, is shown. In the present invention, the shape of the depletion region 18 is a mirror-image of the shape of a depletion region found in the prior art FETs. The shape of the depletion region 18 is obtained when the depletion region edge 20 is further away from the gate electrode 16 at the end near the source electrode 10 than the depletion region edge 20 is from the gate electrode 16 at the end near the drain electrode 12. The deepest point of the depletion region 18 is located almost directly below the end of the gate electrode 16 near the source electrode 10. The parameter X^ represents the horizontal distance from the depletion region edge 20 to the gate electrode 16 between the source electrode 10 and the gate electrode 16, XQD represents the horizontal distance from the gate electrode 16 to the depletion region edge 20 between the gate electrode 16 and the drain electrode 12, | X | mu^p^ represents the absolute value of the difference in horizontal distance from the deepest point of the depletion region 18 as compared to the location of the end of the gate electrode 16 nearest the source electrode 10, and -depth represents the vertical distance at the deepest point in the depletion region 18.
In the abrupt depletion model of the FET, the depletion region edge 20 can be considered as the boundary between the neutral region 26 in which, for n-type semiconductors, the electron concentration is approximately equal to the doping density, and the depletion region 18, in which the electron concentration is approximately zero. In the present invention, the depletion region edge 20 is defined as the point at which the electron concentration decreases to half of the donor concentration of the majority of the semiconductor in the FET. In the present invention, this is a concentration value of 5 x 1015cm"3. The shape of the depletion region 18 has been obtained in the present invention by use of negative DC-bias on the drain electrode 12 relative to the source electrode 10. The gate electrode 16 and the drain electrode 12 are supplied with DC biasing by the use of bias tees (not shown) attached to the coplanar transmission lines 34 and 36. It is possible that the DC-bias value of the drain electrode 12 can create a potential difference between the gate electrode 16 and the drain electrode 12 which is almost zero or is quite close to a forward bias condition for the gate electrode 16 relative to the drain electrode 12. In order to avoid being this close to a forward bias condition for the gate electrode 16, the doping density between the gate electrode 16 and the depletion region edge 20 near the drain electrode 12 should be increased. This allows the same shape of the depletion region 18 to be obtained with a larger reverse bias between the gate electrode 16 and the drain electrode 12. The same technique can be applied to obtain the same shape of the depletion region 18 with a positive DC-bias on the drain electrode 12 relative to the source electrode 10. A series of TWFETs were designed, as discussed above, that provided gain above the fj,,,,, of the FET contained in the cross-section of the TWFET. In the first series, referred to as the "forward" configuration, the signal was applied using the symmetric mode of operation for coplanar transmission lines shown in FIG. 3. Thus, the signal input was applied identically to the pair of electrodes of the source electrode 10 and the gate electrode 16, and to the pair of electrodes of the source electrode 10' and the gate electrode 16. The signal output was taken from the pair of electrodes of the source electrode 10 and the drain electrode 12, and the pair of electrodes of the source electrode 10' and the drain electrode 12. Table I shows the parameters and gain values for this series of "forward" configuration TWFETs. TABLE 1(a)
CASE V gate v * drain S«5G SQD Gate Donor Length Distribution volts volts microns microns microns Type
1 -.4988 -1.103 0.5 1.0 1.0 Uniform
2 -.4988 -1.203 1.0 0.5 1.0 Uniform
3 -.4988 -1.203 1.0 0.5 0.25 Uniform
4 -.4988 -1.203 0.5 0.5 0.25 Uniform
5 -.4988 -1.203 1.0 0.5 1.0 FIG. 6
6 -.4988 -1.203 1.0 0.5 1.0 FIG. 8
The DC-bias values are relative to the source electrode 10. The source electrode 10 is DC-biased at 0 V. In Cases 1-4, the donor distribution has a uniform concentration of 10cm 3. In Case 5, the donor distribution has a local region of increased concentration-as shown in FIG. 6. In Case 6, the donor distribution has a local region of increased concentration— as shown in FIG. 8.
TABLE 1(b)
Figure imgf000023_0001
In Cases 1-4, the shape of the depletion region 18 is of the shape shown in the DC electron concentration contour plot of FIG. 9 In FIG. 9, a solid-line electron concentration contour 48 has a value of 5 x 1015cm"3, the value assigned to the depletion region edge as earlier noted. In Case 5, the shape of the depletion region 18 is of the shape shown in the DC electron concentration contour plot of FIG. 10. In FIG. 10, a solid-line electron concentration contour 50 has a value of 5 x 1015cm"3, the value assigned to the depletion region edge as earlier noted. In Case 6, the shape of the depletion region 18 is of the shape shown in the DC electron concentration contour plot of FIG. 12. In FIG. 12, a solid-line electron concentration contour 58 has a value of 5 x 1015cm"3, the value assigned to the depletion region edge as earlier noted.
The values for X,,., Xgd, | X | ^^M, and | Y | ^^^ are rounded to the nearest 0.1 micron.
TABLE 1(c)
CASE JUAX a R. Rd U MAG MSG ohm/ ohm/ (zo.u) (ZOΛJAG) ZOMSG)
GHz microns cm cm (10'2cm) (10"2cm) (10"2cm)
1 10 0.43 500 500 1.3 1.46 NA (3.1) (3.1)
2 (a) 625 625 4.6 2.0 3.45 (3.2) (3.6) (3.5)
10 0.43
(b) 750 750 1.2 1.26 NA (3.1) (3.1)
(a) 625 625 NA 1.85 3.67 (3.6) (3.4)
3
(b) 10 0.43 690 625 5.4 1.6 3.57 (3.1) (3.5) (3.4)
(c) 750 750 2.4 1.86 2.85 (3.0) (3.3) (3.2)
(a) 350 275 3.7 2.34 3.56
4 (3.1) (3.4) (3.3)
30 0.43
(b) 400 300 1.6 2.22 2.4 (3.0) (3.1) (3.0) < 1.0 0.43 275 275 NA 1.8 2.54
5 (3.6) (4.15)
6 < 1.0 0.43 275 275 NA 3.1 4.6 (4.0) (3.9)
In Cases 1-4 and 6, the gain data are for a 100 GHz signal frequency. In Case 5, the gain data is for a 70 GHz signal frequency. In Cases 1-4, the gain values were observed over a range of coupling lengths of 2 x 10"3cm to
5.1 x 10"2cm. In Cases 5-6, the gain values were observed over a range of coupling lengths of 5 x 10"*cm to 5 x 10"2cm. The columns of U, MAG, and MSG contain the maximum values for these gain parameters which were observed for these ranges of coupling lengths. As those with ordinary skill in the art are aware, MAG is a valid gain parameter when the stability parameter is greater than unity, and MSG is a valid gain parameter when the stability parameter, it, is less than unity, but positive. In Cases 1 and 2(b), the use of "NA" for MSG values indicates that no coupling lengths were observed to have k less than unity, therefore MSG was not applicable to these cases. In Cases 3(a), 5 and 6, the use of "NA" for U values indicates examples for which no valid maximum value of U could be assigned due to the appearance of regions of the coupling length for which U was negative. Coupling length values which lie at the boundaries of these negative-U regions have an infinite value for U. Consequently, in these cases, no maximum value for U can be assigned. In Table 1(c), the coupling lengths and gain data should be interpreted as approximate values.
In FIGS. 13-36, the variation with frequency for the AC charge matrix elements for the FETs in this series of "forward" configuration TWFETs is shown. FIGS. 13-16 show the AC charge matrices for Case 1, FIGS. 17-20 show the AC charge matrices for Case 2, FIGS. 21-24 show the AC charge matrices for Case 3, FIGS. 25-28 show the AC charge matrices for Case 4, FIGS. 29-32 show the AC charge matrices for Case 5, and FIGS. 33-36 show the AC charge matrices for Case 6. The charge matrix element values have been normalized to the value of the dielectric constant of free space, to yield a dimensionless quantity. In FIGS. 37-52, the variation with frequency for the AC admittance matrix for this series of "forward" configuration TWFETs is shown. FIGS. 37-40 show the AC admittance matrices for Case 1, FIGS. 41-44 show the AC admittance matrices for Case 2, FIGS. 45-48 show the AC admittance matrices for Case 3, FIGS. 49-52 show the AC admittance matrices for Case 4, FIGS. 53-56 show the AC admittance matrices for Case 5, and FIGS. 57-60 show the AC admittance matrices for Case 6. In FIGS. 13-60, the notation used for the subscripts dg, ds, gd, and gs of the charge and admittance matrix elements is explained in the detailed description of the charge matrix calculation. The curve markers indicate the frequency values 1GHz, 40GHz, 70GHz and 120GHz in sequence for each matrix element curve.
In the second series, referred to as the "reverse" configuration, the signal was applied using the symmetric mode of operation for coplanar transmission lines shown in FIG. 3. Thus, the signal input was applied identically to the pair of electrodes of the source electrode 10 and the drain electrode 12, and to the pair of electrodes of the source electrode 10' and the drain electrode 12. The signal output was taken from the pair of electrodes of the source electrode 10 and the gate electrode 16, and the pair of electrodes of the source electrode 10' and the gate electrode 16. With this "reverse" configuration, the elements of the coupling matrices and voltage and current vectors of the transmission line equations must be re-ordered to correspond. For example, with this re-ordering of the matrix, the first column of the Z matrix contains z^ and zgd and the second column of the Z matrix contains z^ and z^, making the diagonal elements of the Z matrix z^ and zgs. A similar re-ordering is also required for the Y matrix. Table II shows the parameters and gain values for this series of "reverse" configuration TWFETs.
TABLE R(a)
CASE v τ gate v ' drain SsG "GD Gate Donor Length Distribution volts volts microns microns microns Type
1 -.4988 -1.203 1.0 0.5 1.0 Uniform
2 -.4988 -1.203 1.0 0.5 1.0 FIG. 6
3 -.5988 -1.203 1.0 0.5 1.0 FIG. 7
The DC-bias values are relative to the source electrode 10. The source electrode 10 is DC-biased at 0 V. In Case 1, the donor distribution has a uniform concentration of 1016cm"3. In Case 2, the donor distribution has a local region of increased concentration-as shown in FIG. 6. In Case 3, the donor distribution has a local region of increased concentration-as shown in FIG. 7.
TABLE H(b)
CASE XsG XGD 1 1 max- Y " mix-depth Depletion Region microns microns depth microns Type microns
1 0.3 0.1 0.1 0.3 FIG. 9
2 0.3 0.1 0.1 0.3 FIG. 10
3 0.3 0.1 0.1 0.3 FIG. 11
In Case 1, the shape of the depletion region 18 is of the shape shown in the DC electron concentration contour plot of FIG. 9 In FIG. 9, the solid-line electron concentration contour 48 has a value of 5 x 1015cm"3, the value assigned to the depletion region edge as earlier noted. In Case 2, the shape of the depletion region 18 is of the shape shown in the DC electron concentration contour plot of FIG. 10. In FIG. 10, the solid-line electron concentration contour 50 has a value of 5 x 10ιscm"3, the value assigned to the depletion region edge as earlier noted. In Case 3, the shape of the depletion region 18 is of the shape shown in the DC electron concentration contour plot of FIG. 11. In FIG. 11, a solid-line electron concentration contour 52 has a value of 5 x 1015cm"3, the value assigned to the depletion region edge as earlier noted.
The values for X^, Xgd, | X | ^^ptf,, and | Y | maJitpaι are rounded to the nearest 0.1 micron.
TABLE π(c)
Figure imgf000028_0001
In Table 13(c), the U, MAG, and MSG columns indicate the maximum values of these gain parameters that were observed over a range of coupling length values of 5 x lO -m to 5 x 10"2cm, for a signal frequency of 100 GHz. All MAG and MSG values were less than unity for this entire range of coupling lengths. The coupling lengths for the maximum U-function values and the magnitude of the U- function value should be interpreted as approximate values for these parameters.
In FIGS. 61-72, the variation with frequency for the AC charge matrix elements for the FETs in this series of "reverse" configuration TWFETs is shown. FIGS. 61-64 show the AC charge matrices for Case 1, FIGS. 65-68 show the AC charge matrices for Case 2, and FIGS. 69-72 show the AC charge matrices for Case 3. The charge matrix element values have been normalized to the value of the dielectric constant of free space, to yield a dimensionless quantity. In FIGS. 73-84, the variation with frequency for the AC admittance matrix for this series of "reverse" configuration TWFETs is shown. FIGS. 73-76 show the AC admittance matrices for Case 1, FIGS. 77-80 show the AC admittance matrices for Case 2, and FIGS. 81-84 show the AC admittance matrices for Case 3. In FIGS. 61-84, the notation used for the subscripts dg, ds, gd, and gs of the charge and admittance matrix elements is explained in the detailed description of the charge matrix calculation. The curve markers indicate the frequency values 1GHz, 40GHz, 70GHz and 120GHz in sequence for each matrix element curve.
In Table I, Case 5 and Table LI, Cases 2 and 3, the TWFETs have localized regions of increase donor density. This non-uniform donor distribution provides an important advantage for these cases relative to the other cases— the region of increased donor density will reduce the movement of the depletion region edge 20 when large values of inter-electrode AC voltages are present in signals propagating through the TWFET structure. Thus, these cases can provide linear signal amplification for a signal with a larger AC voltage component than those cases without localized regions of increased donor density. These advantages of increased donor density can be extended to structures with a uniform conductivity, by increasing the donor density while simultaneously reducing the electron mobility so that the conductivity value of 1.6 Siemens/cm is maintained. The increased donor density restricts the movement of the depletion region edge, while the adjustment of the conductivity value allows the high frequency characteristics of the TWFET to remain unchanged.
It will be obvious to those of ordinary skill in the art that the AC charge and admittance matrices of FIGS. 13-84, in combination with the series resistance values of Table I and Table π, determine the performance of the TWFET. A different analysis, using transverse electric and magnetic fields, would provide the same results when the same admittance and inductive coupling matrices are obtained and combined with these series resistance values. While this invention has been explained with reference to the structure disclosed herein, it is not confined to the details set forth and this application is intended to cover any modifications and changes as may come within the scope of the following claims:

Claims

What is claimed is:
1. A method for using a traveling wave field-effect transistor of the type including a body of semiconductor material; at least one gate electrode; at least one source electrode; at least one drain electrode; said at least one gate elec- trode being positioned between the at least one drain electrode and the at least one source electrode; a depletion region beneath the at least one gate electrode, said depletion region having a depletion region edge with a first end portion located between the at least one gate electrode and the at least one drain electrode and a second end portion located between the at least one gate electrode and the at least one source electrode in a plane transverse to the direction of signal propagation, including the steps of: biasing said transistor so that a separation exists between said depletion edge and said at least one drain electrode; applying to said transistor only input signals having magnitudes which allow said separation to exist.
2. The method of claim 1 in which, in the plane transverse to the direction of signal propagation, the first end portion of the depletion region edge is closer to the at least one gate electrode relative to the distance between the second end portion of the depletion region edge to the at least one gate electrode.
3. The method of claim 1 in which said biasing step includes the step of: applying between the at least one drain electrode and the at least one source electrode a voltage which biases said at least one drain electrode nega- tively with respect to said at least one source electrode.
4. The method of claim 1 wherein said applying step includes the step of applying an input signal between said at least one drain electrode and said at least one source electrode.
5. The method of claim 3 wherein said applying step includes the step of applying an input signal between said at least one drain electrode and said at least one source electrode.
6. The method of claim 4 including the further step of using as an output signal of said transistor the voltage between said at least one gate electrode and said at least one source electrode.
7. The method of claim 5 including the further step of using as an output signal of said transistor the voltage between said at least one gate electrode and said at least one source electrode.
8. A traveling wave field-effect transistor for operation at frequencies in the microwave range or above the microwave range, and having signals propagat- ing therethrough generally from and to electrodes attached thereto, said transistor being of the type including a body of semiconductor material; at least one gate electrode; at least one source electrode; at least one drain electrode; said at least one gate electrode being positioned between the at least one drain electrode and the at least one source electrode; a depletion region beneath the at least one gate electrode, said depletion region having a depletion region edge with a first end portion located between the at least one gate electrode and the at least one drain electrode and a second end portion located between the at least one gate electrode and the at least one source electrode in a plane transverse to the direction of signal propagation, wherein: a separation exists between said depletion region edge and said at least one drain electrode.
9. The traveling wave field effect transistor of claim 8 wherein said semiconductor material lias a conductivity such that said separation exists in the absence of a bias voltage.
10. The traveling wave field-effect transistor of claim 8 wherein, the in plane transverse to the direction of signal propagation, the first end portion of the depletion region edge is closer to the atleast one gate electrode relative to the distance between the second end portion of the depletion region edge ot the at least one gate electrode.
11. The traveling wave field-effect transistor of claim 8 in which the conductivity of said semiconductor material is approximately 1.6 Siemens/cm.
12. The traveling wave field-effect transistor of claim 9 in which the conductivity of said semiconductor material is approximately 1.6 Siemens/cm.
13. The traveling wave field-effect transistor of claim 10 in which the conductivity of said semiconductor material is approximately 1.6 Siemens/cm.
14. The traveling wave field-effect transistor of claim 8 in which the conductivity of said semiconductor material is higher in a local area between the first end portion of the depletion region edge and the at least one drain electrode than elsewhere in said material.
15. The traveling wave field-effect transistor of claim 10 in which the conductivity of the semiconductor material is higher in a local area between the first end portion of the depletion region edge and the at least one drain electrode than elsewhere in said material.
16. The traveling wave field-effect transistor of claim 8, in which the length of the at least one gate electrode is approximately 1.0 micron.
17. The traveling wave field-effect transistor of claim 8, in which the at least one drain electrode is adapted to be negatively biased relative to the at least one source electrode.
18. The traveling wave field-effect transistor of claim 8 in which a signal is input to a drain-source electrode pair and the signal is taken from a gate-source electrode pair.
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