WO1997029514A1 - Semiconductor component - Google Patents

Semiconductor component Download PDF

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Publication number
WO1997029514A1
WO1997029514A1 PCT/EP1997/000539 EP9700539W WO9729514A1 WO 1997029514 A1 WO1997029514 A1 WO 1997029514A1 EP 9700539 W EP9700539 W EP 9700539W WO 9729514 A1 WO9729514 A1 WO 9729514A1
Authority
WO
WIPO (PCT)
Prior art keywords
adhesive
chip
semiconductor component
component according
fingers
Prior art date
Application number
PCT/EP1997/000539
Other languages
German (de)
French (fr)
Inventor
Harro MÖWES
Original Assignee
Mci Computer Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mci Computer Gmbh filed Critical Mci Computer Gmbh
Publication of WO1997029514A1 publication Critical patent/WO1997029514A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/4805—Shape
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
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    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73207—Bump and wire connectors
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    • H01L2224/732—Location after the connecting process
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    • H01L2224/73215—Layer and wire connectors
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the invention relates to a semiconductor component with a semiconductor chip and a plurality of electrically conductive connecting fingers which are mounted on the semiconductor chip in the so-called LOC technology (lead-on-chip technology).
  • connection fingers forming the contact legs of the component are mechanically fixed by gluing on a main side surface of the semiconductor chip provided with connecting pads.
  • the individual connection fingers are connected to one another during this process step via a peripheral frame.
  • the adhesive connection of the connection fingers to the semiconductor chip has the purpose during the manufacture of the semiconductor component to fix the connection fingers to the semiconductor chip, namely to create the bond wire connection between the connection fingers and the connection pads of the semiconductor chip and to hold the connection fingers in position , if the semiconductor chip is overmoulded with plastic compound together with the connection fingers.
  • the fact that the connecting fingers extend relatively far into the plastic housing of the semiconductor component increases their stability, which has a positive effect on the mechanical resistance of the semiconductor component.
  • the bonding of the connection fingers to the semiconductor chip has fundamentally proven itself.
  • a problem with this LOC technique is that the adhesives used are generally not solvent free. This means that after the adhesive has hardened, solvent residues still remain in the adhesive.
  • the adhesives normally used are hygroscopic, so that moisture accumulates in the hardened adhesive can.
  • the moisture still enclosed after the semiconductor chip and the connecting finger are encapsulated with plastic and solvent residues harbor the risk of evaporating if the semiconductor component is heated during further treatment, for example by soldering. Due to the increased vapor pressure inside the plastic housing, cracks can form, through which contaminants can penetrate. As a result, malfunctions or even total failures of the component can be recorded.
  • a semiconductor module encapsulated in a housing using LOC technology is described, for example, in EP 0 198 194 A1.
  • the module has a semiconductor chip and a connecting finger, which extend over a substantial part of the main surface of the chip.
  • Connection fingers and chip connections are electrically connected to one another by wires.
  • the connection fingers are glued to the chip surface with the help of an adhesive film.
  • the film consists of a dielectric material and covers the chip surface practically completely with the exception of the connections and their immediate surroundings.
  • a polyimide film is described as the preferred film, which is provided on both sides with adhesive, so that it adheres to the chip surface and connecting fingers. The problem with the arrangement described here is that the warp-free application of the relatively large film is quite complicated.
  • the invention has for its object to provide a semiconductor component mounted in LOC technology, in which the risk of damage due to the inclusion of moisture and solvent residues in the plastic housing is reduced and in the flattest possible manner is feasible.
  • the invention proposes a semiconductor component which is provided with a semiconductor chip which has a plurality of connection pads on at least one of its main side surfaces and a plurality of electrically conductive connection fingers which partially extend over the at least one main side surface of the semiconductor chip, which are glued to the semiconductor chip by means of an adhesive connection.
  • the invention thus relates to a semiconductor module of the type described at the outset, in which the semiconductor chip and connecting finger are mounted using LOC technology.
  • the connection fingers which are held by a so-called lead frame, extend over part of the top of the chip and end in the vicinity of the chip connections without touching them or the top of the chip.
  • the contact points of the connecting fingers and the connections of the chip are electrically connected to one another by bonding wires.
  • no film essentially covering the top of the chip is used to fasten the connecting fingers to the surface of the chip, but a pattern of adhesive corresponding to the position of the connecting fingers on the top of the chip, which is applied to the chip surface and / or connecting finger before assembly.
  • the adhesive pattern according to the invention covers only a small part of the top of the chip and in particular only a small part of the area of the top of the chip corresponding to the position of the connecting fingers.
  • the problems described above do not arise.
  • the amount of moisture that can still be absorbed by the adhesive and the residual amounts of solvent remaining in the adhesive are extremely small. If the semiconductor component encapsulated in plastic is exposed to the influence of heat, the resulting gas volumes are so small that the formation of cracks in the housing is practically no longer observed.
  • the semiconductor components according to the invention are or the like due to the omission of adhesive films. and the considerably reduced amount of adhesive can be produced much more efficiently.
  • FIG. 1 schematically shows a semiconductor component according to the invention with a semiconductor chip and a connecting frame holding the connecting fingers, the plastic housing not being shown,
  • FIG. 2 schematically shows a sectional view along the line AA in FIG. 1
  • 3 schematically shows a lead frame with lead fingers for a semiconductor component according to the invention with applied adhesive
  • FIG. 6 schematically shows a semiconductor chip for a further alternative of a semiconductor component according to the invention with applied adhesive and spacers and
  • FIG. 7 shows a partial cross section of the embodiment of the semiconductor component according to the invention according to VII-VII of FIG. 6.
  • connection fingers 16 (hereinafter also referred to as a module) with a chip 12, on the upper side 14 of which the connecting fingers 16 (not shown in FIG. 1 for reasons of better clarity) ) Lead frame 18 (see for example Fig. 3) are arranged on which the connecting fingers are held.
  • the connection fingers 16 of the connection frame run above the top 14 of the chip 12 and end in the vicinity of the connection pads 20 of the chip 12. which in the present case are arranged along a line running in the longitudinal direction over the center of the chip 12.
  • the invention is of course not limited to such an arrangement of the connection pads 20. Rather, the connection pads 20 can be arranged in any manner on the top of the chip 14.
  • connection pads 20 on the upper side 14 of the chip are electrically connected via bond wires 22 to the ends 24 of the connection fingers 16 designed as contact points.
  • the chip, connection frame, connections and bonding wires can consist of any of the materials normally used for these module components. The assembly of the module modules is carried out in a manner known per se and therefore need not be explained in more detail here.
  • the connecting fingers 16 on the upper side 14 of the chip 12 are not connected by an adhesive film. Rather, a pattern of adhesive that corresponds to the position of the connecting fingers 16 in the assembled state is produced on the chip surface.
  • the adhesive pattern covers only a small part of the chip surface 14 and the connecting finger 16.
  • the adhesive pattern consists of individual adhesive dots 26 which are located between the ends 24 of the connecting fingers 16 approximately in the area under the contact points and the chip underneath Top 14 are arranged.
  • FIG. 2 shows this arrangement schematically in cross section along the line II-II of FIG. 1.
  • the connection fingers 16 are arranged at a distance above the chip top side 14 in order to prevent short circuits between the connection fingers 20 and to avoid the chip 12.
  • the semiconductor module according to the invention can be used as such; but usually it is in a - not shown - housing included, for example in an injection molded plastic housing, as is used for encapsulating semiconductor modules.
  • the configuration of the LOC semiconductor module according to the invention enables the connection fingers 16 to be securely and easily attached to the upper side 14 of the chip, but avoids the disadvantages which result from the prior art. Because of the much smaller amount of adhesive that is required to produce the adhesive pattern (adhesive dots 26) on the chip top 14, the absorption of moisture into the adhesive is lower on the one hand, and on the other hand only very small amounts remain of solvent residues in the adhesive pattern.
  • the gas volumes produced when the semiconductor module 10 according to the invention is heated are therefore very small, so that cracks in the housing surrounding the module are practically not observed due to an increased gas pressure.
  • the modules according to the invention can be implemented in a very flat design.
  • very thin components so-called TSOP components
  • TSOP components very thin components
  • the LOC modules of the prior art therefore have a thickness of at least 75 ⁇ m, to which the adhesive film contributes considerably.
  • the distance between the top of the chip and the connecting fingers can be reduced to 5 to 10 ⁇ m according to the invention by dispensing with the insulating film.
  • the adhesive pattern is expediently first applied to the chip surface and / or connecting finger in a greater thickness than the subsequent distance between the chip and connecting fingers should be.
  • the adhesive Pattern is pressed to the desired height during module assembly.
  • the adhesive pattern can be applied either to the top of the chip or to the lead fingers of the lead frame or both.
  • the adhesive pattern is preferably produced in such a way that all the connecting fingers are connected to the top of the chip by adhesive, but as little adhesive as possible is required and the pattern is as simple as possible. The exact pattern depends above all on the arrangement of the connection fingers in the connection frame with respect to the top of the chip.
  • a dot-shaped adhesive pattern (adhesive dots 26) is applied to the lower side of the ends 24 of the connecting fingers 16 of the connecting frame 18 facing the upper side 14 of the chip 14.
  • the individual adhesive dots 26 are therefore located at the ends of the connecting fingers 16 in the area of the contact points on the underside of the connecting frame 18.
  • the adhesive dots 26 can also be located on another section of the connecting finger.
  • Both the upper side of the chip 14 and the connecting finger 16 can also be provided with matching adhesive patterns. This variant is particularly preferred when using two-component adhesives.
  • FIG. 4 shows another embodiment in which an adhesive pattern of two parallel strips 28 runs along the connections 20 over the chip top 14.
  • adhesive patterns in principle all types are conceivable, for example in the form of waves or zigzags Lines, line patterns, all kinds of dot patterns and so on.
  • the adhesive patterns preferably cover the smallest possible part of the chip top 14 and the connecting finger 16, can be easily produced and lead to a firm connection between the connecting fingers 16 and the chip 12.
  • adhesives used in chip and semiconductor module production can be considered as adhesives.
  • examples include epoxy, acrylic, silicone and polyimide adhesives. Triazine, phenol, resol, polyether amide and polysulfone adhesives can also be used. Polyamideimide adhesives are preferred. Since chip tops are often coated with a polyimide layer for passivation, this type of adhesive is particularly compatible with the chip.
  • the adhesive with the desired pattern is preferably applied in liquid form to the chip or connecting finger and then predried until it is finger or dust dry (first curing stage).
  • the adhesive can also be applied in the molten state or in the form of a suspension.
  • the component provided with the adhesive pattern is heated until the adhesive softens. Then the chip and the lead frame are pressed together to the desired height, and the adhesive is allowed to harden. The bond wires can then be attached in the usual way.
  • the connecting finger and the top of the chip should not touch directly. Care must therefore be taken that the two components are not pressed too tightly against one another when gluing the chip and the leadframe, so that the adhesive between the connecting fingers and the top of the chip is not completely pressed out.
  • at least one spacer is therefore inserted between the top of the chip and the lead frame, which prevents the chip and lead frame from being pressed together beyond the desired overall height of the module.
  • the particles 30 can be glass spheres, for example, but also any other non-conductive and inert material, such as, for example, high-melting plastics, ceramics, abrasive grains and the like.
  • the diameter of the particles 30 can e.g. are in the range from 2 to 50 ⁇ m, preferably between 5 and 10 ⁇ m.
  • the spacers 34 are applied to the top of the chip as a pattern.
  • the spacers 34 are two ribs running parallel to the adhesive strips 28. These spacers 34 are expediently generated before the adhesive strips 28 are applied.
  • the spacers can be applied in the same way as the adhesive pattern, namely by first applying an uncrosslinked plastic in the molten state, in solution or suspension and then crosslinking, for example with heating. Suitable are, for example, all plastics which, after curing, have a softening point which is above the softening temperature of the adhesive after predrying, ie after the first curing stage.
  • the spacer therefore remains fixed.
  • Exemplary materials for the spacer are the plastics already mentioned for use as adhesives.
  • the spacers are not based on those shown in FIGS. 6 and 7 shown strip or rib shape limited, but can basically have any shape matched to the connecting frame. For example, lattice structures, punctiform patterns and so on are conceivable, which support the connecting fingers at any desired locations.
  • the height of the spacers essentially corresponds to the desired distance between the top of the chip and the connecting fingers.
  • Adhesive samples and spacers can in principle be produced in the same way on the top of the chip and / or on the connecting frame.
  • Various printing and stamping processes are suitable for applying the samples, e.g. screen printing. Dosing processes can also be used to generate the patterns. It is particularly preferred to apply adhesive and / or spacer patterns using a system used in inkjet printers. Instead of the printing ink, the adhesive or plastic solution is placed point by point on the top of the chip or lead frame. Instead of solutions, the plastics or adhesives can also be used as a suspension or in the molten state. In the manner described, both punctiform and other patterns can be generated with great precision and speed. A corresponding method is also the subject of the invention.

Abstract

The invention concerns a semiconductor component produced by the LOC (lead on chip) technique. The connection fingers (16) extending over the upper side (14) of the chip are bonded thereto in a bond pattern (points of adhesive (26)) which is adapted to the position of the connection fingers (16) such that only a small area of the upper side (14) of the chip is covered with adhesive. The semiconductor components according to the invention can be manufactured easily and also produced in a TSOP structure.

Description

Halbleiter-Bauelement Semiconductor device
Die Erfindung betrifft ein Halbleiter-Bauelement mit einem Halbleiterchip und mehreren elektrisch leitenden Anschlu߬ fingern, die in der.sogenannten LOC-Technik (Lead-On-Chip- Technik) auf dem Halbleiterchip montiert sind.The invention relates to a semiconductor component with a semiconductor chip and a plurality of electrically conductive connecting fingers which are mounted on the semiconductor chip in the so-called LOC technology (lead-on-chip technology).
Seit einigen Jahren werden Halbleiter-Bauelemente unter Verwendung der sogenannten LOC-Technik hergestellt, bei der die die Kontaktbeine des Bauelements bildenden An¬ schlußfinger auf einer mit Anschlußpads versehenen Haupt- Seitenfläche des Halbleiterchips durch Kleben mechanisch fixiert werden. Die einzelnen Anschlußfinger sind während dieses Prozeßschrittes über einen umlaufenden Rahmen mit¬ einander verbunden. Die Klebeverbindung der Anschlußfinger mit dem Halbleiterchip hat während der Herstellung des Halbleiter-Bausteins den Zweck, die Anschlußfinger am Halbleiterchip zu fixieren, um nämlich die Bonddraht-Ver¬ bindung zwischen den Anschlußfingern und den Anschlußpads des Halbleiterchips zu erstellen und um die Anschlußfinger positioniert zu halten, wenn der Halbleiterchip zusammen mit den Anschlußfingern mit Kunststoffmasse umspritzt wird. Dadurch, daß sich die Anschlußfinger verhältnismäßig weit in das Kunststoffgehäuse des Halbleiter-Bauelements hinein erstrecken, ist ihre Stabilität erhöht, was sich positiv auf die mechanische Widerstandskraft des Halblei¬ ter-Bauelements auswirkt.For some years now, semiconductor components have been produced using the so-called LOC technology, in which the connecting fingers forming the contact legs of the component are mechanically fixed by gluing on a main side surface of the semiconductor chip provided with connecting pads. The individual connection fingers are connected to one another during this process step via a peripheral frame. The adhesive connection of the connection fingers to the semiconductor chip has the purpose during the manufacture of the semiconductor component to fix the connection fingers to the semiconductor chip, namely to create the bond wire connection between the connection fingers and the connection pads of the semiconductor chip and to hold the connection fingers in position , if the semiconductor chip is overmoulded with plastic compound together with the connection fingers. The fact that the connecting fingers extend relatively far into the plastic housing of the semiconductor component increases their stability, which has a positive effect on the mechanical resistance of the semiconductor component.
Aus den obigen Gründen hat sich die Verklebung der An¬ schlußfinger mit dem Halbleiterchip grundsätzlich bewährt. Ein Problem dieser LOC-Technik ist, daß die verwendeten Kleber im allgemeinen nicht lösungsmittelfrei sind. Das bedeutet, daß nach dem Aushärten der Kleber immer noch Lösungsmittelreste im Kleber verbleiben. Hinzu kommt, daß die im Regelfall verwendeten Kleber hygroskopisch sind, so daß sich im ausgehärteten Kleber Feuchtigkeit ansammeln kann. Die nach dem Umspritzen von Halbleiterchip und An¬ schlußfinger mit Kunststoff noch eingeschlossene Feuchtig¬ keit sowie Lösungsmittelreste bergen die Gefahr in sich, zu verdampfen, wenn das Halbleiter-Bauelement bei der Wei¬ terbehandlung beispielsweise durch Löten erwärmt wird. Durch den erhöhten Dampfdruck im Inneren des Kunststoffge¬ häuses können sich Risse bilden, durch die Verunreinigun¬ gen eindringen können. Als Folge davon können Funktions¬ störungen oder gar Totalausfälle des Bauelements verzeich¬ net werden.For the above reasons, the bonding of the connection fingers to the semiconductor chip has fundamentally proven itself. A problem with this LOC technique is that the adhesives used are generally not solvent free. This means that after the adhesive has hardened, solvent residues still remain in the adhesive. In addition, the adhesives normally used are hygroscopic, so that moisture accumulates in the hardened adhesive can. The moisture still enclosed after the semiconductor chip and the connecting finger are encapsulated with plastic and solvent residues harbor the risk of evaporating if the semiconductor component is heated during further treatment, for example by soldering. Due to the increased vapor pressure inside the plastic housing, cracks can form, through which contaminants can penetrate. As a result, malfunctions or even total failures of the component can be recorded.
Ein in ein Gehäuse eingekapselter Halbleitermodul in LOC- Technik wird beispielsweise in EP 0 198 194 AI beschrie¬ ben. Der Modul weist einen Halbleiterchip und Anschlußfin¬ ger auf, die sich über einen wesentlichen Teil der Haupt¬ oberfläche des Chips erstrecken. Anschlußfinger und Chip¬ anschlüsse (Anschlußpads) sind durch Drähte elektrisch miteinander verbunden. Die Anschlußfinger sind auf die Chipoberfläche mit Hilfe einer Klebefolie angeklebt. Die Folie besteht aus einem dielektrischen Material und deckt die Chipoberfläche mit Ausnahme der Anschlüsse und deren unmittelbarer Umgebung praktisch vollständig ab. Als be¬ vorzugte Folie wird ein Polyimidfilm beschrieben, der beidseitig mit Klebemittel versehen wird, so daß er an Chipoberfläche und Anschlußfingern haftet. Bei der hier beschriebenen Anordnung besteht jedoch die Schwierigkeit darin, daß das verwerfungsfreie Aufbringen der relativ großen Folie recht kompliziert ist. Zudem werden relativ große Mengen Klebemittel benötigt, um die Folie an Chip¬ oberfläche und Anschlußfingern zu befestigen. Die verwen¬ deten Klebemittel, wie beispielsweise Epoxide, Acrylharze, Silicone oder Polyimide, sind in der Regel hygroskopisch. Zudem verbleiben auch nach dem Aushärten des Klebers prak¬ tisch immer Reste von Lösungsmitteln im Klebstoff. Daher werden beim Umschließen des Moduls mit einem Gehäuse rela¬ tiv große Mengen an Feuchtigkeit und Lösemittelresten im Gehäuse miteingeschlossen. Wird der Modul bei der Weiter¬ behandlung beispielsweise durch Löten erwärmt, verdampfen im Gehäuse eingeschlossen Feuchtigkeit und Lösungsmittel- reste. Die möglichen Folgen davon sind bereits oben be¬ schrieben.A semiconductor module encapsulated in a housing using LOC technology is described, for example, in EP 0 198 194 A1. The module has a semiconductor chip and a connecting finger, which extend over a substantial part of the main surface of the chip. Connection fingers and chip connections (connection pads) are electrically connected to one another by wires. The connection fingers are glued to the chip surface with the help of an adhesive film. The film consists of a dielectric material and covers the chip surface practically completely with the exception of the connections and their immediate surroundings. A polyimide film is described as the preferred film, which is provided on both sides with adhesive, so that it adheres to the chip surface and connecting fingers. The problem with the arrangement described here is that the warp-free application of the relatively large film is quite complicated. In addition, relatively large amounts of adhesive are required to attach the film to the chip surface and connecting fingers. The adhesives used, such as epoxies, acrylic resins, silicones or polyimides, are generally hygroscopic. In addition, even after the adhesive has hardened, residues of solvents practically always remain in the adhesive. Therefore, when enclosing the module with a housing, relatively large amounts of moisture and solvent residues in the Housing included. If the module is heated during the further treatment, for example by soldering, moisture and solvent residues enclosed in the housing evaporate. The possible consequences of this have already been described above.
Der Erfindung liegt die Aufgabe zugrunde, ein in LOC-Tech¬ nik montiertes Halbleiter-Bauelement zu schaffen, bei dem die Gefahr von Beschädigungen infolge des Einschlusses von Feuchtigkeits- und Lösungsmittelresten in dem Kunststoff- gehäuse reduziert ist und das in möglichst flacher Bau¬ weise realisierbar ist.The invention has for its object to provide a semiconductor component mounted in LOC technology, in which the risk of damage due to the inclusion of moisture and solvent residues in the plastic housing is reduced and in the flattest possible manner is feasible.
Zur Lösung dieser Aufgabe wird mit der Erfindung ein Halb¬ leiter-Bauelement vorgeschlagen, das versehen ist mit einem Halbleiterchip, der mehrere Anschlußpads auf mindestens einer seiner HauptSeitenflächen aufweist, und mehreren sich teilweise über die mindestens eine Hauptseitenfläche des Halbleiterchips erstreckende, elektrisch leitende Anschlußfinger, die mit dem Halb¬ leiterchip mittels einer KlebeVerbindung verklebt sind.To achieve this object, the invention proposes a semiconductor component which is provided with a semiconductor chip which has a plurality of connection pads on at least one of its main side surfaces and a plurality of electrically conductive connection fingers which partially extend over the at least one main side surface of the semiconductor chip, which are glued to the semiconductor chip by means of an adhesive connection.
Die Erfindung betrifft also einen Halbleitermodul der ein¬ gangs beschriebenen Art, in dem Halbleiterchip und An¬ schlußfinger in LOC-Technik montiert sind. Die Anschlu߬ finger, die von einem sogenannten Anschlußrahmen (lead frame) gehalten sind, erstrecken sich über einen Teil der Oberseite des Chips und enden in der Nähe der Chipan¬ schlüsse, ohne diese oder die Oberseite des Chips zu be¬ rühren. Die Kontaktstellen der Anschlußfinger und die An¬ schlüsse des Chips sind durch Bonddrähte elektrisch mit¬ einander verbunden. Zum Befestigen der Anschlußfinger auf der Oberfläche des Chips wird erfindungsgemäß keine die Chip-Oberseite im wesentlichen abdeckende Folie verwendet, sondern ein der Lage der Anschlußfinger auf der Oberseite des Chips entsprechendes Muster aus Klebemittel, das vor der Montage auf die Chipoberfläche und/oder Anschlußfinger aufgebracht wird. Das erfindungsgemäße Klebemittelmuster bedeckt nur einen geringen Teil der Chip-Oberseite und insbesondere nur einen geringen Teil des der Lage der An¬ schlußfinger entsprechenden Bereiches der Chip-Oberseite.The invention thus relates to a semiconductor module of the type described at the outset, in which the semiconductor chip and connecting finger are mounted using LOC technology. The connection fingers, which are held by a so-called lead frame, extend over part of the top of the chip and end in the vicinity of the chip connections without touching them or the top of the chip. The contact points of the connecting fingers and the connections of the chip are electrically connected to one another by bonding wires. According to the invention, no film essentially covering the top of the chip is used to fasten the connecting fingers to the surface of the chip, but a pattern of adhesive corresponding to the position of the connecting fingers on the top of the chip, which is applied to the chip surface and / or connecting finger before assembly. The adhesive pattern according to the invention covers only a small part of the top of the chip and in particular only a small part of the area of the top of the chip corresponding to the position of the connecting fingers.
Durch die Verwendung geringer Mengen an Klebemittel treten die eingangs beschriebenen Probleme nicht auf. Die damit vom Klebemittel noch aufnehmbare Feuchtigkeit und die im Klebemittel noch verbleibenden Lösungsmittelreste sind mengenmäßig äußerst gering. Wird das in Kunststoff verkap¬ selte Halbleiter-Bauelement dem Einfluß von Wärme ausge¬ setzt, sind die entstehenden Gasvolumina so gering, daß die Bildung von Rissen im Gehäuse praktisch nicht mehr be¬ obachtet wird. Zudem sind die erfindungsgemäßen Halblei¬ ter-Bauelemente durch den Verzicht auf Klebefolien o.dgl. und der beträchtlich reduzierten Menge an Klebemittel wesentlich rationeller herstellbar.By using small amounts of adhesive, the problems described above do not arise. The amount of moisture that can still be absorbed by the adhesive and the residual amounts of solvent remaining in the adhesive are extremely small. If the semiconductor component encapsulated in plastic is exposed to the influence of heat, the resulting gas volumes are so small that the formation of cracks in the housing is practically no longer observed. In addition, the semiconductor components according to the invention are or the like due to the omission of adhesive films. and the considerably reduced amount of adhesive can be produced much more efficiently.
Mehrere Ausführungsbeispiele der Erfindung sollen nun im einzelnen anhand der Zeichnungen erläutert werden. Dabei zeigen:Several embodiments of the invention will now be explained in detail with reference to the drawings. Show:
Fig. 1 schematisch die Darstellung eines erfindungsge¬ mäßen Halbleiter-Bauelements mit einemHalbleiter¬ chip und einem die Anschlußfinger haltenden An¬ schlußrahmen, wobei das Kunststoffgehäuse nicht dargestellt ist,1 schematically shows a semiconductor component according to the invention with a semiconductor chip and a connecting frame holding the connecting fingers, the plastic housing not being shown,
Fig. 2 schematisch eine Schnittansicht entlang der Linie A-A in Fig. 1, Fig. 3 schematisch einen Anschlußrahmen mit Anschlußfin¬ gern für ein erfindungsgemäßes Halbleiter-Bau¬ element mit aufgetragenem Klebemittel,2 schematically shows a sectional view along the line AA in FIG. 1, 3 schematically shows a lead frame with lead fingers for a semiconductor component according to the invention with applied adhesive,
Fig. 4 schematisch einen Halbleiterchip für ein erfin¬ dungsgemäßesHalbleiter-Bauelementmit aufgetrage¬ nem Klebemittel gemäß einer vorteilhaften Alter¬ native,4 schematically shows a semiconductor chip for a semiconductor component according to the invention with applied adhesive according to an advantageous alternative,
Fig. 5 schematisch eine andere bevorzugte Ausführungsform des erfindungsgemäßen Halbleiter-Bauelements im Querschnitt,5 schematically shows another preferred embodiment of the semiconductor component according to the invention in cross section,
Fig. 6 schematisch einen Halbleiterchip für eine weitere Alternative eines erfindungsgemäßen Halbleiter- Bauelements mit aufgetragenem Klebemittel und Ab¬ standhaltern und6 schematically shows a semiconductor chip for a further alternative of a semiconductor component according to the invention with applied adhesive and spacers and
Fig. 7 einen Teilquerschnitt der Ausführungsform des er¬ findungsgemäßen Halbleiter-Bauelements gemäß VII- VII der Fig. 6.7 shows a partial cross section of the embodiment of the semiconductor component according to the invention according to VII-VII of FIG. 6.
In den Figuren sind mehrere Ausführungsbeispiele der Er¬ findung gezeigt. Soweit die Einzelteile der verschiedenen Halbleiter-Bauelemente identisch oder gleich sind, sind sie mit den gleichen Bezugszeichen versehen.Several exemplary embodiments of the invention are shown in the figures. If the individual parts of the different semiconductor components are identical or the same, they are provided with the same reference numerals.
Im einzelnen zeigt Fig. 1 ein erfindungsgemäßes Halblei¬ ter-Bauelement 10 (nachfolgend auch mit Modul bezeichnet) mit einem Chip 12, auf dessen Oberseite 14 die Anschlu߬ finger 16 eines (aus Gründen der besseren Übersichtlicht- keit in Fig. 1 nicht dargestellten) Anschlußrahmens 18 (siehe z.B. Fig. 3) angeordnet sind, an dem die Anschlu߬ finger gehalten sind. Die Anschlußfinger 16 des Anschlu߬ rahmens verlaufen oberhalb der Oberseite 14 des Chips 12 und enden in der Nähe der Anschlußpads 20 des Chips 12, die im vorliegenden Fall entlang einer in Längsrichtung über die Mitte des Chips 12 verlaufende Linie angeordnet sind. Die Erfindung ist selbstverständlich nicht auf eine derartige Anordnung der Anschlußpads 20 beschränkt. Viel¬ mehr können die Anschlußpads 20 in beliebiger Weise auf der Chip-Oberseite 14 angeordnet sein. Die Anschlußpads 20 auf der Chip-Oberseite 14 sind über Bonddrähte 22 mit den als Kontaktstellen ausgebildeten Enden 24 der An¬ schlußfinger 16 elektrisch verbunden. Chip, Anschlußrah¬ men, Anschlüsse und Bonddrähte können aus jedem der üb¬ licherweise für diese Modulbausteine verwendeten Materia¬ lien bestehen. Die Montage der Modulbausteine erfolgt auf an sich bekannte Weise und muß daher hier nicht näher er¬ läutert werden.1 shows a semiconductor component 10 according to the invention (hereinafter also referred to as a module) with a chip 12, on the upper side 14 of which the connecting fingers 16 (not shown in FIG. 1 for reasons of better clarity) ) Lead frame 18 (see for example Fig. 3) are arranged on which the connecting fingers are held. The connection fingers 16 of the connection frame run above the top 14 of the chip 12 and end in the vicinity of the connection pads 20 of the chip 12. which in the present case are arranged along a line running in the longitudinal direction over the center of the chip 12. The invention is of course not limited to such an arrangement of the connection pads 20. Rather, the connection pads 20 can be arranged in any manner on the top of the chip 14. The connection pads 20 on the upper side 14 of the chip are electrically connected via bond wires 22 to the ends 24 of the connection fingers 16 designed as contact points. The chip, connection frame, connections and bonding wires can consist of any of the materials normally used for these module components. The assembly of the module modules is carried out in a manner known per se and therefore need not be explained in more detail here.
Im Unterschied zum Stand der Technik werden die Anschlu߬ finger 16 auf der Oberseite 14 des Chips 12 jedoch nicht durch eine Klebefolie verbunden. Vielmehr wird auf der Chipoberfläche ein der Lage der Anschlußfinger 16 im mon¬ tierten Zustand entsprechendes Muster aus Klebemittel er¬ zeugt. Das Klebemittelmuster bedeckt dabei nur einen ge¬ ringen Teil der Chipoberfläche 14 und der Anschlußfinger 16. Im gezeigten Fall besteht daε Klebemittelmuster aus einzelnen Klebepunkten 26, die zwischen den Enden 24 der Anschlußfinger 16 in etwa im Bereich unter den Kontakt¬ stellen und der darunterliegenden Chip-Oberseite 14 ange¬ ordnet sind.In contrast to the prior art, however, the connecting fingers 16 on the upper side 14 of the chip 12 are not connected by an adhesive film. Rather, a pattern of adhesive that corresponds to the position of the connecting fingers 16 in the assembled state is produced on the chip surface. The adhesive pattern covers only a small part of the chip surface 14 and the connecting finger 16. In the case shown, the adhesive pattern consists of individual adhesive dots 26 which are located between the ends 24 of the connecting fingers 16 approximately in the area under the contact points and the chip underneath Top 14 are arranged.
Fig. 2 zeigt diese Anordnung schematisch im Querschnitt entlang der Linie II-II der Fig. 1. Hier ist zu erkennen, daß die Anschlußfinger 16 mit Abstand über der Chip-Ober¬ seite 14 angeordnet sind, um Kurzschlüsse zwischen den An¬ schlußfingern 20 und dem Chip 12 zu vermeiden.FIG. 2 shows this arrangement schematically in cross section along the line II-II of FIG. 1. Here it can be seen that the connection fingers 16 are arranged at a distance above the chip top side 14 in order to prevent short circuits between the connection fingers 20 and to avoid the chip 12.
Der erfindungsgemäße Halbleitermodul kann als solcher ver¬ wendet werden; üblicherweise wird er jedoch in ein - nicht gezeigtes - Gehäuse eingeschlossen, beispielsweise in ein Spritzguß-Kunststoffgehäuse, wie es zum Einkapseln von Halbleitermodulen verwendet wird.The semiconductor module according to the invention can be used as such; but usually it is in a - not shown - housing included, for example in an injection molded plastic housing, as is used for encapsulating semiconductor modules.
Die erfindungsgemäße Ausgestaltung des LOC-Halbleiter- moduls ermöglicht die sichere und einfache Befestigung der Anschlußfinger 16 auf der Chip-Oberseite 14, vermeidet aber die Nachteile, die sich aus dem Stand der Technik ergeben. Wegen der sehr viel geringeren Menge an Klebemit¬ tel, die zur Erzeugung des Klebemittelmusters (Klebepunkte 26) auf der Chip-Oberseite 14 benötigt wird, ist einer¬ seits die Aufnahme von Feuchtigkeit in das Klebemittel geringer, zum anderen verbleiben auch nur sehr geringe Mengen an Lösungsmittelrückständen in dem Klebemittel- muster. Die bei Erwärmung des erfindungsgemäßen Halblei¬ termoduls 10 entstehende Gasvolumina sind daher sehr klein, so daß durch einen erhöhten Gasdruck Risse in dem den Modul umgebenden Gehäuse praktisch nicht beobachtet werden.The configuration of the LOC semiconductor module according to the invention enables the connection fingers 16 to be securely and easily attached to the upper side 14 of the chip, but avoids the disadvantages which result from the prior art. Because of the much smaller amount of adhesive that is required to produce the adhesive pattern (adhesive dots 26) on the chip top 14, the absorption of moisture into the adhesive is lower on the one hand, and on the other hand only very small amounts remain of solvent residues in the adhesive pattern. The gas volumes produced when the semiconductor module 10 according to the invention is heated are therefore very small, so that cracks in the housing surrounding the module are practically not observed due to an increased gas pressure.
Zudem können die erfindungsgemäßen Module in sehr flacher Bauweise realisiert werden. Gemäß dem Stand der Technik sind sehr dünne Bauteile (sogenannte TSOP-Bauteile) nur eingeschränkt zu realisieren, da die zwischen Chip-Ober¬ seite und Anschlußfingern eingebrachte Folie nur in rela¬ tiv großer Dicke zur Verfügung steht. Die LOC-Module des Standes der Technik besitzen daher eine Dicke von min¬ destens 75 μm, zu welcher die Klebefolie erheblich bei¬ trägt. Dagegen läßt sich der Abstand zwischen Chip-Ober¬ seite und Anschlußfingern erfindungsgemäß durch Verzicht auf die Isolierfolie auf 5 bis 10 μm verringern.In addition, the modules according to the invention can be implemented in a very flat design. According to the state of the art, very thin components (so-called TSOP components) can only be realized to a limited extent, since the film introduced between the upper side of the chip and the connecting fingers is only available in a relatively large thickness. The LOC modules of the prior art therefore have a thickness of at least 75 μm, to which the adhesive film contributes considerably. In contrast, the distance between the top of the chip and the connecting fingers can be reduced to 5 to 10 μm according to the invention by dispensing with the insulating film.
Zweckmäßigerweise wird das Klebemittelmuster zunächst in einer größeren Dicke auf die Chipoberfläche und/oder An¬ schlußfinger aufgetragen, als der spätere Abstand zwischen Chip und Anschlußfingern betragen soll. Das Klebemittel- muster wird bei der Modulmontage auf die gewünschte Höhe zusammengedrückt.The adhesive pattern is expediently first applied to the chip surface and / or connecting finger in a greater thickness than the subsequent distance between the chip and connecting fingers should be. The adhesive Pattern is pressed to the desired height during module assembly.
Das Klebemuster kann entweder auf die Chip-Oberseite oder auf die Anschlußfinger des Anschlußrahmens oder auf beide aufgebracht werden. Das Klebemittelmuster wird bevorzugt so erzeugt, daß alle Anschlußfinger durch Klebemittel mit der Chip-Oberseite verbunden sind, dabei aber möglichst wenig Klebemittel benötigt wird und ein möglichst ein¬ faches Muster entsteht. Das genaue Muster hängt vor allem von der Anordnung der Anschlußfinger im Anschlußrahmen in Bezug auf die Chip-Oberseite ab.The adhesive pattern can be applied either to the top of the chip or to the lead fingers of the lead frame or both. The adhesive pattern is preferably produced in such a way that all the connecting fingers are connected to the top of the chip by adhesive, but as little adhesive as possible is required and the pattern is as simple as possible. The exact pattern depends above all on the arrangement of the connection fingers in the connection frame with respect to the top of the chip.
Fig. 3 zeigt eine mögliche Ausführungsform, bei der ein punktformiges Klebemuster (Klebepunkte 26) auf die im mon¬ tierten Zustand der Chip-Oberseite 14 zugewandte Unter¬ seite der Enden 24 der Anschlußfinger 16 des Anschlußrah¬ mens 18 aufgebracht ist. Die einzelnen Klebepunkte 26 be¬ finden sich also an den Enden der Anschlußfinger 16 im Be¬ reich der Kontaktstellen auf der Unterseite des Anschlu߬ rahmens 18. Die Klebepunkte 26 können sich auch auf einem anderen Abschnitt des Anschlußfingers befinden. Umgekehrt ist es möglich, ein entsprechendes Muster von Klebepunkten 26 auf der Chip-Oberseite 14 derart zu erzeugen, daß die Enden 24 der Anschlußfinger 16 bei der Modulmontage auf diesen Klebepunkten 26 zu liegen kommen. Es können auch sowohl Chip-Oberseite 14 als auch Anschlußfinger 16 mit zueinander passenden Klebemustern versehen werden. Diese Variante ist besonders bei Verwendung von Zweikomponenten- Klebern bevorzugt .3 shows a possible embodiment in which a dot-shaped adhesive pattern (adhesive dots 26) is applied to the lower side of the ends 24 of the connecting fingers 16 of the connecting frame 18 facing the upper side 14 of the chip 14. The individual adhesive dots 26 are therefore located at the ends of the connecting fingers 16 in the area of the contact points on the underside of the connecting frame 18. The adhesive dots 26 can also be located on another section of the connecting finger. Conversely, it is possible to generate a corresponding pattern of adhesive dots 26 on the top of the chip 14 in such a way that the ends 24 of the connecting fingers 16 come to lie on these adhesive dots 26 during module assembly. Both the upper side of the chip 14 and the connecting finger 16 can also be provided with matching adhesive patterns. This variant is particularly preferred when using two-component adhesives.
Fig. 4 zeigt eine andere Ausführungsform bei der ein Klebemuster aus zwei parallelen Streifen 28 entlang der Anschlüsse 20 über die Chip-Oberseite 14 verläuft. Wie erwähnt, sind prinzipiell alle Arten von Klebemustern denkbar, beispielsweise wellen- oder zickzackförmige Linien, Strichmuster, alle Arten von Punktmuster und so weiter. Vorzugsweise bedecken die Klebemuster einen mög¬ lichst geringen Teil der Chip-Oberseite 14 und der An¬ schlußfinger 16, lassen sich leicht erzeugen und führen zu einer festen Verbindung zwischen Anschlußfingern 16 und Chip 12.FIG. 4 shows another embodiment in which an adhesive pattern of two parallel strips 28 runs along the connections 20 over the chip top 14. As mentioned, in principle all types of adhesive patterns are conceivable, for example in the form of waves or zigzags Lines, line patterns, all kinds of dot patterns and so on. The adhesive patterns preferably cover the smallest possible part of the chip top 14 and the connecting finger 16, can be easily produced and lead to a firm connection between the connecting fingers 16 and the chip 12.
Als Klebemittel kommen grundsätzlich alle bei der Chip- und Halbleitermodulherstellung verwendeten Klebemittel in Frage. Beispielhaft können Epoxid-, Acryl-, Silikon- und Polyimidkleber genannt werden. Auch Triazin-, Phenol-, Resol-, Polyetheramid- und Polysulfonkleber können verwen¬ det werden. Bevorzugt sind Polyamidimidkleber. Da Chip- Oberseiten zur Passivierung häufig mit einer Polyimid- schicht beschichtet sind, ist dieser Typ von Kleber mit dem Chip besonders kompatibel .In principle, all adhesives used in chip and semiconductor module production can be considered as adhesives. Examples include epoxy, acrylic, silicone and polyimide adhesives. Triazine, phenol, resol, polyether amide and polysulfone adhesives can also be used. Polyamideimide adhesives are preferred. Since chip tops are often coated with a polyimide layer for passivation, this type of adhesive is particularly compatible with the chip.
Vorzugsweise wird das Klebemittel mit dem gewünschten Muster flüssig auf Chip oder Anschlußfinger aufgetragen und dann vorgetrocknet, bis es finger- oder staubtrocken ist (erste Aushärtungsstufe) . Das Klebemittel kann ande¬ rerseits auch im geschmolzenen Zustand oder in Form einer Suspension aufgebracht werden. Vor der Montage von Chip und Anschlußrahmen wird das mit dem Klebemuster versehene Bauteil so lange erhitzt, bis das Klebemittel erweicht. Darauf werden Chip und Anschlußrahmen auf die gewünschte Bauhöhe zusammengepreßt, und man läßt das Klebemittel aus¬ härten. Anschließend können die Bonddrähte auf übliche Weise angebracht werden.The adhesive with the desired pattern is preferably applied in liquid form to the chip or connecting finger and then predried until it is finger or dust dry (first curing stage). On the other hand, the adhesive can also be applied in the molten state or in the form of a suspension. Before the chip and the lead frame are installed, the component provided with the adhesive pattern is heated until the adhesive softens. Then the chip and the lead frame are pressed together to the desired height, and the adhesive is allowed to harden. The bond wires can then be attached in the usual way.
Wie bereits erwähnt, sollten Anschlußfinger und Chip-Ober¬ seite sich nicht direkt berühren. Es muß deshalb darauf geachtet werden, daß beim Verkleben von Chip und Anschlu߬ rahmen beide Bauteile nicht zu fest aufeinander gepreßt werden, damit das Klebemittel zwischen Anschlußfingern und Chip-Oberseite nicht völlig herausgedrückt wird. In einer besonders bevorzugten Ausführungsform wird deshalb zwi¬ schen Chip-Oberseite und Anschlußrahmen wenigstens ein Abstandhalter eingefügt, der verhindert, daß Chip und An¬ schlußrahmen über die gewünschte Bauhöhe des Moduls hinaus zusammengepreßt werden können.As already mentioned, the connecting finger and the top of the chip should not touch directly. Care must therefore be taken that the two components are not pressed too tightly against one another when gluing the chip and the leadframe, so that the adhesive between the connecting fingers and the top of the chip is not completely pressed out. In a In a particularly preferred embodiment, at least one spacer is therefore inserted between the top of the chip and the lead frame, which prevents the chip and lead frame from being pressed together beyond the desired overall height of the module.
Fig. 5 zeigt derartige Abstandhalter in Form von Teilchen 30, deren Durchmesser in etwa dem gewünschten Abstand zwi¬ schen Chip-Oberseite 14 und Anschlußfingern 16 entspricht und die dem Klebemittel 32 als Zuschlag beigefügt sind. Die Teilchen 30 können beispielsweise Glaskügelchen sein, aber auch jedes andere nicht leitende und inerte Material, wie beispielsweise hochschmelzende Kunststoffe, Keramiken, Schleifkörnchen und ähnliches. Der Durchmesser der Teil¬ chen 30 kann z.B. im Bereich von 2 bis 50 μm liegen, vor¬ zugsweise zwischen 5 und 10 μm.5 shows spacers of this type in the form of particles 30, the diameter of which corresponds approximately to the desired distance between the upper side 14 of the chip and the connecting fingers 16 and which are added to the adhesive 32 as an additive. The particles 30 can be glass spheres, for example, but also any other non-conductive and inert material, such as, for example, high-melting plastics, ceramics, abrasive grains and the like. The diameter of the particles 30 can e.g. are in the range from 2 to 50 μm, preferably between 5 and 10 μm.
Eine andere Variante ist in den Fign. 6 und 7 dargestellt. Hier sind die Abstandhalter 34 auf die Oberseite des Chips als Muster aufgebracht. Im gezeigten Fall sind die Ab¬ standhalter 34 zwei parallel zu den Klebemittelstreifen 28 verlaufende Rippen. Zweckmäßig werden diese Abstandhalter 34 vor dem Aufbringen der Klebemittelstreifen 28 erzeugt. Grundsätzlich können die Abstandhalter in gleicher Weise wie das Klebemuster aufgebracht werden, nämlich indem zu¬ erst ein unvemetzter Kunststoff in geschmolzenem Zustand, in Lösung oder Suspension aufgetragen und anschließend, beispielsweise unter Erwärmung, vernetzt wird. Geeignet sind beispielsweise alle Kunststoffe, die nach dem Aushär¬ ten einen Erweichungspunkt besitzen, der über der Er¬ weichungstemperatur des Klebemittels nach dem Vortrocknen, d.h. nach der ersten Aushärtungsstufe, liegt. Wird der Chip zur Montage erhitzt, um das Klebemittelmuster zu er¬ weichen, bleibt der Abstandhalter also fest. Beispielhafte Materialien für den Abstandhalter sind die bereits zur Verwendung als Klebemittel genannten Kunststoffe. Die Abstandhalter sind nicht auf die in den Fign. 6 und 7 gezeigte Streifen- oder Rippenform beschränkt, sondern können grundsätzlich jede beliebige, auf den Anschlußrah¬ men abgestimmte Form aufweisen. Denkbar sind beispiels¬ weise Gitterstrukturen, punktförmige Muster und so weiter, die die Anschlußfinger an beliebigen Stellen abstützen. Die Höhe der Abstandhalter entspricht im wesentlichen dem gewünschten Abstand zwischen Chip-Oberseite und Anschlu߬ fingern. Wie bereits bei den Klebemitteln ist es ebenfalls möglich, die Abstandhalter nicht auf der Chip-Oberseite, sondern auf dem Anschlußrahmen anzuordnen.Another variant is shown in FIGS. 6 and 7. Here, the spacers 34 are applied to the top of the chip as a pattern. In the case shown, the spacers 34 are two ribs running parallel to the adhesive strips 28. These spacers 34 are expediently generated before the adhesive strips 28 are applied. In principle, the spacers can be applied in the same way as the adhesive pattern, namely by first applying an uncrosslinked plastic in the molten state, in solution or suspension and then crosslinking, for example with heating. Suitable are, for example, all plastics which, after curing, have a softening point which is above the softening temperature of the adhesive after predrying, ie after the first curing stage. If the chip is heated for assembly in order to soften the adhesive pattern, the spacer therefore remains fixed. Exemplary materials for the spacer are the plastics already mentioned for use as adhesives. The spacers are not based on those shown in FIGS. 6 and 7 shown strip or rib shape limited, but can basically have any shape matched to the connecting frame. For example, lattice structures, punctiform patterns and so on are conceivable, which support the connecting fingers at any desired locations. The height of the spacers essentially corresponds to the desired distance between the top of the chip and the connecting fingers. As with the adhesives, it is also possible to arrange the spacers not on the top of the chip, but on the lead frame.
Klebemittelmuster und Abstandhalter können prinzipiell auf die gleiche Weise auf Chip-Oberseite und/oder Anschlußrah¬ men erzeugt werden. Geeignet zum Aufbringen der Muster sind verschiedene Druck- und Stempelverfahren, wie z.B. der Siebdruck. Auch Dosierverfahren können zum Erzeugen der Muster eingesetzt werden. Besonders bevorzugt ist es, Klebemittel- und/oder Abstandhaltermuster mit einem in Tintenstrahldruckern eingesetzten System aufzubringen. Anstelle der Drucktinte wird also die Klebemittellösung oder Kunststofflösung Punkt für Punkt auf Chip-Oberseite oder Anschlußrahmen gesetzt. Anstelle von Lösungen können die Kunststoffe oder Klebemittel auch als Suspension oder in geschmolzenem Zustand verwendet werden. Auf die be¬ schriebene Weise lassen sich sowohl punktförmige als auch andere Muster mit großer Präzision und Schnelligkeit er¬ zeugen. Ein entsprechendes Verfahren ist ebenfalls Gegen¬ stand der Erfindung. Adhesive samples and spacers can in principle be produced in the same way on the top of the chip and / or on the connecting frame. Various printing and stamping processes are suitable for applying the samples, e.g. screen printing. Dosing processes can also be used to generate the patterns. It is particularly preferred to apply adhesive and / or spacer patterns using a system used in inkjet printers. Instead of the printing ink, the adhesive or plastic solution is placed point by point on the top of the chip or lead frame. Instead of solutions, the plastics or adhesives can also be used as a suspension or in the molten state. In the manner described, both punctiform and other patterns can be generated with great precision and speed. A corresponding method is also the subject of the invention.

Claims

ANSPRUCHE EXPECTATIONS
1. Halbleiter-Bauelement mit einem Halbleiterchip (12) , der mehrere Anschlu߬ pads (20) auf mindestens einer seiner Hauptseiten¬ flächen (14) aufweist, und mehreren sich teilweise über die mindestens eine Hauptseitenfläche (14) des Halbleiterchips (12) erstreckende, elektrisch leitende Anschlußfinger (16) , die mit dem Halbleiterchip (12) mittels einer Klebeverbindung (26,-28,-32) verklebt sind, d a d u r c h g e k e n n z e i c h n e t , daß die Klebeverbindung (26,-28,-32) zwischen Anschlußfin¬ gern (16) und der mindestens einen HauptSeitenfläche (14) des Halbleiterchips (12) durch ein Muster aus Klebemittel bewirkt wird, das der Anordnung der An¬ schlußfinger (16) im montierten Zustand entspricht und nur einen geringen Teil der Halbleiterchips (12) und/oder der Anschlußfinger (16) bedeckt.1. Semiconductor component with a semiconductor chip (12), which has a plurality of connection pads (20) on at least one of its main side surfaces (14), and several partially extending over the at least one main side surface (14) of the semiconductor chip (12) , electrically conductive connection fingers (16) which are glued to the semiconductor chip (12) by means of an adhesive connection (26, -28, -32), characterized in that the adhesive connection (26, -28, -32) between connection fingers (16th ) and the at least one main side surface (14) of the semiconductor chip (12) is brought about by a pattern of adhesive which corresponds to the arrangement of the connecting fingers (16) in the assembled state and only a small part of the semiconductor chips (12) and / or the Connection fingers (16) covered.
2. Halbleiter-Bauelement gemäß Anspruch 1, dadurch ge¬ kennzeichnet, daß das Klebemittelmuster ein punktför¬ miges Muster ist und pro Anschlußfinger (16) min¬ destens einen Klebepunkt (26) aufweist.2. Semiconductor component according to claim 1, characterized in that the adhesive pattern is a dot-shaped pattern and has at least one adhesive dot (26) per connecting finger (16).
3. Halbleiter-Bauelement gemäß Anspruch 1, dadurch ge¬ kennzeichnet, daß das Klebemittelmuster linien-, Zickzack- oder wellenlinienförmig ist.3. Semiconductor component according to claim 1, characterized ge indicates that the adhesive pattern is linear, zigzag or wavy.
4. Halbleiter-Bauelement gemäß einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß zwischen den Anschlu߬ fingern (16) und mindestens einer Hauptseitenfläche (14) des Chips (12) wenigstens ein Abstandhalter (30,34) angeordnet ist. 4. Semiconductor component according to one of claims 1 to 3, characterized in that at least one spacer (30, 34) is arranged between the connecting fingers (16) and at least one main side surface (14) of the chip (12).
5. Halbleiter-Bauelement gemäß Anspruch 4, dadurch ge¬ kennzeichnet, daß der Abstandhalter aus Teilchen (30) besteht, die dem Klebemittel (32) beigemengt sind.5. Semiconductor component according to claim 4, characterized ge indicates that the spacer consists of particles (30) which are added to the adhesive (32).
6. Halbleiter-Bauelement gemäß Anspruch 5, dadurch ge¬ kennzeichnet, daß die Teilchen (30) Glaskügelchen sind, deren Durchmesser im wesentlichen dem gewünsch¬ ten Abstand zwischen dem Chip (12) und den Anschlu߬ fingern (16) entspricht.6. Semiconductor component according to claim 5, characterized in that the particles (30) are glass spheres, the diameter of which essentially corresponds to the desired distance between the chip (12) and the connecting fingers (16).
7. Halbleiter-Bauelement gemäß Anspruch 4, dadurch ge¬ kennzeichnet, daß der Abstandhalter als zusätzliches Muster (34) zwischen dem Chip (12) und den Anschlu߬ fingern (16) ausgebildet ist.7. Semiconductor component according to claim 4, characterized in that the spacer is designed as an additional pattern (34) between the chip (12) and the connecting fingers (16).
8. Halbleiter-Bauelement gemäß Anspruch 7, dadurch ge¬ kennzeichnet, daß der Abstandhalter (34) als band- oder gitterförmiges Muster ausgebildet ist.8. Semiconductor component according to claim 7, characterized in that the spacer (34) is designed as a band or lattice-shaped pattern.
9. Halbleiter-Bauelement gemäß Ansprüchen 1 bis 4, 7 und 8, dadurch gekennzeichnet, daß Klebemittelmuster (26) und/oder Abstandhalter (34) im wesentlichen aus Epoxid- , Acryl-, Silikon-, Polyimid-, Triazin- , Phenol-, Resol-, Polyamin-, Polyetheramid- oder Poly- sulfonharz, insbesondere aus Polyimidharz, herge¬ stellt wird.9. Semiconductor component according to claims 1 to 4, 7 and 8, characterized in that adhesive pattern (26) and / or spacer (34) essentially made of epoxy, acrylic, silicone, polyimide, triazine, phenol Resol, polyamine, polyether amide or polysulfone resin, in particular made of polyimide resin, is produced.
10. Halbleiter-Bauelement gemäß einem der Ansprüche 1 bis 4 und 7 bis 9, dadurch gekennzeichnet, daß Klebemit¬ telmuster und/oder Abstandhaltermuster durch Druck-, Stempel- oder Dosierverfahren erzeugt werden.10. Semiconductor component according to one of claims 1 to 4 and 7 to 9, characterized in that adhesive pattern and / or spacer patterns are generated by printing, stamping or dosing processes.
11. Halbleiter-Bauelement gemäß Anspruch 10, dadurch ge¬ kennzeichnet, daß Klebemittelmuster (26) und/oder Ab¬ standhaltermuster (34) durch ein Tintenstrahldrucker¬ ähnliches Verfahren erzeugt werden. 11. The semiconductor component according to claim 10, characterized in that adhesive patterns (26) and / or spacer patterns (34) are produced by an inkjet printer-like method.
12. Halbleiter-Bauelement gemäß einem der Ansprüche 1 bis 11, dadurch gekennzeichnet, daß er in einem Gehäuse, beispielsweise aus Spritzguß-Kunststoff, eingeschlos¬ sen ist. 12. Semiconductor component according to one of claims 1 to 11, characterized in that it is enclosed in a housing, for example made of injection molded plastic.
PCT/EP1997/000539 1996-02-09 1997-02-06 Semiconductor component WO1997029514A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
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DE19604784.6 1996-02-09

Publications (1)

Publication Number Publication Date
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EP0902468A1 (en) * 1997-09-10 1999-03-17 Oki Electric Industry Co., Ltd. Resin-sealed semiconductor device and method of manufacturing the device
EP1630865A1 (en) * 2004-08-17 2006-03-01 Optimum Care International Tech. Inc. Adhesion of a Chip on a leadframe

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WO1998012746A1 (en) * 1996-09-21 1998-03-26 Mci Computer Gmbh Semiconductor component and its production method
EP0902468A1 (en) * 1997-09-10 1999-03-17 Oki Electric Industry Co., Ltd. Resin-sealed semiconductor device and method of manufacturing the device
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