WO1997049134A3 - Soi-transistor circuitry employing soi-transistors and method of manufacture thereof - Google Patents

Soi-transistor circuitry employing soi-transistors and method of manufacture thereof Download PDF

Info

Publication number
WO1997049134A3
WO1997049134A3 PCT/US1997/010591 US9710591W WO9749134A3 WO 1997049134 A3 WO1997049134 A3 WO 1997049134A3 US 9710591 W US9710591 W US 9710591W WO 9749134 A3 WO9749134 A3 WO 9749134A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory cells
insulator
bit line
line contact
another aspect
Prior art date
Application number
PCT/US1997/010591
Other languages
French (fr)
Other versions
WO1997049134A2 (en
Inventor
Kirk D Prall
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to EP97931250A priority Critical patent/EP0907967A2/en
Priority to KR10-2003-7012053A priority patent/KR100519127B1/en
Priority to AU34929/97A priority patent/AU3492997A/en
Priority to JP50331098A priority patent/JP3545768B2/en
Publication of WO1997049134A2 publication Critical patent/WO1997049134A2/en
Publication of WO1997049134A3 publication Critical patent/WO1997049134A3/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78642—Vertical transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/905—Plural dram cells share common contact or common trench

Abstract

The invention includes several aspects related to semiconductor-on-insulator transistors, to memory and other DRAM circuitry and arrays, to transistor gate arrays, and to methods of fabricating such constructions. In one aspect, a semiconductor-on-insulator transistor includes: a) an insulator layer; b) a layer of semiconductor material over the insulator layer; c) a transistor gate provided within the semiconductor material layer; and d) an outer elevation source/drain diffusion region and an inner elevation diffusion region provided within the semiconductor material layer in operable proximity to the transistor gate. In another aspect, DRAM circuitry includes a plurality of memory cells not requiring sequential access, at least a portion of the plurality having more than two memory cells for a single bit line contact. In still another aspect, a DRAM array of memory cells comprises a plurality of wordlines, source regions, drain regions, bit lines in electrical connection with the drain regions, and storage capacitors in electrical connection with the source regions; at least two drain regions of different memory cells being interconnected with one another beneath one of the wordlines. In yet another aspect, a DRAM array has more than two memory cells for a single bit line contact, and a plurality of individual memory cells occupy a surface area of less than or equal to 2f X (2f + f/N), where 'f' is the minimum photolithographic feature size with which the array was fabricated, and 'N' is the number of memory cells per single bit line contact within the portion.
PCT/US1997/010591 1996-06-21 1997-06-18 Soi-transistor circuitry employing soi-transistors and method of manufacture thereof WO1997049134A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP97931250A EP0907967A2 (en) 1996-06-21 1997-06-18 Soi-transistor circuitry employing soi-transistors and method of manufacture thereof
KR10-2003-7012053A KR100519127B1 (en) 1996-06-21 1997-06-18 Memory array and a method of forming a memory array
AU34929/97A AU3492997A (en) 1996-06-21 1997-06-18 Soi-transistor circuitry employing soi-transistors and method of manufacture thereof
JP50331098A JP3545768B2 (en) 1996-06-21 1997-06-18 Method for manufacturing SOI transistor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/668,388 1996-06-21
US08/668,388 US5929476A (en) 1996-06-21 1996-06-21 Semiconductor-on-insulator transistor and memory circuitry employing semiconductor-on-insulator transistors

Publications (2)

Publication Number Publication Date
WO1997049134A2 WO1997049134A2 (en) 1997-12-24
WO1997049134A3 true WO1997049134A3 (en) 1998-03-12

Family

ID=24682129

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1997/010591 WO1997049134A2 (en) 1996-06-21 1997-06-18 Soi-transistor circuitry employing soi-transistors and method of manufacture thereof

Country Status (6)

Country Link
US (4) US5929476A (en)
EP (1) EP0907967A2 (en)
JP (4) JP3545768B2 (en)
KR (1) KR100519127B1 (en)
AU (1) AU3492997A (en)
WO (1) WO1997049134A2 (en)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5929476A (en) * 1996-06-21 1999-07-27 Prall; Kirk Semiconductor-on-insulator transistor and memory circuitry employing semiconductor-on-insulator transistors
US6284574B1 (en) * 1999-01-04 2001-09-04 International Business Machines Corporation Method of producing heat dissipating structure for semiconductor devices
US6952029B1 (en) * 1999-01-08 2005-10-04 Micron Technology, Inc. Thin film capacitor with substantially homogenous stoichiometry
DE29923162U1 (en) * 1999-02-01 2000-04-27 Siemens Ag Elongated superconductor structure with high-T¶c¶ · superconductor material and metallic carrier
US6355520B1 (en) * 1999-08-16 2002-03-12 Infineon Technologies Ag Method for fabricating 4F2 memory cells with improved gate conductor structure
US6500744B2 (en) 1999-09-02 2002-12-31 Micron Technology, Inc. Methods of forming DRAM assemblies, transistor devices, and openings in substrates
US6544837B1 (en) * 2000-03-17 2003-04-08 International Business Machines Corporation SOI stacked DRAM logic
JP4021602B2 (en) * 2000-06-16 2007-12-12 株式会社東芝 Semiconductor memory device
US6537891B1 (en) * 2000-08-29 2003-03-25 Micron Technology, Inc. Silicon on insulator DRAM process utilizing both fully and partially depleted devices
JP3808700B2 (en) * 2000-12-06 2006-08-16 株式会社東芝 Semiconductor device and manufacturing method thereof
US6649476B2 (en) 2001-02-15 2003-11-18 Micron Technology, Inc. Monotonic dynamic-static pseudo-NMOS logic circuit and method of forming a logic gate array
KR100471164B1 (en) * 2002-03-26 2005-03-09 삼성전자주식회사 Semiconductor device having metal-insulator-metal capacitor and fabrication method thereof
EP1355316B1 (en) * 2002-04-18 2007-02-21 Innovative Silicon SA Data storage device and refreshing method for use with such device
KR100632658B1 (en) * 2004-12-29 2006-10-12 주식회사 하이닉스반도체 Method of forming metal line in semiconductor device
US7326611B2 (en) * 2005-02-03 2008-02-05 Micron Technology, Inc. DRAM arrays, vertical transistor structures and methods of forming transistor structures and DRAM arrays
US7501676B2 (en) * 2005-03-25 2009-03-10 Micron Technology, Inc. High density semiconductor memory
US20140339568A1 (en) * 2013-05-16 2014-11-20 Sumitomo Electric Industries, Ltd. Semiconductor device with substrate via hole and method to form the same
US9012278B2 (en) * 2013-10-03 2015-04-21 Asm Ip Holding B.V. Method of making a wire-based semiconductor device

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0175433A2 (en) * 1984-09-11 1986-03-26 Kabushiki Kaisha Toshiba MOS dynamic RAM and manufacturing method thereof
JPS61144875A (en) * 1984-12-18 1986-07-02 Mitsubishi Electric Corp Mos integrated circuit
JPS6340376A (en) * 1986-08-05 1988-02-20 Mitsubishi Electric Corp Field-effect semiconductor device
EP0315803A2 (en) * 1987-11-10 1989-05-17 Fujitsu Limited A DRAM cell formed on an insulating layer having a buried semiconductor pillar structure and a manufacturing method thereof
EP0472726A1 (en) * 1989-05-12 1992-03-04 Oki Electric Industry Company, Limited Field effect transistor
JPH04176168A (en) * 1990-11-08 1992-06-23 Oki Electric Ind Co Ltd Semiconductor memory device and manufacture thereof
EP0575278A2 (en) * 1992-06-17 1993-12-22 International Business Machines Corporation Vertical gate transistor with low temperature epitaxial channel
US5281837A (en) * 1990-05-28 1994-01-25 Kabushiki Kaisha Toshiba Semiconductor memory device having cross-point DRAM cell structure
US5340754A (en) * 1992-09-02 1994-08-23 Motorla, Inc. Method for forming a transistor having a dynamic connection between a substrate and a channel region
US5378919A (en) * 1991-01-21 1995-01-03 Sony Corporation Semiconductor integrated circuit device with plural gates and plural passive devices
DE4443968A1 (en) * 1994-05-26 1995-11-30 Mitsubishi Electric Corp Semiconductor device with DRAM of G bit generation

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3962713A (en) * 1972-06-02 1976-06-08 Texas Instruments Incorporated Large value capacitor
JPS5565463A (en) * 1978-11-13 1980-05-16 Semiconductor Res Found Semiconductor device
US4409608A (en) * 1981-04-28 1983-10-11 The United States Of America As Represented By The Secretary Of The Navy Recessed interdigitated integrated capacitor
US5357131A (en) 1982-03-10 1994-10-18 Hitachi, Ltd. Semiconductor memory with trench capacitor
JPS6070766A (en) 1983-09-26 1985-04-22 Mitsubishi Electric Corp Mos type semiconductor device
JPS61206253A (en) * 1985-03-11 1986-09-12 Nec Corp Semiconductor integrated circuit device
US4614021A (en) * 1985-03-29 1986-09-30 Motorola, Inc. Pillar via process
US4864375A (en) * 1986-02-05 1989-09-05 Texas Instruments Incorporated Dram cell and method
US5124764A (en) * 1986-10-21 1992-06-23 Texas Instruments Incorporated Symmetric vertical MOS transistor with improved high voltage operation
FR2610141B1 (en) 1987-01-26 1990-01-19 Commissariat Energie Atomique CMOS INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING ELECTRICAL ISOLATION AREAS IN THIS CIRCUIT
US4906585A (en) 1987-08-04 1990-03-06 Siemens Aktiengesellschaft Method for manufacturing wells for CMOS transistor circuits separated by insulating trenches
US4982266A (en) * 1987-12-23 1991-01-01 Texas Instruments Incorporated Integrated circuit with metal interconnecting layers above and below active circuitry
US5016068A (en) * 1988-04-15 1991-05-14 Texas Instruments Incorporated Vertical floating-gate transistor
US4961100A (en) * 1988-06-20 1990-10-02 General Electric Company Bidirectional field effect semiconductor device and circuit
JP2622588B2 (en) * 1988-07-04 1997-06-18 富士通株式会社 Method for manufacturing semiconductor device
US4951102A (en) * 1988-08-24 1990-08-21 Harris Corporation Trench gate VCMOS
JPH0352192A (en) 1989-07-19 1991-03-06 Hitachi Ltd Semiconductor memory
JPH03153085A (en) * 1989-11-10 1991-07-01 Fujitsu Ltd Semiconductor storage device and its manufacture
US5010386A (en) * 1989-12-26 1991-04-23 Texas Instruments Incorporated Insulator separated vertical CMOS
JPH0434980A (en) * 1990-05-30 1992-02-05 Mitsubishi Electric Corp Semiconductor device
MY107475A (en) * 1990-05-31 1995-12-30 Canon Kk Semiconductor device and method for producing the same.
JP2790362B2 (en) * 1990-06-04 1998-08-27 キヤノン株式会社 Semiconductor device
JP2932635B2 (en) * 1990-08-11 1999-08-09 日本電気株式会社 Semiconductor storage device
KR920010963A (en) * 1990-11-23 1992-06-27 오가 노리오 SOI type vertical channel FET and manufacturing method thereof
JPH04239767A (en) * 1991-01-23 1992-08-27 Matsushita Electric Ind Co Ltd Semiconductor memory
US5057888A (en) 1991-01-28 1991-10-15 Micron Technology, Inc. Double DRAM cell
JPH04268767A (en) * 1991-02-25 1992-09-24 Fujitsu Ltd Semiconductor device
JPH04360572A (en) * 1991-06-07 1992-12-14 Ricoh Co Ltd Semiconductor memory device
US5355330A (en) * 1991-08-29 1994-10-11 Hitachi, Ltd. Capacitive memory having a PN junction writing and tunneling through an insulator of a charge holding electrode
JP3176962B2 (en) * 1991-09-03 2001-06-18 キヤノン株式会社 Semiconductor device
KR960008518B1 (en) 1991-10-02 1996-06-26 Samsung Electronics Co Ltd Manufacturing method and apparatus of semiconductor device
JPH05121691A (en) * 1991-10-25 1993-05-18 Nec Corp Semiconductor storage device
JP2837014B2 (en) * 1992-02-17 1998-12-14 三菱電機株式会社 Semiconductor device and manufacturing method thereof
US5208172A (en) * 1992-03-02 1993-05-04 Motorola, Inc. Method for forming a raised vertical transistor
JP3322936B2 (en) * 1992-03-19 2002-09-09 株式会社東芝 Semiconductor storage device
US5573837A (en) 1992-04-22 1996-11-12 Micron Technology, Inc. Masking layer having narrow isolated spacings and the method for forming said masking layer and the method for forming narrow isolated trenches defined by said masking layer
US5528062A (en) 1992-06-17 1996-06-18 International Business Machines Corporation High-density DRAM structure on soi
JP2748072B2 (en) * 1992-07-03 1998-05-06 三菱電機株式会社 Semiconductor device and manufacturing method thereof
US5508541A (en) 1992-09-22 1996-04-16 Kabushiki Kaisha Toshiba Random access memory device with trench-type one-transistor memory cell structure
JPH0721779A (en) 1993-07-07 1995-01-24 Nec Corp Semiconductor static memory integrated circuit
DE4340967C1 (en) * 1993-12-01 1994-10-27 Siemens Ag Method for producing an integrated circuit arrangement having at least one MOS transistor
JP3253782B2 (en) * 1993-12-02 2002-02-04 株式会社東芝 Semiconductor storage device
JPH07245343A (en) * 1994-03-03 1995-09-19 Toshiba Corp Semiconductor device and its manufacture
US5432739A (en) 1994-06-17 1995-07-11 Philips Electronics North America Corporation Non-volatile sidewall memory cell method of fabricating same
US5529948A (en) * 1994-07-18 1996-06-25 United Microelectronics Corporation LOCOS technology with reduced junction leakage
JP3270250B2 (en) * 1994-08-17 2002-04-02 株式会社東芝 Semiconductor memory device and method of manufacturing the same
JP3400143B2 (en) 1994-09-17 2003-04-28 株式会社東芝 Semiconductor storage device
US5480822A (en) * 1994-11-28 1996-01-02 United Microelectronics Corporation Method of manufacture of semiconductor memory device with multiple, orthogonally disposed conductors
US5455190A (en) 1994-12-07 1995-10-03 United Microelectronics Corporation Method of making a vertical channel device using buried source techniques
US5497017A (en) * 1995-01-26 1996-03-05 Micron Technology, Inc. Dynamic random access memory array having a cross-point layout, tungsten digit lines buried in the substrate, and vertical access transistors
US5705409A (en) * 1995-09-28 1998-01-06 Motorola Inc. Method for forming trench transistor structure
US5929476A (en) 1996-06-21 1999-07-27 Prall; Kirk Semiconductor-on-insulator transistor and memory circuitry employing semiconductor-on-insulator transistors
US5693547A (en) * 1996-10-22 1997-12-02 Advanced Micro Devices, Inc. Method of making vertical MOSFET with sub-trench source contact

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0175433A2 (en) * 1984-09-11 1986-03-26 Kabushiki Kaisha Toshiba MOS dynamic RAM and manufacturing method thereof
JPS61144875A (en) * 1984-12-18 1986-07-02 Mitsubishi Electric Corp Mos integrated circuit
JPS6340376A (en) * 1986-08-05 1988-02-20 Mitsubishi Electric Corp Field-effect semiconductor device
EP0315803A2 (en) * 1987-11-10 1989-05-17 Fujitsu Limited A DRAM cell formed on an insulating layer having a buried semiconductor pillar structure and a manufacturing method thereof
EP0472726A1 (en) * 1989-05-12 1992-03-04 Oki Electric Industry Company, Limited Field effect transistor
US5281837A (en) * 1990-05-28 1994-01-25 Kabushiki Kaisha Toshiba Semiconductor memory device having cross-point DRAM cell structure
JPH04176168A (en) * 1990-11-08 1992-06-23 Oki Electric Ind Co Ltd Semiconductor memory device and manufacture thereof
US5378919A (en) * 1991-01-21 1995-01-03 Sony Corporation Semiconductor integrated circuit device with plural gates and plural passive devices
EP0575278A2 (en) * 1992-06-17 1993-12-22 International Business Machines Corporation Vertical gate transistor with low temperature epitaxial channel
US5340754A (en) * 1992-09-02 1994-08-23 Motorla, Inc. Method for forming a transistor having a dynamic connection between a substrate and a channel region
DE4443968A1 (en) * 1994-05-26 1995-11-30 Mitsubishi Electric Corp Semiconductor device with DRAM of G bit generation

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 010, no. 340 (E - 455) 18 November 1986 (1986-11-18) *
PATENT ABSTRACTS OF JAPAN vol. 012, no. 254 (E - 634) 16 July 1988 (1988-07-16) *
PATENT ABSTRACTS OF JAPAN vol. 016, no. 486 (E - 1276) 8 October 1992 (1992-10-08) *

Also Published As

Publication number Publication date
US6404008B1 (en) 2002-06-11
WO1997049134A2 (en) 1997-12-24
JP3545768B2 (en) 2004-07-21
JP2012138604A (en) 2012-07-19
US6586304B2 (en) 2003-07-01
EP0907967A2 (en) 1999-04-14
US6459610B1 (en) 2002-10-01
US20020048883A1 (en) 2002-04-25
JP5476619B2 (en) 2014-04-23
US5929476A (en) 1999-07-27
JP2004104135A (en) 2004-04-02
JP5629872B2 (en) 2014-11-26
KR100519127B1 (en) 2005-10-04
AU3492997A (en) 1998-01-07
JP2000513502A (en) 2000-10-10
JP2008124519A (en) 2008-05-29
KR20040000407A (en) 2004-01-03

Similar Documents

Publication Publication Date Title
WO1997049134A3 (en) Soi-transistor circuitry employing soi-transistors and method of manufacture thereof
MY118306A (en) Self- aligned diffused source vertical transistors with stack capacitors in a 4f- square memory cell array
US4651183A (en) High density one device memory cell arrays
US5281837A (en) Semiconductor memory device having cross-point DRAM cell structure
US6373084B2 (en) Shared length cell for improved capacitance
DE59609550D1 (en) Vertical transistor DRAM memory cell and method of manufacturing the same
TW325598B (en) Electrically programmable memory cell arrangement and method for its production
KR940006267A (en) Dynamic semiconductor memory device and manufacturing method
EP0366882A3 (en) An ultra dense DRAM cell array and its method of fabrication
KR960016773B1 (en) Buried bit line and cylindrical gate cell and forming method thereof
TW375795B (en) Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array
KR950034790A (en) Semiconductor device and manufacturing method
KR910019237A (en) Manufacturing method of capacitor DRAM cell
KR960005946A (en) Separation structure for semiconductor device and method of forming the isolation structure
US6396096B1 (en) Design layout for a dense memory cell structure
EP1684342A3 (en) Method for manufacturing a semiconductor memory device
WO2001026139A3 (en) Dram bit lines and support circuitry contacting scheme
US6339240B1 (en) Semiconductor memory device
JPH02285680A (en) Non-volatile mos semiconductor storage device
TW428319B (en) High-density contactless flash memory on silicon above an insulator and its manufacturing method
DE3875080D1 (en) THREE-DIMENSIONAL 1-TRANSISTOR CELL ARRANGEMENT FOR DYNAMIC SEMICONDUCTOR STORAGE WITH TRENCH CAPACITOR AND METHOD FOR THEIR PRODUCTION.
KR970067851A (en) Ferromagnetic nonvolatile memory cell and memory cell formation method
TW353805B (en) Semiconductor device and its manufacturing method
ATE183335T1 (en) SEMICONDUCTOR ARRANGEMENT WITH SELF-ALIGINATED CONTACTS AND METHOD FOR PRODUCING SAME
TW348313B (en) Process for producing semiconductor integrated circuit device

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AL AM AT AU AZ BA BB BG BR BY CA CH CN CU CZ DE DK EE ES FI GB GE GH HU IL IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT UA UG UZ VN YU ZW AM AZ BY KG KZ MD RU TJ TM

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH KE LS MW SD SZ UG ZW AT BE CH DE DK ES FI FR GB GR IE IT LU MC NL PT

AK Designated states

Kind code of ref document: A3

Designated state(s): AL AM AT AU AZ BA BB BG BR BY CA CH CN CU CZ DE DK EE ES FI GB GE GH HU IL IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT UA UG UZ VN YU ZW AM AZ BY KG KZ MD RU TJ TM

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): GH KE LS MW SD SZ UG ZW AT BE CH DE DK ES FI FR GB GR IE IT LU MC NL PT

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 1019980710459

Country of ref document: KR

WWE Wipo information: entry into national phase

Ref document number: 1997931250

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 1997931250

Country of ref document: EP

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

NENP Non-entry into the national phase

Ref country code: CA

WWP Wipo information: published in national office

Ref document number: 1019980710459

Country of ref document: KR

WWG Wipo information: grant in national office

Ref document number: 1019980710459

Country of ref document: KR

WWR Wipo information: refused in national office

Ref document number: 1997931250

Country of ref document: EP

WWW Wipo information: withdrawn in national office

Ref document number: 1997931250

Country of ref document: EP