WO1998005066A2

WO1998005066A2 - Methods and apparatus for the in-process detection and measurement of thin film layers

Info

Publication number: WO1998005066A2
Application number: PCT/US1997/013373
Authority: WO
Inventors: Paul Holzapfel; Robert F. Allen; Warren Lin; James Schlueter; Chris Karlsrud
Original assignee: Speedfam Corporation
Priority date: 1996-07-26
Filing date: 1997-07-23
Publication date: 1998-02-05
Also published as: TW386276B; WO1998005066A3

Abstract

The present invention provides methods and apparatus which permits in-process, in-situ, substantially real time measurement of the actual thickness of a surface layer of a work piece, e.g., a semiconductor wafer. A probe (316) is disposed proximate to the outer perimeter of a polishing pad (126) on a CMP table, such that the probe establishes optical contact with the wafer surface (304) as a portion of the wafer extends beyond the outer perimeter (330) of the polishing pad (126). A nozzle (312) may be provided to apply a stream of compressed air at the disk surface under inspection to thereby remove excess slurry from the local region of the workpiece being inspected. A broad band light source (322) is employed in conjunction with a fiber optic cable (318) to direct light at the wafer surface. A bifurcated probe is employed such that the light applied to the workpiece surface is reflected back to and captured by a corresponding optical sensor connected to a fiber optic cable (320). The captured reflected light received by the receptor sensor and fiber optic cable assembly is applied to a photospectrum meter (324) which analyzes the reflected light. An output signal from the photospectrum meter is transmitted to a processor (326) which includes a smart algorithm configured to calculate the thickness of the surface layer. Alternatively, the reflective characteristics of the semiconductor layers may affect the nature of the reflected signal; changes in the reflected signal can be detected to indicate when a metallic layer has been removed from an oxide layer.

Description

METHODS AND APPARATUS FOR THE IN-PROCESS DETECTION AND MEASUREMENT OF THIN FILM LAYERS

Technical Field

The present invention relates, generally, to methods and apparatus for measuring the thickness of different material layers on a semiconductor workpiece during the planarization process and, more particularly, to a technique for transmitting a broad band light source at the surface of the workpiece to be measured, and analyzing the reflection of the light source to obtain real time layer thickness information. Background Art and Technical Problems The production of integrated circuits begins with the creation of high-quality semiconductor wafers. During the wafer fabrication process, the wafers may undergo multiple masking, etching, and dielectric and conductor deposition processes. Because of the high- precision required in the production of these integrated circuits, an extremely flat surface is generally needed on at least one side of the semiconductor wafer to ensure proper accuracy and performance of the microelectronic structures being created on the wafer surface. As the size of the integrated circuits continues to decrease and the density of microstructures on an integrated circuit increases, the need for precise wafer surfaces becomes more important. Therefore, between each processing step, it is usually necessary to polish or planarize the surface of the wafer to obtain the flattest surface possible. For a discussion of chemical mechanical planarization (CMP) processes and apparatus, see, for example, Aral, et al. , U.S. Patent No. 4,805,348, issued February, 1989; Arai. et al. , U.S. Patent No. 5,099,614, issued March, 1992; Karlsrud et al. , U.S. Patent No. 5,329,732, issued July, 1994; Karlsrud, U.S. Patent No. 5,498,196, issued March, 1996; and Karlsrud et al. , U.S. Patent No. 5,498,199, issued March, 1996. Such polishing is well known in the art and generally includes attaching one side of the wafer to a flat surface of a wafer carrier or chuck and pressing the other side of the wafer against a flat polishing surface. In general, the polishing surface comprises a horizontal polishing pad that has an exposed abrasive surface of, for example, cerium oxide, aluminum oxide, fumed precipitated silica or other particulate abrasives. Polishing pads can be formed of various materials, as is known in the art, and which are available commercially. Typically, the polishing pad may be a blown polyurethane, such as the IC and GS series of polishing pads available from Rodel Products Corporation in Scottsdale, Arizona. The hardness and density of the polishing pad depends on the material that is to be polished. During the polishing or planarization process, the workpiece or wafer is typically pressed against the polishing pad surface while the pad rotates about its vertical axis. In addition, to improve the polishing effectiveness, the wafer may also be rotated about its vertical axis and oscillated back and forth over the surface of the polishing pad. It is well known that polishing pads tend to wear unevenly during the polishing operation, causing surface irregularities to develop on the pad. To ensure consistent and accurate planarization and polishing of all workpieces, these irregularities must be removed.

A well prepared polishing pad facilitates the uniform, high-precision planarization of workpieces. This is particularly important when polishing down d e oxide and metalic layers on a semiconductor wafer during the manufacture of integrated circuit chips.

Presently known methods for measuring the thickness of an oxide layer on a semiconductor wafer involve measuring the total thickness of an applied oxide layer, determining the desired diickness of the oxide layer after planarization, calculating the pressure to be applied during the polishing or planarization process, and further calculating the approximate time required to remove a predetermined amount of oxide layer for a given pressure and slurry combination. Once d e desired removal rate (often expressed in nanometers per minute) is ascertained, a statistical inference is employed to determine die approximate amount of time necessary to remove a desired amount of material. After the wafers have undergone planarization for an amount of time calculated to remove a desired diickness of the oxide layer, the workpieces are removed from me machine and me actual diickness of the oxide layer is measured, for example, through the use of laser interferometric techniques. If it is determined diat the oxide layer is still too thick after initial planarization, the workpieces must be reinstalled onto me CMP machine for further oxide layer removal. If, on me other hand, an excessive amount of oxide layer has been removed, it may be necessary to scrap the disks, resulting in substantial unnecessary costs.

Further the methods of calculating oxide layer thicknesses currently known in the art are only useful for non-patterned wafers, and generally do not work on wafers having a substantially repeating surface pattern.

Other techniques may be employed to determine when me layer of tungsten, or other metallic material, has been removed from the oxide layer. Prior art methodologies detect the change in polishing pad motor current, which typically changes in response to the exposure of different semiconductor layers. However, this technique is of limited utility where different slurries and other consumable sets are used during d e polishing process. In particular, false trigger may result from an increase or decrease in the surface friction caused by a change in the slurry characteristics rather than by a change in the exposed layer composition. False triggers may also be caused by noise inherent in the polishing system. Accordingly, a technique is needed which accurately measures the oxide layer (and particularly die end point) thickness which overcomes the shortcoming of the prior art. In addition, a technique is needed which accurately detects the removal of a conductor or metalic layer from the oxide substrate layer.

Summary of the Invention Accordingly, it is an advantage of die present invention diat improved metiiods and apparatus for measuring the thickness of layers on workpiece surfaces are provided.

Anou er advantage of die present invention is that it facilitates the in-process, in-situ, substantially real time measurement of the actual thickness of a surface layer of a workpiece under inspection, for example, a semiconductor wafer (either patterned or non-patterned), or me like.

A further advantage is diat the present invention employs a smart algorithm configured to calculate the thickness of the oxide layer from information gathered from light signals reflected from the surface of die wafer.

Anotiier advantage of the present invention is diat the oxide layer diickness as a function of time is displayed on a view screen for convenient observation by the operator of die machine. Additional functionality may be incorporated into die present invention to enable it to accurately predict die amount of time remaining and me planarization pressure needed to achieve an optimum end point oxide layer diickness.

A further advantage is diat die present invention may be alternatively configured to optically detect die endpoint when a metallic layer is removed from the oxide layer during planarization.

Brief Description nf the Drawing Figures

The present invention will hereinafter be described in conjunction with the appended drawing figures, wherein like numerals denote like elements, and: Figure 1 is a perspective view of an exemplary CMP machine upon which the probe of the present invention is suitably installed; Figure 2 is a top view of die CMP machine of Figure 1, showing an exemplary orientation of d e probe assemblies of the present invention;

Figure 3 is a schematic view of a probe in accordance witii the present invention configured to sample die surface of a wafer, including a light source, photospectrum meter, controller, and display;

Figure 4 is an end view of an exemplary bifurcated probe assembly having a plurality of illuminators and a receiver probe;

Figure 5 is a schematic view of the probe of Figures 3 and 4 sampling an individual die structure of a wafer; Figure 6 is a view of one side of a wafer having a plurality of microelectronic die structures disposed diereon;

Figure 7 is a top view of an exemplary embodiment of a wafer carrier lock-in mechanism in accordance with the present invention;

Figure 8 is a side view of die lock-in mechanism of Figure 7; Figure 9 is a side view of die lock-in mechanism of Figures 7 and 8 with a carrier and wafer assembly in operative engagement with die lock-in mechanism;

Figure 10 is a cross sectional depiction of an exemplary semiconductor wafer;

Figure 11 is a schematic view of a probe sampling a metallic layer of the semiconductor wafer shown in Figure 10; Figure 12 shows an exemplary output signal generated in response to me sampling of the metallic layer depicted in Figure 11;

Figure 13 is a schematic view of a probe sampling an oxide layer of me semiconductor wafer shown in Figure 10; and

Figure 14 shows an exemplary output signal generated in response to the sampling of me oxide layer depicted in Figure 13.

Detailed Description of Preferred Exemplary Embodiments

The subject invention relates to the in-process detection of characteristics of a layer on a workpiece using a broad spectrum light source, a photospectrum meter, and a controller including a smart algoridim for translating the output of die photospectrum meter to a human readable display relating to die workpiece being examined. The preferred embodiment set forth herein relates to the detection of oxide layer diickness on a semiconductor wafer (either patterned or non-patterned); it will be appreciated, however, diat the principles of the present invention may be employed to ascertain any number of characteristics associated with a workpiece surface, including end point detection, die detection of surface irregularities, planar ity, and d e like.

Referring now to Figures 1-2, a wafer polishing apparatus 100 is shown embodying me present invention. Wafer polishing apparatus 100 suitably comprises a multiple head wafer polishing machine which accepts wafers from a previous processing step, polishes and rinses die wafers, and reloads the wafers back into wafer cassettes for subsequent processing.

Discussing now the polishing apparatus 100 in more detail, apparatus 100 comprises an unload station 102, a wafer transition station 104, a polishing station 106, and a wafer rinse and load station 108.

In accordance with a preferred embodiment of the invention, cassettes 110, each holding a plurality of wafers, are loaded into the machine at unload station 102. Next, a robotic wafer carrier arm 112 removes the wafers from cassettes 110 and places diem, one at a time, on a first wafer transfer arm 114. Wafer transfer arm 114 then sequentially lifts and moves each wafer into wafer transition section 104. That is, transfer arm 114 suitably places an individual wafer on one of a plurality of wafer pick-up stations 116 which reside on a rotatable table 120 within wafer transition section 104. Rotatable table 120 also suitably includes a plurality of wafer drop-off stations 118 which alternate witii pick-up stations 116. After a wafer is deposited on one of the plurality of pick-up stations 116, table 120 rotates so diat a new station 116 aligns widi transfer arm 114. Transfer arm 114 then places e next wafer on the new empty pick-up station 116. This process continues until all pick-up stations 116 are filled with wafers. In the illustrated embodiment of die invention, table 120 includes five pick-up stations 116 and five drop-off stations 118.

Next, a wafer carrier apparatus 122, comprising individual wafer carrier elements 124, suitably aligns itself over table 120 so diat respective carrier elements 124 are positioned directly above die wafers which reside in respective pick-up stations 116. The carrier apparatus 122 then drops down and picks up the wafers from their respective stations and moves die wafers laterally such mat the wafers are positioned above polishing station 106. Once above polishing station 106, carrier apparatus 122 suitably lowers die wafers, which are held by individual elements 124, into operative engagement widi a polishing pad 126 which sits atop a lap wheel 128. During operation, lap wheel 128 causes polishing pad 126 to rotate about its vertical axis. At the same time, individual carrier elements 124 spin the wafers about their respective vertical axes and oscillate the wafers back and forth across pad 126 (substantially along arrow 133) as they press against the polishing pad. In this manner, me under surface of the wafer is polished or pianarized.

After an appropriate period of time, die wafers are removed from polishing pad 126, and carrier apparatus 122 transports the wafers back to transition station 104. Carrier apparatus 122 then lowers individual carrier elements 124 and deposits the wafers onto drop-off stations 118. The wafers are then removed from drop-off stations 118 by a second transfer arm 130. Transfer arm 130 suitably lifts each wafer out of transition station 104 and transfers diem into wafer rinse and load station 108. In die load station 108, transfer arm 130 holds die wafers while they are rinsed. After a tiiorough rinsing, d e wafers are reloaded into cassettes 132, which then transports die subsequent stations for further processing or packaging.

Although CMP machine 100 is shown having five polishing stations, it will be appreciated d at die present invention may be employed in die context of virtually any number of polishing stations. Moreover, die present invention may also be employed in circumstances where not all of the polishing stations are functioning at a time. For example, many standard wafer cassettes carry twenty-four individual workpieces in a single cassette. Consequendy, because ti ere are often five workpiece chucks on a single CMP machine, often times die last four disks witiiin a cassette are polished at one time, leaving the fifth disk-holder empty.

Widi continued reference to Figure 2, a probe assembly 127 is suitably configured near the outer perimeter edge of polishing pad 126 proximate each carrier element 124. More particularly, in a preferred embodiment of me present invention, each respective carrier element suitably oscillates back and forth along arrow 133; each carrier element 124 also suitably rotates a workpiece about die vertical axis of carrier element 124. At die same time, lap wheel 128 and pad 126 are advantageously configured to rotate about tiieir vertical axis, for example, in a counter clockwise direction as indicated by arrow 134.

In accordance widi a particularly preferred embodiment, each carrier element 124 is suitably configured to periodically extend radially outward from the center of table 126 along arrow 125 such that at least a portion of die outside radius of each workpiece extends beyond the outer edge 137 of table 126. By crossing the outer edge of polishing table 126, surface material tiiicknesses, desirable material removal rates, and die extent of layer removal may be obtained for the workpieces. As a workpiece extends beyond die outer perimeter of the polishing pad, along line 125, die bottom facing surface of die workpiece may be conveniently optically engaged by probe assembly 127, as described in greater detail below in conjunction widi Figure 3.

In accordance witii a further aspect of the present invention, apparatus 100 may be configured widi a probe assembly 129 useful for detecting die presence of a wafer or wafer fragment on polishing pad 126 during die polishing process. In accordance wid tiiis aspect of the invention, if a wafer or wafer fragment is detected on die pad at an inappropriate time, die CMP machine 100 will shut down. A detailed discussion of die operation of probe assembly 129 is discussed in detail in Holzapfel et al., U.S. Patent Application Serial No. 08/683,150, filed on July 17, 1996, and entitled Methods and Apparatus for the In-Process Detection of Workpieces in a CMP Environment, which is incorporated herein by reference.

Referring now to Figure 3, an exemplary embodiment of probe assembly 127, in accordance widi the present invention, suitably comprises a housing 310 having a nozzle 312 through which compressed air is suitably directed at the under surface of a workpiece (e.g. , semiconductor wafer disk) 306, a bifurcated fiber probe 316, a light source 322, a photospectrum analyzer 324, a controller/processor 326, and a display 328.

As best seen in Figure 3, an exemplary workpiece 306 is shown being polished by polishing pad 126 as described above in conjunction widi Figures 1 and 2. For clarity, carrier element 124 and odier components are omitted from Figure 3. Probe assembly 127 is suitably mounted proximate the outer perimeter 330 of pad 126, such diat nozzle 312 may be directed at a bottom surface 304 of workpiece 306 when at least a portion of die workpiece extends off the perimeter edge of polishing pad 126.

In accordance widi a particularly preferred embodiment of e present invention, a supply of compressed air, for example in the range of 0 to 20 PSI and most preferably about 5 PSI, is urged dirough housing 310 and nozzle 312 to clear away slurry from an exemplary region 314 on undersurface 304 under examination. As me compressed air clears away slurry from the underside of die workpiece, probe 316 suitably outputs a broad band (e.g. , white light) light source at region 314; a portion of the light emitted by probe 316 is reflected or scattered back from region 314 and captured by probe 316. In a preferred embodiment, the light output by probe 316 suitably passes through a coll-mating lens 408 which collimates the light (see Figure 5). Thus, while a cross-sectional area of light source (probe) 316 is suitably in die range of 0.1 to 10.0 square millimeters and preferably about 1.0 square millimeter, collimating lens 408 is suitably configured to project the light to cover a region 314 on d e wafer undersurface that suitably comprises an area in the range of about 10.0 to about 30.0 square millimeters, and preferably about 20.0 square millimeters.

More particularly and with continued reference to Figures 3 and 4, probe 316 suitably comprises a plurality of light illuminators 350 and a single receiver probe 352. In accordance widi tiiis aspect of the present invention, probe 316 preferably comprises a plurality of (e.g. six) illuminators 350 suitably configured around a single receiver probe 352 disposed in the center of die illuminators. In accordance widi tiiis aspect of die present invention, illuminators 350 may be suitably be grouped in a hexagonal configuration. The diameter of each illuminator 350 and the receiver probe 352, as shown in Figure 4, is suitably about 100 to about 300 microns and preferably about 200 microns. Accordingly, die diameter of probe 316 is suitably in die range of .1 to 5 millimeters, and preferably about .5 to about 2 millimeters, and most preferably about 1 millimeter. Probe 316 further comprises a transmitter cable 318 through which light is transmitted from light source 322 to illuminators 350 of probe 316 and onto the undersurface of the workpiece. Similarly, probe 316 suitably comprises a receptor cable 320 which receives light from receiver probe 350 and transmits it to photospectrum meter 324. It will be appreciated that the undersurface of the workpiece may be sampled by probe assembly 127 at any desired rate or the sampling may be substantially continuous.

Although die preferred embodiment of light source 322 has been described in accordance with Figures 3 and 4, light source 322 may suitably comprise any source capable of applying a desired light signal (e.g. broadband, narrow band, or substantially monochromatic) to the surface of the workpiece. For example, any suitable source (e.g. a tungsten halogen light source) capable of omitting a broad band light signal, for example in die range of 350 to 2000 nanometers, and most preferably in die range of 400 to 850 nanometers, is acceptable. In accordance widi die present invention, a suitable halogen light source may comprise a model number L73A98, available from die Gilway Corporation of Massachusetts.

Although cables 318 and 320 suitably comprise fiberoptic cables in the preferred embodiment, virtually any conductor may be employed which satisfactorily delivers an appropriate signal (e.g. a light signal) to die workpiece and captures at least a portion of die signal reflected by die workpiece. Moreover, although die preferred embodiment set forth herein employs a light signal, virtually any convenient modality may be employed to interrogate the surface of the workpiece, e.g., an acoustic signal, magnetic signal, or die like.

Photospectrum meter 324 suitably comprises any circuit capable of interpreting me signal reflected from the undersurface of die workpiece. In a preferred embodiment, photospectrum meter 324 suitably comprises a PCMCIA-based photospectrum meter model number PS1000 available from the Mission Peak Optics Company of Fremont, California.

Controller 326 suitably comprises any general purpose controller capable of receiving an output signal 332 from meter 324 and calculating various parameters from signal 332. In die preferred embodiment, controller 326 is suitably configured to interpret signal 332 and diereby derive die diickness of die oxide layer present in region 314 of workpiece 306. In a particularly preferred embodiment, controller 326 suitably comprises any general purpose personal computer, for example a PC, available from the Mission Peaks Optics Company of Fremont, California.

Controller 326 is also suitably configured to output a signal 334 to display terminal 328. In a preferred embodiment, signal 334 is indicative of the diickness of die oxide layer at region 314; it will be understood, however, diat signal 334 may embody any suitable information or characteristics about surface 304 of the workpiece, such diat any number of parameters may be convenientiy displayed on die screen associated widi display module 328. For example, signal 344 may convey information indicative of die removal of a first semiconductor layer from a second semiconductor layer (described below). In die embodiment illustrated in Figure 3, a graph of oxide layer diickness versus time is shown.

With continued reference to Figure 3 display terminal 328 may be suitably configured to display information pertaining to die undersurface of the workpiece. (e.g. , the diickness of die oxide layer or the material composition of me exposed layer) in any desired format. In die thickness versus time graph shown in Figure 3, the remaining processing time necessary to arrive at a desired diickness 340 may be visually assessed by die operator; alternatively, controller 326 may be configured to "predict" die time necessary to arrive at a desired diickness for a given pressure and also to display die remaining time to the operator. Alternatively, the controller may be configured to transmit a second output signal 342 to die main controller of machine 100, for example to vary die pressure or odier operating parameter(s) associated widi die particular carrier element 124 corresponding to die workpiece under inspection. For example, if it is desired diat all workpieces complete their processing at approximately the same time, and wherein one or more of the workpieces are closer to the desired diickness than other workpieces, it may be advantageous to reduce die pressure for those workpieces where less material remains to be removed and/or to increase die pressure for those workpieces where a relatively larger amount of material remains to be removed.

In tiiis regard, die present inventors have determined diat typical desired material removal rates of oxide layers on semiconductor wafers generally range from 1,000-5,000 angstroms per minute, and preferably about 2,500 angstroms per minute. By calculating me differences in diickness over different sampling periods, controller 326 may also be suitably configured to generate a real time or average material removal rate. In accordance widi a preferred embodiment, controller 326 may suitably be configured to output signal 342 to increase or decrease die removal rate, as desired. Widi continued reference to Figure 3, probe assembly 127 may be mounted to machine 100 in any convenient way, for example, by attaching probe assembly 127 to the frame associated widi machine 100 by any suitable fastening mechanism. Indeed, it may be possible to dispose respective probe housings 310 quite close to the surface of the workpiece, for example in me range of 0.1 to 0.5 inches and most preferably about .3 inches from the workpiece. Even though tiiis environment may be sprayed by slurry droplets from time to time, the compressed air ejected from housing 310 by nozzle 312 suitably substantially prevents slurry from entering the housing and corrupting probe 316. One preferred embodiment of an exemplary mounting mechanism is discussed in more detail below in conjunction wid Figures 7-9. In accordance widi a particularly preferred embodiment, probe assembly 127 may be suitably configured to output signal 342 to machine 100 to tiiereby terminate the processing of a particular workpiece when it is determined d at desired diickness 340 has been achieved. In tiiis way, altiiough it still may be desirable to verify die diickness of die oxide layer once the workpieces have been removed, a very high degree of accuracy in die actual diickness of die oxide layer is obtained. In accordance widi tiiis aspect of the present invention, die need to place partially completed disks back onto machine 100 for further material removal is substantially eliminated. Similarly, the risk of removing too much of die oxide layer, tiius degrading die wafers, is also greatiy reduced. In tins respect, die present invention may be alternatively configured to indicate when die oxide layer is initially exposed (described below). The manner in which probe assembly 127 samples and interprets the scattered light signals to determine wafer surface thickness will now be described in conjunction with Figures 5 and 6. Referring now to Figure 6, an exemplary embodiment of a wafer surface comprises a plurality of substantially similar die structures arranged in a rectangular grid pattern. As shown in Figure 5, each individual die structure 406 may comprise in schematic cross section, one or more alternating substrate and oxide layers; for example, a substrate layer 404 and an oxide layer 402. Substrate layer 404 generally comprises a plurality of microelectronic structures substantially defining a substrate topology 405. Because the surface layer or topology 405 of substrate 404 is non-uniform, it is very difficult to accurately determine e diickness of oxide layer 402 at any particular point on the surface of wafer 400. Therefore, to obtain accurate oxide diickness readings, die effect of die non-uniform substrate surface must be minimized or otherwise accounted for. An exemplary wafer surface sampling and analysis method in accordance widi die present invention will now be discussed in greater detail.

In accordance widi a particularly preferred embodiment of the present invention, light is transmitted from illuminators 350 of probe 316 through collimating lens 408 and onto die undersurface of wafer 400. Generally, part of the transmitted light will be reflected or scattered from oxide layer 402 back to receiver probe 352. However, a substantial portion of the light passes through oxide layer 402 and reflects off the substrate layer 404 (and more particularly, me non-uniform surface 405). As the light is reflected off die substrate and oxide layers, it passes back through collimating lens 408, which essentially focuses die reflected light back to receiver probe 352. The reflected light tiien passes to photospectrum meter 324 dirough fiberoptic cable 320. Photospectrum meter 324 then divides die light into discrete bands of predetermined frequency (or wavelengdi) ranges and converts die light frequency signals into a digital output signal 332 which is communicated to processor/controller 326.

In accordance with a preferred embodiment, processor 326 analyses the converted light frequency signals according to die well-known photo-interference technique using Fresnel's Equation to obtain the diickness of die oxide layer at die sampled area of the wafer surface. In accordance widi tiiis aspect of the present invention, the relationship:

4πnd λ may be conveniently solved to obtain the oxide diickness, where d=the oxide diickness; n=tiιe refractive index of die sample material (e.g. die oxide layer); and λ= the wavelengdi of die light.

However, as discussed previously, because the topology of substrate surface 405 is non-uniform, it is very difficult to get an accurate measurement of die thickness of oxide layer 402. Thus, an averaging technique is desirably employed which effectively cancels out many of the effects attributable to the complexity of the substrate layer topology.

The averaging technique will now be discussed in greater detail in conjunction widi Figures 5 and 6. Referring now to Figure 6, as discussed previously, an exemplary embodiment of wafer 400 comprises a plurality of die structures 406, each comprising substantially similar or identical substrate topologies. Because of d e repeating nature of d e die structures, the wafer surface may be advantageously sampled for approximately one full wafer rotation, and die measurements taken during tiiat rotation suitably averaged to largely suppress or even cancel out the effects of the non-uniform topology of the dies. That is, while the sampling of only one die may yield an inaccurate reading of the thickness of the oxide layer, by averaging the sample readings obtained from many similar die structures for one full wafer rotation, the non-uniformity of each die will be effectively canceled out by the averaging technique, tiius giving a more accurate oxide thickness reading.

In accordance widi tiiis aspect of die present invention, probe 316 suitably collects between about 100 and about 300 samples for one complete rotation, and preferably about 200 samples. Further, one complete rotation of the wafer generally takes approximately 2 seconds; thus, the sampling rate of probe 316 is suitably between about 100 to about 300 samples per second and preferably about 200 samples per second.

The data for each sample is transmitted to processor 326 which stores and accumulates the data. After sampling a portion (e.g. region 314) of the wafer for approximately one full wafer rotation, die accumulated data (approximately 200 samples) is averaged and one average oxide diickness is calculated, for example using the aforementioned Fresnel technique. In accordance widi a particularly preferred embodiment of the invention, all the sampled data for one rotation is added togetiier and averaged and tiien the oxide layer thickness is calculated from the averaged data. Alternatively, in accordance widi yet anotiier preferred embodiment of the invention, an oxide diickness may be calculated for each individual data sample, and diereafter an average thickness calculated from all the individually calculated tiiicknesses.

In accordance widi a particularly preferred embodiment, probe assembly 127, and in particular probe 316, is suitably configured to sample the wafer in a substantially circular patii 410 (see Figure 6) so that each die 406 along patii 410 is sampled in a substantially uniform manner. That is, because the die structures on die wafer are in a substantially uniform grid pattern and because die field of view of probe 316 suitably corresponds to approximately one die, die probe is likely to sample a complete die structure (as opposed to simply sampling sections of multiple die structures) as it traverses the wafer in a substantially circular pattern. In accordance widi tiiis aspect of the present invention, a wafer carrier lock-in mechanism (discussed in detail below) may be used to ensure that the field of view of die probe follows a substantially circular patii around die wafer, thus eliminating a spiral reading effect.

Wafer carrier lock-in mechanism 500 will now be discussed in greater detail in conjunction with Figures 7-9. An exemplary embodiment of wafer lock-in mechanism 500 preferably comprises a base 502, a rotatable carrier guide 504, a spring 506 and a stopper 508. Rotatable carrier guide 504 is suitably mounted to base 502 witii a bearing assembly 510 to permit free rotation of guide 504. Further, spring 506 is suitably mounted between base 502 and stopper 508. Finally, probe 316 is securely mounted witiiin base 502 so that the illuminators and receptor probe are pointed upward toward wafer 400 and wafer carrier element 124.

During operation, wafer carrier 124 rotates about its vertical axis and oscillates back and forth across polishing pad 126. As carrier element 124 oscillates across die pad, a portion of the carrier element periodically extends beyond die edge of die pad, contacting rotating carrier guide 504. Carrier guide 504 suitably rotates about bearing 510 as carrier element 124 rotates, thus minimizing friction between the two elements. Once carrier element 124 contacts guide 504, die field of view of probe 316 becomes fixed at a specific radial point on wafer 400. In accordance widi this aspect of the invention, as the carrier and wafer assembly rotate, the field of view of die probe traverses a substantially circular patii around die wafer ensuring relatively accurate readings.

In accordance widi an exemplary embodiment of the present invention, as the carrier and wafer assembly continue to oscillate further out from the pad, die carrier pushes probe 316, guide 504, and base 502 assembly towards stopper 508, compressing spring 506. Then, as the carrier and wafer assembly begin to oscillate back towards die center of polishing pad 126, die tension in spring 506 causes base 502, carrier guide 504, and probe 316 assembly to remain in contact with and to move with the carrier element and wafer, thus maintaining the position of die probe's field of view on die wafer. Accordingly, as die lock-in mechanism 500 moves with me carrier and wafer assembly, the probe maintains a substantially circular field of view around d e wafer as the carrier and wafer rotate and oscillate back and forth across the pad, and dierefore, preventing the probe from sampling along a less desirable spiral path on the surface of the wafer.

As mentioned above, die present invention may also be employed to detect when a first material layer, e.g. , a tungsten or titanium layer, has been removed from a second material layer, e.g., an oxide layer. It should be noted diat die present invention may be suitably adapted to detect semiconductor, conductor, or otiier layers diat may be present on a semiconductor wafer. Semiconductor layers are described herein for illustrative purposes only, and die present invention is not limited to the detection of such layers. Figure 10 is a cross sectional representation of an exemplary semiconductor wafer 600. Of course, the dimensions of wafer 600 are exaggerated for illustrative purposes. Wafer 600 may include a silicon substrate base 602, an oxide (silicon dioxide) layer 604, a titanium layer 606, a titanium nitride layer 608, and a tungsten layer 610. In accordance with conventional semiconductor fabrication techniques, a number of plugs 611 may be formed witiiin wafer 600.

During planarization, the metallic upper layers, e.g., tungsten layer 610, titanium nitride layer 608, and titanium layer 606, are removed from wafer 600, while some material is maintained witiiin die associated plugs 611. Preferably, material removal terminates (or slows down) when oxide layer 604 is exposed. As described above, the present invention may be employed to measure d e thickness of oxide layer 604 to optimize the planarization process. Those skilled in die art will appreciate that die specific layering configuration and die composition of me various layers may vary from wafer to wafer depending on die device being created.

For purposes of die following description, a first region 612 of wafer 600 may be defined as that portion of wafer 600 above oxide layer 604. A second region 614 may be defined as that portion of wafer 600 that includes oxide layer 604, silicon base 602, and any otiier layers (not shown) that may be formed below oxide layer 604. It should be appreciated diat aldiough die transition from titanium layer 606 to oxide layer 604 is described herein, the present invention may be suitably adapted to detect the transition from any two material layers having distinguishable optical reflective characteristics. Such adaptation may require additional or alternative processing and/or die application of different detection algoritiims than those described above.

The metallic layer endpoint detection feature takes advantage of the distinguishable reflective characteristics of the various semiconductor layers within wafer 600. Figure 11 shows probe 316 (see Figures 3 and 5) directing an input interrogation signal 616 at wafer 600. Input signal 616 may be directed toward wafer 600 at an angle of approximately 80 to 100 degrees, and preferably at an angle of approximately 90 degrees, relative to the upper surface 620 of wafer 600. The "metallic" layer 618 shown in Figure 11 is intended to generically indicate any semiconductor material of a metallic composition, e.g. , tungsten, copper, titanium, titanium nitride, or die like. The metallic nature of layer 618 causes input signal 616 to reflect from layer 618.

Figure 12 depicts an exemplary output 622 that may be generated in response to die continued presence of metallic layer 618 and displayed on display terminal 328 (see Figure 3 and accompanying discussion). A flat output (or any other predetermined display or indicator) may indicate that the reflected signal detected at probe 316 is less tiian a predetermined direshold value. Alternatively, d e same output may indicate diat the reflected signal detected at probe 316 has certain detectable characteristics that are distinguishable from a signal reflected from oxide layer 604. For example, the reflected signal itself may have monotonic characteristics when reflected from metallic layer 618 and sinusoidal characteristics when reflected from oxide layer 604 (or a nonmetallic layer).

In accordance widi a further aspect of the present embodiment of the invention, in addition to generating such a display, wafer polishing apparatus 100 may be instructed, by suitable processing and control elements, to continue with die planarization procedure, i.e., to continue removing additional layers or more material from the present layer.

Figure 13 shows probe 316 directing input signal 616 at wafer 600 after the planarization process has exposed oxide layer 604. As shown, the metallic layer 618 has been removed from wafer 600. Altiiough not shown in Figure 13, various plugs 611 formed from tungsten may remain embedded in oxide layer 604 (see, for example, Figure 10). Figure 14 depicts an exemplary output 624 diat may be displayed on display terminal 328 after oxide layer 604 has become exposed. A sinusoidal output (or any other predetermined display or indicator) may indicate diat die reflected signal detected at probe 316 is greater than the predetermined direshold value. Alternatively, the same output may indicate diat the reflected signal detected at probe 316 has certain detectable characteristics diat are distinguishable from a signal reflected from metallic layer 618. For example, the reflected signal may become sinusoidal in namre after the metallic layer 618 has been cleared away and oxide layer 604 becomes the reflective surface. In addition, suitable control processes may cause wafer polishing apparatus 100 to halt the planarization procedure or slow the procedure down such diat subsequent removal of material may be closely monitored.

It should be appreciated diat d e detection of oxide layer 604 in this manner is substantially independent of die amount and type of slurry and otiier consumables that may be present in me CMP environment. Unlike conventional endpoint detection techniques that depend on mechanical characteristics such as polishing pad friction and motor currents, the present invention can effectively detect die removal of a metallic layer without relying upon physical interaction with the system. Those skilled in the art will appreciate diat the present invention may be utilized to detect die transition between any two reflectively distinguishable materials during a removal or planarization process. For example, if required, die processing and display functions of the present invention may be appropriately modified to detect die removal of an oxide layer from a metallic layer, or one metallic layer from another metallic layer.

In summary, the present invention provides improved methods and apparatus for measuring me thickness of layers on semiconductor wafers and otiier workpiece surfaces. The present invention facilitates the in-process, in-situ, substantially real time measurement of the actual thickness of a surface layer of a workpiece under inspection. A smart algorithm is employed to calculate die diickness of the oxide layer from information gathered from light signals reflected from the surface of the wafer. In a preferred embodiment, die oxide layer diickness as a function of time is displayed on a view screen for convenient observation by the operator of the machine. In accordance with a different embodiment of the invention, the present invention may be alternatively configured to optically detect the endpoint when a metallic layer is removed from the oxide layer during the planarization process.

Although the subject invention is described herein in conjunction with die appended drawing figures, it will be appreciated that the invention is not limited to the specific form shown. Various modifications in the selection and arrangement of parts, components, and processing steps may be made in the implementation of die invention. For example, although a preferred embodiment is set forth in which a tungsten halogen light source is used in connection widi fiberoptic conductors, it will be appreciated diat virtually any interrogation signal may be employed dirough appropriate conductors, such that in-process, in-situ monitoring of workpiece surface parameters are made available for analyses. Moreover, although the light source, photospectrum meter, controller, and terminal display are illustrated in Figure 3 in schematic form, it will be appreciated that only the probe 316 need be disposed proximate the workpieces various of die other components, including die light source, photospectrum meter, controller, and screen display may be disposed remotely from the workpiece, as desired. These and other modifications may be made in the design and arrangement of the various components which implement the invention without departing from the spirit and scope of die invention as set forth in the appended claims.

Claims

CLAIMS.

1. An apparatus for measuring the thickness of an oxide layer on a semiconductor wafer during CMP processing of said wafer, comprising: a probe assembly disposed proximate a polishing pad associated with a CMP machine, such that said probe establishes intermittent communication with said wafer as said wafer is processed on said polishing pad; a signal source associated widi said probe assembly, configured to direct an interrogation signal at a location on a surface of said wafer while said wafer is rotating, wherein said location may be any location on the surface of said wafer; a receptor configured to capture a portion of said interrogation signal which is reflected from the surface of said wafer; and a processor configured to process said capmred interrogation signal and generate an output indicative of a parameter associated with said wafer; wherein said apparatus samples a plurality of said locations on die surface of said wafer using a plurality of said interrogation signals, and wherein said output is an average output calculated by said processor from said plurality of said interrogation signals.

2. The apparatus of claim 1, wherein said parameter corresponds to a diickness of an oxide layer on die surface of said wafer.

3. The apparatus of claim 1 , wherein said signal source comprises a white light source.

4. The apparatus of claim 3, wherein said processor comprises a photospectrum meter for processing said capmred light signal, and a controller for calculating said parameter based on d e output of said photospectrum meter.

5. The apparatus of claim 1, further comprising a display terminal for displaying a human readable output indicative of said parameter associated with said wafer.

6. The apparatus of claim 1 , further comprising a nozzle disposed proximate said probe and configured to apply compressed air to the surface of said wafer in the vicinity of said probe.

7. A method for measuring die thickness of a layer on the surface of a workpiece in a CMP process, comprising the steps of: (a) rotating and moving said workpiece on a surface of a rotating polishing table such that a portion of said workpiece is caused to intermittently extend beyond an outer perimeter of said polishing table;

(b) disposing a probe proximate said outer perimeter of said polishing table such that said probe engages said workpiece in a noncontacting manner when said portion of said workpiece extends beyond said perimeter of said polishing table;

(c) applying an interrogation signal from said probe to each one of a plurality of locations on said portion of said workpiece while said workpiece is rotating, so diat said plurality of locations on said portion of said workpiece are sampled, wherein said plurality of locations may be any location on said portion of said workpiece;

(d) capturing a portion of said interrogation signals reflected from each of said plurality of locations on said workpiece; and

(e) analyzing said reflected interrogation signals from each of said plurality of locations on said workpiece and calculating a real time output parameter pertaining to said workpiece, wherein said output parameter is an average output parameter calculated from said interrogation signals.

8. The method according to claim 7, wherein said probe is configured to optically engage said workpiece.

9. The apparatus of claim 1, wherein said apparatus samples said plurality of locations on die surface of said wafer for one complete revolution of said wafer.

10. The apparatus of claim 9, wherein said apparatus samples between 100 and 300 locations on the surface of said wafer during said one complete revolution of said wafer.

11. The apparatus of claim 10, wherein said sampling rate of said probe is about 50 to 150 samples per second.

12. The apparatus of claim 1 , wherein said location is a patterned die structure on said wafer.

13. The apparatus of claim 2, wherein the thickness of the oxide layer is an average thickness of the oxide layer on die surface of said wafer, and is calculated by first averaging said interrogation signals to create an average interrogation signal value and tiien calculating die average thickness of the oxide layer from the average interrogation signal value.

14. The apparatus of claim 2, wherein the thickness of the oxide layer is an average thickness of die oxide layer on the surface of said wafer, and is calculated by first calculating an oxide layer diickness value for each of said interrogation signals and tiien averaging the calculated oxide layer diickness values to derive an average thickness of the oxide layer.

15. The apparatus of claim 3 , wherein said light source is a white light source .

16. The apparatus of claim 15, wherein said light source is a tungsten halogen light source.

17. The apparatus of claim 1, wherein said output from said processor is transmitted to a CMP system processor which uses said output in a feedback loop to control wafer process parameters.

18. The apparatus of claim 17, wherein said CMP system processor uses said output to calculate an average material removal rate for said wafer.

19. The apparatus of claim 18, wherein said CMP system processor calculates an estimated time to finish processing of said wafer based on said average material removal rate.

20. The apparatus of claim 18, wherein said CMP system processor causes at least one processing parameter to vary, thereby changing said average material removal rate.

21. The apparatus of claim 18, wherein said CMP system processor causes a wafer rotation rate to vary, thereby changing said average material removal rate.

22. The apparatus of claim 17, wherein said output corresponds to an oxide layer thickness on die surface of said wafer, and said CMP system processor is configured to stop processing of said wafer when said oxide layer reaches a desired diickness.

23. The method of claim 7, wherein step (c) is performed for one complete revolution of said workpiece.

24. The method of claim 23, wherein the surface of said workpiece is sampled at between 100 and 300 locations during said one complete revolution of said workpiece.

25. The method of claim 7, wherein said output parameter corresponds to a thickness of an oxide layer on the surface of said workpiece, and wherein step (e) further comprises the steps of : averaging said interrogation signals from each of said plurality of locations on said workpiece to create an average interrogation signal value; and calculating an average diickness of die oxide layer from die average interrogation signal value.

26. The method of claim 7, wherein said output parameter corresponds to a thickness of an oxide layer on the surface of said workpiece, and wherein step (e) further comprises the steps of : calculating an oxide layer thickness value for each of said interrogation signals; and averaging the calculated oxide layer thickness values to derive an average thickness of the oxide layer.

27. An apparatus for measuring the thickness of an oxide layer on a semiconductor wafer during CMP processing of said wafer, comprising: a probe assembly disposed proximate a polishing pad associated witii a

CMP machine, wherein said probe assembly establishes intermittent communication with said wafer as said wafer is processed on said polishing pad, said probe assembly comprising: a cluster of a plurality of signal sources configured to direct an interrogation signal at a location on a surface of said wafer while said wafer is rotating, wherein said location may be any location on the surface of said wafer; and a receptor located at the center of said cluster of said plurality of signal sources and configured to capture a portion of said interrogation signal which is reflected from the surface of said wafer; and a processor configured to process said capmred interrogation signal and generate an output indicative of a parameter associated with said wafer; wherein said apparatus samples a plurality of said locations on die surface of said wafer using a plurality of said interrogation signals from said probe, and wherein said output is an average output calculated by said processor from said plurality of said interrogation signals.

28. The apparatus of claim 27, wherein six of said signal sources are disposed around said receptor in a hexagon configuration.

29. In a planarization system configured to process a semiconductor wafer initially having at least a first material layer formed over a second material layer, a method for detecting die removal of said first material layer from said semiconductor wafer during operation of said planarization system, said method comprising the steps of: directing an input signal at a portion of said semiconductor wafer; detecting a reflected signal produced in response to said input signal; analyzing characteristics of said reflected signal; and indicating removal of said first material layer from said semiconductor wafer in response to characteristics of said reflected signal.

30. A method according to claim 29, wherein said indicating step is performed when said reflected signal exhibits monotonic characteristics.

31. A method according to claim 29 , wherein said indicating step is performed when said reflected signal has sinusoidal characteristics.

32. A method according to claim 29, further comprising the step of displaying a human readable output indicative of removal of said first material layer from said semiconductor wafer.

33. A method according to claim 29, further comprising the step of adjusting an operational parameter of said planarization system in response to said indicating step.

34. An apparatus for detecting removal of a first material layer initially formed over a second material layer on a semiconductor wafer during a planarization procedure, said apparatus comprising: means for generating an input signal for establishing optical communication with a surface of said semiconductor wafer during said planarization procedure; a receptor configured to receive a reflected signal produced in response to said input signal, said reflected signal being reflected from said surface of said semiconductor wafer; and a processor configured to process said reflected signal and to produce a first output signal having a first characteristic indicative of the presence of said first material layer and a second output signal having a second characteristic indicative of the presence of said second material layer.

35. An apparatus according to claim 34, wherein said means for generating comprises a substantially white light source.

36. An apparatus according to claim 34, wherein said processor produces said first output signal when said reflected signal is less than a predetermined threshold value.

37. An apparatus according to claim 34, wherein said processor produces said second output signal when said reflected signal exhibits monotonic characteristics.

38. An apparatus according to claim 34, wherein said processor produces said second output signal when said reflected signal has sinusoidal characteristics.

39. An apparatus according to claim 34, further comprising a display terminal for displaying a human readable output indicative of removal of said first material layer from said semiconductor wafer.

40. An apparatus according to claim 34, wherein said semiconductor wafer has a relatively planar upper surface and said means for generating is positioned such that said input signal is directed toward said semiconductor wafer at an angle between 80 and 110 degrees relative to said upper surface.

41. An apparatus according to claim 34, wherein said first material layer comprises a material selected from die group consisting of copper, tungsten, titanium, and titanium nitride.

42. An apparatus according to claim 34, wherein said second material layer comprises an oxide composition.

43. A metiiod for detecting removal of a first material layer initially formed above a second material layer on a semiconductor wafer, said metiiod comprising the steps of: applying an interrogation signal to an exposed portion of said first material layer; conducting a planarization procedure on said first material layer; detecting a signal reflected from said second material layer and produced in response to said interrogation signal, said second material layer having different optical interference characteristics relative to said first material layer; and indicating removal of said first material layer from said semiconductor wafer in response to said signal.

44. A method according to claim 43, further comprising the step of halting said planarization procedure in response to said indicating step.

45. A method according to claim 43, wherein said first material layer comprises a metallic composition and said second material layer comprises an oxide composition.