WO1998007247A1 - Decoder utilizing soft information output to minimize error rates - Google Patents
Decoder utilizing soft information output to minimize error rates Download PDFInfo
- Publication number
- WO1998007247A1 WO1998007247A1 PCT/US1997/014260 US9714260W WO9807247A1 WO 1998007247 A1 WO1998007247 A1 WO 1998007247A1 US 9714260 W US9714260 W US 9714260W WO 9807247 A1 WO9807247 A1 WO 9807247A1
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- WIPO (PCT)
- Prior art keywords
- codewords
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- vector
- decoder
- bit position
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/067—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2933—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using a block and a convolutional code
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3738—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with judging correct decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/45—Soft decoding, i.e. using symbol reliability information
- H03M13/451—Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD]
- H03M13/456—Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD] wherein all the code words of the code or its dual code are tested, e.g. brute force decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6306—Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0065—Serial concatenated codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6331—Error control coding in combination with equalisation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1809—Selective-repeat protocols
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1812—Hybrid protocols; Hybrid automatic repeat request [HARQ]
- H04L1/1816—Hybrid protocols; Hybrid automatic repeat request [HARQ] with retransmission of the same, encoded, message
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Error Detection And Correction (AREA)
- Communication Control (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP97937236A EP0919086B1 (en) | 1996-08-16 | 1997-08-13 | Decoder utilizing soft information output to minimize error rates |
AU39799/97A AU722457B2 (en) | 1996-08-16 | 1997-08-13 | Decoder utilizing soft information output to minimize error rates |
DE69712492T DE69712492T2 (en) | 1996-08-16 | 1997-08-13 | RELIABILITY INFORMATION USING DECODER TO REDUCE ERROR RATE |
JP10509998A JP2000516415A (en) | 1996-08-16 | 1997-08-13 | Decoder using soft information output to minimize error rate |
CA002263444A CA2263444A1 (en) | 1996-08-16 | 1997-08-13 | Decoder utilizing soft information output to minimize error rates |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/699,101 US5968198A (en) | 1996-08-16 | 1996-08-16 | Decoder utilizing soft information output to minimize error rates |
US08/699,101 | 1996-08-16 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1998007247A1 true WO1998007247A1 (en) | 1998-02-19 |
Family
ID=24807935
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1997/014260 WO1998007247A1 (en) | 1996-08-16 | 1997-08-13 | Decoder utilizing soft information output to minimize error rates |
Country Status (10)
Country | Link |
---|---|
US (1) | US5968198A (en) |
EP (1) | EP0919086B1 (en) |
JP (1) | JP2000516415A (en) |
KR (1) | KR20000029992A (en) |
CN (1) | CN1232589A (en) |
AU (1) | AU722457B2 (en) |
CA (1) | CA2263444A1 (en) |
DE (1) | DE69712492T2 (en) |
TW (1) | TW338859B (en) |
WO (1) | WO1998007247A1 (en) |
Cited By (6)
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EP0949779A2 (en) * | 1998-04-06 | 1999-10-13 | Nortel Networks Corporation | Encoding methods and apparatus |
EP1039705A2 (en) * | 1999-03-22 | 2000-09-27 | Siemens Aktiengesellschaft | Method, receiver and radio station for detecting data symbols |
US6247150B1 (en) | 1998-07-03 | 2001-06-12 | Nokia Networks Oy | Automatic retransmission with order of information changed |
EP1540848A1 (en) * | 2000-08-03 | 2005-06-15 | Infineon Technologies AG | Flexible tdma system architecture |
EP1639724A2 (en) * | 2003-07-01 | 2006-03-29 | Thomson Licensing S.A. | Method and apparatus for providing forward error correction |
CN101366251B (en) * | 2006-09-01 | 2012-07-18 | 株式会社东芝 | Soft decision generation in a lattice reduction MIMO system |
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KR100498752B1 (en) * | 1996-09-02 | 2005-11-08 | 소니 가부시끼 가이샤 | Apparatus and method for receiving data using bit metrics |
US6145110A (en) * | 1998-06-22 | 2000-11-07 | Ericsson Inc. | Digital data decoder that derives codeword estimates from soft data |
WO2000026783A1 (en) * | 1998-10-30 | 2000-05-11 | Infineon Technologies Ag | Storage device for storing data and method for operating storage devices for data storage |
US6477200B1 (en) | 1998-11-09 | 2002-11-05 | Broadcom Corporation | Multi-pair gigabit ethernet transceiver |
US6381726B1 (en) * | 1999-01-04 | 2002-04-30 | Maxtor Corporation | Architecture for soft decision decoding of linear block error correcting codes |
US6731700B1 (en) * | 2001-01-04 | 2004-05-04 | Comsys Communication & Signal Processing Ltd. | Soft decision output generator |
US7570576B2 (en) * | 2001-06-08 | 2009-08-04 | Broadcom Corporation | Detection and mitigation of temporary (bursts) impairments in channels using SCDMA |
US6938196B2 (en) * | 2001-06-15 | 2005-08-30 | Flarion Technologies, Inc. | Node processors for use in parity check decoders |
US7673223B2 (en) * | 2001-06-15 | 2010-03-02 | Qualcomm Incorporated | Node processors for use in parity check decoders |
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CN1149803C (en) * | 2001-09-30 | 2004-05-12 | 华为技术有限公司 | Data retransmission method based on bit conversion |
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EP1540848A1 (en) * | 2000-08-03 | 2005-06-15 | Infineon Technologies AG | Flexible tdma system architecture |
EP1540848B1 (en) * | 2000-08-03 | 2009-02-11 | Infineon Technologies AG | Flexible tdma system architecture |
EP1639724A2 (en) * | 2003-07-01 | 2006-03-29 | Thomson Licensing S.A. | Method and apparatus for providing forward error correction |
EP1639724A4 (en) * | 2003-07-01 | 2011-09-07 | Thomson Licensing | Method and apparatus for providing forward error correction |
CN101366251B (en) * | 2006-09-01 | 2012-07-18 | 株式会社东芝 | Soft decision generation in a lattice reduction MIMO system |
Also Published As
Publication number | Publication date |
---|---|
EP0919086A1 (en) | 1999-06-02 |
KR20000029992A (en) | 2000-05-25 |
AU3979997A (en) | 1998-03-06 |
CA2263444A1 (en) | 1998-02-19 |
DE69712492D1 (en) | 2002-06-13 |
JP2000516415A (en) | 2000-12-05 |
AU722457B2 (en) | 2000-08-03 |
DE69712492T2 (en) | 2002-11-28 |
EP0919086B1 (en) | 2002-05-08 |
US5968198A (en) | 1999-10-19 |
TW338859B (en) | 1998-08-21 |
CN1232589A (en) | 1999-10-20 |
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