WO1999029105A1 - Frame conversion - Google Patents
Frame conversion Download PDFInfo
- Publication number
- WO1999029105A1 WO1999029105A1 PCT/IB1998/001519 IB9801519W WO9929105A1 WO 1999029105 A1 WO1999029105 A1 WO 1999029105A1 IB 9801519 W IB9801519 W IB 9801519W WO 9929105 A1 WO9929105 A1 WO 9929105A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- frame
- signal
- image signal
- image
- frame conversion
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/91—Television signal processing therefor
- H04N5/92—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
- H04N5/9201—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving the multiplexing of an additional signal and the video signal
- H04N5/9205—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving the multiplexing of an additional signal and the video signal the additional signal being at least another television signal
Definitions
- the invention relates to a frame converting device having a function to continuously output a plurality of image signals in a synchronized state while switching the image signals from a plurality of asynchronous inputs, and a function to extract a desired one of the continuous image signals from such plural inputs and outputs the extracted signal, and particularly, to improvement of a monitoring function when reproducing a recorded signal.
- a known image switcher switches image signals from a plurality of cameras and the like and outputs the signals as one image signal.
- the input image signals from the cameras are often asynchronous with each other, but the disturbance of synchronous signals in the output image signals is inconvenient.
- all the input image signals are synchronized in advance by using a camera having a TBC (Time Base Corrector) function. Otherwise, asynchronous-synchronous conversion must be performed for each input by using a frame-converting device having a frame memory.
- a camera having the TBC function is expensive, and therefore it is difficult to use the camera in a low-price route.
- the number of frame memories is the same as that of input image signals. While an image signal is stored into one of the frame memories, reading from another frame memory is performed.
- this type of device selects a either one of a first operation to switch the image signals from the plurality of cameras to outputs them as one image signal and to perform monitor display or VCR recording, or a second operation to extract a desired image signal from image signals from the plurality of cameras, switched to form one signal, and reproduced on a VCR or the like, and to perform display based on the extracted signal on the monitor.
- the number of frame memories must be the same as that of input image signals. This increases the price of the device.
- the monitor display, and the VCR recording operation and cannot be performed in parallel to the VCR reproduction operation.
- the present invention has been made to solve or at least mitigate the above- described problems, and has its object to realize a frame converting device which performs a first operation to continuously output a plurality of image signals in a synchronized state while switching the respective asynchronous image signals, by using fewer frame memories than the number of input image signals, in parallel to a second operation to extract a desired image signal from image signals switched to form one signal, and to output the extracted signal.
- a first aspect of the present invention provides a frame conversion device as recited in claim 1.
- Advantageous embodiments are defined in the dependent claims.
- This frame converting device time-divisionally stores and reads a plurality of image signals by means of less frame-conversion storage means than input image signals while switching the signal input means and the signal output means.
- the device continuously outputs the image signals in a synchronized state while switching a plurality of asynchronous image signals with less frame memories than input signals.
- the device detects the identification signals included in the image signals in frame units, extracts frame timing of an image signal with a predetermined identification signal from the image signals in frame units, stores the image signal of the frame timing, and continuously outputs the image signal.
- the device extracts a desired image signal from image signals switched to form one signal, and outputs the extracted image signal.
- the device has the recording frame-converting unit and the reproduction frame unit, the device can perform these two operations in parallel.
- the frame converting device can record the image signal from the recording frame-converting unit by the VCR, and when the recorded image is reproduced by the VCR, extract a desired image signal from image signals switched to form one signal by the reproduction frame unit.
- Fig. 1 is a block diagram of a first embodiment of a frame conversion device according to the invention
- Fig. 2 is a block diagram of a second embodiment of a frame conversion device according to the invention.
- Fig. 3 is a time chart that, shows an operation statement of a frame conversion device as shown in Fig. 2.
- reproduction controlling part 45 frame memory 46: D/A converter
- Fig. 1 is a block diagram showing the construction of a frame-converting device according to respective embodiments of the present invention.
- the device comprises a recording frame-converting unit having two routes, i.e., a first route (route A) 10 and a second route (route B) 20, each route having four inputs, and a reproduction frame unit 40.
- the frame converting device of the present invention comprises the recording frame-converting unit and the reproduction frame unit 40 which operate independently of each other.
- reference numeral 1 denotes a CPU as control means for controlling respective elements of the device.
- the CPU 1 especially controls switching respective switches and controls writing/reading storage means.
- Numeral 11 denotes a switch as signal input means for switching inputs of four image signals CAM1 to CAM4 (television cameras 1 to 4).
- Numeral 13 denotes an A/D converter that converts an image signal passed through the switch 11 into a digital image signal.
- Numeral 14 denotes an identification signal supply unit which supplies an identification signal (ID1 to ID4) to a non-image area (vertical retrace period or the like) of the digital image signal so as to identify from which camera the signal comes
- the identification signal supply unit 14 includes identification signal generators (ID_1 generator to ID_4 generator) for generating the respective identification signals and a switch 15
- Numeral 16 denotes a frame memory as storage means for storing a plurality of switched digital image signals respectively in frame units Note that the frame memory 16 preferably is having independently operative input port and output port switches a memory
- Numeral 17 denotes a D/A converter that D/A converts the digital image signal read from the frame memory 16 into an analog image signal Note that the switch 11 to the D/A converter 17 constructs the first route (route A)
- Numeral 21 denotes a switch as signal input means for switching input of four image signals CAM5 to CAM8 (cameras 5 to 8)
- Numeral 23 denotes an A/D converter that converts the image signal passed through the switch 21 into a digital image signal
- Numeral 24 denotes an identification signal supply unit which supplies an identification signal (ID5 to ID8) to a non-image area (vertical retrace period or the like) of the digital image signal so as to identify from which camera the signal comes
- the identification signal supply unit 24 includes identification signal generators (ID 5 generator to ID_8 generator) for generating the respective identification signals and a switch 25
- Numeral 26 denotes a frame memory as storage means for storing a plurality of switched digital image signals respectively in frame units Note that the frame memory 26 preferably is having independently operative input port and output port such as a memory
- Numeral 27 denotes a D/A converter that D/A converts the digital image signal read from the frame memory 26 into an analog image signal Note that the switch 21 to the D/A converter 27 constructs the second route (route B)
- numeral 31 denotes a monitor output switch as signal output means for alternately reading an image signals stored in the respective frame memories 16 and 26 by alternately switching the route A and the route B and outputting them
- numeral 32 denotes a VCR output switch for outputting image signals for recording in an external VCR, as signal output means for alternately reading image signals stored in the respective frame memories 16 and 26 by alternately selecting the route A and the route B outputting them
- Numeral 41 denotes an A/D converter which A/D converts the image signal, that has been sent from the recording frame-converting unit then recorded by the VCR and reproduced by the VCR.
- Numeral 42 denotes an ID detector that detects the identification signal included in the A D converted digital image signal.
- Numeral 43 denotes an operation unit for operation of selection to extract a desired image signal.
- Numeral 44 denotes a reproduction controller which read/write controls the frame memory 45 based on the detected identification signal and the operation of selection, and controls a channel display on an on-screen display in accordance with the detected identification signal.
- the frame memory 45 is used for storing a desired image signal to reproduce under the control of the reproduction controller 44.
- Numeral 46 denotes a D/A converter that D/A converts the digital image signal read from the frame memory 45 into an analog image signal.
- Numeral 47 denotes an on-screen display unit (OSD) which superimpose-outputs a channel display in accordance with the identification signal on the analog image signal, under the control of the reproduction controller 44. Note that the on-screen display unit 47 comprises a character generator, a superimpose circuit and the like.
- the frame converting device having the above construction can continuously output synchronized image signals by storing respective asynchronous image of eight inputs in the recording frame-converting unit into two frame memories. Further, in parallel to this operation, the device detects the identification signals included in the image signals in frame units, extract frame timing of an image signal with a predetermined identification signal from the image signals in frame units, and the image signal of the frame timing and continuously outputs them. Thus, the device can extract a desired image signal from image signals switched to form one signal and outputs them.
- the operation will be described with reference to a timing chart.
- the CPU 1 generates a reference synchronizing signal for operating the respective elements of the device.
- the reference synchronizing signal may be a synchronizing signal independent of CAM1 to CAM4 or may be a synchronizing signal synchronized with any of CAMl to CAM4.
- a synchronizing signal of the signal CAMl is used as the reference synchronizing signal (Fig. 3(a)).
- the CPU 1 supplies a select A signal to the switch 11 for switching the input in the route A.
- the select A signal is used to alternately select the image signal from the CAMl and the image signal from the CAM2, in two-frame units.
- the CPU 1 supplies a select B signal to the switch 21 for switching the input in the route B.
- the select B signal is used to alternately select the image signal from the CAM3 and the image signal from the CAM4, in two-frame units.
- the select B signal is one-frame phase shifted from the select A signal. In this case, as the select A signal and the select B signal are switched in two- frame units, the asynchronous and inconstant timing image signal for one frame is included in any one of two frame periods.
- the switch 11 when the switch 11 is on the CAMl side in accordance with the select A signal (Fig. 3(b)), the image signal of the CAMl is passed through the switch 11 and converted by the A/D converter 13 into a digital image signal at a timing within the two-frame periods.
- the identification signal ID_1 from the switch 15 have been switched in accordance with the select A signal, is supplied within the retrace period of the digital image signal.
- the signal is stored into the frame memory 16 (CAMl in Fig. 3(c)).
- the switch 11 when the switch 11 is switched to the CAM2 side in accordance with the select A signal, the image signal to the CAM2 is passed through the switch 11 and converted by the A/D converter 13 into a digital image signal at a timing within the two-frame periods.
- the identification signal LD_2 from the switch 15 have been switched in accordance with the select A signal, is supplied within the retrace period of the digital image signal.
- the signal is stored into the frame memory 16 (CAM2 in Fig. 3(c)). Further, when the switch 11 is switched to the CAM3 side in accordance with the select B signal (Fig.
- the image signal of the CAM3 is passed through the switch 21 and converted by the A/D converter 23 into a digital image signal at a timing within the two- frame periods.
- the identification signal ID_3 from the switch 25, have been switched in accordance with the select B signal, is supplied within the retrace period of the digital image signal.
- the signal is stored into the frame memory 26 (CAM3 in Fig. 3(e)).
- the switch 21 is switched to the CAM4 side in accordance with the select B signal, the image signal of the CAM 4 is passed through the switch 21 and converted by the A/D converter 23 into a digital image signal at a timing within the two-frame periods.
- the identification signal ID 4 from the switch 25, switched in accordance with the select B signal is supplied which the retrace period of the digital image signal.
- the signal is stored into the frame memory 26 (CAM4 in Fig. 3(c)).
- reading from the frame memory 16 is performed at a timing of the last one frame within the respective two frame periods of the select A signal, based on the synchronizing signal (Fig. 3(a)). That is, when the select A signal is the CAMl in the last one frame period of the CAMl, the digital image signal of the CAMl is read from the frame memory 16 (CAMl in Fig. 3(f)). Further, when the select A signal in the last one frame period of the CAM2, the digital image signal of the CAM2 is read from the frame memory 16 (CAM2 in Fig. (f)). Note that the read digital image signal is converted by the D/A converter 17 into an analog image signal.
- reading from the frame memory 26 is performed at a timing of the last one frame within the respective two frame periods of the select B signal, based on the synchronizing signal (Fig. 3(a)). That is, when the select B signal is in the last one frame period of the CAM3, the digital image signal of the CAM3 is read from the frame memory 26 (CAM3 in Fig. 3(g)). Further, when the select B signal is in the last one frame period of the CAM4, the digital image signal of the CAM4 is read from the frame memory 26 (CAM4 in Fig. (g)). Note that the read digital image signal is converted by the D/A converter 27 into an analog image signal. Then, the switch 31 is controlled to be switched for each one frame in synchronization with the synchronizing signal (Fig. 3(a)). As shown in Fig. 3(h), as the monitor output, an image signal in a synchronized state for each one frame, as CAMl CAM2 CAM3 CAM4.... is outputted.
- the switch 32 is controlled to be switched for each one frame in synchronization with the synchronizing signal (Fig. 3(a)).
- Fig. 3(h) As shown in Fig. 3(h), as the VCR output, an image signal in a synchronized state for each one frame, as CAMl CAM2 CAM3 CAM4.... is outputted.
- the monitor display is performed on an external display or the like by using the image signal.
- the frame converting can device continuously outputs sequentially switched image signals in a synchronized state by storing four asynchronous output image signals into two frame memories.
- the recording is made by the external VCR based on the image signal.
- the recording of the external VCR is continuously made.
- the respective image signals are provided with the identification signal, it is possible to superpose a camera number or the like on a displayed image, for example, by utilizing the identification signals without recording character information indicative of the camera number or the like on a recording medium for the VCR, on the display device side which receives the monitor output or the VCR device side which receives the VCR output. Note that this construction can prevent miss of image information on the recording medium in comparison with a case of recording character information.
- the VCR device it is possible to extract only an image of a desired camera from a signal recorded on a tape. That is, is reproduced the image tape where the signal from the recording frame-converting unit is recorded, and the reproduced image signal is supplied to a VCR input (the input side of the A D converter 41).
- Fig. 3(i) shows the image signal reproduced in this case. Note that input of the image signal into the A/D converter 41 is made independently of the operation of the recording frame-converting unit.
- the reproduction controller 44 refers to the result of detection by the ID detector 42. Then the reproduction controller 44 performs read/write control on the frame memory 45, such that if the identification signal of the signal CAMl has been detected, the signal is written into the frame memory 45, on the other hand, if the identification signal of other signal than the CAMl, the selected signal is read from the frame memory 45 (Fig. 3(j)). Then, the digital image signal read from the frame memory 45 is D/A converted and outputted as an analog image signal.
- the on-screen display unit 47 display indicating that the image is based on the signal of the CAMl (channel display) is superimposed at a predetermined position in the image.
- the image signal of the CAMl selected from the operation unit 43 is extracted, and continuously outputted to a PB monitor output.
- the PB monitor output is obtained independently of the operation of the recording frame-converting unit, the VCR recording can be performed in parallel to the VCR reproduction.
- the CAM input image signals are in an asynchronous state, however, even if synchronous image signals are inputted, the operation can be made ⁇ vithout any problem.
- the asynchronous image signals from cameras have been used as the CAMl to CAM4, however, devices which generate various image signals can be employed as well as the television cameras.
- the CAMl is extracted in the reproduction frame unit 40, however, the image signal may be switched for another CAM image signal at arbitrary timing. Further, it may be arranged such that, if any operation has not been performed since the power was turned on, display is performed based on a predetermined image signal or an image signal with the least number.
- display may be performed by switching the signals as CAMl CAM2 CAM3 CAM4 CAMl.... in predetermined second (a predetermined number of frames) units. That is, if the image signal from the VCR in Fig. 3(i) is used, the image signal is switched for each one frame and the display cannot be visible. However, if display is switched every several seconds, the situation of respective CAM inputs can be obtained.
- the frame converting device described in this specification time-divisionally stores and reads a plurality of image signals with respect to a plurality of storage means fewer than the input image signals while switching the signal input means and the signal output means at predetermined timing.
- the device continuously outputs the image signals in a synchronized state while switching the asynchronous image signals.
- the frame converting device detects identification signals included in the image signals in frame units, extract frame timing of an image signal with a predetermined identification signal from the image signals in frame units, and stores and continuously outputs the image signal of the frame timing.
- the device extracts and outputs a desired image signal from image signals switched to form one signal.
- the frame converting device of the present invention comprises a recording frame-converting unit and a reproduction frame unit
- the two conversion processing operations can be realized, independently, and further in parallel in accordance with necessity, by one frame converting device, without preparing a frame converting device for recording and a frame converting device for reproduction.
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP98942978A EP0956698A1 (en) | 1997-11-28 | 1998-10-01 | Frame conversion |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9341883A JPH11164202A (en) | 1997-11-28 | 1997-11-28 | Frame converter |
JP9/341883 | 1997-11-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1999029105A1 true WO1999029105A1 (en) | 1999-06-10 |
Family
ID=18349487
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB1998/001519 WO1999029105A1 (en) | 1997-11-28 | 1998-10-01 | Frame conversion |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0956698A1 (en) |
JP (1) | JPH11164202A (en) |
CN (1) | CN1251240A (en) |
WO (1) | WO1999029105A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107545863A (en) * | 2017-08-24 | 2018-01-05 | 胡艳萍 | Show the method, display frequency regulation and control method and display device of entire image |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4109276A (en) * | 1976-03-19 | 1978-08-22 | Rca Corporation | Memory read/write organization for a television signal processor |
US5341492A (en) * | 1989-06-29 | 1994-08-23 | Fujitsu Limited | Frame conversion circuit including initial value input circuit |
US5552829A (en) * | 1992-02-28 | 1996-09-03 | Samsung Electronics Co., Ltd. | Image signal coding system |
-
1997
- 1997-11-28 JP JP9341883A patent/JPH11164202A/en active Pending
-
1998
- 1998-10-01 WO PCT/IB1998/001519 patent/WO1999029105A1/en not_active Application Discontinuation
- 1998-10-01 EP EP98942978A patent/EP0956698A1/en not_active Withdrawn
- 1998-10-01 CN CN 98803588 patent/CN1251240A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4109276A (en) * | 1976-03-19 | 1978-08-22 | Rca Corporation | Memory read/write organization for a television signal processor |
US5341492A (en) * | 1989-06-29 | 1994-08-23 | Fujitsu Limited | Frame conversion circuit including initial value input circuit |
US5552829A (en) * | 1992-02-28 | 1996-09-03 | Samsung Electronics Co., Ltd. | Image signal coding system |
Also Published As
Publication number | Publication date |
---|---|
CN1251240A (en) | 2000-04-19 |
EP0956698A1 (en) | 1999-11-17 |
JPH11164202A (en) | 1999-06-18 |
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