WO2000004584A3 - Halbleiterbauelement im chip-format und verfahren zu seiner herstellung - Google Patents

Halbleiterbauelement im chip-format und verfahren zu seiner herstellung Download PDF

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Publication number
WO2000004584A3
WO2000004584A3 PCT/DE1999/002118 DE9902118W WO0004584A3 WO 2000004584 A3 WO2000004584 A3 WO 2000004584A3 DE 9902118 W DE9902118 W DE 9902118W WO 0004584 A3 WO0004584 A3 WO 0004584A3
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WO
WIPO (PCT)
Prior art keywords
insulating layer
openings
semiconductor component
production
chip
Prior art date
Application number
PCT/DE1999/002118
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English (en)
French (fr)
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WO2000004584A2 (de
Inventor
Hans-Juergen Hacke
Klaus-Peter Galuschki
Original Assignee
Siemens Ag
Hacke Hans Juergen
Galuschki Klaus Peter
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag, Hacke Hans Juergen, Galuschki Klaus Peter filed Critical Siemens Ag
Priority to EP99947194A priority Critical patent/EP1097478B9/de
Priority to DE59905481T priority patent/DE59905481D1/de
Publication of WO2000004584A2 publication Critical patent/WO2000004584A2/de
Publication of WO2000004584A3 publication Critical patent/WO2000004584A3/de
Priority to US09/761,594 priority patent/US6818090B2/en
Priority to US10/937,418 priority patent/US6973717B2/en

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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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Abstract

Die Erfindung bezieht sich auf ein Halbleiterbauelement im Chip-Format mit einem Chip, der mindestens eine erste Isolierschicht (3) und davon freie elektrische Anschlußflächen (2) aufweist. Auf der ersten Isolierschicht (3) verlaufen Leiterbahnen (5) von den elektrischen Anschlußflächen (2) zu Fußbereichen (10) äußerer Anschlußelemente (12). Eine weitere aufgebrachte Isolierschicht (8) ist mit Durchgangsöffnungen (9) versehen, die von außen zu den Fußbereichen (10) der äußeren Anschlußelemente (12) führen. In den Durchgangsöffnungen (9) befindet sich ein Leitkleber (11), auf den mindestens außen metallene Kügelchen (12) aufgesetzt sind. Das Halbleiterelement kann in den Durchgangsöffnungen (9) anstelle eines Leitklebers auch eine Lotpaste enthalten, auf die metallisierte Kunststoffkügelchen aufgesetzt sind. Die Erfindung bezieht sich ferner auf Verfahren zum Herstellen des beschriebenen Halbleiterbauelementes.
PCT/DE1999/002118 1998-07-14 1999-07-06 Halbleiterbauelement im chip-format und verfahren zu seiner herstellung WO2000004584A2 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP99947194A EP1097478B9 (de) 1998-07-14 1999-07-06 Halbleiterbauelement im chip-format und verfahren zu seiner herstellung
DE59905481T DE59905481D1 (de) 1998-07-14 1999-07-06 Halbleiterbauelement im chip-format und verfahren zu seiner herstellung
US09/761,594 US6818090B2 (en) 1998-07-14 2001-01-16 Semiconductor device in chip format and method for producing it
US10/937,418 US6973717B2 (en) 1998-07-14 2004-09-09 Method for producing a semiconductor device in chip format

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EP1324389A2 (de) 2003-07-02
DE19832706C2 (de) 2000-08-03
DE19832706A1 (de) 2000-01-27
US20010011675A1 (en) 2001-08-09
EP1097478B9 (de) 2004-01-07
EP1097478A2 (de) 2001-05-09
US6818090B2 (en) 2004-11-16
EP1324389A3 (de) 2004-02-18
EP1324389B1 (de) 2008-12-10
US6973717B2 (en) 2005-12-13
EP1097478B1 (de) 2003-05-07
DE59905481D1 (de) 2003-06-12
WO2000004584A2 (de) 2000-01-27
DE59914928D1 (de) 2009-01-22

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