WO2000013208A3 - Selectively doped trench device isolation - Google Patents

Selectively doped trench device isolation Download PDF

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Publication number
WO2000013208A3
WO2000013208A3 PCT/US1999/017812 US9917812W WO0013208A3 WO 2000013208 A3 WO2000013208 A3 WO 2000013208A3 US 9917812 W US9917812 W US 9917812W WO 0013208 A3 WO0013208 A3 WO 0013208A3
Authority
WO
WIPO (PCT)
Prior art keywords
trench
isolation device
selectively doped
device isolation
trench device
Prior art date
Application number
PCT/US1999/017812
Other languages
French (fr)
Other versions
WO2000013208A2 (en
WO2000013208A9 (en
Inventor
David Y Kao
Rongsheng Yeng
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to AU15160/00A priority Critical patent/AU1516000A/en
Priority to EP99957461A priority patent/EP1125326B1/en
Priority to DE69921172T priority patent/DE69921172T2/en
Priority to AT99957461T priority patent/ATE279785T1/en
Publication of WO2000013208A2 publication Critical patent/WO2000013208A2/en
Publication of WO2000013208A3 publication Critical patent/WO2000013208A3/en
Publication of WO2000013208A9 publication Critical patent/WO2000013208A9/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823481MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/763Polycrystalline semiconductor regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/765Making of isolation regions between components by field effect

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Bipolar Transistors (AREA)

Abstract

A selectively doped trench isolation device is provided. The trench isolation device of the preferred embodiment includes a semiconductor substrate having a trench. A thin field oxide layer is grown on the side walls of the trench, and the trench is filled with a heavily doped polysilicon. The work function difference between the substrate and the heavily doped polysilicon increases the field threshold voltage of the gated trench isolation device so that smaller isolation structures can be formed between adjacent active devices in higher density integrated circuits.
PCT/US1999/017812 1998-08-31 1999-08-03 Selectively doped trench device isolation WO2000013208A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
AU15160/00A AU1516000A (en) 1998-08-31 1999-08-03 Selectively doped trench device isolation
EP99957461A EP1125326B1 (en) 1998-08-31 1999-08-03 Selectively doped trench device isolation
DE69921172T DE69921172T2 (en) 1998-08-31 1999-08-03 TRACK INSULATION FOR COMPONENTS WITH SELECTIVE DOTING
AT99957461T ATE279785T1 (en) 1998-08-31 1999-08-03 TRENCH ISOLATION FOR COMPONENTS WITH SELECTIVE DOPPING

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/143,585 1998-08-31
US09/143,585 US6781212B1 (en) 1998-08-31 1998-08-31 Selectively doped trench device isolation

Publications (3)

Publication Number Publication Date
WO2000013208A2 WO2000013208A2 (en) 2000-03-09
WO2000013208A3 true WO2000013208A3 (en) 2000-06-02
WO2000013208A9 WO2000013208A9 (en) 2000-08-17

Family

ID=22504709

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1999/017812 WO2000013208A2 (en) 1998-08-31 1999-08-03 Selectively doped trench device isolation

Country Status (7)

Country Link
US (3) US6781212B1 (en)
EP (2) EP1473766A3 (en)
AT (1) ATE279785T1 (en)
AU (1) AU1516000A (en)
DE (1) DE69921172T2 (en)
TW (1) TWM258414U (en)
WO (1) WO2000013208A2 (en)

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US6781212B1 (en) * 1998-08-31 2004-08-24 Micron Technology, Inc Selectively doped trench device isolation
KR100620218B1 (en) * 2003-12-31 2006-09-11 동부일렉트로닉스 주식회사 Semiconductor device
DE102004028679A1 (en) * 2004-06-14 2006-01-05 Infineon Technologies Ag Isolation grave arrangement
US7371627B1 (en) 2005-05-13 2008-05-13 Micron Technology, Inc. Memory array with ultra-thin etched pillar surround gate access transistors and buried data/bit lines
US7120046B1 (en) 2005-05-13 2006-10-10 Micron Technology, Inc. Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines
US7902598B2 (en) * 2005-06-24 2011-03-08 Micron Technology, Inc. Two-sided surround access transistor for a 4.5F2 DRAM cell
US7888721B2 (en) 2005-07-06 2011-02-15 Micron Technology, Inc. Surround gate access transistors with grown ultra-thin bodies
US7768051B2 (en) 2005-07-25 2010-08-03 Micron Technology, Inc. DRAM including a vertical surround gate transistor
US7696567B2 (en) 2005-08-31 2010-04-13 Micron Technology, Inc Semiconductor memory device
JP2007194259A (en) * 2006-01-17 2007-08-02 Toshiba Corp Semiconductor device, and method of manufacturing same
DE102007018098B4 (en) 2007-04-17 2016-06-16 Austriamicrosystems Ag Method for producing a semiconductor body with a trench and semiconductor body with a trench
TWI416660B (en) * 2008-03-19 2013-11-21 Vanguard Int Semiconduct Corp Semiconductor device and fabrication method thereof
JP6026914B2 (en) * 2013-02-12 2016-11-16 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor device
US9502414B2 (en) 2015-02-26 2016-11-22 Qualcomm Incorporated Adjacent device isolation
US9822723B2 (en) * 2015-03-04 2017-11-21 Denso Corporation Fuel level sensor diagnosis device
CN109346467A (en) * 2018-08-17 2019-02-15 矽力杰半导体技术(杭州)有限公司 The manufacturing method of semiconductor structure, driving chip and semiconductor structure
CN113054004B (en) * 2021-03-11 2022-08-23 电子科技大学 Reverse electric field coupling isolation structure applied to high-low voltage isolation of integrated circuit

Citations (7)

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Publication number Priority date Publication date Assignee Title
US4470062A (en) * 1979-08-31 1984-09-04 Hitachi, Ltd. Semiconductor device having isolation regions
EP0220108A2 (en) * 1985-10-07 1987-04-29 Thomson Components-Mostek Corporation Side-wall doping for trench isolation
JPS62131539A (en) * 1985-12-03 1987-06-13 Fujitsu Ltd Manufacture of semiconductor device
JPH01138730A (en) * 1987-11-25 1989-05-31 Fujitsu Ltd Semiconductor device
US5179038A (en) * 1989-12-22 1993-01-12 North American Philips Corp., Signetics Division High density trench isolation for MOS circuits
JPH0964164A (en) * 1995-08-24 1997-03-07 Nittetsu Semiconductor Kk Semiconductor device and its fabrication method
US5859466A (en) * 1995-06-07 1999-01-12 Nippon Steel Semiconductor Corporation Semiconductor device having a field-shield device isolation structure and method for making thereof

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US4819052A (en) * 1986-12-22 1989-04-04 Texas Instruments Incorporated Merged bipolar/CMOS technology using electrically active trench
JPH0713871B2 (en) * 1987-06-11 1995-02-15 三菱電機株式会社 Dynamic RAM
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Publication number Priority date Publication date Assignee Title
US4470062A (en) * 1979-08-31 1984-09-04 Hitachi, Ltd. Semiconductor device having isolation regions
EP0220108A2 (en) * 1985-10-07 1987-04-29 Thomson Components-Mostek Corporation Side-wall doping for trench isolation
JPS62131539A (en) * 1985-12-03 1987-06-13 Fujitsu Ltd Manufacture of semiconductor device
JPH01138730A (en) * 1987-11-25 1989-05-31 Fujitsu Ltd Semiconductor device
US5179038A (en) * 1989-12-22 1993-01-12 North American Philips Corp., Signetics Division High density trench isolation for MOS circuits
US5859466A (en) * 1995-06-07 1999-01-12 Nippon Steel Semiconductor Corporation Semiconductor device having a field-shield device isolation structure and method for making thereof
JPH0964164A (en) * 1995-08-24 1997-03-07 Nittetsu Semiconductor Kk Semiconductor device and its fabrication method

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* Cited by examiner, † Cited by third party
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PATENT ABSTRACTS OF JAPAN vol. 1997, no. 07 31 July 1997 (1997-07-31) *
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Also Published As

Publication number Publication date
EP1473766A3 (en) 2004-12-15
EP1125326A2 (en) 2001-08-22
DE69921172D1 (en) 2004-11-18
EP1125326B1 (en) 2004-10-13
ATE279785T1 (en) 2004-10-15
US6781212B1 (en) 2004-08-24
US20050012174A1 (en) 2005-01-20
WO2000013208A2 (en) 2000-03-09
US20060220109A1 (en) 2006-10-05
US7259442B2 (en) 2007-08-21
AU1516000A (en) 2000-03-21
EP1473766A2 (en) 2004-11-03
WO2000013208A9 (en) 2000-08-17
DE69921172T2 (en) 2006-02-16
TWM258414U (en) 2005-03-01

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