WO2000030320A1 - Circuits and methods for detecting the mode of a telecommunications signal - Google Patents
Circuits and methods for detecting the mode of a telecommunications signal Download PDFInfo
- Publication number
- WO2000030320A1 WO2000030320A1 PCT/US1999/026284 US9926284W WO0030320A1 WO 2000030320 A1 WO2000030320 A1 WO 2000030320A1 US 9926284 W US9926284 W US 9926284W WO 0030320 A1 WO0030320 A1 WO 0030320A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- mode
- telecommunications
- score
- modes
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M11/00—Telephonic communication systems specially adapted for combination with other electrical systems
- H04M11/06—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/40—Network security protocols
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/18—Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
Definitions
- the present invention relates generally to the field of telecommunications and, in particular, to circuits and methods for detecting the mode of a telecommunications signal.
- PSTN public switched telephone network
- modems typically carry data with bit rates of up to 56 Kbps.
- ISDN integrated services digital network
- PSTN public switched telephone network
- This network allows voice or data to be carried in digital form from user to user over the network.
- Various protocols or modes exist for transporting data over an ISDN network.
- the existing networks provide means for transporting telecommunications signals of a number of different modes between users. These modes are, essentially, incompatible and conventional equipment is typically dedicated to a specific telephone number such that a specific device only receives signals of a designated mode.
- a system and method for detecting the mode of a telecommunications signal which contemporaneously evaluates the signal for compliance with at least two signal modes. This evaluation is accomplished by analyzing a bit stream of the telecommunications signal over a period of time, e.g., up to 2 seconds.
- the mode is determined when a frame is successfully decoded from the bit stream according to one of the signal modes.
- the method also keeps a score for each mode as the signal is evaluated to assist in determining the mode of the signal.
- a method for detecting the mode of a telecommunications signal is provided.
- the method receives the telecommunications signal and contemporaneously evaluates the telecommunications signal for compliance with at least two signal modes.
- the evaluation indicates that the signal conforms to a first mode
- the signal is processed as a first mode signal.
- the evaluation indicates that the signal conforms to a second mode
- the signal is processed as a second mode signal.
- Figure 1 is a block diagram of an illustrative embodiment of the present invention.
- Figure 2 is a flow chart of an embodiment of a process for detecting the mode of a telecommunications signal.
- Figures 3 A and 3B are flow charts of an embodiment of a process for evaluating the compliance of a telecommunications signal with a selected mode.
- FIG. 1 is a block diagram of an illustrative embodiment of the present invention.
- System 100 includes computer 102 that is coupled to adaptor card 104.
- Adaptor card 104 provides a number of ports, 116,, . . . , 116 N for system 100 so as to allow system 100 to function as a Remote Access Server (RAS).
- Each port 116 comprises a digital signal processor (DSP) and can receive signals in one of a number of modes.
- DSP digital signal processor
- Adaptor card 104 includes a process that is loaded into a port when an incoming signal is received to detect the mode of the signal.
- Adaptor card 104 resides in an interface slot on the main or mother board of computer 102.
- Computer 102 comprises, for example, a microprocessor-based computer or server.
- Computer 102 includes processor 106, input/output devices 108, and memory 110 that are interconnected on the main board by bus 112.
- Input/output devices 108 include, for example, network connections, communications ports, and other conventional devices for connecting with external systems and networks.
- Processor 106 is communicatively coupled to processor 114 of adaptor card 104 through interface 113 and system controller 115.
- Processor 114 communicates with ports 116,, . . . 116 N , over bus 117.
- Ports 1 16,, . . . , 116 ⁇ communicate with, for example, the public switched telephone network (PSTN) over communication link 120, e.g., Tl, El or other appropriate communication link.
- Adaptor card 104 includes a time division multiplexing (TDM) bus 119 that couples ports 116,, . . . , 116 N with communication link 120.
- TDM time division multiplexing
- adaptor card 104 detects the mode of an incoming telecommunications signal based on the bits in the bit stream of the telecommunications signal.
- processor 114 places a selected port into reset, e.g., port 116,.
- a code image from memory devices 121 is loaded into port 116,.
- this code image includes a detection process that detects the mode of the incoming telecommunications signal as well as code to process the signal in at least two modes.
- the code image can include code to implement the processes described below with respect to Figures 2, 3A and 3B. Code to detect other appropriate modes can also be loaded into the selected port.
- Processor 114 then takes port 116, out of reset.
- the detection process then contemporaneously analyzes the incoming telecommunications signal for compliance with at least two modes for a period of time, e.g., two seconds. This analysis for the two modes is accomplished as data is received.
- the port processes the signal accordingly. If, however, the mode is not identified by the detection process, then another code image, e.g., for processing an analog data stream, can be loaded into port 116,. It is noted that in other embodiments, if the detection process fails to identify the mode of the telecommunications signal, then code containing additional detection algorithms can be loaded into the port.
- FIG. 2 is a flow chart of an embodiment of a process for detecting the mode of a telecommunications signal.
- the process analyzes a bit stream of the telecommunications signal to determine whether the signal is in a 64 kbps high level data link control (HDLC) mode, a 56 kbps HDLC mode or another mode, e.g., an analog data stream. It is noted that this process can be adapted to detect other modes and other data rates for telecommunications signals.
- HDLC high level data link control
- the process contemporaneously processes the bit stream of the telecommunications signal under at least two potential modes for a time period, e.g., up to two seconds. During this time period, the process evaluates the signal's compliance with the potential modes. As one measure of compliance, the process assigns a "score" to the modes under consideration as the bit stream is processed. The score for each mode is modified throughout the time period as the bit stream is processed. Each mode has a target score. When a target score is reached, the process identifies the mode that achieved the target score as the mode of the telecommunications signal. Further, the process can detect the mode of the telecommunications signal based on compliance with other aspects of the mode.
- the mode of the telecommunications signal can be identified when an error-free frame has been successfully decoded under one of the modes. Compliance in other aspects of a mode can also be used to identify the mode of the telecommunications signal.
- the process of Figure 2 begins analyzing a telecommunications signal (the "signal") at block 200.
- this signal comprises a bit stream that is received from a digital communication line, e.g., an ISDN line.
- the process initializes a number of variables used to monitor the compliance of the signal with two or more potential modes. For example, the process initializes the variables identified below in Table 1.
- the process extracts groups of bits (e.g., 8 bits or an octet) from the telecommunications line. The process further pushes the 8 bits into the 64K buffer for processing and monitoring as a 64K HDLC mode signal. Further, the process pushes the 7 least significant bits of the same octet into the 56K buffer for processing as a 56K HDLC mode signal.
- the process calls functions that test the data in the 64K buffer and the 56K buffer for compliance with their respective modes. These functions keep score for the modes under consideration using the 56K score and 64 K score variables. These variables track how closely the signal fits within their associated modes of operation. For example, points can be awarded according to the following table:
- the score is reset to zero.
- the target score for a two second interval of a 64K HDLC mode signal is 8000 and the target score for a 56K HDLC mode signal is 7000 for a similar two second interval. This represents the number of idle flags that would be transmitted during half of this time period assuming no data frames are transmitted. If a data frame is transmitted, then one of the modes of operation may successfully decode an error free data frame. In that case, the mode that decodes the error free data frame is declared the winner since the probability of decoding an error free data frame from an otherwise meaningless stream of data is effectively nil.
- a specific embodiment of a test process using this scoring format is described with respect to Figures 3 A and 3B below. It is noted that other scoring formats and criteria can be used to test the compliance of a signal with other particular modes of operation.
- the process analyzes the results of the data returned by the test functions.
- the process proceeds to block 220.
- the time variable is incremented.
- the time variable is tested to determine whether the time period of, for example, 2 seconds has lapsed. If yes, then the process concludes at block 224 that the telecommunications signal is not in either 56K or 64K HDLC mode. If time has not elapsed, the process returns to block 204 and processes the next group of bits.
- Figures 3 A and 3B are flow charts of an embodiment of a process or "test function" for evaluating a telecommunications signal for compliance with a selected mode, e.g., 56K HDLC or 64K HDLC signal modes.
- the process of Figures 3A and 3B is repeatedly called by a higher level process, e.g. , the process of Figure 2 at blocks 206 and 208, to analyze the telecommunications signal as its bit stream is received.
- the process uses a number of variables identified below in Table 3.
- the process performs a number of different operations depending on the detected state of the signal as represented by the variable state.
- Table 4 identifies the various states of the telecommunications signal.
- the process begins at block 300.
- the process determines whether the detected state of the telecommunications signal is still in the initial state, i.e., SYNC. If so, the process looks at the data in the buffer to determine whether the next group of bits, e.g., octet, is an idle flag. For HDLC, the idle flag is 01111110.
- the process determines whether there are sufficient bits in the buffer to make up an idle flag. If not, the process ends a block 306. If there are sufficient bits the process compares the first 8 bits in the buffer with the idle flag at block 308. If the bits match the idle flag, the process sets the state variable to IDLE and pops the 8 bits from the buffer. The process then proceeds to block 314.
- the process pops one bit from the buffer at block 310 and proceeds to block 314.
- Scoring idle flags and determining when a potential frame is being processed The next portion of the process processes idle flags and determines when a potential frame is being received.
- the process determines whether an idle flag has been detected. If so, the process proceeds to block 316 and determines whether at least 8 bits are in the buffer and the first 8 bits match the idle flag. If so, the score variable is incremented by 1 and the 8 bits are popped from the buffer at block 318. This means that consecutive idle flags have been detected. The process then proceeds to block 320.
- the process looks at the first 7 bits in the buffer at block 322. If the bits match the pattern 0111111, then the process proceeds to block 324 and increments the score variable indicating that consecutive idle flags have been detected. These seven bits are popped from the buffer. The process proceeds to block 320.
- the process determines whether there are at least 8 bits in the buffer. If not, the process ends at block 328. If there are at least 8 bits in the buffer, then the process determines that a potential frame has been detected because an octet that is not an idle flag was detected after an idle flag.
- the process initializes the CRC, frame store and octet count variables to monitor the success in decoding the potential frame.
- the process sets the state variable to INFRAME.
- the next portion of the process handles the processing of a potential frame.
- the process determines whether a potential frame is being processed. If so, the process proceeds to block 334 and pops and analyzes bits from the buffer according to the selected mode. For example, the process processes the bits as an HDLC signal and performs zero- extraction as necessary.
- the process increments the octet count variable by 1 and updates the CRC variable.
- the process stores any incomplete octets in frame store, if any.
- the process determines whether an end-of-frame (EOF) or a Frame Abort flag was detected. If not, then the data being processed is still within the potential frame and the process proceeds to block 342.
- EEF end-of-frame
- the process proceeds to block 348.
- the score variable is decremented by the number of octets in the potential frame as indicated by the octet count variable. It is noted that the value of score is capped on the lower end to not go below zero. The process proceeds to block 350.
- the process determines whether the frame was aborted. If so, the process returns the state variable back to the IDLE state and proceeds to block 342. If the frame was aborted, the process proceeds to block 356. The state variable is returned to the SYNC state and the score is decremented by 1.
- the process determines if bits remain in the buffer. If not, then the process ends at block 362. If there are more bits, the process proceeds to block 302.
- the process determines whether an error-free frame has been decoded. If not, the process returns to block 302. If an error-free frame has been decoded, then the process proceeds to block 360 and flushes all of the bits from the buffer. The process ends at block 362.
- the process for detecting the mode of a telecommunications signal is not limited to the HDLC modes described herein. Other modes, conventional or later developed, can be detected. Further, other aspects of the telecommunications signal can be monitored and scored to determine the mode of the signal.
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP99958818A EP1129562A1 (en) | 1998-11-13 | 1999-11-04 | Circuits and methods for detecting the mode of a telecommunications signal |
AU16104/00A AU1610400A (en) | 1998-11-13 | 1999-11-04 | Circuits and methods for detecting the mode of a telecommunications signal |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/191,501 US6614801B1 (en) | 1998-11-13 | 1998-11-13 | Circuits and methods for detecting the mode of a telecommunications signal |
US09/191,501 | 1998-11-13 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2000030320A1 true WO2000030320A1 (en) | 2000-05-25 |
Family
ID=22705737
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1999/026284 WO2000030320A1 (en) | 1998-11-13 | 1999-11-04 | Circuits and methods for detecting the mode of a telecommunications signal |
Country Status (4)
Country | Link |
---|---|
US (2) | US6614801B1 (en) |
EP (1) | EP1129562A1 (en) |
AU (1) | AU1610400A (en) |
WO (1) | WO2000030320A1 (en) |
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US6614801B1 (en) * | 1998-11-13 | 2003-09-02 | Digi International Inc. | Circuits and methods for detecting the mode of a telecommunications signal |
US6873877B1 (en) * | 1999-02-11 | 2005-03-29 | Loudeye Corp. | Distributed production system for digitally encoding information |
US7447307B2 (en) * | 2000-11-29 | 2008-11-04 | Cisco Technology, Inc. | Unpowered twisted pair loopback circuit for differential mode signaling |
KR100871511B1 (en) | 2006-12-22 | 2008-12-05 | 엘지노텔 주식회사 | Key telephone system having dual data transmission path between main board and peripheral bord and method for transmitting data using the same |
US8452351B2 (en) * | 2008-06-02 | 2013-05-28 | Qualcomm Incorporated | Methods and apparatus for saving battery power in mobile stations |
US8498199B2 (en) * | 2009-06-16 | 2013-07-30 | Alcatel Lucent | Maintaining time-division multiplexing over pseudowire connections during network outages |
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JPH04373255A (en) * | 1991-06-21 | 1992-12-25 | Ricoh Co Ltd | Isdn terminal equipment |
WO1997029563A1 (en) * | 1996-02-09 | 1997-08-14 | Microcom Systems, Inc. | Method and apparatus for detecting switched network protocols |
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-
1998
- 1998-11-13 US US09/191,501 patent/US6614801B1/en not_active Expired - Lifetime
-
1999
- 1999-11-04 WO PCT/US1999/026284 patent/WO2000030320A1/en not_active Application Discontinuation
- 1999-11-04 AU AU16104/00A patent/AU1610400A/en not_active Abandoned
- 1999-11-04 EP EP99958818A patent/EP1129562A1/en not_active Withdrawn
-
2003
- 2003-08-29 US US10/652,060 patent/US7602805B2/en not_active Expired - Fee Related
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JPH04373255A (en) * | 1991-06-21 | 1992-12-25 | Ricoh Co Ltd | Isdn terminal equipment |
WO1997029563A1 (en) * | 1996-02-09 | 1997-08-14 | Microcom Systems, Inc. | Method and apparatus for detecting switched network protocols |
Also Published As
Publication number | Publication date |
---|---|
US6614801B1 (en) | 2003-09-02 |
EP1129562A1 (en) | 2001-09-05 |
AU1610400A (en) | 2000-06-05 |
US20040042425A1 (en) | 2004-03-04 |
US7602805B2 (en) | 2009-10-13 |
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