WO2000051174A1 - A method of processing a polymer layer - Google Patents

A method of processing a polymer layer Download PDF

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Publication number
WO2000051174A1
WO2000051174A1 PCT/GB2000/000671 GB0000671W WO0051174A1 WO 2000051174 A1 WO2000051174 A1 WO 2000051174A1 GB 0000671 W GB0000671 W GB 0000671W WO 0051174 A1 WO0051174 A1 WO 0051174A1
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Prior art keywords
layer
plasma
power source
hydrogen
heating
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PCT/GB2000/000671
Other languages
French (fr)
Inventor
John Macneil
Knut Beekman
Anthony Paul Wilby
Original Assignee
Trikon Holdings Limited
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Publication date
Priority claimed from GBGB9904427.3A external-priority patent/GB9904427D0/en
Priority claimed from GBGB9922801.7A external-priority patent/GB9922801D0/en
Priority claimed from GB0000780A external-priority patent/GB0000780D0/en
Application filed by Trikon Holdings Limited filed Critical Trikon Holdings Limited
Priority to JP2000601683A priority Critical patent/JP2002538604A/en
Priority to GB0115769A priority patent/GB2361809B/en
Priority to DE10083897T priority patent/DE10083897T1/en
Priority to AU28140/00A priority patent/AU2814000A/en
Publication of WO2000051174A1 publication Critical patent/WO2000051174A1/en
Priority to US10/638,424 priority patent/US6846757B2/en

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    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
    • H01L21/31608Deposition of SiO2
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76882Reflowing or applying of pressure to better fill the contact hole

Definitions

  • a Method of Processing a Polymer Layer This invention relates to a method of processing a polymer layer, such as a short chain polymer layer, including Si-C bonds and in particular for processing low dielectric constant films of the type, for example, that are used as insulating layers on semiconductor wafers.
  • the dielectric material forms or is deposited upon the wafer as a short chain polymer that is further polymerised and hardened by heating to between 400° and 500°C, typically in a nitrogen atmosphere of between 30 mTorr and 20 Torr and more generally in the absence of oxygen at any convenient pressure.
  • the present invention consists in a method of processing a polymer layer including Si-C bonds including the steps of heating the layer to desorb moisture and harden the layer and exposing the layer to a plasma during the heating process .
  • the heating further polymerising the layer.
  • the plasma is a hydrogen plasma, but it is believed that a plasma based on oxygen getters may be particularly appropriate. It is preferred that the plasma is present throughout the heating stage.
  • the plasma may be maintained by the wafer support RF driven electrode on which the layer is supported e.g. indirectly on a semiconductor wafer reactor electrode (sometimes known as Reactive Ion Etch (RIE) mode even if no etching occurs) ; by a capacitively coupled RF electrode spaced from the wafer (often referred to as a "diode configuration" ; or by an inductively coupled arrangement (typically known as inductively coupled plasma (ICP) ) .
  • ICP inductively coupled plasma
  • the power supplied to the plasma may be of the order of between 400 and 750 watts the RF power required depending in part at what temperature the treatment of the layer takes place.
  • the wafer will be supported on a platen heated to a temperature of the order of between 350°C and 500°C.
  • the plasma is a hydrogen plasma
  • the heating step lasts for substantially 3 minutes .
  • the dielectric constant of the processed layer is preferably below 3.
  • the layer may typically be an insulating layer on the semiconductor wafer.
  • Figure 1 is a micrograph taken by an optical microscope of the edge of a wafer showing cracking of the layer after exposure to atmosphere, the layer having been processed in the prior art manner
  • Figure 2 is a graph demonstrating the thickness profile of a low k film
  • Figure 3 illustrates k values resulting from various experiments .
  • Figure 4 is an equivalent graph for further process conditions
  • Figure 5 shows Fourier Transform Infra Red (FTIR) data gathered from a central sample
  • Figure 6 shows FTIR data for a sample prepared in accordance with an embodiment of the invention
  • Figure 7 and 8 plot dielectric constant against plasma heating time at various temperatures and generally correspond with Figure 4;
  • Figures 9 to 12 illustrate the effect of strip process on k-value; and Figure 13 indicates k value stability.
  • the thus deposited short-chain polymer layer was then subjected to the standard heat treatment, but this time with a coincident plasma.
  • Various plasma treatments including hydrogen, argon, nitrogen, nitrous oxide and oxygen were run. Some benefit on cracking was observed which encouraged further experiments combining higher temperatures of heat treatment with various configurations of applied plasma power .
  • these plasma modes comprise the following:
  • the preferred process was run at 350°C or 400°C for three minutes.
  • Argon was also used but hydrogen was preferred.
  • Hydrogen produced DC bias levels of 475V against 260V with argon.
  • Figure 4 shows a further experiment using RIE modes of treatment mainly for hydrogen plasmas but with variations in the time and temperature combinations.
  • the third pair of points from the right were obtained with an argon plasma.
  • the controls were prepared as before.
  • the measurement bars for the k values indicate that obtained shortly after treatment and that obtained 48 hours after the treatment .
  • Figure 5 shows FTIR data gathered with the control process whilst Figure 6 shows similar data from a hydrogen plasma diode mode.
  • the heat only proves results in a final wafer temperature of approximately 460°C the wafer temperature of the hydrogen plasma treated wafer is not definitely known but must be greater than 375°C as this is the wafer temperature achieved without plasma (all other process conditions remaining the same) .
  • the hydrogen plasma treatment may result in a different wafer temperature to that of the prior art process of the control and thus affects the layer treatment. It is also believed that the plasma acts upon the layer not simply as a heat source. There are obvious differences resulting from the hydrogen plasma treatment.
  • Figure 6 shows reduced C-H, Si-H, Si-CH 3 and Si-0(Si 2 0 3 ) peaks . From previous experience the Applicants would have expected that such a variation would have yielded higher k values however the k values of the two examples shown are 2.84 and 2.77 respectively.
  • the following table shows the results of the k values and cracking distances for diode mode plasma treatment as set out above .
  • SUBSTTTU use in semiconductor manufacture.
  • the process is thus of value not simply to avoid the cracking of thick (greater than 7000-A) polymer layers containing Si-C bonds.
  • (buffered oxide etch) at 20°C are typically similar to or less than that of thermal oxide i.e. around 550 A/min.
  • the untreated films etch at over 10,000 A/min.
  • wet etch rate is generally used as an indication of merit for silicon dioxide layers where thermal oxide is considered to be of high quality.
  • the hydrogen plasma is effective at reducing k values even as a surface treatment perhaps by reducing the likelihood of water re-absorption whilst the applied heat may be a bulk effect performing the bulk moisture desorption from the as-deposited layer.
  • the hydrogen plasma clearly changes the bonding composition as evidenced by the FTIR data yielding an as-treated layer that etches slower and providing a treated layer that protects the underlying part of the layer from subsequent plasma etch processes and presumably water re-absorption.
  • the hydrogen plasma is effective on a heated layer at improving at least a surface of that layer to the benefit of the whole layer, the improvement being an improvement in the layers usefulness as a low k dielectric in a semiconductor device.
  • the hydrogen plasma treatment is thus shown to provide an effective barrier to a subsequent oxygen-based plasma process.
  • the improvement in the surface layer of the low k dielectrics such that its wet etch rate equates to that of a thermal oxide may be particularly advantageous in connection with chemical mechanical polishing.
  • the mechanical/chemical abrasion of low k dielectrics of the nano-porous and/or carbon containing kind presents a problem as they are typically of low density and have poor mechanical strength. Attempts to chemical mechanical polish such layers tends to cause dishing of the dielectric between the areas of metalisation. This should be less apparent with low k films which have been treated according to the invention.

Abstract

This invention relates to a method of processing polymer layers, for example low dielectric constant films, and includes the steps of heating the layer to desorb moisture and harden the layer and exposing the layer to a plasma during the heating process.

Description

A Method of Processing a Polymer Layer This invention relates to a method of processing a polymer layer, such as a short chain polymer layer, including Si-C bonds and in particular for processing low dielectric constant films of the type, for example, that are used as insulating layers on semiconductor wafers.
The pressure to produce semiconductor wafers with high device densities and high speeds has led to a search for low dielectric constant films for use as insulating layers in semiconductor devices. Such layers can be either spun on or deposited using, for example, chemical vapour deposition process. The layer is then usually heated to harden it. Recent work has been particularly directed to films consisting of polymer layers including Si-C bonds and the Applicants' International Patent Application WO 98/08249 describes, by way of example, such a process for depositing such a film.
The reduction in dielectric constant in such films seems to derive from a decreased density of film, possibly due to a disruption of the lattice by the carbon atoms present in the film.
The dielectric material forms or is deposited upon the wafer as a short chain polymer that is further polymerised and hardened by heating to between 400° and 500°C, typically in a nitrogen atmosphere of between 30 mTorr and 20 Torr and more generally in the absence of oxygen at any convenient pressure.
It has become apparent, however, that at least some films of this sort are susceptible to cracking, particularly at the wafer edge and an illustration of this is shown in Figure 1. Typically such cracking begins to occur at a nominal film thickness of about 5000-6000 A. The cause seems in part to be due to a dramatic increase in film thickness within 1mm of the wafer edge. Figure 2 shows the profile in this respect. The cracking appears only to occur following exposure to atmosphere and aggressively travels in towards the centre over a period of about 24 hours. The rate of cracking can be delayed by keeping the wafers in vacuum, but eventually they do crack when exposed to atmosphere.
The present invention consists in a method of processing a polymer layer including Si-C bonds including the steps of heating the layer to desorb moisture and harden the layer and exposing the layer to a plasma during the heating process .
Usually the deposited polymer layer comprising a short chain polymer, the heating further polymerising the layer. It is particularly preferred that the plasma is a hydrogen plasma, but it is believed that a plasma based on oxygen getters may be particularly appropriate. It is preferred that the plasma is present throughout the heating stage.
The plasma may be maintained by the wafer support RF driven electrode on which the layer is supported e.g. indirectly on a semiconductor wafer reactor electrode (sometimes known as Reactive Ion Etch (RIE) mode even if no etching occurs) ; by a capacitively coupled RF electrode spaced from the wafer (often referred to as a "diode configuration" ; or by an inductively coupled arrangement (typically known as inductively coupled plasma (ICP) ) . In addition a combination of ICP and RIE can be run. In any of these cases, for the purposes of this invention, the power supplied to the plasma may be of the order of between 400 and 750 watts the RF power required depending in part at what temperature the treatment of the layer takes place. Thus usually the wafer will be supported on a platen heated to a temperature of the order of between 350°C and 500°C.
In a particularly preferred arrangement the method has the following characteristics:
SUBSTTTUTE SHEET(RULE 26) (1) The plasma is maintained by an RF power source connected to a platen on which the wafer is
supported and the power supply provides
substantially 600 watts. (2) The plasma is a hydrogen plasma;
(3) The platen is heated to between 400°C and 500°C; and
(4) The heating step lasts for substantially 3 minutes .
In any of the above methods the dielectric constant of the processed layer is preferably below 3.
The layer may typically be an insulating layer on the semiconductor wafer.
It has now been established that further surprising benefits can be obtained if low k films are treated in this manner and these are set out below:
Although the invention has been defined above, it is to be understood it includes any inventive combination of
the features set out above or in the following description.
The invention may be performed in various ways and a specific embodiment will now be described by way of
example, with reference to the accompanying drawings, in which: Figure 1 is a micrograph taken by an optical microscope of the edge of a wafer showing cracking of the layer after exposure to atmosphere, the layer having been processed in the prior art manner; Figure 2 is a graph demonstrating the thickness profile of a low k film;
Figure 3 illustrates k values resulting from various experiments ;
Figure 4 is an equivalent graph for further process conditions;
Figure 5 shows Fourier Transform Infra Red (FTIR) data gathered from a central sample;
Figure 6 shows FTIR data for a sample prepared in accordance with an embodiment of the invention; Figure 7 and 8 plot dielectric constant against plasma heating time at various temperatures and generally correspond with Figure 4; and
Figures 9 to 12 illustrate the effect of strip process on k-value; and Figure 13 indicates k value stability.
Experiments were run to monitor both cracking and k (dielectric constant) values. Each property was also checked with time. The k values were measured on low resistivity silicon MOS structures and the cracking was monitored by optical microscope inspection under dark field illumination.
The deposition of the low k film onto silicon wafers was carried out in a standard chemical vapour deposition process with the following characteristics:
Figure imgf000008_0001
As a first step, the thus deposited short-chain polymer layer was then subjected to the standard heat treatment, but this time with a coincident plasma. Various plasma treatments including hydrogen, argon, nitrogen, nitrous oxide and oxygen were run. Some benefit on cracking was observed which encouraged further experiments combining higher temperatures of heat treatment with various configurations of applied plasma power .
As has been discussed above, these plasma modes comprise the following:
(1) RIE
(2) Diode
(3) ICP
(4) ICP and RIE in combination. Initially, hydrogen plasmas were run in RIE and ICP, both separately and combined, at temperatures of 400°C, 450°C and 500°C for three minutes and these were compared to an argon run in diode mode at 400°C. The results of these experiments show that a reduction in cracking could be achieved and therefore further trials were carried out at higher temperatures in diode mode .
These further experiments used a hydrogen plasma with a nominal platen temperature of 500°C using a 13.56MHz power supply although, in the absence of the plasma, the wafer temperature is estimated to reach approximately 375°C due to poor thermal coupling at low pressures and in the absence of wafer clamping. Wafer temperatures whilst a plasma is running, would be expected to be higher. Difficulties were experienced in obtaining meaningful experimental measurements of actual wafer temperatures due to RF interference on thermocouples .
The typical process conditions using a hydrogen plasma were as follows: Diode mode
Figure imgf000009_0001
Figure imgf000010_0001
ICP and RIE modes:
Figure imgf000010_0002
The preferred process was run at 350°C or 400°C for three minutes. Argon was also used but hydrogen was preferred. Hydrogen produced DC bias levels of 475V against 260V with argon.
In addition control experiments were run using a typical heat only process and the two conditions used are set out below.
Figure imgf000010_0003
The results of many of these experiments are illustrated in Figure 3. This shows the k value obtained for various process temperatures, excitation modes and time periods. That for the 500° temperature/ICP and RIE combined may show a measurement error, but alternatively it may be indicative of some irreversible change taking place if the film exceeds a critical temperature. Each result represents a single experiment and a subsequent k value measurement .
Crack tests were carried out on approximately 7,000 A films. The RIE only treatments showed no cracking, whilst the controls (heat treatment only) cracked to 25mm from the edge of the wafer . There was minimal cracking up to approximately 0.25mm from the edge of the ICP and combined ICP and RIE treatments, although there was no significant trend with platen temperatures in the range 400°C to 500°C. The RIE alone process also achieved particularly desirable k values and so, from the work done to date, this would appear to be the preferred process although the higher k values may be acceptable for many wafer configurations.
Figure 4 shows a further experiment using RIE modes of treatment mainly for hydrogen plasmas but with variations in the time and temperature combinations. The third pair of points from the right were obtained with an argon plasma. The controls were prepared as before. The measurement bars for the k values indicate that obtained shortly after treatment and that obtained 48 hours after the treatment .
The degree of cracking was worse for argon and for the 350°C/60s treatment. These experiments showed cracking extending approximately 0.33mm in from the wafer
SUBSTTTUTE SHEET RULE 2 edge for approximately 7000 A film, but it will be appreciated that these results are still noticeably better than for heat treatment alone. The other results showed cracking was not seen until almost 9000 A film thickness occurred and the best process seems to lie for a film between 8000 and 9000 A. Note that these are nominal layer thicknesses across the majority of the wafer. Cracking takes place in a part of the layer much thicker than this nominal thickness e.g. at the edge of the wafer as illustrated in Figure 2.
Some further experiments have been run in diode mode which suggests that comparable benefits to RIE can be obtained, but the plasmas were run at a much higher pressure (4 Torr) and much higher powers (1000 watts) . This may significantly affect the wafer temperature and consideration may have to be given to the question of thermal budget .
Figure 5 shows FTIR data gathered with the control process whilst Figure 6 shows similar data from a hydrogen plasma diode mode. The heat only proves results in a final wafer temperature of approximately 460°C the wafer temperature of the hydrogen plasma treated wafer is not definitely known but must be greater than 375°C as this is the wafer temperature achieved without plasma (all other process conditions remaining the same) . It is thus clear that the hydrogen plasma treatment may result in a different wafer temperature to that of the prior art process of the control and thus affects the layer treatment. It is also believed that the plasma acts upon the layer not simply as a heat source. There are obvious differences resulting from the hydrogen plasma treatment. Figure 6 shows reduced C-H, Si-H, Si-CH3 and Si-0(Si203) peaks . From previous experience the Applicants would have expected that such a variation would have yielded higher k values however the k values of the two examples shown are 2.84 and 2.77 respectively.
The following table shows the results of the k values and cracking distances for diode mode plasma treatment as set out above .
Figure imgf000013_0001
Thus the hydrogen plasma treatment significantly changes the film structure, as shown by the FTIR. Whilst it is difficult to reconcile these changes with the fact that the k value remains low, this reduction in carbon and hydrogen content may make these films more convenient for
SUBSTTTU use in semiconductor manufacture. The process is thus of value not simply to avoid the cracking of thick (greater than 7000-A) polymer layers containing Si-C bonds.
It will be again seen from Figures 7 and 8, that combination of heat and plasma exposure time affect the k- value achieved for example a 3 minute plasma exposure at
350°C or a 2 minute exposure at 400°C appear particularly efficacious .
Looking at the benefits of the treated films the wet etch rate of hydrogen treated films using a 10:1 BOE
(buffered oxide etch) at 20°C are typically similar to or less than that of thermal oxide i.e. around 550 A/min.
The untreated films etch at over 10,000 A/min.
Accordingly the hydrogen plasma treatment therefore reduces the wet etch rate by a factor of 20 or more. Wet etch rate is generally used as an indication of merit for silicon dioxide layers where thermal oxide is considered to be of high quality.
It has been determined that hydrogen plasma treatment is effective to varying depths dependent on the time of the process and the composition of the film. In general the lower the k value the greater the depth of treatment . Thus for a k=2.7 film, the treatment penetrated to a depth of 3,000 A whilst with a k=2.4 film the depth of treatment
SUBSTT was 5,700 A. Both tests were carried out under the following conditions:
Figure imgf000015_0001
It has been found that increasing the power level or changing the electrode spacing does not significantly increase the effective depth of the plasma treatment, but increasing the treatment time to 600 seconds increases the depth of treatment on the k=2.7 film from 3000 A to 6000 A. (i.e. twice the time, twice the depth) .
It will have been noted from our earlier application that the hydrogen treatment also improves, i.e. lowers, the k value. It was considered desirable to determine whether this k value improvement could be achieved for the bulk of the material, even if only a surface treatment took place. Accordingly a 6000 A, k=2.7 film was formed first by depositing two 3000 A layers, each of which were treated with a hydrogen plasma for 300 seconds. Secondly 6000 A layers were deposited and treated for either 300 or 600 seconds. No variation in k value was determined. This appears to show that the film that was only treated O 00/51174
14 to half its depth is still yielding an improved k value of the previous best known method of a vacuum thermal process, which is presumed to give a bulk effect. It is thus postulated that the hydrogen plasma is effective at reducing k values even as a surface treatment perhaps by reducing the likelihood of water re-absorption whilst the applied heat may be a bulk effect performing the bulk moisture desorption from the as-deposited layer. The hydrogen plasma clearly changes the bonding composition as evidenced by the FTIR data yielding an as-treated layer that etches slower and providing a treated layer that protects the underlying part of the layer from subsequent plasma etch processes and presumably water re-absorption. Thus the hydrogen plasma is effective on a heated layer at improving at least a surface of that layer to the benefit of the whole layer, the improvement being an improvement in the layers usefulness as a low k dielectric in a semiconductor device.
It had previously been found that if the low k films were subjected to oxygen based resist stripping process necessary if low k films are to be integrated into subtractive and damascene schemes using standard processes then carbon tended to be stripped out of the films and presumably replaced by water accompanied by a substantial increase in the k value.
Although Figures 5 and 6 indicate that the C-H and SiH bonds are reduced by the hydrogen plasma, resultant structure appears to be stable under strip process .
Thus turning to Figures 9 to 12 the integrated peak area ratios for the various indicated bonds are not changed substantially by an oxygen based stripping process. Similarly the effects of the oxygen and hydrogen (reducing) resist strips are shown on the hydrogen plasma treated films refractive indexes in Figures 11 and 12. Refractive index is an indirect indication of k value.
The hydrogen plasma treatment is thus shown to provide an effective barrier to a subsequent oxygen-based plasma process.
In order to ascertain the stability of the k value wafers were blanket coated in a k=2.7 Si-C polymer and were then subjected to a standard flourine based dielectric etch process, followed by a hydrogen plasma (reducing) resist strip process to simulate conditions on the exposed parts of a patterned etched dielectric structure. The dielectric constant was shown (see Figure 13) to remain at 2.7 after these etch and strip processes and to be stable over time. After 48 hours the k value had increased slightly. A 450°C anneal brought the k value back down to 2.7 and after a further 48 hours the k value had increased only very slightly.
The improvement in the surface layer of the low k dielectrics such that its wet etch rate equates to that of a thermal oxide may be particularly advantageous in connection with chemical mechanical polishing. The mechanical/chemical abrasion of low k dielectrics of the nano-porous and/or carbon containing kind presents a problem as they are typically of low density and have poor mechanical strength. Attempts to chemical mechanical polish such layers tends to cause dishing of the dielectric between the areas of metalisation. This should be less apparent with low k films which have been treated according to the invention.
The advantage of using a hydrogen plasma on a heated wafer were also recognised in our co-pending application U.K. No. 99044273 (now PCT Application No. ) which is incorporated herein by reference. This in particular indicates that hydrogen mixed with etch gas may maintain or enhance the low k structure during etching. It would therefore be particularly advantageous to use that approach when etching materials prepared in accordance with this application. It has also been appreciated that if the surface of the low k material is treated as described, then it will be possible in at least certain cases to dispense with the capping layer that has been used to date and thus compensate for the rather long cycle times which were mentioned in 9904427.3.

Claims

1. A method of processing a polymer layer including Si-C bonds including the steps of heating the layer to desorb moisture and harden the layer and exposing the layer to a plasma during the heating process .
2. A method as claimed in Claim 1 wherein the plasma is a hydrogen plasma .
3. A method as claimed in Claim 1 wherein the plasma is present throughout the heating stage.
4. A method as claimed in any one of the preceding claims where the layer is supported on an electrode and the plasma is at least partially maintained by an RF power source connected to the electrode.
5. A method as claimed in Claim 4 wherein the power source is between 400 and 750 watts.
6. A method as claimed in any one of claims 1 to 3 wherein the plasma is at least partially maintained by an RF power source feeding an electrode spaced from the layer.
7. A method as claimed in Claim 6 wherein the power is supplied between 400 and 750 watts.
8. A method as claimed in any one of Claims 1 to 5 wherein the plasma is at least partially maintained by an inductively coupled power source.
9. A method as claimed in Claim 8 wherein the power supplied is between 400 and 750 watts.
10. A method as claimed in any one of the preceding claims wherein the heating step lasts for between 2
and 4 minutes .
11. A method as claimed in Claim 10 wherein the heating
step lasts for 3 minutes.
12. A method as claimed in any one of the preceding claims wherein the layer is supported as a platen heated to between 350°C and 500°C.
13. A method as claimed in Claim 1 wherein:
(1) the plasma is maintained by an RF power source connected to a platen on which the layer is supported and the power source provides substantially 600 watts;
(2) the plasma is a hydrogen plasma;
(3) the platen is heated to between 400°C and 500°C;
and
(4) the heating step lasts for substantially 3 minutes.
14. A method as claimed in any one of the preceding
claims wherein the dielectric constant of the processed layer is below 3.00.
SUBSTT
15. A method as claimed in any one of the preceding claims wherein the layer is treated by the plasma to a depth >3000A.
16. A method as claimed in any one of the preceding claims wherein the layer is treated by the plasma to a depth of <600A.
17. A method as claimed in any one of the preceding claims wherein the layer is an insulating layer on a semiconductor wafer.
18. A method as claimed in any one of the preceding claims wherein the processing method reduces cracking in the layer.
19. A method as claimed in any one of the preceding claims wherein the processing method improves the wet etch rate of the layer.
SUBSTTTUTE
PCT/GB2000/000671 1999-02-26 2000-02-24 A method of processing a polymer layer WO2000051174A1 (en)

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