WO2000052702A1 - Dual threshold voltage sram cell with bit line leakage control - Google Patents
Dual threshold voltage sram cell with bit line leakage control Download PDFInfo
- Publication number
- WO2000052702A1 WO2000052702A1 PCT/US2000/004239 US0004239W WO0052702A1 WO 2000052702 A1 WO2000052702 A1 WO 2000052702A1 US 0004239 W US0004239 W US 0004239W WO 0052702 A1 WO0052702 A1 WO 0052702A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wordline
- wordlines
- integrated circuit
- signals
- bitline
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
Abstract
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
BR0008704-1A BR0008704A (en) | 1999-03-03 | 2000-02-17 | Sram cell with double threshold voltages with bit line dispersion control |
EP00908724A EP1155413B1 (en) | 1999-03-03 | 2000-02-17 | Dual threshold voltage sram cell with bit line leakage control |
DE60029757T DE60029757T2 (en) | 1999-03-03 | 2000-02-17 | Memory cell with two threshold voltages and control of bit power loss |
AU30017/00A AU3001700A (en) | 1999-03-03 | 2000-02-17 | Dual threshold voltage sram cell with bit line leakage control |
JP2000603043A JP2002538615A (en) | 1999-03-03 | 2000-02-17 | Dual threshold voltage SRAM cell with bit line leak control |
HK01108612A HK1037778A1 (en) | 1999-03-03 | 2001-12-07 | Dual threshold voltage sram cell with bit line leakage control |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/261,915 | 1999-03-03 | ||
US09/261,915 US6181608B1 (en) | 1999-03-03 | 1999-03-03 | Dual Vt SRAM cell with bitline leakage control |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2000052702A1 true WO2000052702A1 (en) | 2000-09-08 |
Family
ID=22995437
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2000/004239 WO2000052702A1 (en) | 1999-03-03 | 2000-02-17 | Dual threshold voltage sram cell with bit line leakage control |
Country Status (11)
Country | Link |
---|---|
US (1) | US6181608B1 (en) |
EP (1) | EP1155413B1 (en) |
JP (1) | JP2002538615A (en) |
KR (1) | KR100479670B1 (en) |
CN (1) | CN1253897C (en) |
AU (1) | AU3001700A (en) |
BR (1) | BR0008704A (en) |
DE (1) | DE60029757T2 (en) |
HK (1) | HK1037778A1 (en) |
TW (1) | TW463169B (en) |
WO (1) | WO2000052702A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009151932A (en) * | 2002-03-27 | 2009-07-09 | Regents Of The Univ Of California | Low-power high-performance memory circuit and related method |
WO2015009331A1 (en) * | 2013-07-15 | 2015-01-22 | Everspin Technologies, Inc. | Memory device with page emulation mode |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2002056681A (en) * | 2000-08-09 | 2002-02-22 | Toshiba Corp | Memory device |
US6519176B1 (en) * | 2000-09-29 | 2003-02-11 | Intel Corporation | Dual threshold SRAM cell for single-ended sensing |
TWI242085B (en) * | 2001-03-29 | 2005-10-21 | Sanyo Electric Co | Display device |
US6946901B2 (en) * | 2001-05-22 | 2005-09-20 | The Regents Of The University Of California | Low-power high-performance integrated circuit and related methods |
US6628557B2 (en) | 2001-09-28 | 2003-09-30 | Intel Corporation | Leakage-tolerant memory arrangements |
US6683804B1 (en) * | 2002-07-16 | 2004-01-27 | Analog Devices, Inc. | Read/write memory arrays and methods with predetermined and retrievable latent-state patterns |
DE10255102B3 (en) * | 2002-11-26 | 2004-04-29 | Infineon Technologies Ag | Semiconducting memory cell, especially SRAM cell, has arrangement for adapting leakage current that causes total leakage current independent of memory state, especially in the non-selected state |
US6724649B1 (en) * | 2002-12-19 | 2004-04-20 | Intel Corporation | Memory cell leakage reduction |
US7200050B2 (en) * | 2003-05-26 | 2007-04-03 | Semiconductor Energy Laboratory Co., Ltd. | Memory unit and semiconductor device |
JP2007529081A (en) * | 2003-07-01 | 2007-10-18 | ズィーモス テクノロジー,インコーポレイテッド | SRAM cell structure and circuit |
US6920061B2 (en) * | 2003-08-27 | 2005-07-19 | International Business Machines Corporation | Loadless NMOS four transistor dynamic dual Vt SRAM cell |
JP2005142289A (en) * | 2003-11-05 | 2005-06-02 | Toshiba Corp | Semiconductor storage device |
US7123500B2 (en) * | 2003-12-30 | 2006-10-17 | Intel Corporation | 1P1N 2T gain cell |
JP4342350B2 (en) * | 2004-03-11 | 2009-10-14 | 株式会社東芝 | Semiconductor memory device |
US7061794B1 (en) * | 2004-03-30 | 2006-06-13 | Virage Logic Corp. | Wordline-based source-biasing scheme for reducing memory cell leakage |
US7469465B2 (en) * | 2004-06-30 | 2008-12-30 | Hitachi Global Storage Technologies Netherlands B.V. | Method of providing a low-stress sensor configuration for a lithography-defined read sensor |
US7079426B2 (en) * | 2004-09-27 | 2006-07-18 | Intel Corporation | Dynamic multi-Vcc scheme for SRAM cell stability control |
US7110278B2 (en) * | 2004-09-29 | 2006-09-19 | Intel Corporation | Crosspoint memory array utilizing one time programmable antifuse cells |
US7321502B2 (en) * | 2004-09-30 | 2008-01-22 | Intel Corporation | Non volatile data storage through dielectric breakdown |
US7321504B2 (en) * | 2005-04-21 | 2008-01-22 | Micron Technology, Inc | Static random access memory cell |
KR100699857B1 (en) * | 2005-07-30 | 2007-03-27 | 삼성전자주식회사 | Loadless SRAM, method of operating the same and method of fabricating the same |
US7230842B2 (en) * | 2005-09-13 | 2007-06-12 | Intel Corporation | Memory cell having p-type pass device |
JP2007122814A (en) * | 2005-10-28 | 2007-05-17 | Oki Electric Ind Co Ltd | Semiconductor integrated circuit and leak current reduction method |
US20070153610A1 (en) * | 2005-12-29 | 2007-07-05 | Intel Corporation | Dynamic body bias with bias boost |
US8006164B2 (en) | 2006-09-29 | 2011-08-23 | Intel Corporation | Memory cell supply voltage control based on error detection |
US7558097B2 (en) * | 2006-12-28 | 2009-07-07 | Intel Corporation | Memory having bit line with resistor(s) between memory cells |
US8009461B2 (en) * | 2008-01-07 | 2011-08-30 | International Business Machines Corporation | SRAM device, and SRAM device design structure, with adaptable access transistors |
JP2009295229A (en) * | 2008-06-05 | 2009-12-17 | Toshiba Corp | Semiconductor memory device |
US20110149667A1 (en) * | 2009-12-23 | 2011-06-23 | Fatih Hamzaoglu | Reduced area memory array by using sense amplifier as write driver |
US9858986B2 (en) * | 2010-08-02 | 2018-01-02 | Texas Instruments Incorporated | Integrated circuit with low power SRAM |
US9111638B2 (en) * | 2012-07-13 | 2015-08-18 | Freescale Semiconductor, Inc. | SRAM bit cell with reduced bit line pre-charge voltage |
US9070477B1 (en) | 2012-12-12 | 2015-06-30 | Mie Fujitsu Semiconductor Limited | Bit interleaved low voltage static random access memory (SRAM) and related methods |
CN109859791B (en) * | 2019-01-31 | 2020-08-28 | 西安微电子技术研究所 | 9-pipe SRAM (static random Access memory) storage unit with full-isolation structure and read-write operation method thereof |
CN110277120B (en) * | 2019-06-27 | 2021-05-14 | 电子科技大学 | Single-ended 8-tube SRAM memory cell circuit capable of improving read-write stability under low voltage |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5020029A (en) * | 1989-07-05 | 1991-05-28 | Mitsubishi Denki Kabushiki Kaisha | Static semiconductor memory device with predetermined threshold voltages |
US5452246A (en) * | 1993-06-02 | 1995-09-19 | Fujitsu Limited | Static semiconductor memory device adapted for stabilization of low-voltage operation and reduction in cell size |
US5583821A (en) * | 1994-12-16 | 1996-12-10 | Sun Microsystems, Inc. | Storage cell using low powered/low threshold CMOS pass transistors having reduced charge leakage |
US5939762A (en) * | 1997-06-26 | 1999-08-17 | Integrated Device Technology, Inc. | SRAM cell using thin gate oxide pulldown transistors |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
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US5153852A (en) * | 1988-07-01 | 1992-10-06 | Vitesse Semiconductor Corporation | Static RAM cell with high speed and improved cell stability |
JP3076351B2 (en) * | 1990-04-09 | 2000-08-14 | 株式会社リコー | Semiconductor storage device with battery backup |
US5222039A (en) * | 1990-11-28 | 1993-06-22 | Thunderbird Technologies, Inc. | Static random access memory (SRAM) including Fermi-threshold field effect transistors |
US5732015A (en) * | 1991-04-23 | 1998-03-24 | Waferscale Integration, Inc. | SRAM with a programmable reference voltage |
US5461713A (en) * | 1991-05-10 | 1995-10-24 | Sgs-Thomson Microelectronics S.R.L. | Current offset sense amplifier of a modulated current or current unbalance type for programmable memories |
US5393689A (en) * | 1994-02-28 | 1995-02-28 | Motorola, Inc. | Process for forming a static-random-access memory cell |
DE69615421T2 (en) * | 1995-01-12 | 2002-06-06 | Intergraph Corp | Register memory with redirection option |
JP4198201B2 (en) * | 1995-06-02 | 2008-12-17 | 株式会社ルネサステクノロジ | Semiconductor device |
US5703392A (en) * | 1995-06-02 | 1997-12-30 | Utron Technology Inc | Minimum size integrated circuit static memory cell |
KR0182960B1 (en) * | 1995-08-31 | 1999-04-15 | 김광호 | Bit line load circuit having reduced chip area for semiconductor memory |
JPH09270494A (en) * | 1996-01-31 | 1997-10-14 | Hitachi Ltd | Semiconductor integrated circuit device |
US5790452A (en) * | 1996-05-02 | 1998-08-04 | Integrated Device Technology, Inc. | Memory cell having asymmetrical source/drain pass transistors and method for operating same |
US5828597A (en) * | 1997-04-02 | 1998-10-27 | Texas Instruments Incorporated | Low voltage, low power static random access memory cell |
-
1999
- 1999-03-03 US US09/261,915 patent/US6181608B1/en not_active Expired - Lifetime
-
2000
- 2000-02-17 EP EP00908724A patent/EP1155413B1/en not_active Expired - Lifetime
- 2000-02-17 KR KR10-2001-7011169A patent/KR100479670B1/en not_active IP Right Cessation
- 2000-02-17 JP JP2000603043A patent/JP2002538615A/en active Pending
- 2000-02-17 BR BR0008704-1A patent/BR0008704A/en not_active IP Right Cessation
- 2000-02-17 DE DE60029757T patent/DE60029757T2/en not_active Expired - Lifetime
- 2000-02-17 CN CNB008071195A patent/CN1253897C/en not_active Expired - Fee Related
- 2000-02-17 AU AU30017/00A patent/AU3001700A/en not_active Abandoned
- 2000-02-17 WO PCT/US2000/004239 patent/WO2000052702A1/en active IP Right Grant
- 2000-03-10 TW TW089103802A patent/TW463169B/en not_active IP Right Cessation
-
2001
- 2001-12-07 HK HK01108612A patent/HK1037778A1/en not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5020029A (en) * | 1989-07-05 | 1991-05-28 | Mitsubishi Denki Kabushiki Kaisha | Static semiconductor memory device with predetermined threshold voltages |
US5452246A (en) * | 1993-06-02 | 1995-09-19 | Fujitsu Limited | Static semiconductor memory device adapted for stabilization of low-voltage operation and reduction in cell size |
US5583821A (en) * | 1994-12-16 | 1996-12-10 | Sun Microsystems, Inc. | Storage cell using low powered/low threshold CMOS pass transistors having reduced charge leakage |
US5939762A (en) * | 1997-06-26 | 1999-08-17 | Integrated Device Technology, Inc. | SRAM cell using thin gate oxide pulldown transistors |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009151932A (en) * | 2002-03-27 | 2009-07-09 | Regents Of The Univ Of California | Low-power high-performance memory circuit and related method |
WO2015009331A1 (en) * | 2013-07-15 | 2015-01-22 | Everspin Technologies, Inc. | Memory device with page emulation mode |
US9529726B2 (en) | 2013-07-15 | 2016-12-27 | Everspin Technologies, Inc. | Memory device with page emulation mode |
US10114700B2 (en) | 2013-07-15 | 2018-10-30 | Everspin Technologies, Inc. | Memory device with page emulation mode |
Also Published As
Publication number | Publication date |
---|---|
KR20010102476A (en) | 2001-11-15 |
US6181608B1 (en) | 2001-01-30 |
JP2002538615A (en) | 2002-11-12 |
KR100479670B1 (en) | 2005-03-30 |
CN1253897C (en) | 2006-04-26 |
EP1155413B1 (en) | 2006-08-02 |
CN1357145A (en) | 2002-07-03 |
BR0008704A (en) | 2001-12-26 |
DE60029757T2 (en) | 2007-10-31 |
EP1155413A1 (en) | 2001-11-21 |
TW463169B (en) | 2001-11-11 |
HK1037778A1 (en) | 2002-02-15 |
AU3001700A (en) | 2000-09-21 |
DE60029757D1 (en) | 2006-09-14 |
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